Parallel simulation architecture implementation method for large-scale new energy field group

Abstract

The invention relates to the technical field of electric power simulation, and discloses a parallel simulation architecture implementation method for a large-scale new energy field group. The method is based on a GPU architecture, a deep fusion modeling mode and a parallel simulation method, and the universality of a parallel simulation architecture is remarkably improved by utilizing the correlation characteristics between new energy stations and between units in the stations. Element function codes are supported to be packaged into equipment end functions, calling in the GPU is facilitated, and flexibility and universality are achieved. A collaborative parallel computing method is adopted, respective advantages of the CPU and the GPU are exerted, a high-performance computing task is efficiently completed, and the simulation optimization efficiency is improved. The parallel simulation architecture implementation method is specifically divided into five modules: a host end function, a kernel function, an equipment end function, a high-performance operation library, a shared memory and a global memory. According to the modular design, the realizability and flexibility of the method are enhanced, deep development is easily carried out according to specific requirements on the basis, and the simulation efficiency of the large-scale new energy field group is remarkably improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of electromagnetic transient simulation of power systems, and in particular relates to a method for realizing a parallel simulation architecture for large-scale new energy field groups. Background Art

[0002] In order to adapt to the needs of rapid development of new energy, large-scale new energy clusters have gradually occupied an important position in the construction of new power systems. The scale and large-scale development of new energy clusters are supporting the realization of my country's "dual carbon" goals. Up to now, my country's photovoltaic installed capacity has reached 610 million kilowatts, ranking first in the world; offshore wind energy resources are rich and have good development potential, and it is estimated that the exploitable resources will reach 500 million kilowatts. With the large-scale grid connection of new energy such as photovoltaics and wind energy, the power system presents the "double high" characteristics of a high proportion of new energy and a high proportion of power electronic equipment.

[0003] Full electromagnetic transient simulation can characterize the broadband characteristics of new power systems at multiple time scales and reflect the dynamic response process of power electronic equipment. It is an effective means of accurate simulation of new power systems. In order to analyze new problems such as abnormal working conditions inside the station and oscillations between the station and the grid-connected system, a comprehensive simulation of large-scale new energy field groups is required to observe detailed internal characteristics.

[0004] However, the basic power generation units of large-scale renewable energy clusters have the characteristics of a large number of nodes and complex switching states. As the number of power generation units in the station increases, solving high-order time-varying networks will inevitably cause the "curse of dimensionality" problem. Existing simulation methods are difficult to balance scale, accuracy and efficiency, and it is urgent to establish an efficient electromagnetic transient simulation method for large-scale renewable energy systems.

[0005] Most existing simulation methods solve the problem of simulation scale from two aspects: equivalent modeling method and parallel simulation method, while achieving a certain model accuracy. In terms of equivalent modeling, equivalent modeling is mainly performed at the unit level and the station level respectively. Its essence is to improve the simulation efficiency by reducing the dimension of the node admittance matrix. The equivalent modeling methods at the unit level mainly include component decoupling, Thevenin equivalent and other methods. Component decoupling generally achieves the decoupling of the overall network through the interaction of port electrical information, which will produce a single-step delay error. Thevenin equivalent achieves the reduction of matrix scale by node elimination, retains internal characteristics while improving simulation efficiency, and is suitable for refined modeling of photovoltaic and wind power units.

[0006] In terms of parallel simulation computing, it mainly includes two levels: parallel simulation algorithms and hardware implementation. At the level of parallel simulation algorithms, existing research selects network partitioning algorithms such as transmission line decoupling and node splitting method on demand to meet the network partitioning requirements of various types of scenarios. At the hardware implementation level, the performance of central processing units (CPUs), graphics processing units (GPUs), and field programmable gate arrays (FPGAs) continues to improve, providing hardware foundation and computing power support for large-scale new energy system simulations, and supporting the efficient implementation of parallel algorithms. At the same time, personal computers contain GPU resources, but traditional offline simulation software such as PSCAD / EMTDC only uses the CPU resources in personal computers for simulation. How to use existing GPU resources to achieve efficient parallel simulation is crucial.

[0007] In order to realize the refined simulation of large-scale new energy systems, it is urgent to study fine-grained parallel simulation methods that deeply integrate hardware and algorithms. Existing studies mostly implement multi-threaded parallelization for massive basic component models in power systems, or optimize the high-order matrix solution process in network solution. Based on GPU, real-time electromagnetic transient simulation of multi-terminal high-voltage DC / AC power grids is realized, and only synchronous generators, transmission lines, modular multi-level converters, etc. are modeled, which is not very applicable to large-scale new energy power systems.

[0008] The CloudPSS electromagnetic transient simulation cloud platform proposes an electromagnetic transient fine-grained parallel algorithm for heterogeneous multi-core processors. The platform has achieved the establishment of a large number of basic components and has strong versatility, but it needs to rely on heterogeneous computing chips in the cloud. At the same time, the parallel design of large-scale new energy power systems with strong modular characteristics needs to be optimized. Existing GPU-based electromagnetic transient parallel simulation research mainly relies on the powerful computing power of GPU to achieve simulation speedup, and does not deeply consider the interaction between modeling methods, parallel simulation methods and hardware. Therefore, deeply coupling modeling methods and parallel simulation methods with hardware can maximize the advantages of hardware, modeling methods and parallel simulation methods, and a parallel simulation architecture implementation method for large-scale new energy field groups has emerged. Summary of the invention

[0009] The present invention provides a parallel simulation architecture implementation method for large-scale new energy field groups. Based on the hardware architecture of GPU, the modeling method and the parallel simulation method are deeply integrated to make full use of the advantages of hardware. Parallel simulation is simulated in four stages (begin, dsdyn, EMTDC, dsout), but the architecture design method is planned based on the characteristics of large-scale new energy sites combined with the GPU hardware architecture. It is specifically divided into five modules (host-side function, kernel function, device-side function, high-performance computing library, shared memory and global memory). The design steps are as follows:

[0010] Step 1: Initialize all components of the large-scale renewable energy station, solve constants, and pre-calculate the power electronic switch states on the host side.

[0011] Step 2: Design threads and thread blocks (Thread and Block) from the host side (CPU) to call kernel functions and complete the parallel design between sites of large-scale new energy sites.

[0012] Step 3: Further perform thread and thread block design inside the parent kernel function of step 2 to call the kernel function, complete the parallel design of each unit inside the station, encapsulate the commonly used components into device-side (GPU) functions, and call them in the kernel function.

[0013] Step 4: The sub-kernel function in step 3 includes the inverse solution, update and elimination process of large-scale new energy field groups, which requires a large amount of computing resources for matrix calculation. The host side (CPU) calls matrix operation libraries such as CUBLAS and uses the batch processing characteristics of the operation library matrix solution to simultaneously complete the inverse solution and update process.

[0014] Step 5: Save the voltage and current history information in the simulation in the global memory and shared memory, and update the component information in parallel in the kernel function calling thread to directly access the GPU memory.

[0015] Step 6: Store the data after each simulation step on the device side (GPU), and transmit them to the host side (CPU) for output after the simulation is completed.

[0016] It can be seen from the technical solution provided by the above invention that the overall architecture design method is highly flexible and maintainable, which makes it easy for scientific researchers to develop components with specific needs to participate in the simulation process. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 This is a flow chart of the parallel architecture implementation method for large-scale new energy field clusters.

[0019] Figure 2 Schematic diagram of the mapping relationship between GPU hardware and software architecture.

[0020] Figure 3 This is a schematic diagram of the CUDA abstract structure.

[0021] Figure 4 Schematic diagram of the parallel multi-threaded implementation flow of linear passive elements (LPE). DETAILED DESCRIPTION

[0022] The present invention provides a parallel simulation architecture implementation method for large-scale new energy field groups. The overall simulation process is as follows: Figure 1 As shown, the architecture design method constructed by the present invention will be further described in detail below.

[0023] Step 1: Initialize all components of large-scale new energy stations, solve constants, and pre-calculate the power electronic switch states on the host side. First, initialize on the host side (CPU), and call and manage the corresponding component parameters on the device side (GPU), and then send and load the data on the device side through data transmission between the host side and the device side.

[0024] Step 2: When calling a kernel function from the host side (CPU), the number of threads and thread blocks must be designed, because the kernel function is a function that performs calculations in units of threads, and the calculation involves the running of a large number of threads. A thread is the smallest unit of execution in a CUDA program. Each thread executes the same code in a CUDA kernel function (kernel), but uses different data. The thread has a unique thread index that can be accessed through the built-in variable threadIdx. A thread block is a group of threads that can be executed together and can communicate through shared memory. A thread block has a unique block index, which is accessed through the built-in variable blockIdx. The number of threads in each thread block is defined by blockDim. The scheduling and execution of thread blocks, as well as the synchronization between threads, are managed by the streaming multiprocessor (SM). When configuring the execution of a CUDA kernel function, << is usually used.<dimGrid,dimBlock> >>, where dimBlock specifies the number of threads in each thread block, and dimGrid specifies the number of thread blocks. According to the number of stations in the large-scale new energy cluster and the parallel requirements, the number of threads and thread blocks of the kernel function is designed to complete the parallel design between stations in the large-scale new energy cluster.

[0025] Step 3: Call the kernel function (child kernel function) inside the kernel function (parent kernel function) called in step 2 to perform parallel design between units inside the station. The child kernel function includes the inverse solution, update and elimination of the new energy station and the cluster equivalent process. Calling the child kernel function inside the parent kernel function is called "dynamic parallelism". Here, it is necessary to clarify the number of threads and thread blocks started by the child kernel function. Usually, the number of threads should be a multiple of 32 (a warp) to ensure optimal performance. Because the parent kernel function and the child kernel function cannot directly share memory, it is necessary to reasonably manage their respective shared memory requirements. It is also possible to uniformly plan and design the parameters of the same components on the host side. The execution of the child kernel function is asynchronous, and the parent kernel function will not wait for the child kernel function to complete. Therefore, if synchronous operation is required, the synchronization mechanism provided by CUDA must be used, such as cudaDeviceSynchronize. In this sub-kernel function, we need to realize the overall parallel design of the internal new energy station, and also consider the characteristics of each internal component. We need to perform detailed decomposition according to the characteristics of different components. For example, linear passive elements (LPE) such as resistors, inductors, capacitors, etc. usually use the trapezoidal integration method to construct the corresponding discrete adjoint equivalent circuit. Its general form is an equivalent conductance parallel historical current source. The current flowing through the LPE can be expressed by formula (1), where G eq Represents the equivalent conductivity value, I h (t-Δt) represents the historical current source. For different LPE, G eq Calculation and I h The update methods of (t-Δt) are different, as can be seen in equations (2) and (3). Figure 3 The parallel multi-thread implementation process of the designed LPE. It is worth noting that the CPU has complex hardware to perform branch prediction, while the GPU does not have a complex branch prediction mechanism. Therefore, when implementing the parallel multi-threading of the switch element model, the thread bundle differentiation problem that may occur in the same thread bundle must be considered. The equivalent conductance of the switch element model can be calculated by formula (4) and is not implemented in the form of if statement judgment in the program.

[0026] i(t)=G eq u(t)+I h (t-Δt) (1)

[0027]

[0028] While designing the various units inside the station in parallel in the sub-kernel function, the commonly used components can also be designed according to the functional code and encapsulated as device-side (GPU) functions, which can be called more conveniently and quickly in the kernel function on the device side. This method will be more efficient than simply using the class encapsulation method on the GPU side, because the class form is more cumbersome to use on the GPU, especially in this architecture where the kernel function is called layer by layer in parallel. Data transmission in the form of classes will be cumbersome and take up a lot of memory. At the same time, encapsulating the component as a device-side function makes the overall use universal. The encapsulated device-side function of the component can be directly used in any model architecture, which increases the flexibility of the parallel architecture implementation method.

[0029] Step 4: The sub-kernel function in step 3 includes the inverse solution, update and elimination process of large-scale new energy field groups. This process requires a large amount of computing resources to complete large-scale matrix calculations. It is necessary to call high-performance computing libraries such as CUBLAS on the host side (CPU) and use its matrix solution batch processing characteristics to simultaneously calculate and complete the inverse solution and update process of each unit in the station.

[0030]

[0031] The unit models inside the new energy station can also be simplified by using the node elimination method. The nodes are divided into external nodes and internal nodes. The node voltage equations are listed. It can be seen from equation (5) that the electromagnetic transient contribution of the internal nodes is transferred to the external nodes to achieve node contraction with accuracy preservation. Equation (5) is expanded to obtain equation (6). According to equation (6), the external node voltage V EX Replace the internal node voltage V with the same value IN Point to equation (7), and then substitute equation (7) back into equation (5) and sort it out to get equation (8). The port equivalent models of each unit and station have the same structure, as shown in equation (9). It can be seen that the inverse solution and update process of the new energy field group have a large number of matrix calculations, which requires a lot of computing power, and the information between each unit is completely independent. Here, the kernel function can be jumped out, and high-performance matrix operation libraries such as CUBLAS can be called on the host side (CPU). The characteristics of matrix batch processing can be used to complete the matrix solution at the same time, which significantly improves the simulation efficiency.

[0032] Step 5: During the simulation process, the historical information of voltage and current is stored in the global memory and shared memory respectively. The global memory is used to store data shared by all threads, while the shared memory is shared by threads within the thread block, providing fast access speed. In the CUDA kernel function, the voltage and current information of each component is updated in parallel by configuring threads and thread blocks. Each thread can directly access the GPU memory. When historical data needs to be accessed, it is read from the global memory and the shared memory is used to cache temporary data, thereby optimizing memory bandwidth and access speed. In this way, the hardware architecture and memory hierarchy of the GPU are fully utilized to achieve efficient simulation calculations.

[0033] Step 6: Store the data after each simulation step on the device side (GPU) and transmit them to the host side (CPU) for output after the simulation is completed. Because there is a transmission delay between the host side (CPU) and the device side (GPU), sufficient storage space is allocated in the global memory of the GPU for simulation data such as voltage and current at the beginning of the simulation. According to the simulation scale and the number of steps, the required memory size is pre-calculated and allocated at one time. During the simulation process, each thread directly operates these pre-allocated memory areas, thereby avoiding frequent memory allocation and release operations and improving memory management efficiency. After each simulation step, the generated simulation data is saved in the global memory of the GPU. The global memory has a large storage capacity and is suitable for storing large amounts of data. This can avoid data transmission for each simulation step, thereby reducing the overhead caused by frequent data transmission. After the entire simulation process is completed, all simulation data is transmitted to the CPU at one time. This batch transmission method can significantly reduce transmission delay compared to multiple small-scale transmissions. Batch transmission can make full use of the bandwidth of the PCIe bus and improve data transmission efficiency. This step can also utilize CUDA's asynchronous data transmission mechanism to achieve overlap of data transmission and calculation through the cudaMemcpyAsync function to improve overall execution efficiency.

[0034] Finally, it should be noted that the above description is only a preferred embodiment of the present invention that is easily understood by those skilled in the art, and is not intended to limit the present invention. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. Implementation method of parallel simulation architecture for large-scale new energy clusters. Its core significance lies in the fact that, based on the GPU hardware architecture, the modeling method and the parallel simulation method are deeply integrated, and the operation is no longer simply differentiated and optimized, but the characteristics of the model itself are fully explored. The simulation of large-scale new energy clusters should fully consider the association and internal characteristics between new energy stations and between the units within the stations. Starting from the model, the modeling method and the parallel simulation method are deeply analyzed to improve the efficiency of simulation optimization and increase the professionalism and feasibility of the architecture. This method uses a collaborative parallel computing method. The CPU is designed to optimize serial code and focuses on quickly implementing a certain operation with low latency; the GPU is suitable for applications with high computing intensity to solve the problem of data parallel computing. The GPU can only be used as a coprocessor of the CPU and cannot run alone; the CPU and GPU each take advantage of their strengths to quickly and efficiently complete high-performance computing tasks in collaboration. This method is implemented based on the GPU hardware architecture and requires the use of the CUDA programming model. When using CUDA for parallel programming, it is necessary to consider the thread level and memory level of CUDA. In the CUDA thread level, grids, blocks, and threads correspond to GPUs, SMs, and cores in the hardware architecture, respectively. In the CUDA memory hierarchy, each thread has its own registers and local memory. Device-side memory cannot directly access host memory, so all data that needs to be processed by the GPU must first be copied to the device's global memory. This method supports encapsulating components as a device-side (GPU) function, which is more convenient to call and implement in the GPU, and has flexibility and versatility. Parallel simulation is simulated in four stages (begin, dsdyn, EMTDC, dsout), but the architecture implementation method is designed based on the characteristics of large-scale new energy sites combined with the GPU hardware architecture. It is divided into five major modules (host-side functions, kernel functions, device-side functions, high-performance computing libraries, shared memory, and global memory). The specific design steps are as follows: Step 1: Initialize all components of the large-scale new energy station, solve constants, and pre-calculate the power electronic switch states on the host side (CPU). Step 2: Call the kernel function from the host side and allocate the dimensions of thread and thread block (Thread and Block) at the same time to complete the parallel design between stations of large-scale new energy field clusters. Step 3: Inside the parent kernel function called in step 2, threads and thread blocks are allocated according to the number of internal units of each station, and the child kernel function is called to complete the parallel design between the internal components of the station. The commonly used components are encapsulated as device-side (GPU) functions and called in the kernel function. Step 4: The sub-kernel function in step 3 includes the inverse solution, update and elimination process of large-scale new energy field groups, which requires a large amount of computing resources for matrix calculations. Matrix operation libraries such as CUBLAS are used to utilize the batch processing characteristics of the matrix solution of the operation library to simultaneously complete the inverse solution and update process. Step 5: Save the voltage and current history information in the simulation in the global memory and shared memory. When the parent kernel function and the child kernel function update the component information in parallel, they will directly access the GPU memory to improve the access efficiency. Step 6: Store the data after each simulation step on the device side (GPU), and transmit them to the host side (CPU) for output after the simulation is completed.

2. According to the method for realizing parallel simulation architecture for large-scale new energy field groups described in the claims, Features: From step 1 to step 5, the previous step is the basis for the execution of the next step. Step 4 jumps out of the kernel function and calls it from the host side to execute it on the device side until the simulation ends. Among these 6 steps, step 1 and step 6 only need to be executed once for initialization and simulation result output respectively. Steps 2 to 5 are to promote the simulation on a time scale.

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