Evaluation method and device for low-power-consumption efficiency, and electronic equipment
By evaluating the power consumption of the shutdown power domain and special circuit units in the chip circuit, the lack of efficiency evaluation in the verification of low-power designs in the prior art is solved, and more efficient low-power design and circuit optimization are achieved.
Patent Information
- Application Number
- CN202411127865.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-15
- Publication Date
- 2024-12-13
AI Technical Summary
The prior art lacks power consumption efficiency evaluation in the low-power design verification process, affecting design efficiency and effect.
By determining the shutdown power domain and special circuit units in the chip circuit, calculating their power consumption, and evaluating low power consumption efficiency, a low power consumption efficiency evaluation method and device, including analytical modules, power consumption calculation modules and Power consumption evaluation module.
Quantify the power consumption efficiency changes after low-power design schemes, improve the efficiency and design effect of low-power designs, and provide design references to optimize circuit design.
Smart Images
Figure CN119129493A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of integrated circuit technology, and in particular to a method, device, and electronic device for evaluating low power consumption efficiency. Background Art
[0002] Existing chips usually use power gating technology for low-power design. Power gating technology can selectively shut down certain modules in the chip while maintaining power supply to other modules to reduce the power consumption of modules in standby mode, thereby reducing overall power consumption.
[0003] However, in the circuit design process, existing tools are mainly used to verify whether the functions of low-power designs meet the design requirements. There is a lack of power consumption efficiency evaluation of low-power designs, which cannot help designers quantify the effects of low-power design solutions during the design process, affecting design efficiency and design effects. Summary of the invention
[0004] In response to the above technical problems, the present application provides a low power consumption efficiency evaluation method, device, and electronic device. Based on the shutoff power domain and special circuit units in the chip circuit, the low power consumption efficiency of the shutoff power domain is evaluated. The change in power consumption efficiency after adopting the low power consumption design scheme can be quantified, thereby improving the efficiency and design effect of the low power consumption design.
[0005] In order to solve the above technical problems, the present application provides a method for evaluating low power consumption efficiency, the method comprising the following steps:
[0006] Determine a power domain that can be turned off in a chip circuit and a special circuit unit corresponding to the power domain that can be turned off;
[0007] Calculating a first power consumption of the special circuit unit and a second power consumption when the switchable power domain is turned on;
[0008] The low power consumption efficiency of the shut-down power domain is evaluated according to the first power consumption and the second power consumption.
[0009] In some embodiments, the determining of the power domain that can be turned off in the chip circuit and the special circuit unit corresponding to the power domain that can be turned off includes:
[0010] Obtaining a unified power format file, a netlist file, and a standard cell library file of the chip circuit;
[0011] The turnable power domain and the special circuit unit corresponding to the turnable power domain are determined according to the unified power format file, the netlist file and the standard cell library file.
[0012] In some embodiments, the unified power format file includes power domain information and power switch state information in the chip circuit, and determining the switchable power domain according to the unified power format file, the netlist file and the standard cell library file includes:
[0013] Identify non-special circuit cells in the chip circuit based on the netlist file and the standard cell library file;
[0014] Determining the power domain to which the non-special circuit unit belongs according to the power domain information;
[0015] The shut-down-able power domain in the power domains is determined according to the power switch state information.
[0016] In some embodiments, the unified power format file includes special unit electrical information, and determining the special circuit unit corresponding to the switchable power domain according to the unified power format file, the netlist file and the standard cell library file includes:
[0017] Identify the special circuit cell based on the netlist file and the standard cell library file;
[0018] The switchable power domain to which the special circuit unit is connected is determined according to the special unit electrical information, so as to determine the special circuit unit corresponding to the switchable power domain.
[0019] In some embodiments, the identifying the special circuit unit based on the netlist file and the standard cell library file includes:
[0020] Obtaining a cell type of a cell instance in the netlist file;
[0021] Searching for a keyword corresponding to the cell type in the standard cell library file;
[0022] If the keyword is a preset keyword, the unit instance is determined to be the special circuit unit.
[0023] In some embodiments, evaluating the low power consumption efficiency of the shutoff power domain according to the first power consumption and the second power consumption includes:
[0024] The percentage of the difference between the first power consumption and the second power consumption in the second power consumption is calculated to obtain the low power consumption efficiency of the shut-down power domain.
[0025] In some embodiments, after evaluating the low power consumption efficiency of the shutoff power domain according to the first power consumption and the second power consumption, the method further includes:
[0026] According to the low power consumption efficiency of each of the power domains that can be turned off in the chip circuit, an evaluation result of the low power consumption efficiency of the chip circuit is generated.
[0027] The present application also provides a low power consumption efficiency evaluation device, comprising:
[0028] A parsing module, used to determine a power domain that can be turned off in the chip circuit and a special circuit unit corresponding to the power domain that can be turned off;
[0029] A power consumption calculation module, used for calculating a first power consumption of the special circuit unit and a second power consumption when the switchable power domain is turned on;
[0030] The power consumption evaluation module is used to evaluate the low power consumption efficiency of the shutoff power domain according to the first power consumption and the second power consumption.
[0031] The present application also provides an electronic device, including a storage medium and a controller, wherein a computer program is stored on the storage medium, and when the computer program is executed by the controller, the steps of any of the above-mentioned low power consumption efficiency evaluation methods are implemented.
[0032] The present application also provides a storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of any of the above-mentioned methods for evaluating low power consumption efficiency are implemented.
[0033] The low power consumption efficiency evaluation method, device, and electronic device of the present application include: determining a power domain that can be turned off in a chip circuit and a special circuit unit corresponding to the power domain that can be turned off; calculating a first power consumption of the special circuit unit, and a second power consumption when the power domain that can be turned off is turned on; and evaluating the low power consumption efficiency of the power domain that can be turned off based on the first power consumption and the second power consumption. The technical solution of the present application evaluates the low power consumption efficiency of the power domain that can be turned off based on the power domain that can be turned off and the special circuit unit in the chip circuit, and can quantify the change in power consumption efficiency after adopting a low power consumption design solution, thereby improving the efficiency and design effect of the low power consumption design. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] Figure 1 The figure is a flowchart of a method for evaluating low power consumption efficiency according to an embodiment.
[0035] Figure 2 is a schematic diagram showing an evaluation result according to an embodiment.
[0036] Figure 3 The figure is a specific flowchart of a method for evaluating low power consumption efficiency according to an embodiment.
[0037] Figure 4The figure is a schematic diagram of the structure of a low power consumption efficiency evaluation device according to an embodiment. DETAILED DESCRIPTION
[0038] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thoroughly understood.
[0039] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items. In the present invention, "each" includes one and more than two quantities.
[0040] Figure 1 FIG. 1 is a flow chart showing a method for evaluating low power consumption efficiency according to an embodiment. Figure 1 As shown, a low power consumption efficiency evaluation method of the present application comprises the following steps:
[0041] S1, determining a power domain that can be turned off in a chip circuit and a special circuit unit corresponding to the power domain that can be turned off;
[0042] S2, calculating a first power consumption of the special circuit unit and a second power consumption when the switchable power domain is turned on;
[0043] S3, evaluating the low power consumption efficiency of the power domain that can be shut down according to the first power consumption and the second power consumption.
[0044] Among them, the shutoff power domain is a type of power domain in the chip circuit, that is, a module in the chip circuit that reduces power consumption through power gating technology. The shutoff power domain usually has the following characteristics:
[0045] Non-critical modules: do not need to work continuously during the entire system operation and can be activated or shut down as needed without affecting the overall function of the system;
[0046] High static power consumption: These modules may have high static power consumption when idle, so reducing overall energy consumption by turning off their power supply;
[0047] Independently controllable: The modules that can be shut down should be able to control the power supply independently, be isolated from other system modules in design, and have their own power gating logic and switches;
[0048] State saving and restoration: Such modules should be able to save their current states before power is turned off and restore them when power is turned back on so that their operation can continue seamlessly;
[0049] Acceptable cold start cost: When a module is powered off and restarted (cold start), it may take extra time and energy to restore the state and reinitialize. This cost should be acceptable and will not offset the energy saving advantage brought by power off.
[0050] Low frequency usage: Modules that are used less frequently are ideal targets for power gating techniques because they are likely to be idle most of the time.
[0051] No dynamic power consumption: There is no flipping of cells in this power domain, that is, no dynamic power consumption.
[0052] A power domain is a group of elements in circuit design. By default, all logic elements in each power domain use the same main power supply and main ground. For example, the unit instances in power domain (PD1) share power supplies VDD1 and VSS1, the unit instances in power domain (PD_TOP) share power supplies VDD and VSS, and the unit instances in power domain (PD2) share power supplies VDD2 and VSS2. Corresponding to the power domain that can be turned off, there is also a normally-on power domain in the chip circuit, which is continuously turned on during the operation of the chip circuit.
[0053] Special circuit units are circuit units introduced into the chip circuit to ensure the correct implementation of power gating technology when power gating technology is adopted, including power switching fabric (also called power switch), isolation cell, and signal retention cell (retention DFFS, also called retention cell).
[0054] Among them, the power switch unit is the switch that controls the power domain. A key role of the power switch unit is to limit the current inrush when the power module is turned on, because excessive inrush current will cause voltage spikes on the power supply, which may damage the registers in the normally open domain module and the reserved registers in the power gating module. The representative method of controlling this inrush current is to pass the control signal to the switch using a chain structure. Each switch structure usually has hundreds (or more) of switches working in parallel. The control signal from the power controller is connected to the first switch, and the buffered (with appropriate delay) signal is obtained and sent to the next switch. The introduction of these switch units will increase power consumption. If the introduced power consumption is too large, it may cause the design to fail to achieve the expected power consumption reduction, and it may even appear that the power consumption value after the low-power design is greater than the power consumption before the design. Therefore, it is necessary to evaluate the low-power efficiency.
[0055] The isolation unit is used to ensure the definite value of the output signal of the power domain that can be turned off. When the signal is transmitted from one module to another, if the power supply at the input end is turned off, the output signal of the power domain that can be turned off may have an unpredictable value. If this value is passed on, it may cause functional problems. Therefore, the output signal of the power domain that can be turned off needs to be isolated from other modules through the isolation unit.
[0056] The signal retention unit is used to ensure that data is not lost when the power domain can be turned off. If some data still does not want to be lost during the power off process, the signal retention unit is needed to save the data. The biggest difference between the signal retention unit and the general register is that it has two different power supplies, corresponding to the master module and a slave module (slave latch). When the master module needs to be powered off and the data needs to be saved, the signal to be saved is sent to the signal retention unit, so that the data can be input from the master module to the slave module. The slave module is usually connected to the always-on power supply to ensure that it can work normally.
[0057] The first power consumption of a special circuit unit refers to the power consumption of the special circuit unit when the chip circuit is working normally. The power consumption of a special circuit unit includes the static power consumption and dynamic power consumption of the special circuit unit. The normal operation of a chip circuit refers to the state in which the chip circuit is operating under the set operating parameters. When the chip circuit is working normally, combined with the power consumption control needs of the shutoff power domain, the special circuit unit may turn on the shutoff power domain or turn off the shutoff power domain. Therefore, the power consumption of the special circuit unit is the power consumption generated by the special circuit unit during the normal operation of the chip circuit. After the special circuit unit is introduced, additional power consumption will be introduced compared to not introducing the special circuit unit. If the introduced power consumption is too large, the design may not achieve the expected result of reducing power consumption, and it may even result in the power consumption value after low-power design being greater than the power consumption without low-power design.
[0058] The second power consumption of the power domain that can be turned off refers to the power consumption when the power domain that can be turned off is turned on. Since the power domain that can be turned off has no dynamic power consumption, the second power consumption can be the static power consumption of the power domain that can be turned off. The second power consumption of the power domain that can be turned off is also the power consumption that can be saved theoretically after using the power gating design technology (the power consumption introduced by special circuit units is not considered at this time).
[0059] In this way, based on the power consumption of the power domains and special circuit units in the chip circuit, the low power efficiency after adopting the low power design solution can be quantitatively evaluated, so as to provide design references for designers in a timely manner during the circuit design process, and improve the efficiency and design effect of low power design. In actual implementation, the low power efficiency can be performed simultaneously with the overall power consumption evaluation of the chip circuit, or it can be performed separately. The low power efficiency can be evaluated for all the power domains that can be turned off in the chip circuit, or for some or specified power domains that can be turned off in the chip circuit.
[0060] In some embodiments, step S1, determining a power domain that can be turned off in a chip circuit and a special circuit unit corresponding to the power domain that can be turned off, includes:
[0061] Obtain unified power format files, netlist files and standard cell library files of chip circuits;
[0062] According to the unified power format file, the netlist file and the standard cell library file, a turn-off power domain and a special circuit unit corresponding to the turn-off power domain are determined.
[0063] Among them, the Unified Power Format (UPF) is a set of standard Tcl-like languages used to describe the low-power design intent in chip design. Using the UPF language, you can describe power supply networks, power switches, isolation units, retention register units and other elements related to power design. Adding UPF to the low-power design process can ensure the consistent expression of power intent in the IC design process.
[0064] The netlist file is used to describe the circuit information of the design, including the cell type to which the cell instance belongs. The standard cell library file uses different keywords to describe the properties of different cell types, including power switch cells, isolation cells, signal retention cells, non-special circuit cells, etc. Among them, non-special circuit cells are circuit cells other than special circuit cells, which can belong to the power domain that can be turned off or the normally open power domain.
[0065] By parsing the unified power format file, the power domain information, power switch status information (power state) and special unit electrical and ground information of the chip circuit can be obtained. After identifying the properties of the unit instance in the chip circuit based on the netlist file and the standard unit library file, the power domain information, power switch status information and special unit electrical and ground information of the chip circuit can be combined to identify the turn-off power domain and the corresponding special circuit unit.
[0066] When parsing the UPF file to obtain the power domain information, power switch status information, and special unit electrical information of the chip circuit, the following are examples of UPF commands involved in the parsing:
[0067] set_scope: specifies the scope of the power domain;
[0068] set_design: specifies chip design;
[0069] create_supply_set: creates a supply set, which represents a set of related power / ground / nwell / pwell / deepnwell / deeppwell nets;
[0070] create_supply_port: creates a supply port, which is mainly used to supply power / ground;
[0071] connect_supply_net: connects the supply net and the supply port (creates a power supply network and uses the -domain parameter to specify the power domain to which it belongs);
[0072] set_domain_supply_net: sets the supply set of the power domain;
[0073] create_power_domain: define the power domain;
[0074] create_power_switch: defines the power switch unit;
[0075] set_isolation: sets the inserted isolation unit;
[0076] set_level_shiter: Set the inserted voltage conversion unit;
[0077] set_retention: sets the inserted signal retention unit;
[0078] add_power_state: defines the power switch state information.
[0079] In some embodiments, the unified power format file includes power domain information and power switch status information in the chip circuit, and determining the power domain that can be turned off according to the unified power format file, the netlist file and the standard cell library file includes:
[0080] Identify non-special circuit cells in chip circuits based on netlist files and standard cell library files;
[0081] According to the power domain information, determine the power domain to which the non-special circuit unit belongs;
[0082] A shut-down power domain in the power domain is determined according to the power switch state information.
[0083] Among them, special circuit units have corresponding keywords in the standard cell library file for distinction, and for non-special circuit units, keywords are not used for distinction. Therefore, when traversing the netlist file, non-special circuit units in the chip circuit can be identified based on the netlist file and the standard cell library file. Further, according to the power domain information such as the range of the power domain, the power supply network information, etc., the power domain to which the non-special circuit unit belongs is determined, and it is distinguished whether the power domain to which it belongs is a turnable power domain or a normally open power domain, so that all the turnable power domains in the chip circuit can be determined.
[0084] In some embodiments, the unified power format file includes special unit electrical information, and the special circuit unit corresponding to the switchable power domain is determined according to the unified power format file, the netlist file and the standard unit library file, including:
[0085] Identify special circuit cells based on netlist files and standard cell library files;
[0086] The switchable power domain to which the special circuit unit is connected is determined according to the special unit electrical information, so as to determine the special circuit unit corresponding to the switchable power domain.
[0087] Among them, special circuit units have corresponding keywords in the standard cell library file for distinction. When traversing the netlist file, special circuit units can be identified based on the netlist file and the standard cell library file. Then, the turnable power domain connected to the special circuit unit is determined according to the electrical information of the special unit, and the special circuit units corresponding to each turnable power domain can be determined.
[0088] In some embodiments, identifying a special circuit cell based on a netlist file and a standard cell library file includes:
[0089] Get the cell type of the cell instance in the netlist file;
[0090] Search for keywords corresponding to the cell type in the standard cell library file;
[0091] If the keyword is a preset keyword, the unit instance is determined to be a special circuit unit.
[0092] When the power switch cell is identified, the cell type of the cell instance is first obtained in the netlist file, and then it is determined in the standard cell library file whether the cell type corresponds to the keyword switch_cell_type, so as to determine whether it is a power switch cell.
[0093] When identifying an isolation cell, the cell type of the cell instance is obtained in the netlist file, and then it is determined in the standard cell library file whether the cell type corresponds to the keyword "is_isolation_cell:true" to determine whether it is an isolation cell.
[0094] When identifying a signal retention cell, the cell type of the cell instance is obtained in the netlist file, and then the cell type is determined in the standard cell library file to determine whether it corresponds to the keyword "retention_cell:" to determine whether it is a signal retention cell.
[0095] In the above manner, when parsing the unified power format file, a low power design check can be performed to correctly identify the low power design in the circuit, which serves as a prerequisite for low power efficiency evaluation.
[0096] In some embodiments, evaluating the low power consumption efficiency of the power domain that can be shut down according to the first power consumption and the second power consumption includes:
[0097] The percentage of the difference between the first power consumption and the second power consumption as a percentage of the second power consumption is calculated to obtain the low power consumption efficiency of the shut-down power domain.
[0098] The calculation formula for the low power consumption efficiency of the shut-down power domain can be expressed as follows:
[0099]
[0100] Wherein, saved_power is the second power consumption when the switchable power domain is turned on; induced_power is the first power consumption of the special circuit unit.
[0101] The above low power consumption efficiency is a calculation result of the low power consumption efficiency of one of the power domains that can be turned off. If η<0 or η<the expected efficiency of the design, it is considered that the low power consumption design is unreasonable and the designer needs to modify the design.
[0102] In the chip circuit, according to the voltage defined by the supply net in the UPF file, the static power consumption of different power domains and the power consumption of the introduced special circuit units will be different. Therefore, the low power consumption efficiency is evaluated based on the power domain as the basic unit. In some embodiments, after evaluating the low power consumption efficiency of the power domain that can be turned off according to the first power consumption and the second power consumption, the method also includes:
[0103] According to the low power consumption efficiency of each shut-down power domain in the chip circuit, an evaluation result of the low power consumption efficiency of the chip circuit is generated.
[0104] The evaluation results of the low power consumption efficiency of the chip circuit can be output in the form of a report. Please refer to Figure 2 In the figure, the first column is the information of the power domain that can be turned off, the second column is the voltage information of the power domain, the third column is the static power consumption of the power domain that can be turned off, the fourth column is the power consumption of the special circuit unit introduced by each power domain that can be turned off, and the fifth column is the evaluation result of low power efficiency. By outputting the evaluation report, designers can have a clearer understanding of the low power efficiency of each low power design, effectively guide designers to optimize, improve design efficiency and obtain better design results.
[0105] The following combination Figure 3 The overall process of the low power consumption efficiency evaluation method of the present application is described. Figure 3 As shown, the low power consumption efficiency evaluation method of the present application is mainly divided into three main steps:
[0106] (1) Parse the UPF file and check the low-power design. In this process, the power switch combination status information, special unit electrical ground information and power domain information in the chip circuit can be parsed, and then the turnable power domain in the chip circuit and its corresponding special circuit unit can be determined;
[0107] (2) Estimating power consumption, including estimating the second power consumption when the power domain that can be turned off is turned on, that is, the static power consumption of the power domain that can be turned off, and estimating the first power consumption of the special circuit unit, that is, the static power consumption and dynamic power consumption of the special circuit unit;
[0108] (3) Efficiency evaluation: The low power consumption efficiency of each power domain that can be turned off can be calculated first, and then the evaluation result of the low power consumption efficiency of the chip circuit can be generated according to the low power consumption efficiency of each power domain that can be turned off in the chip circuit, and the evaluation report can be output as a reference for designers.
[0109] The low power consumption efficiency evaluation method of the present application is based on the shutoff power domain and special circuit units in the chip circuit to evaluate the low power consumption efficiency of the shutoff power domain. It can quantify the change in power consumption efficiency after adopting the low power consumption design scheme, and improve the efficiency and design effect of the low power consumption design.
[0110] like Figure 4 As shown, the present application also provides a low power consumption efficiency evaluation device, comprising:
[0111] The parsing module 41 is used to determine the power domain that can be turned off in the chip circuit and the special circuit unit corresponding to the power domain that can be turned off;
[0112] The power consumption calculation module 42 is used to calculate the first power consumption of the special circuit unit and the second power consumption when the switchable power domain is turned on;
[0113] The power consumption evaluation module 43 is used to evaluate the low power consumption efficiency of the power domain that can be turned off according to the first power consumption and the second power consumption.
[0114] In some embodiments, to determine a power domain that can be turned off in a chip circuit and a special circuit unit corresponding to the power domain that can be turned off, the parsing module 41 is used to:
[0115] Obtain unified power format files, netlist files and standard cell library files of chip circuits;
[0116] According to the unified power format file, the netlist file and the standard cell library file, a turn-off power domain and a special circuit unit corresponding to the turn-off power domain are determined.
[0117] In some embodiments, the unified power format file includes power domain information and power switch status information in the chip circuit. According to the unified power format file, the netlist file and the standard cell library file, the power domain that can be turned off is determined, and the parsing module 41 is used to:
[0118] Identify non-special circuit cells in chip circuits based on netlist files and standard cell library files;
[0119] According to the power domain information, determine the power domain to which the non-special circuit unit belongs;
[0120] A shut-down power domain in the power domain is determined according to the power switch state information.
[0121] In some embodiments, the unified power format file includes special unit electrical information, and the special circuit unit corresponding to the switchable power domain is determined according to the unified power format file, the netlist file and the standard unit library file. The parsing module 41 is used to:
[0122] Identify special circuit cells based on netlist files and standard cell library files;
[0123] The switchable power domain to which the special circuit unit is connected is determined according to the special unit electrical information, so as to determine the special circuit unit corresponding to the switchable power domain.
[0124] In some embodiments, based on the netlist file and the standard cell library file, the parsing module 41 is used to identify the special circuit cell:
[0125] Get the cell type of the cell instance in the netlist file;
[0126] Search for keywords corresponding to the cell type in the standard cell library file;
[0127] If the keyword is a preset keyword, the unit instance is determined to be a special circuit unit.
[0128] In some embodiments, based on the first power consumption and the second power consumption, the low power consumption efficiency of the power domain that can be turned off is evaluated, and the power consumption evaluation module 43:
[0129] The percentage of the difference between the first power consumption and the second power consumption in the second power consumption is calculated to obtain the low power consumption efficiency of each shut-down power domain.
[0130] In some embodiments, the apparatus further includes an evaluation result generating module, and after evaluating the low power consumption efficiency of the power domain that can be turned off according to the first power consumption and the second power consumption, the evaluation result generating module is used to:
[0131] According to the low power consumption efficiency of each shut-down power domain in the chip circuit, an evaluation result of the low power consumption efficiency of the chip circuit is generated.
[0132] In the low power consumption efficiency evaluation device, the specific implementation process of the steps executed by each module can be found in the description of the method embodiment and will not be repeated here.
[0133] The present application also provides an electronic device, including a storage medium and a controller, wherein a computer program is stored on the storage medium, and when the computer program is executed by the controller, the steps of the low power consumption efficiency evaluation method described in the above embodiment are implemented.
[0134] The present application also provides a storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the method for evaluating low power consumption efficiency as described in the above embodiment are implemented.
[0135] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.
Claims
1. A method for evaluating low power consumption efficiency, It is characterized in that The method comprises the following steps: Determine a power domain that can be turned off in a chip circuit and a special circuit unit corresponding to the power domain that can be turned off; Calculating a first power consumption of the special circuit unit and a second power consumption when the switchable power domain is turned on; The low power consumption efficiency of the shut-down power domain is evaluated according to the first power consumption and the second power consumption.
2. The method according to claim 1, It is characterized in that The step of determining a power domain that can be turned off in a chip circuit and a special circuit unit corresponding to the power domain that can be turned off includes: Obtaining a unified power format file, a netlist file, and a standard cell library file of the chip circuit; The turnable power domain and the special circuit unit corresponding to the turnable power domain are determined according to the unified power format file, the netlist file and the standard cell library file.
3. The method according to claim 2, It is characterized in that The unified power format file includes power domain information and power switch state information in the chip circuit, and determining the switchable power domain according to the unified power format file, the netlist file and the standard cell library file includes: Identify non-special circuit cells in the chip circuit based on the netlist file and the standard cell library file; Determining the power domain to which the non-special circuit unit belongs according to the power domain information; The shut-down-able power domain in the power domains is determined according to the power switch state information.
4. The method according to claim 2, It is characterized in that The unified power format file includes special unit electrical information, and determining the special circuit unit corresponding to the switchable power domain according to the unified power format file, the netlist file and the standard cell library file includes: Identify the special circuit cell based on the netlist file and the standard cell library file; The switchable power domain to which the special circuit unit is connected is determined according to the special unit electrical information, so as to determine the special circuit unit corresponding to the switchable power domain.
5. The method according to claim 4, It is characterized in that The identifying the special circuit unit based on the netlist file and the standard cell library file includes: Obtaining a cell type of a cell instance in the netlist file; Searching for a keyword corresponding to the cell type in the standard cell library file; If the keyword is a preset keyword, the unit instance is determined to be the special circuit unit.
6. The method according to claim 1, It is characterized in that The step of evaluating the low power consumption efficiency of the shutoff power domain according to the first power consumption and the second power consumption includes: The percentage of the difference between the first power consumption and the second power consumption in the second power consumption is calculated to obtain the low power consumption efficiency of the shut-down power domain.
7. The method according to claim 6, It is characterized in that After evaluating the low power consumption efficiency of the shutoff power domain according to the first power consumption and the second power consumption, the method further includes: According to the low power consumption efficiency of each of the power domains that can be turned off in the chip circuit, an evaluation result of the low power consumption efficiency of the chip circuit is generated.
8. A low power consumption efficiency evaluation device, It is characterized in that include: A parsing module, used to determine a power domain that can be turned off in a chip circuit and a special circuit unit corresponding to the power domain that can be turned off; A power consumption calculation module, used for calculating a first power consumption of the special circuit unit and a second power consumption when the switchable power domain is turned on; The power consumption evaluation module is used to evaluate the low power consumption efficiency of the shutoff power domain according to the first power consumption and the second power consumption.
9. An electronic device comprising a storage medium and a controller, It is characterized in that The storage medium stores a computer program, and when the computer program is executed by the controller, the steps of the method for evaluating low power consumption efficiency according to any one of claims 1 to 7 are implemented.
10. A storage medium, It is characterized in that The storage medium stores a computer program, which, when executed by a processor, implements the steps of the method for evaluating low power consumption efficiency according to any one of claims 1 to 7.