Wiring board, package for electronic component, and electronic device
By setting a recess on the wiring substrate of the electronic device and using a bonding material with low wettability, the problem of signal characteristics impedance changes in high-frequency signal transmission is solved, and the frequency characteristics of the high-frequency signal are improved.
Patent Information
- Application Number
- CN202411233211.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2019-03-07
- Filing Date
- 2020-03-09
- Publication Date
- 2024-12-13
AI Technical Summary
In an electronic device, when transmitting a high-frequency signal, the bonding material between the lead terminal and the ground terminal in the prior art flows into the recess causing a change in signal characteristic impedance, which reduces the frequency characteristics of the high-frequency signal.
A wiring substrate structure is designed. By setting a recess on the dielectric substrate and using a bonding material with low wettability, the bonding material flows into the recess, ensuring stable ground potential, reducing characteristic impedance changes, and improving the frequency characteristics of high-frequency signals. .
It effectively reduces the conductors around the signal wiring and terminals, stabilizes the ground potential, improves the frequency characteristics of high-frequency signals, and avoids changes in signal characteristic impedance.
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Figure CN119133136A_ABST
Abstract
Description
[0001] This application is a divisional application of a patent application with application number CN 202080018738.4, application date March 9, 2020, and invention name “Wiring substrate, package for electronic components, and electronic device”. Technical Field
[0002] The present disclosure relates to a wiring substrate, an electronic component package, and an electronic device. Background Art
[0003] An example of the prior art is described in Patent Document 1.
[0004] Prior Art Literature
[0005] Patent Literature
[0006] Patent Document 1: International Publication No. WO2014 / 192687 Summary of the invention
[0007] The wiring substrate disclosed in the present invention has a structure comprising a dielectric substrate, wherein the dielectric substrate has: a first surface, a second surface opposite to the first surface, a first side surface connected to the first surface and the second surface, and a recessed portion opened on the first surface and the first side surface.
[0008] The first surface includes a first connecting portion and a second connecting portion provided along the first side surface,
[0009] The recessed portion is located between the first connecting portion and the second connecting portion, and includes a first inner side surface connected to the first connecting portion, a second inner side surface connected to the second connecting portion, and a bottom surface located between the first inner side surface and the second inner side surface.
[0010] The first inner side surface includes a first region and a second region located closer to the bottom surface than the first region.
[0011] A second wettability of the bonding material with respect to the first region is lower than a first wettability of the bonding material with respect to the first connection portion.
[0012] The electronic component package of the present disclosure includes a base body and the above-mentioned wiring board bonded to the base body.
[0013] The electronic device disclosed in the present invention is configured to include: the electronic component package described above; and an electronic component mounted on the base and electrically connected to the wiring board. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The objects, features and advantages of the present disclosure will become more apparent from the following detailed description and accompanying drawings.
[0015] Figure 1 It is a perspective view of the wiring substrate according to the first embodiment.
[0016] Figure 2 It is a top view of the wiring substrate according to the first embodiment.
[0017] Figure 3 This is a partially enlarged view of the wiring substrate according to the first embodiment.
[0018] Figure 4 It is a cross-sectional view of the wiring substrate according to the first embodiment.
[0019] Figure 5 This is a partially enlarged view of a wiring substrate according to the second embodiment.
[0020] Figure 6 It is a cross-sectional view of a wiring substrate according to the third embodiment.
[0021] Figure 7 It is a cross-sectional view of a wiring substrate according to a fourth embodiment.
[0022] Figure 8 It is a cross-sectional view of a wiring substrate according to the fifth embodiment.
[0023] Fig. 9 It is a partially enlarged view of a wiring substrate according to the sixth embodiment.
[0024] Fig.10 It is a perspective view of an electronic component package and an electronic device as other embodiments of the present disclosure.
[0025] Explanation of symbols
[0026] 1 Wiring substrate
[0027] 2 Matrix
[0028] 3 Electronic components
[0029] 4 side wall
[0030] 5 Cover
[0031] 10Dielectric substrate
[0032] 10a Page 1
[0033] 10b Page 2
[0034] 10c Side 1
[0035] 11 recesses
[0036] 11a 2nd concave part
[0037] 121st terminal connection part
[0038] 12a 1st metal layer
[0039] 13 Second terminal connection part
[0040] 13a 2nd metal layer
[0041] 141st medial surface
[0042] 14a Area 1
[0043] 14b Area 2
[0044] 15 2nd medial surface
[0045] 16 bottom
[0046] 17 3rd inner side
[0047] 18 ground conductor layer
[0048] 19 slots
[0049] 20 steps
[0050] 20a Rectangular part
[0051] 20b Wall part
[0052] 21 Coating layer
[0053] 22 Dielectric material layer
[0054] 31 1st lead terminal
[0055] 32 2nd lead terminal
[0056] 40 through holes
[0057] 50Packaging for electronic components
[0058] 100 electronic devices. DETAILED DESCRIPTION
[0059] In the structure based on the wiring substrate disclosed in the present invention, due to the popularity of mobile phones, etc., in electronic devices, the high frequency of electrical signals is being promoted in order to transmit faster and larger amounts of information. In order to make the frequency characteristics in the high frequency band good, an input / output terminal (wiring substrate) having a recess formed between a lead terminal and a ground terminal is proposed.
[0060] In order to join the lead terminal and the ground terminal to the wiring substrate, a joining material such as solder is used. When the terminal is joined, if the molten joining material flows into the recessed portion, unexpected conductors will exist around the signal wiring and the terminal. This will cause changes in the characteristic impedance of the signal wiring and the terminal, thereby reducing the frequency characteristics of the high-frequency signal.
[0061] Hereinafter, a wiring board, an electronic component package, and an electronic device according to an embodiment of the present disclosure will be described with reference to the accompanying drawings. In the following drawings, the same reference numerals may be given to the same structure and the description thereof may be omitted.
[0062] First, use Figures 1 to 4 , a wiring substrate according to a first embodiment of the present disclosure is described. The wiring substrate 1 includes a dielectric substrate 10, the dielectric substrate 10 having a first surface 10a, a second surface 10b opposite to the first surface 10a, a first side surface 10c connected to the first surface 10a and the second surface 10b, and a recess 11 opened on the first surface 10a and the first side surface 10c.
[0063] The dielectric substrate 10 may be a laminated body in which a plurality of insulating layers including dielectric materials are laminated. The dielectric substrate 10 may be rectangular or U-shaped in a plan view, or may be in other shapes. As the dielectric material, for example, a ceramic material such as an alumina sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, or a silicon nitride sintered body, or a glass ceramic material may be used.
[0064] The first surface 10a includes a first terminal connection portion 12 as a first connection portion and a second terminal connection portion 13 as a second connection portion, which are arranged along the first side surface 10c. The first terminal connection portion 12 is electrically connected by joining a first lead terminal described later, and the second terminal connection portion 13 is electrically connected by joining a second lead terminal described later. The recess 11 is located between the first / second terminal connection portions (hereinafter, the first and second terminal connection portions are referred to as "the first / second terminal connection portions") 12 and 13, and the first / second terminal connection portions 12 and 13 are electrically insulated by the space formed by the recess 11. In the present embodiment, for example, the first lead terminal is a ground terminal, and the second lead terminal is a signal terminal.
[0065] In addition, the first / second terminal connection parts 12 and 13 may be provided on the first surface 10a along the first side surface 10c, and the first / second terminal connection parts 12 and 13 may be multiple. In the present embodiment, the first terminal connection part 12, the second terminal connection part 13, the second terminal connection part 13, and the first terminal connection part 12 are provided in the order along the first side surface 10c. A recess (second recess 11a) may also be provided between adjacent second terminal connection parts 13 in the same manner as the recess 11. In the present embodiment, the two first terminal connection parts 12 may extend in a direction separated from the first side surface 10c and be connected to each other in a plan view, thereby stabilizing the ground potential. The ground potential is stabilized, thereby improving the frequency characteristics of high-frequency signals.
[0066] The first terminal connection portion 12 may include, for example, a metal layer (hereinafter referred to as the first metal layer) 12a in order to be electrically connected to the first lead terminal. The second terminal connection portion 13 may include, for example, a metal layer (hereinafter referred to as the second metal layer) 13a in order to be electrically connected to the second lead terminal. The first metal layer 12a and the second metal layer 13a may be metallized layers formed on the first surface 10a of the dielectric substrate 10. The metallized layers may include, for example, metal materials such as tungsten, molybdenum, and manganese, and may be plated with nickel or gold.
[0067] The dielectric substrate 10 may include wiring conductors and conductor layers between insulating layers. For example, in a plan view, a plurality of wiring conductors and conductor layers may be provided around the position overlapping with the recess 11 and the position overlapping with the first metal layer 12a and the second metal layer 13a. Furthermore, the plurality of wiring conductors and conductor layers may be electrically connected by through conductors. A plurality of ground wiring conductors and a plurality of ground conductor layers are electrically connected and electrically connected to the first metal layer 12a. A plurality of signal wiring conductors are electrically connected to the second metal layer 13a.
[0068] The recess 11 includes: a first inner side surface 14 connected to the first terminal connection portion 12, a second inner side surface 15 connected to the second terminal connection portion 13, and a bottom surface 16 on the second surface 10b side. The recess 11 also includes a third inner side surface 17 connected to the first inner side surface 14 and the second inner side surface 15. The shape of the recess 11 is not particularly limited, but in the present embodiment, the first inner side surface 14 and the second inner side surface 15 are parallel to each other and perpendicular to the first surface 10a. In addition, the first inner side surface 14 and the second inner side surface 15 of the recess 11 can be non-parallel cones, inverted cones, etc.
[0069] The first inner side surface 14 of the recess 11 includes: a first region 14a on the first surface 10a side and a second region 14b on the bottom surface 16 side. In this embodiment, for example, the first inner side surface 14 includes the first region 14a and the second region 14b, and the first region 14a is connected to the first terminal connection portion 12. The first region 14a is connected to the second region 14b, and the second region 14b is connected to the bottom surface 16.
[0070] In the dielectric substrate 10 of the present embodiment, the second wettability of the bonding material to the surface of the first region 14 a is set lower than the first wettability of the bonding material to the surface of the first terminal connecting portion 12 .
[0071] The bonding material used in the present embodiment is, for example, a silver-copper solder mainly composed of silver and copper, or a low-melting-point bonding material (solder) in which tin is further added to silver and copper.
[0072] Here, as described in JIS Z3001-3:2008, wettability is the ease with which molten brazing filler metal, solder or flux can spread to the surface of the base material. The first wettability of the bonding material to the surface of the first terminal connection portion 12 is the ease with which the molten liquid bonding material can spread to adapt to the surface of the first terminal connection portion 12, and the second wettability of the bonding material to the surface of the first region is the ease with which the molten liquid bonding material can spread to adapt to the surface of the first region 14a. In addition, the brazing filler metal has a melting point of 450°C or more, and the solder filler metal has a melting point of less than 450°C. The wettability of the brazing filler metal can be measured, for example, based on the "wetting test method" specified in JIS Z3191:2003, using a commercially available high-temperature wettability tester or the like. The solder wettability can be measured, for example, based on the “solder wettability” specified in JIS C60068-2-83:2014 using a commercially available solder wettability tester or the like.
[0073] When the first terminal connection portion 12 is joined to the first lead terminal, the bonding material is melted on the first terminal connection portion 12, and the bonding material is solidified by cooling the first lead terminal in contact with the molten bonding material. If the wettability of the first region 14a of the first inner side surface 14 to the bonding material is lower than that of the first terminal connection portion 12, even if the molten bonding material flows, it will be retained at the boundary between the first terminal connection portion 12 and the first region 14a, that is, the boundary where the wettability changes. Therefore, the situation in which the bonding material flows over the boundary and flows into the side of the first region 14a is reduced. As a result, the situation in which unexpected conductors (bonding materials) exist in the recess 11 can be reduced, the change in the characteristic impedance of the lead terminal and the signal wiring conductor in the wiring substrate 1 can be reduced, and the frequency characteristics of high-frequency signals can be improved.
[0074] In the present embodiment, the wettability of the surface of the first terminal connection portion 12 is the wettability of the surface of the first metal layer 12a, and the wettability of the surface of the first region 14a is the wettability of the surface of the dielectric material, such as the ceramic material, of the dielectric substrate 10. In addition, if the wettability magnitude relationship that the wettability of the surface of the first region 14a is lower than the wettability of the surface of the first terminal connection portion 12 is satisfied, the dielectric material may not be exposed on the surface of the first region 14a. For example, a layer based on metal or other materials is provided in the first region 14a, and the wettability of the surface of the layer is lower than the wettability of the surface of the first terminal connection portion 12. In addition, even in the case where the measured values of the wettability of each surface are unclear, for example, the following case can also achieve the above effect. That is, when the surface of the first terminal connection portion 12 is the surface of the first metal layer 12a, and the surface of the first region 14a is the surface of the dielectric material of the dielectric substrate 10, the above wettability magnitude relationship is satisfied according to the difference in the materials constituting the surface. Therefore, in this case, the inflow of the molten bonding material into the first region 14 a side can be reduced.
[0075] The dielectric substrate 10 may further include a ground conductor layer 18 covering the second region 14b of the first inner side surface 14. The ground conductor layer 18 may be, for example, a metallization layer formed in the second region 14b. The metallization layer may include, for example, a metal material such as tungsten, molybdenum, and manganese, and may be plated with nickel or gold.
[0076] By covering the second region 14b with the ground conductor layer 18, the surface of the second region 14b becomes the surface of the ground conductor layer 18. As a result, the second wettability of the bonding material with respect to the surface of the first region 14a becomes lower than the third wettability of the bonding material with respect to the surface of the ground conductor layer 18. The ground conductor layer 18 is electrically connected to, for example, a ground wiring conductor or a ground conductor layer of the dielectric substrate 10, so that the ground potential can be further stabilized.
[0077] In this embodiment, if Figure 4 As shown, the grounding conductor layer 18 covers the second area 14b, and further covers the bottom surface 16, and also covers the bottom surface of the second recess 11a between the adjacent second terminal connection parts 13. In addition, in the present embodiment, as described above, the first terminal connection part 12, the two second terminal connection parts 13, and the first terminal connection part 12 are arranged in sequence. Therefore, between these terminal connection parts, in addition to the above-mentioned recess 11, the second recess and another recess (another recess 11) are also arranged in sequence. Here, the grounding conductor layer 18 can also extend to another recess 11 and cover the bottom surface 16 of the other recess 11 and the second area 14b.
[0078] In the recess 11, the third inner side surface 17 may have a groove 19 extending in the thickness direction of the dielectric substrate 10 (the direction connecting the first surface 10a and the second surface 10b, more specifically, the direction perpendicular to the first surface 10a and the second surface 10b). The groove 19 is, for example, semicircular in plan view. In addition, it may be rectangular, semi-elliptical, etc. On the inner surface of the groove 19, the dielectric material of the dielectric substrate 10 is exposed. By providing the groove 19, the dielectric constant between the first terminal connection portion 12 and the second terminal connection portion 13 is reduced. By reducing the dielectric constant, for example, the distance between the first terminal connection portion 12 and the second terminal connection portion 13 can be reduced without changing the characteristic impedance, thereby making it possible to miniaturize the wiring substrate 1 or to increase the terminal density (multi-terminal).
[0079] In this embodiment, the inner surface of the groove 19 is connected to the first inner surface 14 via the third inner surface 17 and directly connected to the second inner surface 15. With this structure, it is easy to manufacture the recess 11 having the metal layer provided on a desired surface.
[0080] In addition, in the present embodiment, the first terminal connection portion 12 may include a step portion 20 recessed toward the second surface 10b in a portion of the first side surface 10c. For example, a rectangular portion 20a connected to the first side surface 10c in the first terminal connection portion 12 is located closer to the second surface 10b than another portion (e.g., a layer of the insulating layer). In the case where such a step portion 20 is included, the first metal layer 12a may be provided on the step portion 20. That is, the step portion 20 may have a wall portion 20b located between the rectangular portion 20a and the other portions in addition to the rectangular portion 20a, and the first metal layer 12a is provided on the wall portion 20b. Comparing the case where the first terminal connection portion 12 does not include the step portion 20 and the case where the step portion 20 is included, in the case where the step portion 20 is included, the area of the first terminal connection portion 12, that is, the area of the first metal layer 12a becomes larger by the wall portion 20b, so that the ground potential is further stabilized.
[0081] In addition, in the present embodiment, the shape of the step portion 20 is set to a rectangular shape, but it is not limited to this, and can also be a polygonal shape other than a rectangular shape or a semicircular shape. Even with such a step portion, the area of the first terminal connection portion 12 is increased accordingly with the wall surface portion, so the ground potential is further stabilized.
[0082] Next, use Figure 5 , a second embodiment of the present disclosure will be described. In this embodiment, the second terminal connecting portion 13 further includes a coating layer 21 located on the first side surface 10c side.
[0083] When the second terminal connection portion 13 is joined to the second lead terminal, the joining material is melted on the second terminal connection portion 13, and the second lead terminal is cooled while being in contact with the molten joining material to solidify the joining material. At this time, the molten joining material is blocked by the boundary between the second metal layer 13a and the coating layer 21, so that the expansion of the molten joining material on the second terminal connection portion 13 is reduced. If the expansion of the molten joining material is reduced, a suitable solder fillet of the joining material is formed, and the joining force of the second lead terminal can be improved.
[0084] The material of the coating layer 21 is not limited as long as it can block the molten bonding material. The coating layer 21 can be made of a ceramic material such as an alumina sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, or a silicon nitride sintered body, or a glass ceramic material, similar to the dielectric material of the dielectric substrate 10. In this case, as described above, the second terminal connection portion 13 has, for example, a second metal layer 13a, and the wettability of the bonding material to the surface of the coating layer 21 is lower than that of the second metal layer 13a. The molten bonding material is blocked at the boundary between the second metal layer 13a and the coating layer 21 due to the difference in wettability. In addition, the dielectric material of the dielectric substrate 10 and the dielectric material of the coating layer 21 may be the same material or different materials. The coating layer 21 may be a material other than a dielectric material including a metal material. In this case, the molten bonding material can be blocked by setting the thickness of the coating layer 21 to a certain height difference or more, regardless of the wettability of the second metal layer 13a and the coating layer 21. That is, the surface of the second metal layer 13a can be located closer to the second surface 10b than the surface of the coating layer 21, so that a height difference is provided on the surface of the second terminal connecting portion 13 to block the molten bonding material.
[0085] In this embodiment, the coating layer 21 is located in the entire edge portion. That is, the coating layer 21 is provided throughout the entire length of the edge portion along the direction of the first side surface 10c. However, the coating layer 21 may be located in a part of the edge portion as long as it can block the molten bonding material. For example, it may be located only in the center of the edge portion or at both ends except the center.
[0086] use Figure 6 , a third embodiment of the present disclosure is described. In this embodiment, the dielectric substrate 10 further includes a dielectric material layer 22 located on the ground conductor layer 18. The dielectric material layer 22 may be located at least on the surface of the ground conductor layer 18 provided in the second region 14b. The material of the dielectric material layer 22 may be the same as the dielectric material of the dielectric substrate 10, for example, a ceramic material such as an alumina sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, or a silicon nitride sintered body, or a glass ceramic material.
[0087] In the present embodiment, the dielectric material layer 22 extends to the bottom surface 16 of the recess 11 and covers the ground conductor layer 18. The dielectric material layer 22 covers the entire ground conductor layer 18 so that the ground conductor layer 18 is not exposed in the recess 11. In addition, the dielectric material layer 22 may not be provided in the second recess 11a.
[0088] use Figure 7 , the fourth embodiment of the present disclosure is described. In this embodiment, the setting positions of the grounding conductor layer 18 and the dielectric material layer 22 are different from those in the third embodiment. Specifically, in this embodiment, the grounding conductor layer 18 covers the entire first inner side surface 14, that is, the first area 14a and the second area 14b, and covers the bottom surface 16. In addition, the grounding conductor layer 18 also covers the bottom surface of the second recess 11a between the second terminal connecting parts 13, and the recess 11 (the other recess 11 mentioned above) extending to the opposite side also covers its bottom surface 16 and the entire first inner side surface 14. In addition, the grounding conductor layer 18 is connected to the first metal layer 12a of the first terminal connecting part 12, and is electrically connected to the first metal layer 12a, so that the grounding potential can be further stabilized.
[0089] Furthermore, the dielectric material layer 22 covers the entire ground conductor layer 18 so that the ground conductor layer 18 is not exposed in the recess 11, and is further located on the second inner side surface 15. That is, the dielectric material layer 22 is located at least on the first inner side surface 14, the second inner side surface 15, and the bottom surface 16 of the recess 11. The dielectric material layer 22 may be further located on the third inner side surface 17, or may be located on the entire inner surface of the recess 11.
[0090] In the present embodiment, the wettability of the surface of the first terminal connection portion 12 is the first wettability of the surface of the first metal layer 12a, and the wettability of the surface of the first region 14a is the second wettability of the surface of the dielectric material layer 22 located on the ground conductor layer 18 provided in the first region 14a. As described above, the material of the dielectric material layer 22 is the same as the dielectric material of the dielectric substrate 10, so the second wettability of the surface of the dielectric material layer 22 is the same as the wettability of the surface of the dielectric substrate 10 where the dielectric material is exposed.
[0091] use Figure 8 , the fifth embodiment of the present disclosure will be described. In this embodiment, the position of the dielectric material layer 22 is different from that of the fourth embodiment. The ground conductor layer 18 is provided in the same manner as in the fourth embodiment, thereby making it possible to further stabilize the ground potential.
[0092] The dielectric material layer 22 covers the portion of the ground conductor layer 18 located in the first region 14a of the first inner side surface 14 in the recessed portion 11. In the present embodiment, the wettability of the surface of the first terminal connection portion 12 is the first wettability of the surface of the first metal layer 12a, and the wettability of the surface of the first region 14a is the second wettability of the surface of the dielectric material layer 22 located on the ground conductor layer 18 provided in the first region 14a. As described above, the material of the dielectric material layer 22 is the same as the dielectric material of the dielectric substrate 10, and therefore the second wettability of the surface of the dielectric material layer 22 is the same as the wettability of the surface of the dielectric substrate 10 where the dielectric material is exposed.
[0093] use Fig. 9 , the sixth embodiment of the present disclosure is described. In this embodiment, in addition to the above-mentioned dielectric substrate 10, the wiring substrate 1 also includes a first lead terminal 31 joined to the first terminal connection portion 12 via a bonding material, and a second lead terminal 32 joined to the second terminal connection portion 13 via a bonding material. As described above, the first lead terminal 31 is a ground terminal, and the second lead terminal 32 is a signal terminal. The first lead terminal 31 and the second lead terminal 32 are further connected to an external mounting substrate, etc. In the case where the bonding material flows into the recess 11, the characteristic impedance of the second lead terminal 32 that transmits the high-frequency signal changes due to an unexpected conductor. In this embodiment, by reducing the inflow of the bonding material into the recess 11 as described above, the change in the characteristic impedance can be reduced, and the high-frequency characteristics can be improved.
[0094] The following is a description of an example of manufacturing the wiring substrate 1. If the dielectric substrate 10 is, for example, a case where a plurality of insulating layers include an alumina sintered body, it is manufactured as follows. First, a suitable organic binder and a solvent are added to raw material powders such as alumina and silicon oxide, and mixed to prepare a slurry. Next, the slurry is formed into a sheet by a forming method such as a doctor blade method, thereby manufacturing a plurality of ceramic green sheets. At this time, a notch is formed in a portion of the green sheet as a recess 11.
[0095] After that, the ceramic green sheets are stacked and pressure-bonded. Finally, the stacked ceramic green sheets are fired in a reducing atmosphere and cut or pressed into an appropriate shape, thereby manufacturing the dielectric substrate 10 having a desired shape.
[0096] If the first metal layer 12a, the second metal layer 13a, the ground conductor and the signal conductor are composed of a metallization layer of a high melting point metal such as tungsten, molybdenum, manganese, etc., they can be formed as follows. That is, first, a high melting point metal powder is fully mixed with an organic solvent and a binder to make a metal paste. The metal paste is printed on a predetermined portion of the upper surface and lower surface of the ceramic green sheet as the insulating layer by screen printing or the like. Thereafter, the ceramic green sheets printed with these pastes are stacked and crimped, and fired at the same time. Through the above steps, the metallization layer is covered as the first metal layer 12a, the second metal layer 13a, the ground conductor and the signal conductor on the upper surface and the inner layer of the dielectric substrate 10. At this time, the metallization layer is not formed in the first area 14a of the first inner side surface 14 of the recess 11. In addition, nickel plating or gold plating can also be provided on the surface of the first metal layer 12a, the second metal layer 13a and each conductor layer.
[0097] For example, through-holes provided in ceramic green sheets as a plurality of insulating layers are filled with the same metal paste as the material forming each conductor layer, and the ceramic green sheets are stacked, pressed, and fired at the same time, thereby providing through-hole conductors. The through-holes can be formed, for example, by mechanical punching using a metal pin or by drilling processing such as laser processing. When the metal paste is filled into the through-holes, vacuum suction or the like can be used to facilitate the filling of the metal paste.
[0098] Next, use Fig.10 , an electronic component package and an electronic device as other embodiments of the present disclosure are described. An electronic component package 50 includes a base 2 and a wiring substrate 1 joined to the base 2. In the present embodiment, a side wall body 4 is installed on the U-shaped wiring substrate 1 so that a frame-shaped component is joined to the surface of the base 2. The base 2 and the side wall body 4 are made of, for example, a metal such as iron, copper, nickel, chromium, cobalt, molybdenum or tungsten, or alloys of these metals, such as copper-tungsten alloy, copper-molybdenum alloy, iron-nickel-cobalt alloy, etc. By subjecting a metal ingot of such a metal material to a metal processing method such as a rolling method or a stamping method, it is possible to produce metal components constituting the base 2 and the side wall body 4.
[0099] The electronic device 100 includes an electronic component package 50 , an electronic component 3 , and a cover 5 . The electronic component 3 is mounted on a base 2 and is electrically connected to a wiring board 1 .
[0100] The electronic component 3 may be, for example, an optical semiconductor element such as a laser diode (LD) or a photodiode (PD). In the case of LD, a through hole 40 may be provided in the side wall 4, and an optical fiber may be installed in the through hole 40. The cover 5 is joined to the upper end of the frame-shaped wiring substrate 1 and the side wall 4 so as to cover the inside of the electronic component package 50. The cover 5 may be made of a metal such as iron, copper, nickel, chromium, cobalt, molybdenum or tungsten, or an alloy of these metals such as copper-tungsten alloy, copper-molybdenum alloy, iron-nickel-cobalt alloy, etc. The metal parts constituting the cover 5 can be manufactured by subjecting a metal ingot of such a metal material to a metal processing method such as a rolling method or a stamping method.
[0101] The electronic component 3 is mounted inside the electronic component package 50 , and the electronic component 3 is electrically connected to the wiring board 1 by, for example, bonding wires, etc. Furthermore, the inside is sealed by a lid 5 .
[0102] The electronic component package 50 and the electronic device 100 of the present embodiment include the wiring substrate 1 capable of improving the frequency characteristics described above, and thus can transmit high-frequency signals well.
[0103] As mentioned above, the present disclosure is not limited to the above-mentioned embodiments, and various combinations and changes of the embodiments can be made without departing from the scope of the present disclosure. For example, the step portion 20 of the first embodiment can also be provided in other embodiments, and the coating layer 21 of the second embodiment can also be provided in other embodiments. In addition, the electronic component package 50 and the electronic device 100 can have any of the above-mentioned embodiments and the wiring substrate 1 combined therewith.
[0104] In addition, in the above-mentioned embodiment, the first region 14a is connected to the first terminal connection portion 12, but the present invention is not limited thereto. For example, a structure corresponding to the coating layer 21 may be provided at the edge portion of the first inner side surface 14 of the first terminal connection portion 12, or a structure corresponding to the ground conductor layer 18 may be provided at the edge portion of the first region 14a on the first terminal connection portion 12 side.
[0105] Furthermore, in the above-mentioned embodiment, the first region 14a and the second region 14b are connected to each other on the first inner side surface 14 of the concave portion 11, but the first region 14a and the second region 14b are not limited to being connected to each other. Other regions may be provided between the first region 14a and the second region 14b. In addition, all changes and the like belonging to the claims are within the scope of the present disclosure.
Claims
1. A wiring substrate, wherein: A dielectric substrate having a first surface, a second surface opposite to the first surface, a first side surface connected to the first surface and the second surface, and a recessed portion opened on the first surface and the first side surface, The first surface includes a first connecting portion and a second connecting portion provided along the first side surface, The recessed portion is located between the first connecting portion and the second connecting portion, and includes a first inner side surface connected to the first connecting portion, a second inner side surface connected to the second connecting portion, and a bottom surface located between the first inner side surface and the second inner side surface. A first end portion of the first connecting portion disposed close to the first side surface includes a step portion recessed toward the second surface.
2. The wiring substrate according to claim 1, wherein: The step portion includes a step bottom surface located closer to the second surface than the first surface, and a wall surface portion connecting the step bottom surface and the first surface.
3. The wiring substrate according to claim 2, wherein: The first connecting portion is composed of a metal layer, The metal layer is also provided on the wall surface portion.
4. The wiring substrate according to claim 1, wherein: The first connecting portion is composed of a metal layer, The first inner side surface includes a first area and a second area disposed closer to the bottom surface than the first area. The dielectric material is located in the first region.
5. The wiring substrate according to claim 1, wherein The first inner side surface includes a first area and a second area disposed closer to the bottom surface than the first area. The wettability of the bonding material to the first region is lower than the wettability of the bonding material to the second region.
6. The wiring substrate according to claim 1, wherein A second end portion of the second connecting portion disposed close to the first side surface is covered by a covering layer.
7. The wiring substrate according to claim 1, wherein: The recess includes a third inner side surface connected to the first inner side surface and the second inner side surface. The third inner side surface has a groove extending in the thickness direction of the dielectric substrate.
8. The wiring substrate according to claim 1, wherein The dielectric substrate further includes a ground conductor layer covering at least a portion of the first inner side surface.
9. The wiring substrate according to claim 8, wherein: The dielectric substrate further includes a dielectric material layer located on the ground conductor layer.
10. The wiring substrate according to claim 1, wherein The wiring substrate further includes: a first terminal joined to the first connection portion via the joining material; and a second terminal joined to the second connection portion via the joining material.
11. A package for an electronic component, wherein: have: matrix; and The wiring substrate according to any one of claims 1 to 10 joined to the base.
12. An electronic device, wherein: have: The electronic component package according to claim 11; and The electronic component is mounted on the base and is electrically connected to the wiring board.
Citation Information
Patent Citations
Package for housing elements and mounting structure
WO2014192687A1
