Optical chip structure and preparation method thereof

Abstract

The invention relates to an optical chip structure and a preparation method thereof, and the method comprises the steps: providing a substrate and a semi-finished chip, the substrate comprises a first substrate, an isolation dielectric layer formed on the first substrate, a first semiconductor optical device and a first waveguide, and the semi-finished chip comprises a second substrate and a semi-finished film layer located at one side of the second substrate, the semi-finished product film layer and the first waveguide are made of different materials, and the first substrate comprises a silicon substrate; forming a groove in the isolation dielectric layer, wherein at least part of the first waveguide is located between the groove and the first substrate; bonding the semi-finished product chip in the groove through the semi-finished product film layer, so that the semi-finished product film layer is optically coupled with the first waveguide; removing the second substrate of the semi-finished chip to form a second semiconductor optical device; and metallization is carried out to form electrode structures which are respectively connected with the first semiconductor optical device and the second semiconductor optical device.

Description

Technical Field

[0001] The present application relates to the field of photon integration technology, and in particular to an optical chip structure and a preparation method thereof. Background Art

[0002] With the development of photonic integration technology, the traditional optical chip structure has the characteristics of high integration and low cost. At the same time, the traditional optical chip structure can be integrated with a modulator, which can complete the optical-to-electrical transceiver function.

[0003] However, although the traditional optical chip structure can complete the optoelectronic transceiver function, there is a problem of high process difficulty caused by the integration of materials of different material systems during the manufacturing process. Summary of the invention

[0004] Based on this, it is necessary to provide an optical chip structure and a preparation method thereof to address the problem of high process difficulty caused by the integration of materials of different material systems during the manufacturing process of the optical chip structure in traditional technology.

[0005] In order to achieve the above objectives, on the one hand, the present application provides a method for preparing an optical chip structure, comprising:

[0006] Providing a substrate and a semi-finished chip, wherein the substrate comprises a first substrate, an isolation dielectric layer formed on the first substrate, a first semiconductor optical device and a first waveguide, wherein the semi-finished chip comprises a second substrate and a semi-finished thin film layer located on one side of the second substrate, wherein the semi-finished thin film layer and the first waveguide are made of materials of different material systems, and wherein the first substrate comprises a silicon substrate;

[0007] forming a groove in the isolation dielectric layer, wherein the first waveguide is at least partially located between the groove and the first substrate;

[0008] Bonding the semi-finished chip into the groove through the semi-finished film layer, so that the semi-finished film layer is optically coupled with the first waveguide;

[0009] Removing the second substrate of the semi-finished chip to form a second semiconductor optical device;

[0010] Metallization is performed to form electrode structures respectively connecting the first semiconductor optical device and the second semiconductor optical device.

[0011] The method for preparing the optical chip structure forms a groove in the isolation dielectric layer and bonds the semi-finished chip in the groove through the semi-finished film layer, so that the first waveguide is well integrated with the semi-finished film layer from different material systems, effectively reducing the process difficulty.

[0012] In addition, the formation of the groove facilitates the transmission of light between the first semiconductor optical device and the second semiconductor optical device. At the same time, the formation of the groove also facilitates the simultaneous metallization process between multiple devices at the back end, saving process steps.

[0013] In one of the embodiments, there is an isolation dielectric layer with a preset thickness between the bottom of the groove and the first waveguide;

[0014] The step of bonding the semi-finished chip into the groove through the semi-finished film layer so that the semi-finished film layer is optically coupled with the first waveguide comprises:

[0015] The semi-finished film layer is bonded to the isolation dielectric layer.

[0016] In one of the embodiments, the semi-finished chip comprises a thin-film lithium niobate chip, the semi-finished thin-film layer comprises a lithium niobate thin-film layer, and the formed second semiconductor optical device comprises a lithium niobate modulator.

[0017] In one of the embodiments, the semi-finished chip includes a laser chip, the semi-finished thin film layer includes a Group III-V semiconductor material thin film layer, and the formed second semiconductor optical device includes a laser.

[0018] In one embodiment, the removing the second substrate of the semi-finished chip to form a second semiconductor optical device comprises:

[0019] removing the second substrate of the semi-finished chip;

[0020] Etching the semi-finished thin film layer to form an electrode contact area and an optical processing area;

[0021] A protective dielectric layer is filled in the groove, and the protective dielectric layer covers the second semiconductor optical device.

[0022] In one embodiment, the first waveguide includes a first sub-waveguide and a second sub-waveguide, the semi-finished chip includes a first semi-finished chip and a second semi-finished chip, the first semi-finished chip is optically coupled to the first sub-waveguide, and the second semi-finished chip is optically coupled to the second sub-waveguide.

[0023] In one embodiment, the first semi-finished chip is a thin-film lithium niobate chip, the second semi-finished chip is a laser chip, and the first semi-finished chip and the second semi-finished chip are optically connected via the first sub-waveguide and the second sub-waveguide.

[0024] In one embodiment, the first semiconductor optical device includes a waveguide layer, and the first waveguide is located at the same layer as the waveguide layer of the first semiconductor optical device.

[0025] In one embodiment, the first waveguide and the waveguide layer of the first semiconductor optical device are formed in one process flow.

[0026] The present application also provides an optical chip structure, including:

[0027] A substrate, comprising a first substrate, an isolation dielectric layer located on the first substrate, a first semiconductor optical device and a first waveguide;

[0028] a second semiconductor optical device bonded to the isolation dielectric layer on the first waveguide and optically coupled to the first waveguide, wherein the first waveguide is at least partially located between the second semiconductor optical device and the first substrate;

[0029] an electrode structure, connected to the first semiconductor optical device and the second semiconductor optical device respectively;

[0030] The first semiconductor optical device and the second semiconductor optical device are optically connected via the first waveguide.

[0031] In one embodiment, there is an isolation dielectric layer with a preset thickness between the first waveguide and the second semiconductor optical device.

[0032] In one embodiment, it also includes:

[0033] The protective dielectric layer covers the second semiconductor optical device.

[0034] In one embodiment, the first waveguide includes a first sub-waveguide and a second sub-waveguide, the second semiconductor optical device includes a first semiconductor sub-device and a second semiconductor sub-device, the first semiconductor sub-device is optically coupled to the first sub-waveguide, and the second semiconductor sub-device is optically coupled to the second sub-waveguide.

[0035] In one embodiment, the first semiconductor sub-device is a lithium niobate modulator, the second semiconductor sub-device is a laser, and the first semiconductor sub-device and the second semiconductor sub-device are optically connected via the first sub-waveguide and the second sub-waveguide.

[0036] In one embodiment, the first semiconductor optical device is a detector, the second semiconductor optical device is a lithium niobate modulator, and the first semiconductor optical device and the second semiconductor optical device are optically connected via the first waveguide. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0038] Figure 1 is a flow chart of a method for preparing an optical chip structure provided in an embodiment;

[0039] Figure 2 A schematic diagram of a cross-sectional structure of an optical chip provided in an embodiment;

[0040] Figures 3 to 9 is a schematic diagram of a cross-sectional structure obtained during the preparation process of an optical chip structure provided in an embodiment;

[0041] Figures 10 to 20 It is a schematic diagram of the cross-sectional structure obtained during the preparation process of the optical chip structure provided in yet another embodiment.

[0042] Explanation of the reference numerals: 110 - first substrate, 120 - second substrate, 210 - isolation dielectric layer, 211 - first dielectric layer, 212 - second dielectric layer, 220 - protection dielectric layer, 221 - third dielectric layer, 222 - fourth dielectric layer, 300 - first semiconductor optical device, 310 - silicon-germanium detector, 320 - silicon-based modulator, 330 - thermo-optic modulator, 340 - passive device, 410 - first waveguide, 411 - first sub-waveguide, 412 - second sub-waveguide, 420 - waveguide layer, 510 - semi-finished thin film layer, 520 - buried oxide layer, 600 - groove, 610 - first groove, 620 - second groove, 700 - electrode structure. DETAILED DESCRIPTION

[0043] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0045] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer, doping type or part discussed below can be represented as a second element, component, region, layer or part.

[0046] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0047] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" etc. specify the presence of stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof.

[0048] Embodiments of the present invention are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the present invention, and variations from the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are to be expected. Thus, embodiments of the present invention should not be limited to the particular shapes of regions illustrated herein but are to include deviations in shapes due to, for example, manufacturing techniques.

[0049] In one embodiment, see Figure 1 , providing a method for preparing an optical chip structure, comprising:

[0050] Step S100, providing a substrate and a semi-finished chip, wherein the substrate includes a first substrate 110, an isolation dielectric layer 210 formed on the first substrate 110, a first semiconductor optical device 300 and a first waveguide 410, and the semi-finished chip includes a second substrate 120 and a semi-finished thin film layer 510 located on one side of the second substrate 120, wherein the semi-finished thin film layer 510 and the first waveguide 410 are made of materials of different material systems, and the first substrate 110 includes a silicon substrate;

[0051] Step S200 , forming a groove 600 in the isolation dielectric layer 210 , wherein the first waveguide 410 is at least partially located between the groove 600 and the first substrate 110 ;

[0052] Step S300, bonding the semi-finished chip into the groove 600 through the semi-finished film layer 510, so that the semi-finished film layer 510 is optically coupled with the first waveguide 410;

[0053] Step S400, removing the second substrate 120 of the semi-finished chip to form a second semiconductor optical device;

[0054] Step S500 , performing metallization to form an electrode structure 700 respectively connecting the first semiconductor optical device 300 and the second semiconductor optical device.

[0055] In step S100, refer to Figure 3 The substrate includes a first substrate 110, an isolation dielectric layer 210 formed on the first substrate 110, a first semiconductor optical device 300, and a first waveguide 410. Specifically, the first substrate 110 may include a silicon substrate. The isolation dielectric layer 210 is directly formed on the first substrate 110, and the first semiconductor optical device 300 and the first waveguide 410 are formed in the isolation dielectric layer 210. For example, the first semiconductor optical device 300 includes a germanium silicon detector 310 and a silicon-based modulator 320. The isolation dielectric layer 210 may be made of silicon dioxide (SiO2) material.

[0056] In this embodiment, when the first substrate 110 is a silicon substrate, the optical chip is a silicon optical chip. The silicon optical chip includes an isolation dielectric layer 210, and the isolation dielectric layer 210 may include a first dielectric layer 211 and a second dielectric layer 212. The first dielectric layer 211 is directly formed on the first substrate 110, and the second dielectric layer 212 is formed on the first dielectric layer 211. The first semiconductor optical device 300 and the first waveguide 410 may both be formed in the second dielectric layer 212. The first semiconductor optical device 300 may receive external light.

[0057] The semi-finished chip includes a second substrate 120 and a semi-finished thin film layer 510 located on one side of the second substrate 120. Specifically, the second substrate 120 may include but is not limited to a silicon substrate. In addition, the second substrate 120 may also be a silicon germanium (SiGe) substrate, a silicon germanium carbon (SiGeC) substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, an indium arsenide (InAs) substrate, an indium phosphide (InP) substrate or other III / V semiconductor substrates or II / VI semiconductor substrates. The type of the second substrate 120 does not limit the protection scope of the present application.

[0058] The semi-finished film layer 510 and the first waveguide 410 can be made of materials of different material systems. For example, when the semi-finished film layer 510 is made of lithium niobate material, the first waveguide 410 can be made of silicon (Si) or silicon nitride (SiN) material of the Group IV material system.

[0059] In step S200, refer to Figure 4 The groove 600 is formed in the isolation dielectric layer 210 . For example, the isolation dielectric layer 210 includes a first dielectric layer 211 and a second dielectric layer 212 . The second dielectric layer 212 can be etched to form the groove 600 . The groove 600 is located in the second dielectric layer 212 .

[0060] As an example, the depth of the groove 600 may be 1.5 μm.

[0061] The first waveguide 410 is at least partially located between the groove 600 and the first substrate 110 . The length of the first waveguide 410 may be greater than the width of the groove 600 . The first waveguide 410 is located below the groove 600 and in the isolation dielectric layer 210 above the first substrate 110 .

[0062] In step S300, refer to Figure 5 , the semi-finished film layer 510 is directly in contact with the bottom of the groove 600 , and the semi-finished chip is bonded in the groove 600 through the semi-finished film layer 510 . At this time, the semi-finished film layer 510 can be optically coupled with the first waveguide 410 .

[0063] In step S400, refer to Figure 6 , the second substrate 120 of the semi-finished chip is removed to form a second semiconductor optical device.

[0064] In step S500, refer to Fig. 9The electrode structure 700 can metallize the first semiconductor optical device 300 and the second semiconductor optical device. The electrode structure 700 connecting the second semiconductor optical device can be formed together with the electrode structure 700 connecting the first semiconductor optical device 300. Both can be formed in the same process flow, which can effectively save process steps and improve process efficiency.

[0065] Various other devices may also be formed in the substrate, for example, a thermo-optic modulator 330 and a passive device 340. The thermo-optic modulator 330 may be made of titanium nitride (TiN) material or other materials, which are not limited here. The passive device 340 may be made of silicon nitride (SiN) material, which is also not limited here and may be selected according to actual conditions. Integrating multiple devices in the optical chip at the same time improves the integration of the optical chip and makes the functions of the optical chip more complete.

[0066] In this embodiment, a groove 600 is formed in the isolation dielectric layer 210, and the semi-finished chip is bonded in the groove 600 through the semi-finished thin film layer 510, so that the first waveguide 410 is well integrated with the semi-finished thin film layer 510 from different material systems, effectively reducing the process difficulty.

[0067] In addition, the formation of the groove 600 facilitates the transmission of light between the first semiconductor optical device 300 and the second semiconductor optical device. At the same time, the formation of the groove 600 also facilitates the simultaneous metallization process between multiple devices at the back end, saving process steps.

[0068] In one embodiment, see Figure 5 , an isolation dielectric layer 210 of a preset thickness is provided between the bottom of the groove 600 and the first waveguide 410, and step S300 bonds the semi-finished chip into the groove 600 through the semi-finished film layer 510, so that the semi-finished film layer 510 is optically coupled with the first waveguide 410, including:

[0069] The semi-finished film layer 510 is bonded to the isolation dielectric layer 210 .

[0070] When the isolation dielectric layer 210 is etched to form the groove 600, the bottom of the groove 600 may not be in contact with the first waveguide 410, and there is a gap between the groove 600 and the first waveguide 410, and the isolation dielectric layer 210 of a preset thickness is retained at the bottom of the groove 600. For example, the preset thickness may be 80 nm. At this time, the semi-finished film layer 510 is bonded to the isolation dielectric layer 210.

[0071] As an example, when the isolation dielectric layer 210 includes a first dielectric layer 211 and a second dielectric layer 212 , a second dielectric layer 212 with a preset thickness is retained at the bottom of the groove 600 .

[0072] In this embodiment, by retaining the isolation dielectric layer 210 between the bottom of the groove 600 and the first waveguide 410 , the semi-finished film layer 510 is bonded to the isolation dielectric layer 210 , which is more conducive to optimizing device performance.

[0073] In one embodiment, step S400 removes the second substrate 120 of the semi-finished chip to form a second semiconductor optical device, including:

[0074] Step S410, removing the second substrate 120 of the semi-finished chip;

[0075] Step S420, etching the semi-finished thin film layer 510 to form an electrode contact area and an optical processing area;

[0076] In step S430 , the groove 600 is filled with a protective dielectric layer 220 , and the protective dielectric layer 220 covers the second semiconductor optical device.

[0077] In step S410 , the second substrate 120 of the semi-finished chip is removed, and the semi-finished film layer 510 is retained.

[0078] In step S420, refer to Figure 7 , the semi-finished film layer 510 is etched to form the semi-finished film layer 510 into a preset shape, thereby forming an electrode contact area and an optical processing area. The electrode contact area can be formed with an electrode structure, and the optical processing area can play an optical role such as generating laser or modulating and absorbing light. Specifically, dry etching can be used, and dry etching includes at least any one of reactive ion etching (RIE), inductively coupled plasma etching (ICP) or high concentration plasma etching (HDP). Because dry etching has the characteristic of anisotropy, it can make the semi-finished film layer 510 into a preset shape.

[0079] In step S430, refer to Figure 8 , a protective dielectric layer 220 is filled in the groove 600 , and the protective dielectric layer 220 covers the second semiconductor optical device.

[0080] The protective dielectric layer 220 and the isolation dielectric layer 210 can both be made of silicon dioxide (SiO2). Of course, the materials of the protective dielectric layer 220 and the isolation dielectric layer 210 can also be different, which is not limited here.

[0081] After step S430, a metal stack connected to the second semiconductor optical device may be formed. The number of metal stacks is not limited. The metal stack makes the routing of the entire optical chip more convenient, and other components may be formed between the metal stacks.

[0082] In one embodiment, see Figure 3, providing a substrate and a semi-finished chip, the substrate comprising a first substrate 110, an isolation dielectric layer 210 formed on the first substrate 110, a first semiconductor optical device 300 and a first waveguide 410. When the semi-finished chip is a thin-film lithium niobate chip, the thin-film lithium niobate chip comprises a second substrate 120 and a lithium niobate thin film layer located on one side of the second substrate 120. The lithium niobate thin film layer and the first waveguide 410 are made of materials of different material systems. When the semi-finished chip is a laser chip, the laser chip comprises a second substrate 120 and a laser thin film layer 512 located on one side of the second substrate 120. The laser thin film layer 512 and the first waveguide 410 are made of materials of different material systems.

[0083] In one embodiment, see Figure 5 The thin-film lithium niobate chip is bonded in the groove 600 through the lithium niobate thin film layer, so that the lithium niobate thin film layer is optically coupled to the first waveguide 410. Alternatively, the laser chip is bonded in the groove 600 through the III-V semiconductor material thin film layer, so that the III-V semiconductor material thin film layer is optically coupled to the first waveguide 410.

[0084] In one embodiment, see Figure 6 When the semi-finished chip is a thin-film lithium niobate chip, the second substrate 120 of the thin-film lithium niobate chip is removed, and the lithium niobate thin film layer is retained. Specifically, the second substrate 120 includes a substrate layer and a buried oxide layer 520 (BOX), and the buried oxide layer 520 (BOX) can be formed by oxygen ion implantation. The entire second substrate 120 including the substrate layer and the buried oxide layer 520 (BOX) is removed, and only the lithium niobate thin film layer remains in the groove 600.

[0085] Alternatively, when the semi-finished chip is a laser chip, the laser chip first forms an N-type semiconductor layer and a P-type semiconductor layer before bonding, thereby forming a semi-finished chip. This can avoid the incompatibility of chips of different material systems during the process. The second substrate 120 of the laser chip that will become the semi-finished chip is removed, and the thin film layer of the III-V semiconductor material is retained. Specifically, the stacked N-type semiconductor layer, the light-emitting layer, and the P-type semiconductor layer are retained.

[0086] In one embodiment, see Figure 7When the semi-finished chip is a thin-film lithium niobate chip, the semi-finished thin-film layer is a lithium niobate thin-film layer, and the lithium niobate thin-film layer is etched to form an electrode contact area and an optical processing area. For example, when etching the lithium niobate thin-film layer, the lithium niobate thin-film layer can be etched into a preset shape of a "convex" character. At this time, it is necessary to partially etch the lithium niobate thin-film layer, that is, to etch both sides of the lithium niobate thin-film layer so that the height of both sides is less than the height of the middle of the lithium niobate thin-film layer, thereby forming electrode contact areas on both sides of the lithium niobate thin-film layer. Making the lithium niobate thin-film layer in the preset shape of a "convex" character can enable the lithium niobate modulator to obtain better performance.

[0087] Alternatively, when the semi-finished chip is a laser chip, the semi-finished thin film layer is a Group III-V semiconductor material thin film layer, and the Group III-V semiconductor material thin film layer is etched to form an electrode contact area and an optical processing area. Specifically, the P-type semiconductor, the light-emitting layer, and the N-type semiconductor layer are etched in sequence. For example, the Group III-V semiconductor material thin film layer can be etched into a preset shape of a "convex" character. At this time, the laser chip first forms an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer before bonding, thereby forming a semi-finished chip. The laser chip that becomes a semi-finished chip is etched so that both sides of the P-type semiconductor and both sides of the light-emitting layer are completely etched away, while both sides of the N-type semiconductor layer retain part of the thickness and are only partially etched.

[0088] In one embodiment, see Figure 8 When the second semiconductor optical device is a lithium niobate modulator, the lithium niobate modulator is covered by the protective dielectric layer 220, specifically, the lithium niobate modulator is covered by the third dielectric layer 221. Alternatively, when the second semiconductor optical device is a laser, the laser is covered by the protective dielectric layer 220, specifically, the laser is covered by the fourth dielectric layer 222.

[0089] In one embodiment, see Figures 10 to 20 The first waveguide 410 includes a first sub-waveguide 411 and a second sub-waveguide 412 , the semi-finished chip includes a first semi-finished chip and a second semi-finished chip, the first semi-finished chip is optically coupled to the first sub-waveguide 411 , and the second semi-finished chip is optically coupled to the second sub-waveguide 412 .

[0090] As an example, the first semi-finished chip may be a thin-film lithium niobate chip, and the second semi-finished chip may be a laser chip. Fig.11 The groove 600 includes a first groove 610 and a second groove 620, see Fig.12 The thin-film lithium niobate chip can be bonded in the first groove 610 through the lithium niobate thin film layer, see Fig.13The laser chip can be bonded in the second groove 620 through the III-V semiconductor material thin film layer, the thin film lithium niobate chip is optically coupled to the first sub-waveguide 411, and the laser chip is optically coupled to the second sub-waveguide 412. The thin film lithium niobate chip and the laser chip are optically connected through the first sub-waveguide 411 and the second sub-waveguide 412.

[0091] The second groove 620 can be formed in the isolation dielectric layer 210 at the same time as the first groove 610. Of course, the second groove 620 can also be formed after the thin film lithium niobate chip bonding is completed, and the formation time of the second groove 620 is not limited here.

[0092] See also Fig.12 as well as Fig.13 , the thin-film lithium niobate chip can be bonded into the first groove 610, and then the laser chip can be bonded into the second groove 620. Then, the substrate of the thin-film lithium niobate chip is removed in sequence, and the first groove 610 is filled. After that, the substrate of the laser chip is removed.

[0093] Alternatively, the laser chip may be bonded into the second groove 620 after the thin-film lithium niobate chip is bonded into the first groove 610 .

[0094] Then, the substrate of the laser chip can be removed at the same time as the substrate of the thin-film lithium niobate chip is removed.

[0095] Traditional silicon photonic chips have the advantages of high integration and low cost, and the germanium silicon high-speed detectors on them have good performance. However, traditional silicon photonic chips also have the disadvantages of being unable to emit light and having low modulator bandwidth. Although a single thin-film lithium niobate modulator has the advantages of high bandwidth and low loss, it cannot integrate other detectors and cannot emit light. A single laser has the advantage of being able to emit light, but its integration is poor and its cost is high. In this embodiment, the first semi-finished chip and the second semi-finished chip are bonded to the photonic chip at the same time, and the first semi-finished chip can subsequently form a lithium niobate modulator, and the second semi-finished chip can subsequently form a laser, the laser emits light, and the lithium niobate modulator receives the light sent by the light source and outputs it. At the same time, a first semiconductor optical device 300 is also formed in the photonic chip, which can serve as the receiving end of the photonic chip, receive light from the lithium niobate modulator and external light, and form a complete silicon photonic chip through hybrid integration. The advantages of each structure and the silicon photonic chip complement each other, realizing the optoelectronic transceiver function of the silicon photonic chip.

[0096] In one embodiment, the first semiconductor optical device 300 includes a waveguide layer 420 , and the first waveguide 410 is located at the same layer as the waveguide layer 420 of the first semiconductor optical device 300 .

[0097] As an example, the waveguide layer 420 of the first semiconductor optical device 300 can be formed together with the first waveguide 410, that is, the two are formed in one process flow. For example, a waveguide material layer can be formed on the first dielectric layer 211 first, and then the waveguide material layer is etched to form the waveguide layer 420 and the first waveguide 410.

[0098] In this example, the waveguide layer 420 and the first waveguide 410 are formed in one process flow, which saves process steps and improves process efficiency.

[0099] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1 At least part of the steps may include multiple steps or multiple stages. These steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed in turn or alternately with other steps or at least part of the steps or stages in other steps.

[0100] In one embodiment, see Figure 2 , providing an optical chip structure, including a substrate, a second semiconductor optical device and an electrode structure 700.

[0101] The base includes a first substrate 110 , an isolation dielectric layer 210 located on the first substrate 110 , a first semiconductor optical device 300 , and a first waveguide 410 .

[0102] As an example, the isolation dielectric layer 210 includes a first dielectric layer 211 and a second dielectric layer 212 . The first dielectric layer 211 is located on the first substrate 110 . The second dielectric layer 212 is located on the first substrate 110 . The first semiconductor optical device 300 and the first waveguide 410 are located in the second dielectric layer 212 .

[0103] The second semiconductor optical device is bonded to the isolation dielectric layer 210 on the first waveguide 410 and optically coupled to the first waveguide 410 . The first waveguide 410 is at least partially located between the second semiconductor optical device and the first substrate 110 .

[0104] The first semiconductor optical device 300 is optically connected to the second semiconductor optical device via the first waveguide 410 .

[0105] As an example, the first semiconductor optical device 300 may be a detector, the second semiconductor optical device may be a lithium niobate modulator, and the first semiconductor optical device 300 and the second semiconductor optical device may be optically connected via a first waveguide 410 .

[0106] As an example, the isolation dielectric layer 210 includes a first dielectric layer 211 and a second dielectric layer 212 , and the second semiconductor optical device is bonded in the second dielectric layer 212 .

[0107] The length of the first waveguide 410 may be greater than the width of the second optical device.

[0108] The electrode structure 700 is respectively connected to the first semiconductor optical device 300 and the second semiconductor optical device.

[0109] In this embodiment, the second semiconductor optical device and the first semiconductor optical device 300 are integrated together in the optical chip. The first semiconductor optical device 300 serves as the receiving end of the entire optical chip, and the second semiconductor optical device serves as the transmitting end of the entire optical chip. The transmitting end and the receiving end are integrated in a single optical chip, which can fully realize the optoelectronic transceiver function and meet the needs of the next generation of optoelectronic transceiver modules.

[0110] In one embodiment, there is an isolation dielectric layer 210 of a preset thickness between the first waveguide 410 and the second semiconductor optical device. The second semiconductor optical device may not be in contact with the first waveguide 410, and an isolation dielectric layer 210 of a preset thickness is retained between the two. For example, the preset thickness may be 80 nm.

[0111] In one embodiment, the optical chip structure further includes a protective dielectric layer 220. The protective dielectric layer 220 covers the second semiconductor optical device.

[0112] In one embodiment, the first waveguide 410 includes a first sub-waveguide 411 and a second sub-waveguide 412, and the second semiconductor optical device includes a first semiconductor sub-device and a second semiconductor sub-device, the first semiconductor sub-device is optically coupled to the first sub-waveguide 411, and the second semiconductor sub-device is optically coupled to the second sub-waveguide 412.

[0113] As an example, the first semiconductor sub-device may be a lithium niobate modulator, the second semiconductor sub-device may be a laser, the lithium niobate modulator is optically coupled to the first sub-waveguide 411, and the laser is optically coupled to the second sub-waveguide 412. Furthermore, the lithium niobate modulator and the laser are optically connected to the second sub-waveguide 412 through the first sub-waveguide 411.

[0114] In the entire optical chip, the first semiconductor sub-device can be a lithium niobate modulator, the second semiconductor sub-device can be a laser, the first semiconductor optical device 300 can be a silicon germanium high-speed modulator, the laser emits an optical signal, the lithium niobate modulator receives the optical signal emitted by the laser, processes it and outputs it, and the silicon germanium high-speed modulator receives the optical signal from the lithium niobate modulator and the optical signal outside the optical chip.

[0115] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0116] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0117] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A method for preparing an optical chip structure, characterized in that: include: Providing a substrate and a semi-finished chip, wherein the substrate comprises a first substrate, an isolation dielectric layer formed on the first substrate, a first semiconductor optical device and a first waveguide, wherein the semi-finished chip comprises a second substrate and a semi-finished thin film layer located on one side of the second substrate, wherein the semi-finished thin film layer and the first waveguide are made of materials of different material systems, and wherein the first substrate comprises a silicon substrate; forming a groove in the isolation dielectric layer, wherein the first waveguide is at least partially located between the groove and the first substrate; Bonding the semi-finished chip into the groove through the semi-finished film layer, so that the semi-finished film layer is optically coupled with the first waveguide; Removing the second substrate of the semi-finished chip to form a second semiconductor optical device; Metallization is performed to form electrode structures respectively connecting the first semiconductor optical device and the second semiconductor optical device.

2. The method for preparing an optical chip structure according to claim 1, characterized in that: The isolation dielectric layer having a preset thickness is provided between the bottom of the groove and the first waveguide; The step of bonding the semi-finished chip into the groove through the semi-finished film layer so that the semi-finished film layer is optically coupled with the first waveguide comprises: The semi-finished film layer is bonded to the isolation dielectric layer.

3. The method for preparing an optical chip structure according to claim 1, characterized in that: The semi-finished chip comprises a thin-film lithium niobate chip, the semi-finished thin-film layer comprises a lithium niobate thin-film layer, and the formed second semiconductor optical device comprises a lithium niobate modulator.

4. The method for preparing an optical chip structure according to claim 1, characterized in that: The semi-finished chip includes a laser chip, the semi-finished thin film layer includes a thin film layer of a III-V semiconductor material, and the formed second semiconductor optical device includes a laser.

5. The method for preparing an optical chip structure according to claim 1, characterized in that: The step of removing the second substrate from the semi-finished chip to form a second semiconductor optical device comprises: removing the second substrate of the semi-finished chip; Etching the semi-finished thin film layer to form an electrode contact area and an optical processing area; A protective dielectric layer is filled in the groove, and the protective dielectric layer covers the second semiconductor optical device.

6. The method for preparing an optical chip structure according to claim 1, characterized in that: The first waveguide includes a first sub-waveguide and a second sub-waveguide, the semi-finished chip includes a first semi-finished chip and a second semi-finished chip, the first semi-finished chip is optically coupled to the first sub-waveguide, and the second semi-finished chip is optically coupled to the second sub-waveguide.

7. The method for preparing an optical chip structure according to claim 6, characterized in that: The first semi-finished chip is a thin-film lithium niobate chip, the second semi-finished chip is a laser chip, and the first semi-finished chip and the second semi-finished chip are optically connected via the first sub-waveguide and the second sub-waveguide.

8. The method for preparing an optical chip structure according to claim 1, characterized in that: The first semiconductor optical device includes a waveguide layer, and the first waveguide is located at the same layer as the waveguide layer of the first semiconductor optical device.

9. The method for preparing an optical chip structure according to claim 8, characterized in that: The first waveguide and the waveguide layer of the first semiconductor optical device are formed in one process flow.

10. An optical chip structure, characterized in that: include: A substrate, comprising a first substrate, an isolation dielectric layer located on the first substrate, a first semiconductor optical device and a first waveguide; a second semiconductor optical device bonded to the isolation dielectric layer on the first waveguide and optically coupled to the first waveguide, wherein the first waveguide is at least partially located between the second semiconductor optical device and the first substrate; an electrode structure, connected to the first semiconductor optical device and the second semiconductor optical device respectively; The first semiconductor optical device and the second semiconductor optical device are optically connected via the first waveguide.

11. The optical chip structure according to claim 10, characterized in that: An isolation dielectric layer with a preset thickness is provided between the first waveguide and the second semiconductor optical device.

12. The optical chip structure according to claim 10, characterized in that: Also includes: The protective dielectric layer covers the second semiconductor optical device.

13. The optical chip structure according to claim 10, characterized in that: The first waveguide includes a first sub-waveguide and a second sub-waveguide, the second semiconductor optical device includes a first semiconductor sub-device and a second semiconductor sub-device, the first semiconductor sub-device is optically coupled to the first sub-waveguide, and the second semiconductor sub-device is optically coupled to the second sub-waveguide.

14. The optical chip structure according to claim 13, characterized in that: The first semiconductor sub-device is a lithium niobate modulator, the second semiconductor sub-device is a laser, and the first semiconductor sub-device and the second semiconductor sub-device are optically connected via the first sub-waveguide and the second sub-waveguide.

15. The optical chip structure according to claim 10, characterized in that: The first semiconductor optical device is a detector, the second semiconductor optical device is a lithium niobate modulator, and the first semiconductor optical device and the second semiconductor optical device are optically connected via the first waveguide.

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