Dynamic impedance matching system and method for pulse-driven atmospheric pressure gas discharge
Through the modular pulse power generator and impedance dynamic feedback matching system, the voltage, current and impedance during the discharge process are monitored and adjusted in real time, and the inefficiency and instability caused by impedance changes in the prior art are solved, thus achieving efficient pulses Gas discharge drive ultraviolet light source technology.
Patent Information
- Application Number
- CN202411352742.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-26
- Publication Date
- 2024-12-13
AI Technical Summary
The existing ultraviolet light source technology driven by pulse gas discharge is difficult to adapt to the dynamic changes in impedance during the discharge process, resulting in inefficient system and unstable discharge. The traditional impedance matching technology cannot respond to instantaneous changes in high-frequency and high-power pulse discharge process in real time. Impacts the disinfection effect and light source life.
The modular pulse power generator and impedance dynamic feedback matching system are adopted to monitor voltage, current and impedance changes in real time, and the feedback control mechanism is used to dynamically adjust the pulse power source to achieve impedance matching in different discharge modes, improving discharge stability and efficiency.
Real-time regulation of gas discharge impedance without shutting down, improves discharge efficiency and plasma stability, and is suitable for high-demand application scenarios.
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Figure CN119135123A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of ultraviolet light sources, and in particular relates to a dynamic impedance matching system and method for pulse-driven atmospheric pressure gas discharge. Background Art
[0002] Ultraviolet light sources (UV) driven by pulsed gas discharge have significant advantages in the field of disinfection and sterilization. Due to its short wavelength and high photon energy, the UV light source can effectively destroy the DNA or RNA structure of microorganisms, thereby achieving efficient disinfection. This characteristic makes it show great potential in disinfection applications in the fields of medical devices, air disinfection, water treatment, etc. However, due to the complex nonlinear impedance characteristics in the pulsed gas discharge process, the drive system has poor adaptability to load changes, affecting the stability and life of the light source. In addition, the spectral characteristics of the light source output are easily affected by the impedance changes during the discharge process, resulting in unstable disinfection effects and difficulty in ensuring efficient disinfection performance. Therefore, achieving precise control of the discharge process, especially the dynamic matching of impedance, has become one of the technical difficulties of pulsed discharge driven UV light sources.
[0003] Existing pulsed gas discharge driven ultraviolet light source technology usually adopts a fixed impedance approach. However, the main problem with this method is that it is difficult to adapt to the dynamic changes in impedance during the discharge process, especially when switching between different discharge modes, which may lead to low system efficiency, unstable discharge, or inability to maintain a stable plasma state. In addition, the feedback control system in the prior art is usually relatively simple and cannot adjust the system parameters in real time to adapt to the rapid changes in the discharge process. These problems limit the development of pulsed gas discharge driven ultraviolet light source technology in more demanding application scenarios.
[0004] Most of the impedance matching technologies currently used rely on preset circuit parameters or manually adjusted impedance matching networks. This approach is not only complex to operate and slow to respond, but also difficult to cope with the needs of instantaneous changes during the discharge process. Especially in the process of high-frequency and high-power pulse discharge, due to the continuous evolution of the discharge channel, traditional impedance matching technology cannot provide sufficient flexibility and accuracy, resulting in reduced discharge efficiency and increased energy loss. Summary of the invention
[0005] In view of the above-mentioned deficiencies in the prior art, the present invention proposes a dynamic impedance matching system and method for pulse-driven atmospheric pressure gas discharge, which realizes dynamic matching of discharge impedance in the process of pulse gas discharge driving ultraviolet light. The technical solution monitors the voltage, current and impedance changes in the discharge process in real time, and uses a feedback control mechanism to dynamically adjust the pulse power source system, so that the system can maintain the best impedance matching state in different discharge modes, thereby improving the stability and efficiency of the discharge.
[0006] Compared with the existing technology, the modular design of the present invention makes the system more flexible and can be quickly adjusted according to different application requirements. At the same time, the advanced feedback control algorithm can respond to the impedance changes during the discharge process in real time, ensuring the stable operation of the system under various complex working conditions. These advantages significantly enhance the application prospects of atmospheric pressure gas discharge plasma technology.
[0007] A dynamic impedance matching system for pulse-driven atmospheric pressure gas discharge, the system comprising a modular pulse power generator and an impedance dynamic feedback matching system, wherein the modular pulse power generator adopts a solid-state linear transformer driver SSLTD system; the impedance dynamic feedback matching system is adapted to the SSLTD system, and the impedance dynamic feedback matching system comprises an ADC, a current probe, a voltage probe, an FPGA microcomputer and a preset FPGA impedance dynamic matching algorithm;
[0008] The SSLTD system includes a plurality of independent SSLTD modules, each of which includes at least one magnetic core, a plurality of unit groups consisting of discharge switches and capacitors, and a plurality of diodes;
[0009] The impedance dynamic matching system monitors the voltage, current and impedance changes during the discharge process in real time, and uses the feedback control mechanism to dynamically adjust the modular pulse power generator to achieve impedance dynamic matching under different discharge modes.
[0010] The present invention also proposes a dynamic impedance matching method for pulse-driven atmospheric pressure gas discharge, the method comprising the following steps:
[0011] Step 1: In the FPGA microcomputer preset program, input the initial information: target impedance value Z (t), pulse width, pulse frequency;
[0012] Step 2: The FPGA microcomputer will output a PWM control signal to the SSLTD system according to the preset program, starting from the "i=10ns, j=0" module state, to discharge the gas discharge load; i represents the time, and j represents the module number;
[0013] Step 3: The gas discharge voltage signal V(i) and current signal I(i) corresponding to time i are collected by the measuring probe, and after passing through the ADC module, the measurement signal is transmitted to the FPGA microcomputer, and the FPGA microcomputer calculates the impedance value Z(i) at the current moment;
[0014] Step 4: The FPGA microcomputer calculates the relationship between the impedance value Z(i) at the current moment and the target impedance value Z(t). If Z(i) is greater than the target value Z(t), the FPGA will adjust the next pulse cycle to add a module to the i moment, that is, j(i)=j+1; if the module value at the i moment has reached the maximum value, but the impedance value Z(i) at this time still cannot reach the target value, then the module value at the j moment will be kept at the maximum value of the module at the i moment, and the impedance value at the i+10 ns moment will be analyzed. At this time, the module value at the i+10 ns moment starts from module 1;
[0015] If Z(i) is less than the target value Z(t), the FPGA microcomputer will adjust the next pulse cycle to reduce one module at time i, that is, j(i)=j-1; if the j of the modules at time i has dropped to 0 modules, but the impedance value is still within the target value range, the impedance at time i+10 ns will be analyzed and regulated while maintaining the state of 0 modules at time i;
[0016] If Z(i) is equal to the target value Z(t), it means that the current combination of modules j at the current time i meets the target requirement. Then, while maintaining the current combination state of modules j at the current time i, the impedance at the time i+10 ns is further analyzed. At this time, the number of modules at the time i+10 ns also starts from 1 module.
[0017] Before i reaches the maximum value preset in step 1, each pulse is analyzed and adjusted in the manner of step 4. After the timing i reaches the maximum value preset in step 1, the discharge impedance of the entire pulse cycle can basically be maintained within the target range, and then the output will be performed according to the combination of i and j at each moment to ensure the stability of the discharge process.
[0018] Finally, when the timing i reaches the maximum value preset in step 1, the discharge impedance of the entire pulse cycle can basically be maintained within the target range, and then the output will be performed according to the combination of i and j at each moment to ensure the stability of the discharge process.
[0019] The present invention has the following beneficial effects:
[0020] 1. This solution adopts modular SSLTD pulse power technology, which can turn on or off different modules at different times to output arbitrary pulse waveforms. Such a pulse power source makes it possible to achieve dynamic matching of gas discharge impedance.
[0021] 2. Compared with the prior art, the present invention can achieve real-time regulation of gas discharge impedance without stopping the machine.
[0022] 3. This method is implemented entirely through a preset FPGA program and is automatically adjusted according to actual discharge conditions without the need for human intervention.
[0023] 4. The technology proposed in the present invention can realize dynamic impedance matching of pulse-driven atmospheric pressure gas discharge, which is of great significance for improving discharge efficiency, stabilizing the discharge process, and optimizing plasma characteristics. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1 The SSLTD system circuit diagram of the present invention;
[0025] Figure 2 This is a schematic diagram of the connection mode of the SSLTD system of the present invention;
[0026] Figure 3 FPGA microcomputer control logic diagram for the impedance dynamic matching method of pulse driven atmospheric pressure gas discharge;
[0027] Figure 4 A schematic diagram of a connection method of an embodiment of the present invention;
[0028] Figure 5 This is the timing diagram for impedance analysis;
[0029] Figure 6 It is the discharge voltage, current and impedance waveform;
[0030] Figure 7 The result graph is shown in Figure 2. DETAILED DESCRIPTION
[0031] In order to make the purpose, technical scheme and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. In addition, the technical features involved in each embodiment of the present invention described below can be combined with each other as long as they do not conflict with each other. To achieve the above-mentioned purpose, the present invention adopts the following technical scheme.
[0032] The purpose of the present invention is to provide a dynamic impedance matching system and method for pulse-driven atmospheric pressure gas discharge to improve the stability of gas discharge. A dynamic impedance matching system for pulse-driven atmospheric pressure gas discharge includes a modular pulse power generator and an impedance dynamic feedback matching system. The modular pulse power generator adopts an all-solid-state linear transformer driver SSLTD system, and the impedance dynamic feedback matching system is adapted thereto. The SSLTD system includes a number of independent SSLTD modules, each of which includes at least one magnetic core, a number of unit groups consisting of a discharge switch and a capacitor, and a number of diodes. The connection method of the aforementioned components enables each SSLTD module to be independently switched on and off by an FPGA microcomputer. The impedance dynamic matching system includes an ADC, a current probe, a voltage probe, an FPGA microcomputer, and a preset FPGA impedance dynamic matching algorithm.
[0033] Among them, several discharge switch-capacitor units in the SSLTD module are connected in parallel to improve the current carrying capacity of the SSLTD module; the number of the SSLTD modules is multiple and they are connected in series to improve the overall output voltage capacity of the SSLTD system, so that its output voltage reaches the gas breakdown voltage to generate ultraviolet rays. The circuit diagram of the SSLTD system is as follows Figure 1 shown.
[0034] In the SSLTD module, the connection method of the magnetic core, discharge switch, capacitor and diode is as follows: in each SSLTD module, the several capacitors are connected in parallel with each other, the anode of the diode is connected to the cathode of the capacitor (i.e., one end of the capacitor), the cathode of the diode is connected to the ground level of the SSLTD module to which it belongs, n unit groups consisting of discharge switches and capacitors are connected in parallel with each other, the drain of the discharge switch is connected to the anode of the capacitor (i.e., the other end of the capacitor), the gate is grounded, and the source is connected to the control signal end of the FPGA microcomputer, the primary side of the magnetic core is connected to the unit group consisting of the discharge switch and the capacitor, and the secondary side is connected to the load.
[0035] The SSLTD system has m SSLTD modules, and the discharge switches of the SSLTD modules can be independently controlled to open or close by the FPGA microcomputer to achieve precise control of the load output pulse width and amplitude. The process is as follows: the discharge switch of the SSLTD module is equipped with a corresponding switch drive circuit, the FPGA microcomputer can generate a PWM signal to provide a control signal to the switch drive circuit of the SSLTD module, the SSLTD module and the FPGA microcomputer are isolated by an optical fiber, and an electro-optical converter is provided between the optical fiber and the FPGA microcomputer, and then the electrical signal output by the FPGA microcomputer is converted into an optical signal, which is transmitted to the SSLTD module via the optical fiber, and the discharge switch in each SSLTD module is equipped with an optoelectronic transceiver to receive the optical signal and convert it into an electrical signal and output it to the corresponding switch drive circuit.
[0036] The impedance dynamic matching system also includes a measuring probe and an analog-to-digital converter (ADC) for measuring output current and / or output voltage, wherein the output end of the measuring probe is connected to the input end of the analog-to-digital converter, the input end of the measuring probe is connected to a load, and the output end of the analog-to-digital converter is connected to an FPGA microcomputer.
[0037] In order to achieve dynamic matching of the discharge impedance of the pulse discharge driven ultraviolet light source, in the present invention, the connection between the various systems is as follows: Figure 2 As shown. The FPGA microcomputer outputs a PWM control signal to the SSLTD system, so that it outputs a corresponding high-voltage pulse waveform to act on the gas discharge load to generate plasma; the discharge information of the load is measured by the voltage probe and the current probe. Since the voltage and current probes output analog signals, the analog signals output by the probes need to be converted into digital signals through ADC_A and ADC_B, and then fed back to the FPGA. The FPGA calculates the impedance information of the current pulse discharge based on the voltage and current signals fed back by the current discharge. The FPGA compares the target impedance with the actual impedance, and adjusts the PWM control signal of the next pulse output according to the following control algorithm, thereby adjusting the output pulse waveform of the SSLTD system, thereby realizing real-time monitoring and dynamic regulation of the impedance of the gas discharge, and thereby achieving the purpose of improving the stability of the ultraviolet light source driven by the pulse discharge.
[0038] The present invention can realize the method of dynamic matching of the discharge impedance of extreme ultraviolet rays driven by dynamic pulse gas discharge as follows:
[0039] (1) Physical aspects of gas discharge:
[0040] 1. The impedance Z(i) of gas discharge can be calculated from the relationship between discharge voltage V(i) and discharge current I(i);
[0041] 2. The discharge impedance Z(i) at different times can be obtained by dividing the discharge voltage V(i) at the corresponding time by the discharge current I(i) at that time, that is, Z(i) = V(i) / I(i);
[0042] 3. When Z(i) at a certain moment is higher than the expected value, the impedance at that moment can be reduced by increasing the discharge voltage V(i) at that moment; similarly, when the impedance Z(i) at a certain moment is lower than the expected value, the impedance Z(i) at that moment can be increased by reducing the discharge voltage V(i) at that moment;
[0043] 4. The impedance at time Z(i) is only affected by the waveform before time i, and the waveform after time i will not affect the impedance at time i.
[0044] (2) At the SSLTD pulse power source level:
[0045] 1. The SSLTD pulse power system is an independent modular structure. Each module SSLTD can be independently turned on or off at any time according to the PWM control signal;
[0046] 2. By turning on or off different SSLTD modules at different times, SSLTD can output pulse waveforms of arbitrary shapes.
[0047] (3) At the FPGA impedance dynamic matching system level:
[0048] 1. After PLL development, the FPGA development board can output PWM control signals in units of 10 ns or even shorter time scales;
[0049] 2. FPGA has sufficient IO control pins, so it can achieve one-to-one control of the SSLTD module;
[0050] 3. FPGA can be connected to other external devices, such as ADC, voltage probe, current probe, etc., to monitor the discharge information in the discharge load in real time and calculate the impedance.
[0051] Based on the above basic principles, the FPGA microcomputer control logic of the method for realizing dynamic impedance matching of pulse-driven atmospheric pressure gas discharge of the present invention is as follows Figure 3 As shown, the control flow is described as follows:
[0052] Step 1: In the FPGA microcomputer preset program, the target impedance value Z (t), pulse width, pulse frequency, etc.;
[0053] Step 2: FPGA will output PWM control signal to SSLTD system according to the preset program, starting from (i=10ns, j=0 module) state, to discharge the gas discharge load;
[0054] Step 3: The gas discharge voltage signal V(i) and current signal I(i) corresponding to time i are collected by the measuring probe, and after passing through the ADC module, the measurement signal is transmitted to the FPGA, and the FPGA calculates the impedance value Z(i) at the current moment;
[0055] Step 4: The FPGA microcomputer calculates the relationship between the impedance value Z(i) at the current moment and the target impedance value Z(t). If Z(i) is greater than the target value Z(t), the FPGA will adjust the next pulse cycle to add a module to the i moment, that is, j(i)=j+1; if the module value at the i moment has reached the maximum value, but the impedance value Z(i) at this time still cannot reach the target value, then the module value at the j moment will be kept at the maximum value of the module at the i moment, and the impedance value at the i+10 ns moment will be analyzed. At this time, the module value at the i+10 ns moment starts from module 1;
[0056] If Z(i) is less than the target value Z(t), the FPGA microcomputer will adjust the next pulse cycle to reduce one module at time i, that is, j(i)=j-1; if the j of the modules at time i has dropped to 0 modules, but the impedance value is still within the target value range, the impedance at time i+10 ns will be analyzed and regulated while maintaining the state of 0 modules at time i;
[0057] If Z(i) is equal to the target value Z(t), it means that the current combination of modules j at the current time i meets the target requirement. Then, while maintaining the current combination state of modules j at the current time i, the impedance at the time i+10 ns is further analyzed. At this time, the number of modules at the time i+10 ns also starts from 1 module.
[0058] Before i reaches the maximum value preset in step 1, each pulse is analyzed and adjusted in the manner of step 4. After the timing i reaches the maximum value preset in step 1, the discharge impedance of the entire pulse cycle can basically be maintained within the target range, and then the output will be performed according to the combination of i and j at each moment to ensure the stability of the discharge process.
[0059] In order to more intuitively describe the above impedance dynamic feedback control logic, the following describes this process using several state examples.
[0060] The present invention constructs a 28-module SSLTD high-power pulse source and its atmospheric pressure gas discharge impedance dynamic matching system as a test prototype to verify the effectiveness of the scheme of the present invention. This experiment uses ADC-SoC FPGA as the ADC and FPGA system used for testing. The Pearson 6369 current probe is used to measure the current output of the SSLTD system. A coaxial steel pipe with a diameter of 2cm and a length of 32cm is used as the gas discharge load, and a copper wire with a diameter of 1mm is used as the discharge anode; MOSFET switches are used as discharge switches respectively. A LeCroy Wavesurfer 3024 oscilloscope with a bandwidth of 200MHz is used to measure the output waveform, and a Tektronix P6015A voltage probe is used to measure the current probe for measurement.
[0061] The connection method of the above devices is as follows Figure 4 As shown in the figure: the PWM control signal generated by the ADC SoC FPGA passes through the photoelectric converter and is connected to the SSLTD system through an optical fiber to realize the control of the SSLTD module; in order to reset the magnetic core in the SSLTD system, this case still uses a 5V, 2A DC reset, which directly passes through the inside of the SSLTD system to reset the magnetic core. The copper wire of the gas discharge load is connected to the top anode output terminal of the SSLTD module, and the outer shell of the gas discharge load is connected to the ground electrode of the SSLTD; the voltage and current signals during gas discharge are measured using a voltage probe and a current probe, and are transmitted to the oscilloscope end and the ADC port through a three-way connection. The ADC end can directly transmit the collected signal to the inside of the FPGA; the FPGA can calculate the current discharge impedance based on the voltage and current information, and generate a new PWM control signal combination to adjust the discharge impedance value.
[0062] From the FPGA outputting the PWM control signal to the FPGA receiving the discharge voltage and current signals and completing the impedance analysis timing diagram as shown in the figure Figure 5 As shown, the entire process takes about 1000 ns in total, while in gas discharge plasma applications, the discharge frequency is usually about ~k Hz, that is, the feedback time of the system is sufficient to enable the impedance dynamic matching of this discharge to optimize the next discharge process based on each discharge information, thereby achieving the purpose of impedance dynamic matching and feedback optimization.
[0063] In order to better compare the effects before and after dynamic impedance matching, this project uses the SSLTD system to output traditional square waves for gas discharge loads. The typical discharge voltage, current, and impedance waveforms are as follows: Figure 6 As shown, Figure 6 (a) is the voltage and current waveform of discharge under normal square wave conditions; Figure 6 (b) is in Figure 6Based on (a), the impedance waveform is calculated. It is not difficult to find from the figure that when a constant high-voltage square wave pulse is output, the current of the gas discharge is not a constant value, but changes with time, and its impedance is also not a constant value, which is also the problem raised by the present invention.
[0064] Furthermore, in order to verify the effectiveness of the present invention, the present invention controls the target impedance to 450Ω±10% based on the above experimental conditions and control logic. The typical result is shown in the figure below. Figure 7 As shown, Figure 7 (a) is the current waveform obtained after impedance dynamic feedback matching. Figure 7 (b) is based on Figure 7 The impedance value calculated by (a) shows that the impedance is stably controlled within the range of 450Ω, which meets the requirements of this experiment.
[0065] For the technical solution of the present invention, there are also the following alternatives: the above-mentioned only uses FPGA as the control microcomputer. In theory, other programmable microcomputers that can generate PWM control signals can also be used to implement the functions described in the present invention.
Claims
1. A dynamic impedance matching system for pulse driven atmospheric pressure gas discharge, characterized in that: The system includes a modular pulse power generator and an impedance dynamic feedback matching system, wherein the modular pulse power generator adopts a solid-state linear transformer driver SSLTD system; the impedance dynamic feedback matching system is adapted to the SSLTD system, and the impedance dynamic feedback matching system includes an ADC, a current probe, a voltage probe, an FPGA microcomputer and a preset FPGA impedance dynamic matching algorithm; The SSLTD system includes a plurality of independent SSLTD modules, each of which includes at least one magnetic core, a plurality of unit groups consisting of discharge switches and capacitors, and a plurality of diodes; The impedance dynamic matching system monitors the voltage, current and impedance changes during the discharge process in real time, and uses the feedback control mechanism to dynamically adjust the modular pulse power generator to achieve impedance dynamic matching under different discharge modes.
2. The system according to claim 1, characterized in that A plurality of SSLTD modules are connected in series, in each SSLTD module, a plurality of capacitors are connected in parallel, the anode of the diode is connected to the cathode of the capacitor, the cathode of the diode is connected to the ground level of the SSLTD module to which it belongs, a plurality of unit groups consisting of discharge switches and capacitors are connected in parallel, the drain of the discharge switch is connected to the anode of the capacitor, the gate is grounded, the source is connected to the control signal end of the FPGA microcomputer, the primary side of the magnetic core is connected to the unit group consisting of the discharge switch and the capacitor, and the secondary side is connected to the load.
3. The system according to claim 2, characterized in that The discharge switches are independently controlled by the FPGA microcomputer to be opened or closed, so as to achieve precise control of the load output pulse width and amplitude; the SSLTD module discharge switch is configured with a corresponding switch drive circuit, the FPGA microcomputer generates a PWM signal to provide a control signal to the switch drive circuit of the SSLTD module, the SSLTD module and the FPGA microcomputer are isolated by an optical fiber, and an electro-optical converter is provided between the optical fiber and the FPGA microcomputer, so as to convert the electrical signal output by the FPGA microcomputer into an optical signal, which is transmitted to the SSLTD module via the optical fiber, and the discharge switch in each SSLTD module is configured with an optoelectronic transceiver to receive the optical signal and convert it into an electrical signal and output it to the corresponding switch drive circuit.
4. The system according to claim 1, characterized in that The impedance dynamic matching system includes a measuring probe and an analog-to-digital converter ADC for measuring output current and / or output voltage, wherein the output end of the measuring probe is connected to the input end of the analog-to-digital converter, the input end of the measuring probe is connected to a load, and the output end of the analog-to-digital converter is connected to an FPGA microcomputer.
5. The system according to claim 1, characterized in that The SSLTD pulse power system has an independent modular structure, and each module SSLTD is independently turned on or off at any time according to the PWM control signal.
6. The system according to claim 1, characterized in that The FPGA microcomputer has sufficient IO control pins to achieve one-to-one control of the SSLTD module.
7. The system according to claim 1, characterized in that The FPGA microcomputer can be connected to other external devices, including ADC, voltage probe, and current probe, so as to monitor the discharge information in the discharge load in real time and calculate the impedance situation.
8. A dynamic impedance matching method for pulse driven atmospheric pressure gas discharge, characterized in that: The method comprises the following steps: Step 1: In the FPGA microcomputer preset program, input the initial information: target impedance value Z (t), pulse width, pulse frequency; Step 2: The FPGA microcomputer will output a PWM control signal to the SSLTD system according to the preset program, starting from the "i=10ns, j=0" module state, to discharge the gas discharge load; i represents the time, and j represents the number of SSLTD operation modules corresponding to the time i; Step 3: The gas discharge voltage signal V(i) and current signal I(i) corresponding to time i are collected by the measuring probe, and after passing through the ADC module, the measurement signal is transmitted to the FPGA microcomputer, and the FPGA microcomputer calculates the impedance value Z(i) at the current moment; Step 4: The FPGA microcomputer calculates the relationship between the impedance value Z(i) at the current moment and the target impedance value Z(t). If Z(i) is greater than the target value Z(t), the FPGA will adjust the next pulse cycle to add a module to the i moment, that is, j(i)=j+1; if the module value at the i moment has reached the maximum value, but the impedance value Z(i) at this time still cannot reach the target value, then the module value at the j moment will be kept at the maximum value of the module at the i moment, and the impedance value at the i+10 ns moment will be analyzed. At this time, the module value at the i+10 ns moment starts from module 1; If Z(i) is less than the target value Z(t), the FPGA microcomputer will adjust the next pulse cycle to reduce one module at time i, that is, j(i)=j-1; if the j of the modules at time i has dropped to 0 modules, but the impedance value is still within the target value range, the impedance at time i+10 ns will be analyzed and regulated while maintaining the state of 0 modules at time i; If Z(i) is equal to the target value Z(t), it means that the current combination of modules j at the current time i meets the target requirement. Then, while maintaining the current combination of modules j at the current time i, the impedance at the time i+10 ns is further analyzed. At this time, the number of modules at the time i+10 ns also starts from 1 module. Before i reaches the maximum value preset in step 1, each pulse is analyzed and adjusted in the manner of step 4 until the timing i reaches the maximum value preset in step 1, and the discharge impedance of the entire pulse cycle is basically maintained within the target range. Next, the output will be performed according to the i and j combinations at each moment to ensure the stability of the discharge process.
9. The method according to claim 8, characterized in that The impedance Z(i) of the gas discharge is calculated from the relationship between the discharge voltage V(i) and the discharge current I(i).
10. The method according to claim 8, characterized in that The discharge impedance Z(i) at different times can be obtained by dividing the discharge voltage V(i) at the corresponding time by the discharge current I(i) at that time, that is, Z(i) = V(i) / I(i).
11. The method according to claim 8, characterized in that When Z(i) at a certain moment is higher than the expected value, the discharge voltage V(i) at that moment is increased to achieve the purpose of reducing the impedance at that moment; similarly, when the impedance Z(i) at a certain moment is lower than the expected value, the discharge voltage V(i) at that moment is reduced to achieve the purpose of raising the impedance Z(i) at that moment.
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