Preparation method of semiconductor substrate
By using low-cost equipment in semiconductor substrate preparation, rough thinning and polishing are carried out in steps, combined with Fourier infrared measurement, the problems of insufficient equipment capabilities and high cost are solved, and high-precision semiconductor substrate preparation is achieved. Reduces equipment dependence and cost and improves process flexibility.
Patent Information
- Application Number
- CN202411535716.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-31
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2044-10-31
AI Technical Summary
In the prior art, the preparation process of semiconductor substrates has problems such as insufficient equipment capability and high equipment cost, which leads to low process flexibility and making it difficult to achieve high-precision thickness control and rapid development.
Using low-priced but low-precision equipment, through steps such as rough thinning, chemical mechanical polishing and Fourier infrared measurement, combined with mechanical grinding and polishing treatment, a semiconductor substrate with a cavity structure is formed, breaking through the equipment capabilities. Inadequate obstacles and improve process flexibility.
It realizes semiconductor substrate preparation that does not rely on high-end foreign equipment, reduces equipment costs, improves process flexibility, ensures the accuracy of thickness control between 5 and 20 microns, and avoids the impact of the entire process due to equipment failures.
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Figure CN119143077A_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present disclosure relate to the field of semiconductor technology, and in particular to a method for preparing a semiconductor substrate. Background Art
[0002] With the development of micro-electromechanical system technology, semiconductor substrates with cavity structures are increasingly used in devices such as pressure sensors and gyroscopes. A silicon oxide layer is usually formed between the top silicon and the bottom substrate. The technology for forming a silicon oxide layer between the top silicon and the bottom substrate is SOI (Silicon-On-Insulator) technology. SOI technology is usually used to form a semiconductor substrate with a cavity structure. The principle of SOI technology is to add an insulator material between silicon transistors, so that the parasitic capacitance between the two is half of the original. The advantage is that it can easily increase the clock frequency and reduce current leakage. In terms of process, some photomasks can also be omitted to save costs, so it has advantages both in process and circuit.
[0003] The existing technology has problems such as insufficient process capability, insufficient equipment precision or too high equipment cost. Summary of the invention
[0004] The embodiments of the present disclosure provide a method for preparing a semiconductor substrate. The method can be used to implement rough thinning, chemical mechanical polishing, Fourier transform infrared measurement and other steps in steps using equipment with different functions, thereby breaking through the obstacle of insufficient equipment capabilities and greatly improving process flexibility.
[0005] At least one embodiment of the present disclosure provides a method for preparing a semiconductor substrate, the method comprising: providing a first substrate and a second substrate; performing oxidation treatment on the opposite first surface and second surface of the first substrate to form a first oxide layer and a second oxide layer; performing etching treatment on the first surface of the first substrate to form a groove structure, and retaining a portion of the first oxide layer; aligning the second substrate with the first substrate to seal the groove structure and form a cavity structure; and sequentially performing coarse thinning treatment and fine thinning treatment on the second substrate to make the thickness of the second substrate be 5 microns to 20 microns.
[0006] For example, in the preparation method provided in at least one embodiment of the present disclosure, the rough thinning treatment of the second substrate includes thinning the second substrate to 21 micrometers to 30 micrometers by mechanical grinding.
[0007] For example, in the preparation method provided in at least one embodiment of the present disclosure, the rough thinning process of the second substrate includes sequentially performing a rough grinding process and a fine grinding process.
[0008] For example, in the preparation method provided in at least one embodiment of the present disclosure, performing fine thinning on the second substrate includes performing polishing on the second substrate.
[0009] For example, in the preparation method provided in at least one embodiment of the present disclosure, before the second substrate is subjected to fine thinning treatment, the method further includes measuring the thickness of the second substrate using a Fourier transform infrared spectrometer.
[0010] For example, in the preparation method provided in at least one embodiment of the present disclosure, the fine thinning process for the second substrate includes performing multiple polishing processes on the second substrate, and measuring the thickness of the second substrate with the Fourier transform infrared instrument after each polishing process.
[0011] For example, in the preparation method provided in at least one embodiment of the present disclosure, oxidizing the first surface and the second surface opposite to each other of the first substrate includes: forming the first oxide layer and the second oxide layer by a high temperature oxidation process.
[0012] For example, in the preparation method provided in at least one embodiment of the present disclosure, the first substrate and the second substrate are both silicon substrates, and aligning the second substrate and the first substrate to seal the groove structure includes: bonding the Si-O bonds in the portion of the first oxide layer retained on the first substrate with the Si-Si bonds on the second substrate.
[0013] For example, in the preparation method provided in at least one embodiment of the present disclosure, the thickness of the first oxide layer is 0.5 micrometer to 1 micrometer.
[0014] For example, in the preparation method provided in at least one embodiment of the present disclosure, after forming the first oxide layer and the second oxide layer, the method further includes annealing the first substrate.
[0015] For example, the preparation method provided by at least one embodiment of the present disclosure further includes: processing the second oxide layer on the second surface of the first substrate to remove the second oxide layer.
[0016] For example, in the preparation method provided in at least one embodiment of the present disclosure, processing the second oxide layer on the second surface of the first substrate to remove the second oxide layer includes: processing the second oxide layer with hydrofluoric acid.
[0017] For example, in the preparation method provided in at least one embodiment of the present disclosure, before the oxidation treatment is performed on the opposite first surface and second surface of the first substrate, the first substrate and the second substrate are cleaned. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure.
[0019] Figure 1 A flowchart of a method for preparing a semiconductor substrate provided for at least one embodiment of the present disclosure; Figure 2A A process diagram of providing a first substrate and a second substrate in a method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure; Figure 2B A process diagram of performing oxidation treatment on a first substrate in a method for preparing a semiconductor substrate provided by at least one embodiment of the present disclosure; Figure 2C A process diagram of etching a first surface of a first substrate in a method for preparing a semiconductor substrate provided by at least one embodiment of the present disclosure; Figure 2D A process diagram of aligning a second substrate with a first substrate in a method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure; Figure 2E A process diagram of sequentially performing a rough thinning process and a fine thinning process on a second substrate in a method for preparing a semiconductor substrate provided by at least one embodiment of the present disclosure; Figure 3 A thickness trend diagram of different positions of the second substrate after the rough thinning process is completed in the preparation method provided by at least one embodiment of the present disclosure; Figure 4 A thickness trend diagram of different positions of the second substrate after the fine thinning process is completed in the preparation method provided by at least one embodiment of the present disclosure; Figure 5 A flowchart of a method for preparing a semiconductor substrate provided for at least one embodiment of the present disclosure; Fig. 6A A process diagram of providing a first substrate and a second substrate in another method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure; Figure 6B A process diagram of performing oxidation treatment on a first substrate in another method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure; Figure 6C A process diagram of etching a first surface of a first substrate in another method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure; Fig.6D A process diagram of aligning a second substrate with a first substrate in another method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure; Fig. 6E A process diagram of sequentially performing a rough thinning process and a fine thinning process on a second substrate in another method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure; and Fig. 6F A process diagram of treating a second oxide layer on a second surface of a first substrate to remove the second oxide layer in another method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure. DETAILED DESCRIPTION
[0020] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.
[0021] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. "First", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.
[0022] Unless otherwise defined, the features such as "parallel", "perpendicular" and "same" used in the embodiments of the present disclosure include the situations of "parallel", "perpendicular", "same" in a strict sense, as well as the situations of "approximately parallel", "approximately perpendicular", "approximately the same", etc., which contain certain errors. For example, the above-mentioned "approximately" may mean that the difference of the compared objects is within 10% or 5% of the average value of the compared objects. When the number of a component or element is not specifically indicated in the following of the embodiments of the present disclosure, it means that the component or element may be one or more, or may be understood as at least one. "At least one" refers to one or more, and "multiple" refers to at least two. The "same-layer arrangement" in the embodiments of the present disclosure refers to the relationship between multiple film layers formed by the same material after the same step (for example, a one-step patterning process). The "same layer" here does not always mean that the thickness of multiple film layers is the same or the height of multiple film layers in the cross-sectional view is the same.
[0023] The most mature and commercial SOI technology is to bond the silicon-oxygen bonds included in the first substrate and the silicon-silicon bonds included in the second substrate, and to thin the first substrate. The SOI technology specifically uses the first substrate after the two main surfaces are oxidized as the supporting substrate and the second substrate is bonded together, and then the first substrate is thinned at a temperature higher than 1000°C. o C for more than 2 hours, and then the thickness of the second substrate is thinned by grinding, polishing, etc. to obtain the final semiconductor substrate with a cavity structure. This technology has the advantages of simple process and low cost, so it has received widespread attention in the industry. As a new type of structure, compared with ordinary semiconductor substrates, the first substrate and the second substrate are formed with groove structures by photolithography and etching processes before being matched, and these groove structures are formed into a specific pattern distribution on the surface of the first substrate. In the process of preparing the cavity structure, due to the existence of these cavity structures, the contact area of the bonding part between the first substrate and the second substrate is greatly reduced. The part of the second substrate corresponding to the cavity structure is not supported by the first substrate. The thinner the thickness of the second substrate is, the easier it is to be damaged by mechanical stress and break during mechanical grinding.
[0024] Moreover, semiconductor devices, especially micro-electromechanical (MEMS) devices, mostly use substrates with cavity structures, and the thickness and uniformity of the remaining materials on the cavity structure need to be precisely controlled. For example, MEMS pressure products require the thickness of the second substrate to be precisely controlled at 5 to 20 microns. In the process of manufacturing semiconductor substrates of this structure, high-precision polishing equipment from Japan's DISCO is usually used. Some functions of this high-end equipment need to be customized, and the delivery time is usually as long as 2 years and the purchase price is extremely high, which does not take advantage of the rapid development and large-scale mass production of products.
[0025] The inventor of the present disclosure has noticed that it is possible to use low-priced but low-precision equipment, and through a processing method that cleverly combines multiple steps, the process effect brought about by the improved scheme can be completely consistent with the effect of using imported new equipment for preparation, thereby reducing the dependence on foreign high-end new equipment, and the whole process does not require any foreign high-end equipment. For example, using low-priced and low-precision equipment, through a processing method that cleverly combines multiple steps, using equipment with different functions to perform steps such as rough thinning, chemical mechanical polishing and Fourier infrared measurement in steps, thereby breaking through the obstacle of insufficient equipment capacity, so that the final process result can completely reach the same level as that of using foreign high-end models for preparation, and the investment cost of fixed assets is about 1 / 3 of the cost of foreign high-end equipment or even lower, and because it can be carried out in steps, the process flexibility is greatly improved, and the full set of process steps will not be unable to be carried out due to equipment failure in a certain process link.
[0026] At least one embodiment of the present disclosure provides a method for preparing a semiconductor substrate, the method comprising: providing a first substrate and a second substrate; performing oxidation treatment on the relative first and second surfaces of the first substrate to form a first oxide layer and a second oxide layer; performing etching treatment on the first surface of the first substrate to form a groove structure, and retaining a portion of the first oxide layer; aligning the second substrate with the first substrate to seal the groove structure and form a cavity structure; performing coarse thinning treatment and fine thinning treatment on the second substrate in sequence so that the thickness of the second substrate is 5 microns to 20 microns. The method for preparing a semiconductor substrate provided by the embodiment of the present disclosure does not rely on foreign high-end new equipment, thereby reducing equipment costs. Moreover, the method for preparing a semiconductor substrate provided by the embodiment of the present disclosure is carried out in steps, and the process flexibility is greatly improved, and there will be no problem of being unable to perform a full set of process steps due to equipment failure in a certain process link.
[0027] For example, Figure 1 A flowchart of a method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, Figure 2A to Figure 2E A process diagram of a method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, wherein: Figure 2A A process diagram of providing a first substrate and a second substrate in a method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, Figure 2B A process diagram of oxidizing a first substrate in a method for preparing a semiconductor substrate provided by at least one embodiment of the present disclosure, Figure 2C A process diagram of etching a first surface of a first substrate in a method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, Figure 2D A process diagram of aligning a second substrate with a first substrate in a method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, Figure 2E A process diagram of sequentially performing a rough thinning process and a fine thinning process on a second substrate in a method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, combined with Figure 1 and Figure 2A to Figure 2E As shown, the method for preparing the semiconductor substrate includes the following steps.
[0028] Step S101: Provide a first substrate and a second substrate.
[0029] For example, combined with Figure 1 and Figure 2A The first substrate 101 and the second substrate 102 can both be silicon substrates, or lightly doped or heavily doped Si substrates, or p-type or n-type doped substrates, and the dopant can be elements such as boron, phosphorus or arsenic. The first substrate 101 is used as a supporting substrate for the final semiconductor substrate, and its material selection is more extensive.
[0030] For example, in one example, the first substrate 101 and the second substrate 102 have the same shape and are equal or substantially equal in surface area.
[0031] For example, in one example, the first substrate 101 and the second substrate 102 are both silicon substrates, and the thickness of the first substrate 101 and the second substrate 102 may both be 550 micrometers to 700 micrometers.
[0032] Step S102: performing oxidation treatment on the first surface and the second surface opposite to each other of the first substrate to form a first oxide layer and a second oxide layer.
[0033] For example, combined with Figure 1 and Figure 2B The first oxide layer 1011 and the second oxide layer 1012 can be formed in the first substrate 101 by high temperature oxidation. For example, a silicon dioxide layer can be formed by high temperature oxidation of a single crystal silicon substrate, so that the first oxide layer 1011 and the second oxide layer 1012 are both silicon dioxide layers. For example, the first oxide layer 1011 can be used as an etching stop layer for subsequent chemical mechanical polishing to prevent the etching solution from corroding the device layer formed subsequently.
[0034] For example, after forming the first oxide layer 1011 and the second oxide layer 1012 on the first surface and the second surface opposite to each other on the first substrate 101, and before forming the subsequent layer structure, the first substrate 101 is subjected to an annealing step, and the annealing temperature is greater than 1000 o C. For example, the annealing temperature may be 1300 o C or so.
[0035] For example, in one example, the thickness of the first oxide layer 1011 formed on the first surface of the first substrate 101 is 0.5 micrometers to 1 micrometer. The thickness of the second oxide layer 1012 formed on the second surface of the second substrate 102 is 0.5 micrometers to 1 micrometer.
[0036] For example, the first oxide layer 1011 and the second oxide layer 1012 are insulating layers, and the insulating layers are silicon oxide layers or silicon oxynitride layers. For single crystal silicon, a thermal oxidation method is usually used to form the silicon oxide layer.
[0037] For example, before oxidizing the first and second surfaces of the first substrate 101, the first substrate 101 and the second substrate 102 are cleaned, thereby ensuring the uniformity of thickness and surface smoothness of the first oxide layer 1011 and the second oxide layer 1012 formed subsequently.
[0038] Step S103: etching the first surface of the first substrate to form a groove structure, and retaining a portion of the first oxide layer.
[0039] For example, combined with Figure 1 and Figure 2C , the groove structure 1013 can be formed by dry etching or wet etching to prepare for the subsequent formation of the cavity structure.
[0040] Step S104: Align the second substrate and the first substrate to seal the groove structure and form a cavity structure.
[0041] For example, combined with Figure 1 and Figure 2D The second substrate 102 and the first substrate 101 are aligned to seal the groove structure 1013 and form a cavity structure. When the first substrate 101 and the second substrate 102 are both silicon substrates, and are lightly doped or heavily doped Si substrates, the silicon-oxygen bonds on the first substrate 101 and the silicon-silicon bonds on the second substrate 102 are bonded to seal the groove structure, thereby forming a cavity structure.
[0042] Step S105: performing a rough thinning process and a fine thinning process on the second substrate in sequence to make the thickness of the second substrate be 5 micrometers to 20 micrometers.
[0043] For example, combined with Figure 1 and Figure 2E The rough thinning treatment of the second substrate 102 includes thinning the second substrate 102 to 21 microns to 30 microns by mechanical grinding, which is equivalent to removing most of the thickness of the second substrate 102, so that the second substrate 102 only needs to be finely thinned to obtain a second substrate 102 with a thickness of 5 microns to 20 microns, thereby improving the efficiency of the thinning treatment of the second substrate 102. In addition, the preparation method of the semiconductor substrate provided by the embodiment of the present disclosure can make the thickness of the first substrate 101 more uniform, so as to be controlled within plus or minus 0.5 microns.
[0044] For example, the rough thinning process for the second substrate 102 includes sequentially performing a rough grinding process and a fine grinding process, wherein the rough grinding process can quickly thin the second substrate 102, and the fine grinding process can reduce the damage caused to the second substrate 102. Dividing the rough thinning process into the rough grinding process and the fine grinding process can avoid excessive thinning during the rough grinding process, thereby preventing irreparable losses. In addition, the fine grinding process can also ensure the flatness of the surface of the formed second substrate, and the efficiency of the fine grinding process is higher than that of the polishing process, thereby saving time and economic costs.
[0045] For example, after the rough thinning process, the second substrate 102 maintains a thickness of 21 microns to 30 microns, which can avoid the second substrate 102 from being broken or fractured due to a strong grinding force during the fine grinding process. The rough thinning process can shorten the time for the subsequent fine thinning process, thereby improving the efficiency of the subsequent fine thinning process.
[0046] For example, Figure 3 The thickness trend diagram of different positions of the second substrate after the rough thinning process is completed in the preparation method provided by at least one embodiment of the present disclosure. Figure 3 As shown, nine points are taken on the second substrate 102, from Figure 3 It can be seen that the average thickness of the second substrate 102 is 27.12 microns, and the thickness fluctuation of the second substrate 102 is plus or minus 2.36 microns.
[0047] For example, in one example, fine thinning the second substrate 102 includes polishing the second substrate 102, and the polishing may be chemical mechanical polishing. Chemical mechanical polishing can not only rapidly thin the second substrate 102 by means of the grinding action of ultrafine particles and the chemical corrosion action of the slurry, but also make the polished surface flatter and smoother. For example, the chemical mechanical polishing may be performed by silica colloidal polishing.
[0048] For example, in one example, the first substrate 101 and the second substrate 102 are both silicon substrates, and aligning the second substrate 102 and the first substrate 101 to seal the groove structure includes: bonding the Si-O bonds in the portion of the first oxide layer retained on the first substrate 101 with the Si-Si bonds on the second substrate 102.
[0049] For example, after the silicon-oxygen bond (Si-O bond) on the first substrate 101 and the silicon-silicon bond (Si-Si bond) on the second substrate 102 are bonded, due to the presence of the cavity structure in the first substrate 101, the contact area of the bonding portion of the first substrate 101 and the second substrate 102 is reduced, and the layer structure formed later on the cavity structure is only supported by the second substrate 102. When the rough thinning process is used, the mechanical grinding force is large. When the thickness of the second substrate 102 is reduced to less than 21 microns, if the second substrate 102 is thinned by mechanical grinding, it will cause the second substrate 102 to be damaged and broken. In the embodiment of the present disclosure, after the second substrate 102 is subjected to the rough thinning process, its thickness is maintained at 21 microns to 30 microns, and then the subsequent fine thinning process is performed, which can shorten the time of the subsequent fine thinning process, thereby improving the efficiency of the subsequent fine thinning process, so as to prepare a semiconductor substrate with a cavity structure, and make the surface uniformity of the second substrate good, and can effectively control defects.
[0050] For example, in one example, before fine thinning the second substrate 102, the thickness of the second substrate 102 is measured using a Fourier infrared instrument, so that the thickness of the second substrate 102 to be processed and the thickness of the second substrate 102 required for thinning in subsequent fine thinning processing can be accurately determined.
[0051] For example, the thickness of the second substrate 102 is measured using a general Fourier infrared measuring instrument, and the first oxide layer between the second substrate 102 and the first substrate 101 between 0.5 micrometers and 1 micrometer can be used to accurately measure the resolution of the film layer.
[0052] For example, in one example, fine thinning the second substrate 102 includes performing multiple polishing processes on the second substrate 102, so that the thickness of the second substrate 102 that needs to be finely thinned each time can be finely determined to avoid over-thinning of the second substrate 102 and causing irreparable losses. For example, after each polishing process, the thickness of the second substrate 102 is measured using a Fourier infrared instrument, so that the thickness of the second substrate 102 that needs to be thinned can be more finely determined.
[0053] For example, Figure 4 The thickness trend diagram of different positions of the second substrate after the fine thinning process is completed in the preparation method provided by at least one embodiment of the present disclosure. Figure 4 As shown, nine points are taken on the second substrate 102, from Figure 4 It can be seen that the average thickness of the second substrate 102 is 19.79 micrometers, and the thickness fluctuation of the second substrate 102 is plus or minus 0.59 micrometers.
[0054] For example, in addition to thinning the second substrate 102, the polishing process can also remove surface stress and improve the surface roughness of the second substrate.
[0055] For example, Figure 5 A flowchart of a method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure is provided. Figure 6A to Figure 6F A process diagram of another method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, wherein: Fig. 6A A process diagram of providing a first substrate and a second substrate in another method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, Figure 6B A process diagram of oxidizing a first substrate in another method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, Figure 6C A process diagram of etching a first surface of a first substrate in another method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, Fig.6DA process diagram of aligning a second substrate with a first substrate in another method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, Fig. 6E A process diagram of sequentially performing a rough thinning process and a fine thinning process on a second substrate in another method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, Fig. 6F A process diagram of treating a second oxide layer on a second surface of a first substrate to remove the second oxide layer in a method for preparing a semiconductor substrate provided in at least one embodiment of the present disclosure, combined with Figure 5 and Figure 6A to Figure 6F As shown, the method for preparing the semiconductor substrate includes the following steps.
[0056] Step S201: Provide a first substrate and a second substrate.
[0057] For example, combined with Figure 5 and Fig. 6A The first substrate 101 and the second substrate 102 can both be silicon substrates, or lightly doped or heavily doped Si substrates, or p-type or n-type doped substrates, and the dopant can be elements such as boron, phosphorus or arsenic. The first substrate 101 is used as a supporting substrate for the final semiconductor substrate, and its material selection is more extensive.
[0058] For example, in one example, the first substrate 101 and the second substrate 102 have the same shape and are equal or substantially equal in surface area.
[0059] For example, in one example, the first substrate 101 and the second substrate 102 are both silicon substrates, and the thickness of the first substrate 101 and the second substrate 102 may both be 550 micrometers to 700 micrometers.
[0060] Step S202: performing oxidation treatment on the first surface and the second surface opposite to each other of the first substrate to form a first oxide layer and a second oxide layer.
[0061] For example, combined with Figure 5 and Figure 6B The first oxide layer 1011 and the second oxide layer 1012 can be formed in the first substrate 101 by high temperature oxidation. For example, a silicon dioxide layer can be formed by high temperature oxidation of a single crystal silicon substrate, so that the first oxide layer 1011 and the second oxide layer 1012 are both silicon dioxide layers. For example, the first oxide layer 1011 can be used as an etching stop layer for subsequent chemical mechanical polishing to prevent the etching solution from corroding the device layer formed subsequently.
[0062] For example, after forming the first oxide layer 1011 and the second oxide layer 1012 on the first surface and the second surface opposite to each other on the first substrate 101, and before forming the subsequent layer structure, the first substrate 101 is subjected to an annealing step, and the annealing temperature is greater than 1000 o C, for example, 1300 o C or so.
[0063] For example, in one example, the thickness of the first oxide layer 1011 formed on the first surface of the first substrate 101 is 0.5 micrometers to 1 micrometer. The thickness of the second oxide layer 1012 formed on the second surface of the second substrate 102 is 0.5 micrometers to 1 micrometer.
[0064] For example, the first oxide layer 1011 and the second oxide layer 1012 are insulating layers, and the insulating layers are silicon oxide layers or silicon oxynitride layers. For single crystal silicon, a thermal oxidation method is usually used to form silicon oxide.
[0065] For example, before oxidizing the first and second surfaces of the first substrate 101, the first substrate 101 and the second substrate 102 are cleaned, thereby ensuring the uniformity of thickness and surface smoothness of the first oxide layer 1011 and the second oxide layer 1012 formed subsequently.
[0066] Step S203: performing an etching process on the first surface of the first substrate to form a groove structure 1013, and retaining a portion of the first oxide layer.
[0067] For example, combined with Figure 5 and Figure 6C , the groove structure 1013 can be formed by dry etching or wet etching to prepare for the subsequent formation of the cavity structure.
[0068] Step S204: Align the second substrate and the first substrate to seal the groove structure and form a cavity structure.
[0069] For example, combined with Figure 5 and Fig.6D The second substrate 102 and the first substrate 101 are aligned to seal the groove structure 1013 and form a cavity structure. When the first substrate 101 and the second substrate 102 are both silicon substrates, and are lightly doped or heavily doped Si substrates, the silicon-oxygen bonds on the first substrate 101 and the silicon-silicon bonds on the second substrate 102 are bonded to seal the groove structure, thereby forming a cavity structure.
[0070] Step S205: performing a rough thinning process and a fine thinning process on the second substrate in sequence to make the thickness of the second substrate be 5 micrometers to 20 micrometers.
[0071] For example, combined with Figure 5 and Fig. 6E The rough thinning treatment of the second substrate 102 includes thinning the second substrate 102 to 21 microns to 30 microns by mechanical grinding, which is equivalent to removing most of the thickness of the second substrate 102, so that only fine thinning treatment of the second substrate 102 is required to obtain a second substrate 102 with a thickness of 5 microns to 20 microns, thereby improving the efficiency of the thinning treatment of the second substrate 102.
[0072] For example, the rough thinning process for the second substrate 102 includes sequentially performing a rough grinding process and a fine grinding process, wherein the rough grinding process can quickly thin the second substrate 102, and the fine grinding process can reduce damage to the second substrate 102. Dividing the rough thinning process into the rough grinding process and the fine grinding process can avoid excessive thinning during the rough grinding process, thereby preventing irreparable losses. In addition, the fine grinding process can also ensure the flatness of the surface of the formed second substrate, and the efficiency of the fine grinding process is higher than that of the fine thinning process, thereby saving time and economic costs.
[0073] For example, after the rough thinning process, the second substrate 102 maintains a thickness of 21 microns to 30 microns, which can avoid the second substrate 102 from being broken or fractured due to a strong grinding force during the subsequent fine grinding process. The rough thinning process can shorten the time for the subsequent fine thinning process, thereby improving the efficiency of the subsequent fine thinning process.
[0074] For example, in one example, fine thinning the second substrate 102 includes polishing the second substrate 102, and the polishing may be chemical mechanical polishing. Chemical mechanical polishing can not only rapidly thin the second substrate 102 by means of the grinding action of ultrafine particles and the chemical corrosion action of the slurry, but also make the polished surface flatter and smoother. For example, the chemical mechanical polishing may be performed by silica colloidal polishing.
[0075] For example, in one example, the first substrate 101 and the second substrate 102 are both silicon substrates, and aligning the second substrate 102 and the first substrate 101 to seal the groove structure includes: bonding the Si-O bonds in the portion of the first oxide layer retained on the first substrate 101 with the Si-Si bonds on the second substrate 102.
[0076] For example, after the silicon-oxygen bond (Si-O bond) on the first substrate 101 and the silicon-silicon bond (Si-Si bond) on the second substrate 102 are bonded, due to the presence of the cavity structure in the first substrate 101, the contact area of the bonding portion of the first substrate 101 and the second substrate 102 is reduced, and the layer structure formed later on the cavity structure is only supported by the second substrate 102. When the rough thinning process is used, the mechanical grinding force is large. When the thickness of the second substrate 102 is reduced to less than 21 microns, if the second substrate 102 is thinned by mechanical grinding, it will cause the second substrate 102 to be damaged and broken. In the embodiment of the present disclosure, after the second substrate 102 is subjected to the rough thinning process, its thickness is maintained at 21 microns to 30 microns, and then the subsequent fine thinning process is performed, which can shorten the time of the subsequent fine thinning process, thereby improving the efficiency of the subsequent fine thinning process, so as to prepare a semiconductor substrate with a cavity structure, and make the surface uniformity of the second substrate good, and can effectively control defects.
[0077] For example, in one example, before fine thinning the second substrate 102, the thickness of the second substrate 102 is measured using a Fourier infrared instrument, so that the thickness of the second substrate 102 to be processed and the thickness of the second substrate 102 required for thinning in subsequent fine thinning processing can be accurately determined.
[0078] For example, in one example, fine thinning the second substrate 102 includes performing multiple polishing processes on the second substrate 102, so that the thickness of the second substrate 102 that needs to be finely thinned each time can be finely determined to avoid over-thinning of the second substrate 102 and causing irreparable losses. For example, after each polishing process, the thickness of the second substrate 102 is measured using a Fourier infrared instrument, so that the thickness of the second substrate 102 that needs to be thinned can be more finely determined.
[0079] Step S206: Processing the second oxide layer on the second surface of the first substrate to remove the second oxide layer to form a semiconductor substrate.
[0080] For example, combined with Figure 5 and Fig. 6F The second oxide layer 1012 on the second surface of the first substrate 101 is treated to remove the second oxide layer, which includes: treating the second oxide layer with hydrofluoric acid. The second oxide layer can also be treated with hydrofluoric acid to form a desired corner shape on the second substrate 102.
[0081] The method for preparing a semiconductor substrate provided by at least one embodiment of the present disclosure has at least the following technical effects: (1) In the method for preparing a semiconductor substrate provided in the embodiments of the present disclosure, low-cost but low-precision equipment is used. By cleverly combining multiple steps, the process effect brought about by the improved scheme can be completely consistent with the effect of preparation using imported new equipment, thereby reducing the dependence on foreign high-end new equipment, and the entire process does not require any foreign high-end equipment.
[0082] (2) In the method for preparing a semiconductor substrate provided in the embodiments of the present disclosure, equipment with different functions is used to perform steps such as rough thinning, chemical mechanical polishing and Fourier infrared measurement in a step-by-step manner, thereby overcoming the obstacle of insufficient equipment capacity, so that the final process result can completely reach the same level as the preparation using foreign high-end models, and the investment cost of fixed assets is about 1 / 3 of the cost of foreign high-end equipment or even lower. Moreover, since it can be carried out in steps, the process flexibility is greatly improved, and the entire set of process steps will not be unable to be carried out due to equipment failure in a certain process link.
[0083] There are a few points to note: (1) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are involved, and other structures may refer to the general design.
[0084] (2) Unless there is a conflict, the features of the same embodiment or different embodiments of the present disclosure may be combined with each other.
[0085] The above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.
Claims
1. A method for preparing a semiconductor substrate, comprising: providing a first substrate and a second substrate; Performing oxidation treatment on the first surface and the second surface opposite to each other of the first substrate to form a first oxide layer and a second oxide layer; Performing an etching process on the first surface of the first substrate to form a groove structure, and retaining a portion of the first oxide layer; Aligning the second substrate with the first substrate to seal the groove structure and form a cavity structure; The second substrate is subjected to a coarse thinning process and a fine thinning process in sequence so that the thickness of the second substrate is 5 micrometers to 20 micrometers.
2. The preparation method according to claim 1, wherein The rough thinning of the second substrate includes thinning the second substrate to 21 micrometers to 30 micrometers by mechanical grinding.
3. The preparation method according to claim 2, wherein The rough thinning process of the second substrate includes sequentially performing a rough grinding process and a fine grinding process.
4. The preparation method according to claim 2 or 3, wherein The fine thinning process on the second substrate includes polishing the second substrate.
5. The preparation method according to claim 4, wherein Before fine thinning the second substrate, the thickness of the second substrate is measured by using a Fourier infrared instrument.
6. The preparation method according to claim 5, wherein: The fine thinning process for the second substrate includes performing multiple polishing processes on the second substrate, and measuring the thickness of the second substrate with the Fourier transform infrared instrument after each polishing process.
7. The preparation method according to any one of claims 1 to 3, wherein Oxidizing the first surface and the second surface opposite to each other of the first substrate includes: forming the first oxide layer and the second oxide layer by adopting a high temperature oxidation process.
8. The preparation method according to claim 1, wherein The first substrate and the second substrate are both silicon substrates, and aligning the second substrate with the first substrate to seal the groove structure includes: bonding Si-O bonds in a portion of the first oxide layer retained on the first substrate with Si-Si bonds on the second substrate.
9. The preparation method according to claim 8, wherein: The thickness of the first oxide layer is 0.5 micrometer to 1 micrometer.
10. The preparation method according to claim 8 or 9, wherein: After forming the first oxide layer and the second oxide layer, the method further includes performing an annealing process on the first substrate.
11. The preparation method according to claim 1, further comprising: The second oxide layer on the second surface of the first substrate is processed to remove the second oxide layer.
12. The preparation method according to claim 11, wherein Processing the second oxide layer on the second surface of the first substrate to remove the second oxide layer includes: processing the second oxide layer with hydrofluoric acid.
13. The preparation method according to any one of claims 1 to 3, wherein Before performing the oxidation process on the first surface and the second surface opposite to each other of the first substrate, the method further includes performing a cleaning process on the first substrate and the second substrate.
Citation Information
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