Data processing method and apparatus, and computer-readable storage medium

Abstract

The application discloses a data processing method and device and a computer readable storage medium, and relates to the technical field of network communication. The method comprises the following steps: obtaining target data to be sent from a processor to an integrated circuit; constructing a feature image related to the target data; and determining whether the target data is sent from the processor to the integrated circuit according to the feature image. The application can reduce unnecessary interaction between the processor and the integrated circuit, and is beneficial to improving system performance.

Description

Technical Field

[0001] This application relates to the field of network communication technology, and more specifically, to a data processing method, apparatus, and computer-readable storage medium. Background Technology

[0002] Currently, the main architecture of high-performance network firewalls is usually based on the SOC (System On Chip) architecture, which includes a CPU and an ASIC (Application-Specific Integrated Circuit).

[0003] CPUs are typically multi-core processors, while ASICs are integrated circuits custom-designed for specific applications or functions. Compared to CPUs, ASICs offer advantages such as higher performance, lower power consumption, and smaller size. Typically, a session is created by the CPU progressively building it up during the first path (a slow, full path in data flow processing), and the session is also installed into the ASIC at the end of the first path. Subsequent packets from the same data flow will be matched against the session on the ASIC during session matching, allowing for rapid processing and forwarding by the ASIC.

[0004] However, it's important to note that all these logical functions are implemented by the CPU through message passing and synchronization with the ASIC via the system bus. In scenarios with high interaction and high traffic, the numerous and frequent interactions between the CPU and ASIC—such as session installation, aging, deletion, recreation, reinstallation, re-aging, and re-deletion—each consume CPU computing resources and cause latency, leading to a decrease in system performance. This performance fluctuation is particularly pronounced in applications with frequent interactions and short lifecycles. Furthermore, one of the purposes of using a SoC system architecture is to leverage the high performance, fixed nature, and predictable data processing and forwarding capabilities of ASICs. However, since ASIC memory is also limited, failing to fully utilize the performance and system resource advantages of ASICs will inevitably affect the overall cost-effectiveness of the SoC system.

[0005] There is currently no effective solution to the above problems. Summary of the Invention

[0006] This application provides a data processing method, apparatus, and computer-readable storage medium.

[0007] In some embodiments, a data processing method is provided, comprising: acquiring target data to be sent from a processor to an integrated circuit; constructing a feature profile related to the target data; and determining, based on the feature profile, whether to send the target data from the processor to the integrated circuit.

[0008] In some embodiments, in the data processing method provided in this application, obtaining target data to be sent by the processor to the integrated circuit includes: determining the session data created by the processor as the target data to be sent to the integrated circuit.

[0009] In some embodiments, the feature profile provided in this application includes at least one of the following features: N data features, where N is an integer greater than or equal to 1, which are used to characterize message feature information related to target data; M processor features, where M is an integer greater than or equal to 1, which are used to characterize processor performance feature information; and K integrated circuit features, where K is an integer greater than or equal to 1, which are used to characterize integrated circuit performance feature information.

[0010] In some embodiments, in the data processing method provided in this application, determining whether to send the target data from the processor to the integrated circuit based on the feature profile includes: obtaining a preset threshold set for each feature in the feature profile; and determining whether to send the target data from the processor to the integrated circuit based on the relationship between the feature value of each feature and the preset threshold corresponding to each feature.

[0011] In some embodiments, in the data processing method provided in this application, determining whether to send the target data from the processor to the integrated circuit based on the feature profile includes: obtaining a weight set for each feature in the feature profile; performing a weighted calculation on the feature value of each feature according to the weight corresponding to each feature to obtain a target feature value; comparing the magnitude relationship between the target feature value and a decision threshold; and determining whether to send the target data from the processor to the integrated circuit based on the magnitude relationship between the target feature value and the decision threshold.

[0012] In some embodiments, the data processing method provided in this application further includes: acquiring data concurrency information of the processor and / or data concurrency information of the integrated circuit; and adjusting the preset threshold and / or weight corresponding to each feature in the feature profile according to the data concurrency information of the processor and / or the data concurrency information of the integrated circuit.

[0013] In some embodiments, in the data processing method provided in this application, adjusting the preset threshold and / or weight corresponding to one or more features in the feature profile according to the data concurrency information of the processor and / or the data concurrency information of the integrated circuit includes: adjusting the preset threshold and / or weight corresponding to one or more features in the feature profile according to the data concurrency information of the processor or the integrated circuit in the i-th calculation cycle, where i is an integer greater than or equal to 1, and each calculation cycle represents a time period for deciding whether to send target data from the processor to the integrated circuit.

[0014] In some embodiments, in the data processing method provided in this application, after adjusting the preset thresholds and / or weights corresponding to one or more features in the feature profile according to the data concurrency information of the processor in the i-th calculation cycle and / or the data concurrency information of the integrated circuit in the i-th calculation cycle, it is determined whether to send the target data to be sent from the processor to the integrated circuit during the i+1 calculation cycle based on the adjusted preset thresholds and / or weights and the feature profile related to the target data constructed in the i+1 calculation cycle.

[0015] In some embodiments, the data processing method further includes: for session data that the processor did not send to the integrated circuit in the nth calculation cycle, if a data packet of a data stream matching the session data is received in the n+mth calculation cycle, determining whether to send the session data from the processor to the integrated circuit based on a feature profile related to the session data constructed in the n+mth calculation cycle, wherein n and m are both integers greater than or equal to 1.

[0016] In some embodiments, in the data processing method provided in this application, the N data features include at least statistical information on the number of messages and / or the message length information in the target data; and / or, the M processor features include at least the core utilization rate of the processor; and / or, the K integrated circuit features include at least the memory resource utilization rate of the integrated circuit.

[0017] In some embodiments, a data processing apparatus is also provided, comprising: an acquisition unit for acquiring target data to be sent from the processor to an integrated circuit; a construction unit for constructing a feature profile related to the target data; and a determination unit for determining, based on the feature profile, whether to send the target data from the processor to the integrated circuit.

[0018] In some embodiments, a computer-readable storage medium is also provided, wherein a computer program is stored in the computer-readable storage medium, wherein when the computer program is executed, the device in which the computer-readable storage medium is located performs the data processing method described above.

[0019] In this application, after obtaining the target data to be sent from the processor to the integrated circuit, a feature profile related to the target data is first constructed, and then, based on the feature profile, it is determined whether to send the target data from the processor to the integrated circuit.

[0020] As described above, unlike existing technologies that directly send all target data to the integrated circuit (IC) from the processor, the technical solution of this application first constructs a feature profile related to the target data. Then, based on this profile, it determines whether to send the target data to the IC. This prevents the IC from processing target data, thus reducing unnecessary interactions between the processor and IC, such as session synchronization, and eliminating subsequent processing steps (e.g., session deletion, aging). This solves the problem of wasted CPU computing resources and system performance degradation caused by frequent interactions between the processor and IC. Furthermore, by using the technical solution of this application to determine whether to send target data from the processor to the IC based on the target data's feature profile, unnecessary interactions between the processor and IC are reduced, resulting in a smaller amount of target data sent to the IC. This reduces the processing load on the IC, allowing for full utilization of its performance advantages and memory resources.

[0021] Therefore, the technical solution of this application improves the passive mechanism of unconditionally sending all target data from the processor to the integrated circuit in the prior art into an active traffic forwarding mechanism. By actively constructing a feature profile of the target data, the target data that needs to be sent to the integrated circuit is actively filtered out based on the feature profile, while the target data that does not need to be sent to the integrated circuit is not sent. This achieves the technical effect of rationally allocating the system resources of the processor and the integrated circuit, and solves the technical problem that in the prior art, when the SOC system processes session data, all session data is sent from the processor to the integrated circuit for processing, resulting in insufficient utilization of the integrated circuit system resources and low overall cost performance of the SOC system. Attached Figure Description

[0022] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0023] Figure 1 This is a flowchart of a data processing method according to an embodiment of this application;

[0024] Figure 2 This is a schematic diagram of a SOC system architecture according to an embodiment of this application;

[0025] Figure 3 This is a data interaction flowchart according to an embodiment of this application;

[0026] Figure 4 This is a data transmission flowchart of a feature profile based on target data according to an embodiment of this application;

[0027] Figure 5 This is a schematic diagram of a feature profile generation process according to an embodiment of this application;

[0028] Figure 6 This is a flowchart of a self-updating process for feature weights and preset thresholds according to an embodiment of this application;

[0029] Figure 7 This is a schematic diagram of a data processing apparatus according to an embodiment of this application. Detailed Implementation

[0030] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0031] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0032] It should also be noted that the information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, and displayed data) collected in this application are information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, storage, use, processing, transmission, provision, disclosure, and application of related data all comply with the relevant laws, regulations, and standards of the relevant regions, necessary confidentiality measures have been taken, and they do not violate public order and good morals. Corresponding operation entry points are provided for users to choose to authorize or refuse. For example, this system has interfaces with relevant users or organizations. Before obtaining relevant information, a request to obtain the information needs to be sent to the aforementioned user or organization through the interface, and the relevant information is obtained only after receiving consent from the aforementioned user or organization.

[0033] According to an embodiment of this application, an embodiment of a data processing method is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0034] Figure 1 This is a flowchart of a data processing method according to an embodiment of this application, such as... Figure 1 As shown, the method includes the following steps:

[0035] Step S101: Obtain the target data to be sent by the processor to the integrated circuit.

[0036] In some embodiments, this data processing method can be applied to a network device, which includes at least a System-on-a-Chip (SoC) system or other system having a processor and an integrated circuit (e.g., an ASIC) chip. The processor is used to implement functions such as session establishment and packet processing, while the integrated circuit is used to perform table lookups and forwarding of packets. The processor and the integrated circuit chip are connected via a system bus for data transmission.

[0037] For example, the network device described above can be a network security device such as a firewall, or a device such as a router or switch with network security functions. The network device may also include a memory for storing forwarding tables and session tables generated by the processor, and the integrated circuit chip may contain its own storage space for storing forwarding tables and session tables issued by the processor.

[0038] For example, the system bus may include a control bus and a data bus, wherein the control bus is used to send session data and the data bus is used to transmit data such as messages.

[0039] For example, in step S101, the processor may be a central processing unit (CPU) or other processor, such as a multi-core CPU, and the integrated circuit may be an ASIC or other logic chip.

[0040] For example, Figure 2 This is a schematic diagram of a SOC system architecture according to an embodiment of this application, such as... Figure 2 As shown, the SOC system mainly consists of a multi-core CPU and an ASIC. The main functions of the multi-core CPU include, but are not limited to: data processing of the entire SOC system management plane (e.g., data configuration, data statistics, data presentation), session data creation, complex logic analysis, and support for complex applications. The main functions of the ASIC include, but are not limited to: rapid policy matching, basic service support, and data packet forwarding.

[0041] In some embodiments, the SOC system may also include various types of interfaces, backplane switches, system buses, and storage modules.

[0042] In the field of network security, SOC systems that combine CPUs and ASICs can be used to design and manufacture network security devices (such as firewall devices), and SOC systems also support different deployment scenarios and application scenarios.

[0043] For example, Figure 3 This is a data interaction flowchart according to an embodiment of this application. To more clearly illustrate the technical solution of this application, the following is combined with... Figure 3 A brief explanation of the data interaction process between the CPU and ASIC is provided.

[0044] In some embodiments, the target data to be sent by the processor to the integrated circuit may be session data to be sent by the processor to the integrated circuit, or it may be a message data stream associated with the session data, or it may be other data that can be exchanged between the processor and the integrated circuit.

[0045] For example, a data flow refers to a stream of associated data packets that have the same service characteristics and match the same predefined conditions, such as SIP (Session Initiation Protocol, a signaling protocol used to establish, modify, and terminate multimedia sessions), SPORT (Source Port, referring to the port number used by the sender of data packets in network communication), DIP (Destination IP, referring to the IP address of the receiver of data packets in network communication), DPORT (Destination Port, referring to the port number used by the receiver of data packets in network communication), PROTO (Protocol, referring to a set of standards used to define the rules for data transmission and processing in network communication), and other data structures with service characteristics, which are represented by a data structure called a session.

[0046] For example, such as Figure 3 As shown, for a SoC system with a CPU and an ASIC, after receiving a packet, the I / O (Input / Output) module or the ASIC begins to search for a matching session. If no matching session is found, the packet is sent to the CPU. The CPU creates a new session step by step during the first path (a slow, full path in data flow processing) packet processing flow. At the end of the first path, the newly created session in the CPU is synchronously installed into the ASIC via system communication. Subsequently, the ASIC forwards subsequent packets that have successfully matched a session.

[0047] It should be noted that, as Figure 3 As shown, when the interaction between the client and server of an application ends, or when the session itself ages, the session will be deleted from both the CPU and ASIC. Subsequent received packets, unable to find a matching session, will repeat the process of session creation, installation, and deletion. Session aging refers to the session's existence exceeding the preset maximum lifespan.

[0048] As discussed above, while SOC systems, including CPUs and ASICs, offer advantages such as high performance and flexibility, the actual deployment environment and applications vary greatly. Therefore, a specific system, after deployment, may not always achieve optimal performance in the face of diverse applications. In the entire data processing flow, a crucial aspect affecting overall system performance is the creation, installation, aging, and deletion of sessions. As mentioned earlier, a session is created incrementally by a multi-core CPU during the first path packet processing. At the end of the first path, the CPU-created session is also installed into the ASIC. This ensures that subsequent packets from the same data stream can be matched with the session on the ASIC during session matching, allowing the ASIC to forward subsequent data packets with a successfully matched session.

[0049] However, it's important to note that all these logical functions are implemented by the CPU through message passing and synchronization with the ASIC via the system bus. In scenarios with high interaction and high traffic, the numerous and frequent interactions between the CPU and ASIC—such as session installation, aging, deletion, recreation, reinstallation, re-aging, and re-deletion—each consume CPU computing resources and cause latency, leading to a decrease in system performance. This performance fluctuation is particularly pronounced in applications with frequent interactions and short lifecycles. Furthermore, one of the purposes of using a SoC system architecture is to leverage the high performance, fixed nature, and predictable data processing and forwarding capabilities of ASICs. However, since ASIC memory is also limited, failing to fully utilize the performance and system resource advantages of ASICs will inevitably affect the overall cost-effectiveness of the SoC system.

[0050] To address the aforementioned issues, this application also proposes step S102 following step S101.

[0051] Step S102: Construct a feature profile related to the target data.

[0052] For example, in step S102, after obtaining the target data to be sent by the processor to the integrated circuit, this application does not immediately send the target data to the integrated circuit for processing. Instead, it first constructs a feature profile related to the target data. The feature profile can be used to describe one or more features of the target data, such as the message features of the target data, the time features of the target data, the size features of the target data, the processor-related features when processing the target data, and / or the integrated circuit-related features when processing the target data, etc.

[0053] Step S103: Based on the feature profile, determine whether to send the target data from the processor to the integrated circuit.

[0054] For example, determining whether to send target data to the integrated circuit is based on the feature value of at least one feature in the feature profile. For instance, determining whether to send target data from the processor to the integrated circuit is based on the feature values ​​of one or more features in the feature profile and preset thresholds and / or weights corresponding to one or more features in the feature profile.

[0055] For example, if the feature value of the i-th feature of the target data in the feature profile is lower than a preset threshold corresponding to the i-th feature, then the target data will not be sent from the processor to the integrated circuit. Here, i is an integer greater than or equal to 1.

[0056] It should be noted that the target data in this application is not limited to session data and data streams using session mechanisms, but can also be other data. Those skilled in the art will understand that any data that can interact between the processor and the integrated circuit can be used as target data and is applicable to the technical solution of this application.

[0057] For example, if it is determined from the feature profile related to the target data that the target data will be sent from the processor to the integrated circuit, the target data will be processed by the integrated circuit. For example, if the target data is a session that the processor is to send to the ASIC, the ASIC will install the session after the processor sends the session to the ASIC. Subsequently, the ASIC will forward subsequent data packets that are successfully matched with the session.

[0058] For example, if it is determined from the feature profile related to the target data that the target data will not be sent from the processor to the integrated circuit, the processor can use the target data to process messages or process the target data directly. For example, if the target data is a session that the processor is about to send to the ASIC, since the session is not sent from the processor to the ASIC, the processor can use the session to process the subsequent data packet stream or message related to the session accordingly.

[0059] In some embodiments, the method may further include: for session data that the processor did not send to the integrated circuit in the nth calculation cycle, if a data packet of a data stream matching the session data is received in the n+mth calculation cycle, determining whether to send the session data from the processor to the integrated circuit based on the feature profile related to the session data constructed in the n+mth calculation cycle, where n and m are both integers greater than or equal to 1.

[0060] In this way, the creation of session data related to the same data stream can be avoided in different computing cycles, thereby further saving CPU computing resources. At the same time, based on the feature profile related to the session data built in the n+m computing cycle, it is determined whether to send the session data from the processor to the integrated circuit in the n+m computing cycle. This allows the feature profile related to the session data to reflect the latest system operating status, thereby further improving the system's performance in high-performance data processing and forwarding.

[0061] Based on the content of steps S101 to S103 above, it can be seen that in this application, after obtaining the target data to be sent from the processor to the integrated circuit, a feature profile related to the target data is first constructed, and then, based on the feature profile, it is determined whether to send the target data from the processor to the integrated circuit.

[0062] As described above, unlike existing technologies that directly send all target data to the integrated circuit (IC) from the processor, the technical solution of this application first constructs a feature profile related to the target data. Then, based on this profile, it determines whether to send the target data to the IC. This prevents the IC from processing target data, thus reducing unnecessary interactions between the processor and IC, such as session synchronization, and eliminating subsequent processing steps (e.g., session deletion, aging). This solves the problem of wasted CPU computing resources and system performance degradation caused by frequent interactions between the processor and IC. Furthermore, by using the technical solution of this application to determine whether to send target data from the processor to the IC based on the target data's feature profile, unnecessary interactions between the processor and IC are reduced, resulting in a smaller amount of target data sent to the IC. This reduces the processing load on the IC, allowing for full utilization of its performance advantages and memory resources.

[0063] Therefore, the technical solution of this application improves the passive mechanism of unconditionally sending all target data from the processor to the integrated circuit in the prior art into an active traffic forwarding mechanism. By actively constructing a feature profile of the target data, the target data that needs to be sent to the integrated circuit is actively filtered out according to the feature profile, while the target data that does not need to be sent to the integrated circuit will not be sent, thereby achieving the technical effect of rationally allocating the system resources of the processor and the integrated circuit.

[0064] In some embodiments, during the process of acquiring target data to be sent by the processor to the integrated circuit, the session data created by the processor can be determined as the target data to be sent to the integrated circuit.

[0065] For example, the target data is, for instance, session data that the CPU is to send to the ASIC. This session can be a new session that the CPU creates directly based on the first packet of the received first data stream (i.e., creating the session by running the first path (a slow full path based on the data stream processing)). Alternatively, the CPU can first search in memory for a second session associated with the first session to be created when it receives the first packet of the data stream, and then create the first session based on the found second session. This first session is used to process or forward the data packets of the first data stream.

[0066] In some embodiments, the session data to be sent by the processor to the integrated circuit is session data of a first session. The process of the processor creating the first session may include: the processor receiving a first data packet; determining whether a second session exists if a preset condition is met, wherein the second session refers to a session that matches a target data stream, and the target data stream has the same target data characteristics as the data stream to which the first data packet belongs; and creating a first session based on the second session if a second session exists, wherein the first session matches the data stream to which the first data packet belongs.

[0067] Here, the preset conditions may include one of the following: the first data packet received is the first packet of the data stream; or it is determined that there is no first session that matches the data stream to which the first data packet belongs.

[0068] In this embodiment, under the condition of satisfying preset conditions, it is determined whether a second session exists. This realizes that when there is no session corresponding to the first data packet, the session corresponding to the data stream that is related to the data stream to which the first data packet belongs is found. Since when there are some data features that are the same between two data streams, that is, when there is a certain relationship, there will also be some information that is the same between the sessions corresponding to the two data streams. Therefore, by generating the first session based on the second session when there is a second session in the session table, the first session is generated on the basis of the existing related sessions. Compared with the existing technology of creating the first session according to the first path (a slow full path based on data flow processing), it can greatly save the processor's computing resources and further improve the system processing performance.

[0069] In some embodiments, if the processor determines that a second session does not exist, a first session is created based on a first data packet. In this case, the processor runs a first path (a slow full path based on data flow processing) to create the first session.

[0070] Here, the target data characteristics between the target data stream and the data stream to which the first data packet belongs may include at least one of the following: destination IP address, source IP address, destination port number, transport layer protocol, and the first session and the second session satisfy at least one of the following conditions: first condition, having the same ingress interface or having the same security zone; second condition, having the same policy pointer.

[0071] In some embodiments, determining whether a second session exists includes: obtaining the target index value of a first data packet; determining whether a target record corresponding to the target index value exists in a session index table, and obtaining a determination result, wherein each record in the session index table includes an index value and a session pointer of the session; and determining whether a second session exists based on the determination result.

[0072] For example, obtaining the target index value of the first data packet may include: determining the policy pointer corresponding to the source port number in the first data packet, wherein the policy pointer is used to point to a security policy; determining the interface information of the ingress interface used by the network device to receive the first data packet; calculating the target index value based on the policy pointer, the interface information and the target data features of the first data packet, wherein the target data features include at least one of the following: destination IP address, source IP address, destination port number, and transport layer protocol.

[0073] In some embodiments, determining whether a second session exists includes: extracting target data features from a first data packet; determining the security policy and interface information corresponding to the first data packet; if a session matching the target data features, security policy, and interface information exists, then the session matching the target data features, security policy, and interface information is determined as the second session; if no session matching the target data features, security policy, and interface information exists, then it is determined that no second session exists.

[0074] In some embodiments, generating a first session based on a second session may include: cloning the second session; and modifying the session obtained from the cloning process based on multiple data characteristics of the first data packet to obtain the first session. For example, making corresponding modifications or updates to the content of the session obtained from the cloning process, such as NAT (Network Address Translation).

[0075] For example, Figure 4 This is a data transmission flowchart of a feature profile based on target data according to an embodiment of this application, such as... Figure 4As shown, for a SoC system including a CPU and an ASIC, after receiving a message, the system starts querying the session and matching sessions. If a session is found but no match is found, a new session is created step by step during the CPU's first path message processing flow. At the end of the first path, the newly created session in the CPU is attempted to be installed into the ASIC subsystem through system communication (corresponding to the above-mentioned acquisition of session data that the processor is preparing to create in the integrated circuit; at this time, the newly created session in the CPU has not yet been truly synchronized and installed into the ASIC).

[0076] like Figure 4 As shown, according to the technical solution of this application, a newly created session in the CPU can be used as the target data to be sent from the CPU to the integrated circuit. A feature profile of the target data is constructed using an application learning module, and an ASIC session installation decision is determined based on this profile. The ASIC session installation decision determines whether to install the newly created CPU session in the ASIC. If the ASIC session installation decision indicates that the newly created CPU session should be installed in the ASIC, after the session is installed, the ASIC forwards subsequent data packets that successfully match the session. Of course, the ASIC session installation decision may also indicate that the newly created CPU session should not be installed in the ASIC.

[0077] Similarly, as Figure 4 As shown, when the interaction between the client and server of an application ends, or when the session itself ages, the session will be deleted from both the CPU and the ASIC. Subsequent received messages will repeat the above steps of session creation and decision-making on whether to install on the ASIC because they cannot match the session.

[0078] As can be seen from the above, this application improves the passive mechanism of unconditionally sending all sessions from the processor to the integrated circuit in the prior art into an active traffic sending mechanism by designing an ASIC session installation decision mechanism. By actively constructing a feature profile of the session, and then actively selecting which target data needs to be sent to the integrated circuit and which sessions do not need to be sent to the integrated circuit based on the feature profile, the technical effect of rationally allocating the system resources of the processor and the integrated circuit is achieved.

[0079] In one embodiment, the feature profile includes at least one of the following features:

[0080] N data features, where N is an integer greater than or equal to 1, are used to characterize message feature information in the target data; M processor features, where M is an integer greater than or equal to 1, are used to characterize processor performance feature information; K integrated circuit features, where K is an integer greater than or equal to 1, are used to characterize integrated circuit performance feature information.

[0081] For example, Figure 5 This is a schematic diagram of a feature profile generation process according to an embodiment of this application, such as... Figure 5 As shown, feature profiles can be generated through the feature engineering module, which can perform the following functions:

[0082] The initialization logic is used to pre-configure relevant parameters, such as at least one of the following: feature parameters, weights corresponding to features, preset thresholds corresponding to features, application-aware definition rules, and execution actions.

[0083] The traffic collection function is used to collect traffic based on pre-configured traffic collection conditions, such as the pre-configured traffic collection time, the application object of traffic collection, and the frequency of traffic collection.

[0084] The application identification function is used to cleanse and identify applications in the collected traffic. For example, it removes outliers from traffic (such as session-related data packet streams) and determines the source and destination applications of the traffic. This step can be omitted in practical applications.

[0085] The application feature engineering function is used to mine features from traffic that has undergone data cleaning and application identification. Feature engineering mining first extracts relevant features of the target data from the cleaned and identified traffic, such as determining whether the target data is complete session data, detecting the number of packets in the target data, and detecting the packet length of the target data. In addition, feature engineering mining can also extract feature data related to other system operating states, such as CPU core utilization and ASIC memory resource utilization.

[0086] In addition, the application learning module can construct a feature profile of the target data based on the features extracted by the feature engineering module, and then determine whether to send the target data based on the feature profile.

[0087] It should be noted that the feature profile is not static. An update cycle for the feature profile can be set within the SOC system, allowing for timely updates. This update cycle can be customized or dynamically set based on the actual operating status of the CPU and / or ASIC. For example, if the actual operating status of the ASIC indicates that the current load on the ASIC exceeds a preset value, the feature profile update can be initiated immediately.

[0088] As can be seen from the above, by generating feature profiles in the above way, not only can the data features of the data stream related to the target data be collected, but also the processor features and integrated circuit features can be collected, thereby obtaining a multi-dimensional and information-rich feature profile, and then a sufficiently accurate ASIC session installation decision can be made based on the feature profile.

[0089] In one embodiment, a method for determining whether to send target data from the processor to the integrated circuit for processing based on a feature profile is as follows: obtaining a preset threshold set for each feature in the feature profile; and determining whether to send the target data from the processor to the integrated circuit based on the relationship between the feature value of each feature and the preset threshold corresponding to each feature.

[0090] For example, suppose the feature profile includes multiple features, and a corresponding preset threshold is set for each feature. For different features, the way to determine whether the actual feature value of the feature meets the preset condition based on the preset threshold may also be different. For example, for feature 1, when the actual feature value of feature 1 is greater than the preset threshold corresponding to feature 1, it is determined that the actual feature value of feature 1 meets the preset condition; for feature 2, when the actual feature value of feature 2 is less than the preset threshold corresponding to feature 2, it is determined that the actual feature value of feature 2 meets the preset condition; for feature 3, it can only be determined that the actual feature value of feature 3 meets the preset condition when the actual feature value of feature 3 is equal to the preset threshold corresponding to feature 3.

[0091] For example, according to the solution of this application, the target data can be sent from the processor to the integrated circuit only when the actual feature value of each feature meets the preset conditions, or the target data can be sent from the processor to the integrated circuit only when the actual feature value of a preset number of features meets the preset conditions.

[0092] In summary, this application supports determining whether to send target data from the processor to the integrated circuit based on the relationship between the feature value of each feature and the preset threshold corresponding to each feature. Specific settings can be configured according to actual circumstances, and this application does not impose any particular limitations on them.

[0093] As can be seen from the above, determining whether to send target data from the processor to the integrated circuit based on the relationship between the feature value of each feature and the preset threshold corresponding to each feature is actually to implement the influencing factors of ASIC session installation decision on the feature value of each feature, thereby achieving the purpose of making refined decisions based on each feature and improving the accuracy of ASIC session installation decision.

[0094] In one embodiment, another method can be used to determine whether to send target data from the processor to the integrated circuit based on the feature profile, including: obtaining the weight set for each feature in the feature profile; performing a weighted calculation on the feature value of each feature according to the weight corresponding to each feature to obtain the target feature value; comparing the magnitude relationship between the target feature value and the decision threshold; and determining whether to send the target data from the processor to the integrated circuit based on the magnitude relationship between the target feature value and the decision threshold.

[0095] For example, this application may also set a corresponding weight for each feature in the feature profile, and then perform a weighted calculation on the feature value of each feature according to the weight corresponding to each feature, compare the calculation result with the decision threshold, and determine whether to send the target data from the processor to the integrated circuit according to the size relationship obtained from the comparison.

[0096] It should be noted that by using the above method, a larger weight can be assigned to important features and a smaller weight to minor features, thereby highlighting the influence of important features in the final ASIC session installation decision and weakening the influence of minor features to some extent.

[0097] In some embodiments, during the process of determining whether to send the target data from the processor to the integrated circuit based on the feature profile, the processor's data concurrency information and / or the integrated circuit's data concurrency information can also be obtained, and then the preset threshold and / or weight corresponding to each feature in the feature profile can be adjusted based on the processor's data concurrency information and / or the integrated circuit's data concurrency information.

[0098] For example, data concurrency information includes, but is not limited to, at least one of the following: data concurrency level, data concurrency success rate, data concurrency latency, etc.

[0099] In addition, data concurrency refers to the system's ability to process data simultaneously, that is, the amount of data the system can process within the same time period. Data concurrency success rate is the ratio of the amount of data successfully processed to the total amount of data processed. Data concurrency latency refers to the time taken for the system to process data from receipt to completion. Generally, higher data concurrency, higher data concurrency success rate, and shorter data concurrency latency indicate stronger system processing capabilities.

[0100] For example, if the processor's data concurrency is detected to exceed a set threshold, the preset threshold and / or weight corresponding to each feature in the feature profile can be adjusted (e.g., lowering or raising the preset threshold and / or weight of one or more features so that more target data can be sent from the processor to the integrated circuit). Alternatively, if the processor's data concurrency success rate is detected to be lower than a set success rate threshold, the preset threshold and / or weight corresponding to each feature in the feature profile can also be adjusted (e.g., lowering or raising the preset threshold and / or weight of one or more features so that more target data can be sent from the processor to the integrated circuit).

[0101] Similar processing logic can be applied to integrated circuits (ICs) to adjust the preset thresholds and / or weights corresponding to each feature in the feature profile based on the IC's data concurrency information. For example, if the data concurrency of the IC is detected to exceed a set threshold, the preset thresholds and / or weights corresponding to each feature in the feature profile can be adjusted (e.g., lowering or raising the preset thresholds and / or weights of one or more features so that more target data can be sent from the processor to the IC). Alternatively, if the data concurrency success rate of the IC is detected to be lower than a set success rate threshold, the preset thresholds and / or weights corresponding to each feature in the feature profile can also be adjusted (e.g., lowering or raising the preset thresholds and / or weights of one or more features so that more target data can be sent from the processor to the IC). It should be noted that, in addition to adjusting the preset thresholds and / or weights corresponding to each feature in the feature profile based on the aforementioned data concurrency information, other performance information of the processor or IC (e.g., response timeliness, data processing speed, memory usage, etc.) can also be used to adjust the preset thresholds and / or weights corresponding to each feature in the feature profile.

[0102] It should also be noted that, in the process of adjusting the preset threshold and / or weight corresponding to each feature in the feature profile, the data concurrency information of the processor and the data concurrency information of the integrated circuit can be taken into account. For example, by comparing the data concurrency information of the processor and the data concurrency information of the integrated circuit in the previous computing cycle, the preset threshold and / or weight of one or more features can be reduced or increased using the comparison result, so that more target data can be sent from the processor to the integrated circuit in the next computing cycle, or less target data can be sent from the processor to the integrated circuit.

[0103] In one embodiment, adjusting the preset threshold and / or weight corresponding to each feature in the feature profile according to the data concurrency information includes: adjusting the preset threshold and / or weight corresponding to each feature in the feature profile according to the data concurrency information of the processor or the integrated circuit in the i-th calculation cycle, where i is an integer greater than or equal to 1.

[0104] Each computation cycle represents a time period used to decide whether to send target data from the processor to the integrated circuit.

[0105] In one embodiment, after adjusting the preset thresholds and / or weights corresponding to one or more features in the feature profile based on the data concurrency information of the processor in the i-th calculation cycle and / or the data concurrency information of the integrated circuit in the i-th calculation cycle, it can be determined whether to send the target data to be sent from the processor to the integrated circuit during the i+1 calculation cycle based on the adjusted preset thresholds and / or weights and the feature profile related to the target data constructed in the i+1 calculation cycle.

[0106] For example, Figure 6 This is a flowchart of a self-updating process for feature weights and preset thresholds according to an embodiment of this application, as shown below. Figure 6 As shown, within a computing cycle (e.g., the i-th computing cycle, where a computing cycle represents a time period for deciding whether to send target data from the processor to the integrated circuit), a feature profile of the target data can be generated. Then, an ASIC session installation decision is determined based on the feature profile, and a decision on whether to send the target data from the processor to the integrated circuit is made based on the ASIC session installation decision.

[0107] In addition, after deciding whether to send the target data from the processor to the integrated circuit based on the ASIC session installation decision, the system can acquire data concurrency information (e.g., data concurrency, data concurrency success rate, data concurrency latency) of the processor or integrated circuit within a subsequent preset time period. Then, the SOC system adjusts the preset threshold and / or weight corresponding to each feature in the feature profile based on the data concurrency information, and enters a new calculation cycle after the adjustment is completed (i.e., based on the adjusted preset threshold and / or weight and the feature profile related to the target data constructed in the i+1 calculation cycle, it determines whether to send the target data to be sent from the processor to the integrated circuit during the i+1 calculation cycle).

[0108] As can be seen from the above, by adjusting the preset threshold and / or weight corresponding to each feature in the feature profile based on the data concurrency information, the ASIC session installation decision can be corrected in a timely manner, thereby adaptively adjusting the system resources that the processor and integrated circuit need to allocate to each other when interacting with data.

[0109] In one embodiment, the N data features include at least statistical information on the number of messages and / or message length in the target data; and / or, the M processor features include at least the core utilization of the processor; and / or, the K integrated circuit features include at least the memory resource utilization of the integrated circuit.

[0110] For example, Pn can represent the number of packets in the target data; Ln can represent the packet length information in the target data (including but not limited to the total packet length and / or the average packet length); Ma can represent the memory resource utilization of the ASIC; and Cu can represent the core utilization of the CPU.

[0111] For example, the ASIC session installation decision determined based on the above four characteristics can be represented by the function F(t) = f(Pn,Ln,Ma,Cu).

[0112] It should be noted that the above function is only an example, and the specific calculation of features can be selected and designed by those skilled in the art according to the actual scenario.

[0113] According to another aspect of this application, a data processing apparatus is also provided, wherein, Figure 7 This is a schematic diagram of a data processing apparatus according to an embodiment of this application, such as... Figure 7 As shown, the data processing device includes: an acquisition unit 701, a construction unit 702, and a determination unit 703.

[0114] For example, the acquisition unit 701 is used to acquire target data to be sent from the processor to the integrated circuit; the construction unit 702 is used to construct a feature profile related to the target data; and the determination unit 703 is used to determine whether to send the target data from the processor to the integrated circuit based on the feature profile.

[0115] In some embodiments, the acquisition unit 701 is used to determine the session data created by the processor as the target data to be sent to the integrated circuit.

[0116] In some embodiments, the feature profile includes at least one of the following features: N data features, where N is an integer greater than or equal to 1, the data features being used to characterize message feature information related to the target data; M processor features, where M is an integer greater than or equal to 1, the processor features being used to characterize processor performance feature information; and K integrated circuit features, where K is an integer greater than or equal to 1, the integrated circuit features being used to characterize integrated circuit performance feature information.

[0117] In some embodiments, the determining unit 703 includes: a first processing subunit and a second processing subunit. The first processing subunit is configured to acquire a preset threshold set for each feature in the feature profile; the second processing subunit is configured to determine whether to send the target data from the processor to the integrated circuit based on the relationship between the feature value of each feature and the preset threshold corresponding to each feature.

[0118] In some embodiments, the determining unit 703 includes: a third processing subunit, a first calculation subunit, a fourth processing subunit, and a fifth processing subunit. The third processing subunit is configured to obtain the weights assigned to each feature in the feature profile; the first calculation subunit is configured to perform a weighted calculation on the feature values ​​of each feature according to the weights corresponding to each feature to obtain a target feature value; the fourth processing subunit is configured to compare the target feature value with a decision threshold; and the fifth processing subunit is configured to determine whether to send the target data from the processor to the integrated circuit based on the relationship between the target feature value and the decision threshold.

[0119] In some embodiments, the data processing apparatus further includes an adjustment unit. The adjustment unit is configured to acquire data concurrency information of the processor and / or data concurrency information of the integrated circuit; the adjustment subunit is configured to adjust a preset threshold and / or weight corresponding to each feature in the feature profile based on the data concurrency information of the processor and / or the data concurrency information of the integrated circuit.

[0120] In some embodiments, the adjustment unit is configured to adjust the preset threshold and / or weight corresponding to each feature in the feature profile according to the data concurrency information of the processor in the i-th calculation cycle and / or the data concurrency information of the integrated circuit in the i-th calculation cycle, wherein i is an integer greater than or equal to 1, and each calculation cycle represents a time period for deciding whether to send target data from the processor to the integrated circuit.

[0121] In some embodiments, the determining unit 703 is configured to determine whether to send the target data to be sent from the processor to the integrated circuit during the (i+1)th calculation cycle based on the adjusted preset threshold and / or weight and the feature profile related to the target data constructed in the (i+1)th calculation cycle.

[0122] In some embodiments, the determining unit 703 is configured to, for session data that the processor did not send to the integrated circuit in the nth calculation cycle, if a data packet of a data stream matching the session data is received in the n+mth calculation cycle, determine whether to send the session data from the processor to the integrated circuit based on the feature profile related to the session data constructed in the n+mth calculation cycle, where n and m are both integers greater than or equal to 1.

[0123] In some embodiments, the N data features include at least statistical information on the number of messages and / or message length in the target data; and / or, the M processor features include at least the core utilization of the processor; and / or, the K integrated circuit features include at least the memory resource utilization of the integrated circuit.

[0124] In some embodiments, the session data to be sent by the processor to the integrated circuit is session data of a first session; the apparatus further includes: a creation unit, the creation unit comprising:

[0125] The receiving subunit is used by the processor to receive the first data packet;

[0126] The judgment subunit is used to determine whether a second session exists when a preset condition is met, wherein the second session refers to a session that matches the target data stream, and the target data stream has the same target data characteristics as the data stream to which the first data packet belongs;

[0127] A sub-unit is created to create a first session based on the second session if a second session exists, wherein the first session is matched with the data stream to which the first data packet belongs.

[0128] Regarding the data processing apparatus in the above embodiments, the specific methods and beneficial effects of each module in performing operations have been described in detail in the embodiments of the aforementioned data processing method, and will not be elaborated upon here.

[0129] According to another aspect of this application, a computer-readable storage medium is also provided, wherein a computer program is stored in the computer-readable storage medium, and wherein, when the computer program is executed, the device on which the computer-readable storage medium is located performs the data processing method described above.

[0130] According to another aspect of this application, an electronic device is also provided, wherein the electronic device includes one or more processors; a storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors are configured to perform a data processing method of any of the above during runtime.

[0131] The above-described embodiments or examples disclosed in this application are not exhaustive, but merely illustrative of some embodiments or examples, and are not intended to limit the scope of protection of this application. Unless otherwise specified, each step in a particular embodiment or example can be implemented as an independent embodiment, and the steps can be arbitrarily combined. For example, a solution after removing some steps in a particular embodiment or example can also be implemented as an independent embodiment, and the order of the steps in a particular embodiment or example can be arbitrarily interchanged. Furthermore, optional methods or examples in a particular embodiment or example can be arbitrarily combined; moreover, various embodiments or examples can be arbitrarily combined. For example, some or all steps of different embodiments or examples can be arbitrarily combined, and a particular embodiment or example can be arbitrarily combined with optional methods or examples of other embodiments or examples.

[0132] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0133] In the above embodiments of this application, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0134] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For instance, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling, direct coupling, or communication connection may be through some interfaces; the indirect coupling or communication connection between units or modules may be electrical or other forms.

[0135] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0136] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0137] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard drive, magnetic disk, or optical disk.

[0138] The above description is only a preferred embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this application, and these improvements and modifications should also be considered within the scope of protection of this application.

Claims

1. A data processing method, characterized in that, include: Acquire the target data to be sent from the processor to the integrated circuit; Construct a feature profile related to the target data; Based on the feature profile, determine whether to send the target data from the processor to the integrated circuit; The data processing method further includes: for session data that the processor did not send to the integrated circuit in the nth calculation cycle, if a data packet of a data stream matching the session data is received in the n+mth calculation cycle, based on the feature profile related to the session data constructed in the n+mth calculation cycle, determining whether to send the session data from the processor to the integrated circuit, where n and m are both integers greater than or equal to 1.

2. The data processing method according to claim 1, characterized in that, Acquiring the target data to be sent by the processor to the integrated circuit includes: The session data created by the processor is identified as the target data to be sent to the integrated circuit.

3. The data processing method according to claim 1 or 2, characterized in that, The feature profile includes at least one of the following features: N data features, where N is an integer greater than or equal to 1, are used to characterize message feature information related to the target data; M processor features, where M is an integer greater than or equal to 1, are used to characterize the performance characteristics of the processor; K integrated circuit features, where K is an integer greater than or equal to 1, are used to characterize the performance characteristics of the integrated circuit.

4. The data processing method according to claim 1, characterized in that, Based on the feature profile, determining whether to send the target data from the processor to the integrated circuit includes: Obtain the preset threshold set for each feature in the feature profile; Based on the relationship between the feature value of each feature and the preset threshold corresponding to each feature, it is determined whether to send the target data from the processor to the integrated circuit.

5. The data processing method according to claim 1, characterized in that, Based on the feature profile, determining whether to send the target data from the processor to the integrated circuit includes: Obtain the weight assigned to each feature in the feature profile; The feature values ​​of each feature are weighted according to the weights corresponding to each feature to obtain the target feature value; Compare the target feature value with the decision threshold. Based on the relationship between the target feature value and the decision threshold, it is determined whether to send the target data from the processor to the integrated circuit.

6. The data processing method according to claim 1, 4, or 5, characterized in that, The data processing method further includes: Obtain the data concurrency information of the processor and / or the data concurrency information of the integrated circuit; Based on the data concurrency information of the processor and / or the data concurrency information of the integrated circuit, the preset thresholds and / or weights corresponding to one or more features in the feature profile are adjusted.

7. The data processing method according to claim 6, characterized in that, The step of adjusting the preset thresholds and / or weights corresponding to one or more features in the feature profile based on the data concurrency information of the processor and / or the data concurrency information of the integrated circuit includes: Based on the data concurrency information of the processor in the i-th calculation cycle and / or the data concurrency information of the integrated circuit in the i-th calculation cycle, the preset thresholds and / or weights corresponding to one or more features in the feature profile are adjusted, where i is an integer greater than or equal to 1, and each calculation cycle represents a time period used to decide whether to send target data from the processor to the integrated circuit; Based on the feature profile, determining whether to send the target data from the processor to the integrated circuit includes: Based on the adjusted preset threshold and / or weight, and the feature profile related to the target data constructed in the (i+1)th calculation cycle, it is determined whether the target data to be sent from the processor to the integrated circuit should be sent from the processor to the integrated circuit during the (i+1)th calculation cycle.

8. The data processing method according to claim 3, characterized in that, The N data features include at least statistical information on the number of messages and / or the length of messages in the target data; And / or, The M processor features include at least the processor's core utilization; And / or, The K integrated circuit features include at least the memory resource utilization rate of the integrated circuit.

9. A data processing apparatus, characterized in that, include: The acquisition unit is used to acquire the target data to be sent by the processor to the integrated circuit; The construction unit is used to construct a feature profile related to the target data; A determining unit is configured to determine, based on the feature profile, whether to send the target data from the processor to the integrated circuit; The determining unit is further configured to, for session data that the processor did not send to the integrated circuit in the nth calculation cycle, if a data packet matching the session data is received in the n+mth calculation cycle, determine whether to send the session data from the processor to the integrated circuit based on the feature profile related to the session data constructed in the n+mth calculation cycle, where n and m are both integers greater than or equal to 1.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein when the computer program is executed, the device in which the computer-readable storage medium is located performs the data processing method according to any one of claims 1 to 8.

Images