VPX array memory card transfer test device, method and equipment and storage medium

Abstract

The invention discloses a VPX array storage card transfer test device, method and equipment and a storage medium, and relates to the technical field of test.The VPX array storage card transfer test device comprises a transfer plate, a storage system upper computer, a debugging machine, a hard disk array and a power failure protection circuit, the storage system upper computer is used for generating a virtual array storage space on the to-be-tested VPX array storage card after the to-be-tested VPX array storage card is identified, writing first data into a target position of the virtual array storage space, reading second data from the target position of the virtual array storage space, and storing the second data in the virtual array storage space. And testing the VPX array memory card to be tested by comparing the first data with the second data. The device can meet the requirement of early-stage rapid testing.

Description

Technical Field

[0001] The present application relates to the field of testing technology, and in particular to a VPX array storage card transfer testing device, method, equipment and storage medium. Background Art

[0002] VPX array storage card is a high-performance data storage solution, mainly used in scenarios with high requirements for storage capacity, read / write speed and stability, such as industrial electronics, national defense and military industries. VPX array storage card has the characteristics of high performance, large capacity, high stability and scalability.

[0003] Due to the limitations of factors such as the interface form of the VPX array storage card, it is usually impossible to conduct docking tests with conventional system hosts and supporting equipment in the early stages of development, and it is impossible to meet the needs of early rapid testing. Summary of the invention

[0004] The present application provides a VPX array storage card transfer test device, method, equipment and storage medium, which can meet the early stage rapid testing needs.

[0005] In order to achieve the above objectives, this application adopts the following technical solutions:

[0006] In a first aspect, the present application provides a VPX array storage card transfer test device, comprising:

[0007] Adapter board, storage system host computer, debugging machine, hard disk array and power-off protection circuit;

[0008] The adapter board includes a SATA interface, a protection interface, a PCIE interface, a debugging interface and a VPX interface;

[0009] The storage system host computer is connected to the adapter board through the PCIE interface, the debugging machine is connected to the adapter board through the debugging interface, the hard disk array is connected to the adapter board through the SATA interface, and the power-off protection circuit is connected to the adapter board through the protection interface; the VPX interface is used to connect to the VPX array storage card to be tested;

[0010] The debugging machine is used to load a program to the storage controller in the VPX array storage card to be tested through a debugging interface, so as to enable the VPX array storage card to be tested to run;

[0011] The storage system host computer is used to, after identifying the VPX array storage card to be tested, generate a virtual array storage space after building an array on the VPX array storage card to be tested, write first data to a target position of the virtual array storage space, read second data from the target position of the virtual array storage space, and test the VPX array storage card to be tested by comparing the first data with the second data.

[0012] In some possible implementations, the storage system host computer is specifically configured to generate a test result indicating that the VPX array storage card to be tested is normal if the first data is consistent with the second data.

[0013] In some possible implementations, the storage system host computer is further configured to generate a test result indicating that the VPX array storage card to be tested is abnormal if the first data is inconsistent with the second data.

[0014] In some possible implementations, the SATA interface includes a SATA connector, the protection interface includes a protection circuit pin connector, a power supply interface and a signal interface, the PCIE interface includes a PCIE connector, the debug interface includes a JTAG interface, a GPIO interface, an RS232 interface and a debug pin connector, and the VPX interface includes a VPX connector.

[0015] In some possible implementations, the adapter board further includes a power supply control circuit; the power-off protection circuit includes a power management unit and a delayed power supply unit;

[0016] The power management unit is used to charge the delayed power supply unit;

[0017] The storage system host computer is used to supply power to the power supply control circuit through the PCIE connector;

[0018] The power supply control circuit is used to supply power to the VPX array storage card to be tested through the VPX connector;

[0019] The debugging machine is further used to send a power-off control signal to the power supply control circuit;

[0020] The power supply control circuit stops supplying power to the VPX array storage card to be tested according to the power-off control signal;

[0021] The power management unit is used to use the electric energy stored in the delayed power supply unit to supply power to the VPX array storage card to be tested after detecting that the VPX array storage card to be tested is powered off.

[0022] In a second aspect, the present application provides a VPX array storage card transfer test method, including:

[0023] The method is applied to a VPX array storage card adapter test device to be tested, and the VPX array storage card adapter test device to be tested includes: an adapter board, a storage system host computer, a debugging machine, a hard disk array and a power-off protection circuit; the adapter board includes a SATA interface, a protection interface, a PCIE interface, a debugging interface and a VPX interface; the storage system host computer is connected to the adapter board through the PCIE interface, the debugging machine is connected to the adapter board through the debugging interface, the hard disk array is connected to the adapter board through the SATA interface, and the power-off protection circuit is connected to the adapter board through the protection interface; the VPX interface is used to connect to the VPX array storage card to be tested; the method includes:

[0024] The debugging machine loads a program to the storage controller in the VPX array storage card to be tested through the debugging interface, so as to enable the VPX array storage card to be tested to run;

[0025] After identifying the VPX array storage card to be tested, the storage system host computer generates a virtual array storage space after building an array on the VPX array storage card to be tested, writes first data to a target position of the virtual array storage space, reads second data from the target position of the virtual array storage space, and tests the VPX array storage card to be tested by comparing the first data and the second data.

[0026] In some possible implementations, the testing of the VPX array storage card to be tested by comparing the first data with the second data includes:

[0027] If the first data is consistent with the second data, a test result indicating that the VPX array storage card to be tested is normal is generated.

[0028] In some possible implementations, if the first data is inconsistent with the second data, a test result indicating that the VPX array storage card to be tested is abnormal is generated.

[0029] In a third aspect, the present application provides a computing device, including a memory and a processor;

[0030] One or more computer programs are stored in the memory, and the one or more computer programs include instructions; when the instructions are executed by the processor, the computing device executes the method as described in any one of the first aspects.

[0031] In a fourth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium is used to store a computer program, and the computer program is used to execute the method as described in any one of the first aspects.

[0032] It can be seen from the above technical solution that the present application has at least the following beneficial effects:

[0033] In the present application, a VPX array storage card adapter test device includes: an adapter board, a storage system host computer, a debugging machine, a hard disk array, and a power-off protection circuit, wherein the debugging machine loads a program to the storage controller in the VPX array storage card to be tested through a debugging interface to enable the VPX array storage card to be tested to run, and the storage system host computer is used to generate a virtual array storage space after building an array on the VPX array storage card to be tested after identifying the VPX array storage card to be tested, write first data to the target position of the virtual array storage space, read second data from the target position of the virtual array storage space, and test the VPX array storage card to be tested by comparing the first data and the second data. At present, due to the limitations of factors such as the interface form of the VPX array storage card to be tested, it is usually impossible to achieve docking test with a conventional form system host and supporting equipment in the early stage of development, and it is impossible to meet the early stage rapid testing requirements. It can be seen that in the present application, the VPX array storage card to be tested, the conventional form system host and supporting equipment can be docked and tested through the VPX array storage card adapter test device, and it can be seen that the solution of the present application can meet the early stage rapid testing requirements.

[0034] It should be understood that the description of technical features, technical solutions, beneficial effects or similar language in this application does not imply that all features and advantages can be realized in any single embodiment. On the contrary, it is understood that the description of features or beneficial effects means that specific technical features, technical solutions or beneficial effects are included in at least one embodiment. Therefore, the description of technical features, technical solutions or beneficial effects in this specification does not necessarily refer to the same embodiment. Furthermore, the technical features, technical solutions and beneficial effects described in the present embodiment can also be combined in any appropriate manner. Those skilled in the art will understand that the embodiment can be realized without one or more specific technical features, technical solutions or beneficial effects of a specific embodiment. In other embodiments, additional technical features and beneficial effects can also be identified in a specific embodiment that does not embody all embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 A schematic diagram of a VPX array storage card adapter test device provided in an embodiment of the present application;

[0036] Figure 2 A schematic diagram of the interior of an adapter board provided in an embodiment of the present application;

[0037] Figure 3 A flow chart of a power-off protection function test provided in an embodiment of the present application;

[0038] Figure 4 A schematic diagram of a power supply control circuit for power failure protection function test provided in an embodiment of the present application;

[0039] Figure 5 A flow chart of a VPX array storage card transfer test method provided in an embodiment of the present application;

[0040] Figure 6 A schematic diagram of a computing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0041] The terms "first", "second", "third", etc. in the specification of this application and the accompanying drawings are used to distinguish different objects rather than to limit a specific order.

[0042] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0043] In order to make the description of the following embodiments clear and concise, a brief introduction to the related technology is first given:

[0044] VPX array storage card is a high-performance, large-capacity, and highly reliable storage solution product, designed for large capacity, high speed, and harsh environments. Features of VPX array storage card include large capacity, high-speed reading and writing, data redundancy protection, wide temperature range, vibration and shock resistance, low power consumption, and high performance. It is widely used in military, aerospace, and other fields. VPX array storage card supports PCIE protocol, can provide array storage management and control and high-speed data transmission channels, and has wide operating temperature, redundant data recovery and other functions to ensure data security. With the continuous development of technology, its performance and application scope will be further expanded and improved.

[0045] At present, due to the limitations of factors such as the interface form of the VPX array storage card to be tested, it is usually impossible to perform docking tests with conventional system hosts and supporting equipment in the early stage of development, and it is impossible to meet the needs of early rapid testing. It can be seen that in this application, the VPX array storage card adapter test device can be used to perform docking tests on the VPX array storage card to be tested, the conventional system host and supporting equipment, which can meet the needs of early rapid testing.

[0046] In order to make the technical solution of the present application clearer and easier to understand, a VPX array storage card switching test device provided in an embodiment of the present application is introduced. Figure 1As shown, this figure is a schematic diagram of a VPX array storage card transfer test device provided in an embodiment of the present application. The VPX array storage card transfer test device 100 includes:

[0047] The adapter board 101 , the storage system host computer 102 , the debugging machine 103 , the hard disk array 104 and the power-off protection circuit 105 .

[0048] The storage system host computer 102 is connected to the adapter board 101 through the PCIE interface, the debugging machine 103 is connected to the adapter board 101 through the debugging interface, the hard disk array 104 is connected to the adapter board 101 through the SATA interface, the power-off protection circuit 105 is connected to the adapter board 101 through the protection interface, and the VPX interface is used to connect to the VPX array storage card to be tested.

[0049] The adapter board 101 , the storage system host computer 102 , the debugging machine 103 , and the power-off protection circuit 105 in the VPX array storage card adapter test device 100 are described in detail below.

[0050] The adapter board 101 is a connection circuit board used to convert one interface into another interface. During the interface conversion, the adapter board 101 can also protect the circuit to prevent equipment damage caused by voltage instability or interface mismatch, thereby improving safety and stability. It can also be used to adjust the size of the connector to meet the connection requirements between different devices or circuit boards so as to match the interfaces on different devices or circuit boards.

[0051] In the present invention, the adapter board 101 is connected to the hard disk array 104 through the miniSAS X4 interface on the hard disk array 104 to achieve connection with multiple SAS or SATA interface hard disks, and the corresponding signal is transferred to the VPX connector P2 and the VPX storage array card to be tested to realize the read and write access function of data storage.

[0052] The adapter board 101 includes a SATA interface, a protection interface, a PCIE interface, a debugging interface, and a VPX interface. Figure 2As shown, the figure is a schematic diagram of the inside of an adapter board provided by an embodiment of the present application. In the figure, the debugging interface includes a debugging pin connector, a JTAG interface, a GPIO interface and an RS232 serial port; the SATA interface includes a SATA connector; the protection interface includes a protection circuit pin connector, a power supply interface and a signal interface; the PCIE interface includes a PCIE AIC connector; the debugging interface includes a JTAG interface, a GPIO interface, an RS232 interface and a debugging pin connector; the VPX interface includes a VPX connector, a connector P0, a connector P1 and a connector P2, wherein connector P0 supports 12V power input, ground signal, physical address input signal, JTAG debugging signal and I2C bus signal connection, connector P1 supports PCIE interface signal connection and power-off protection circuit interface signal, and connector P2 supports SATA interface signal, GPIO interface signal and RS232 and other peripheral interface signal connections.

[0053] The adapter board 101 can be connected to the VPX array storage card to be tested, the storage system host computer 102, the debugging machine 103, the hard disk array 104 and the power-off protection circuit 105 through the connector. The adapter board is connected to the VPX array storage card to be tested through the VPX connector; the adapter board is connected to the storage system host computer 102 through the PCIE AIC connector, and the PCIE interface supports PCIE3.0 at most; the adapter board is connected to the hard disk array 104 through the SATA interface connector; the adapter board supports connection with the debugging machine 103 through the JTAG connector, supports the JTAG debugging function of the VPX array storage card, supports GPIO / SGPIO signals, realizes the external signal indicator function of the VPX array storage card, or communication interaction with peripheral devices, optionally supports serial port connection, and supports communication interaction function with the debugging machine 103; the adapter board is connected to the power-off protection circuit 105 through the protection interface, and the power supply interface and control signal support power supply, communication and data transmission functions.

[0054] The storage system host computer 102 refers to a computer system with powerful computing and data processing capabilities, which is responsible for the monitoring, command issuance, data collection, processing and analysis, and user interaction of the entire control system. As the "brain" of the system, the storage system host computer 102 can process complex algorithms, perform long-term data storage, and provide a graphical interface for user operation. As a general server host system, the storage system host computer 102 adopts the AIC form PCIE interface standard, is connected to the adapter board 101 through a PCIE extension cable, and supports the PCIe 3.0X8 standard transmission protocol. The corresponding signal is transferred to the VPX connector P1 and the VPX storage array card to be tested to achieve high-speed data transmission.

[0055] In the present invention, the storage system host computer 102 is used to generate a virtual array storage space after building an array on the VPX array storage card to be tested after identifying the VPX array storage card to be tested, write first data to the target position of the virtual array storage space, read second data from the target position of the virtual array storage space, and test the VPX array storage card to be tested by comparing the first data and the second data. If the first data and the second data are consistent, a normal test result of the VPX array storage card to be tested is generated; if the first data and the second data are inconsistent, a test result of an abnormality of the VPX array storage card to be tested is generated.

[0056] The debugging machine 103 is a device or system for checking, testing, calibrating and optimizing the debugged system. The debugging machine 103 can be a dedicated test instrument, or a computer or other device with debugging function. The debugging machine 103 can communicate with the debugged system through various interfaces and protocols, read the operating status, parameters and data of the debugged system, and then analyze the system performance, locate the fault point, and provide corresponding debugging and optimization suggestions.

[0057] In the present invention, the debugging machine 103 is used to load a program to the storage controller in the VPX array storage card to be tested through the debugging interface so as to enable the VPX array storage card to be tested to run, wherein the storage system host computer 102 is used to perform functional debugging on the storage controller of the VPX storage array card to be tested through the JTAG interface, is used to control the switch circuit and the signal indicator light display function of the adapter board 101 through the GPIO interface, and is used for printing and displaying during the test process through the RS232 serial port.

[0058] The power-off protection circuit 105 is used to implement the test of the data protection function of the power-off state of the VPX storage array card to be tested. The power-off protection circuit 105 includes a power management unit and a delayed power supply unit, and the interface with the adapter pin connector includes a bidirectional power supply channel and a control signal interaction interface. The basic protection function flow of the power-off protection circuit 105 is as follows: Figure 3 As shown in the figure, this figure is a flow chart of a power-off protection function test provided by an embodiment of the present application, and the method includes:

[0059] S301, the storage system host computer starts running the storage array program.

[0060] The storage system host computer 102 first performs an initialization operation, and then loads and executes the storage array program. The storage array program is specially designed to manage and control the access, processing and security of data in the VPX array storage card to be tested. After the storage array program is started, the storage array program will configure the necessary parameters and prepare to communicate and exchange data with the VPX array storage card to be tested to ensure that subsequent operations can proceed smoothly.

[0061] S302: The power management unit charges the delayed power supply unit.

[0062] The power management unit is a highly integrated power management solution, mainly used in portable applications and electronic devices such as computers and mobile phones. The power management unit integrates a variety of traditionally separate power management devices, such as DC / DC converters (DC / DC) and low-dropout linear regulators (LDO), into one package, thereby reducing the number of components and board space, while achieving higher power conversion efficiency and lower power consumption. The functions of the power management unit mainly include power management, power switching, battery management, power optimization and hardware protection.

[0063] A delayed power supply unit is a circuit or module used to control the power supply sequence in electronic equipment. The main function of the delayed power supply unit is to supply power to specific components or functional modules in the device according to a certain delay time after the main power is lost, so as to ensure that the device can start and run according to the predetermined order and sequence.

[0064] In the present invention, the power management unit is responsible for the power distribution and monitoring of the entire system. The power management unit will charge the delayed power supply unit to ensure that when the main power supply of the storage system is suddenly interrupted, the delayed power supply unit can quickly take over and provide short-term power support for key components, thereby protecting data from loss and allowing the storage system to be safely shut down or restarted.

[0065] S303: Determine whether the VPX array storage card adapter test device is powered off.

[0066] If the VPX array storage card switching test device is powered off, S304 is executed; if the VPX array storage card switching test device is not powered off, S302 is executed.

[0067] S304: The power management unit starts reverse power supply to the VPX array storage card to be tested.

[0068] In the event of a power outage, the power management unit uses a reverse power supply mechanism to provide temporary power to the VPX array storage card under test using the delayed power supply unit. This step ensures that the critical data in the storage card will not be lost before the power is restored, and also provides the possibility of data recovery after the storage system is restarted.

[0069] S305. The power management unit supports the VPX array storage card to be tested to write cache data.

[0070] During power stabilization or reverse power supply, the power management unit ensures that the VPX array storage card under test has enough power to perform write operations, especially writing important data to the cache. This step is part of the data protection strategy to prevent data loss caused by sudden power outages.

[0071] S306: The storage system host computer is powered on again and the storage array program is run.

[0072] When the main power of the storage system is restored or after a safe restart, the storage system host computer 102 will be powered on again and automatically start the storage array program. The storage array program will reinitialize the system, restore the previous configuration and status, and perform a new round of data interaction with the VPX array storage card to be tested.

[0073] S307: The VPX array storage card to be tested reads cache data.

[0074] After the storage system restarts and runs stably, the VPX array storage card under test will read the previously cached data. This data may include unfinished write operations, critical system status information, etc. By reading the cached data, the storage system can quickly recover to the state before the power failure, ensuring data continuity and consistency.

[0075] S308: The test program detects the storage array status.

[0076] The storage system runs a test program to fully detect the status of the storage array. The test program will check the key indicators of the storage array, such as performance, stability, data integrity, and error rate, to ensure that the storage array can still work normally after power failure and restart. This step is an important part of system maintenance and troubleshooting, which helps to find and solve problems in a timely manner.

[0077] After the storage system host computer 102 starts running the storage array program, the power management unit charges the delayed power supply unit and monitors whether the system has power failure. The debugging machine 103 controls the VPX interface power supply circuit of the adapter board 101 through the GPIO interface to realize the open and close circuit functions, such as Figure 4 As shown, this figure is a schematic diagram of a power supply control circuit for power failure protection function test provided by an embodiment of the present application, so as to realize that the VPX array storage card to be tested enters a power failure state. When the protection circuit detects the power failure state, the power management unit starts reverse power supply to the VPX storage array card to be tested, supporting the VPX storage array card to be tested to write cache data into the onboard cache data storage unit, ensuring that the cache data will not be lost.

[0078] When the storage system host computer 102 is powered on again, the storage array program is run, and the VPX storage array card to be tested will detect the previous power-off state and read out the cached data in the power-off protection circuit. The test program will detect the storage array state through the storage system host to confirm the correctness of the power-off protection function and complete the test process.

[0079] Combination of the above Figures 1 to 4The VPX array storage card transfer test device provided in the embodiment of the present application is introduced in detail. The VPX array storage card transfer test method provided in the embodiment of the present application will be introduced in conjunction with the accompanying drawings.

[0080] like Figure 5 As shown in the figure, this figure is a flow chart of a VPX array storage card transfer test method provided in an embodiment of the present application, the method comprising:

[0081] S501, test program loading.

[0082] After the test process starts, the debugging machine 103 first loads the program to the storage controller in the VPX storage array card to be tested through the JTAG interface, prints the current operation information through the RS232 serial port, and observes the operation status through the signal indicator light output by the GPIO interface.

[0083] S502: The storage system host computer starts.

[0084] After the program is run, the storage system host computer 102 starts running.

[0085] S503: Establish a storage array and generate a virtual array storage space.

[0086] After correctly identifying the VPX storage array card to be tested, the host computer program is controlled to establish a storage array and generate a virtual array storage space on the VPX array storage card to be tested.

[0087] S504: Write data to and read data from the virtual array storage space.

[0088] The first data is written to the target position of the virtual array storage space, and the second data is read from the target position of the virtual array storage space.

[0089] S505: Data comparison.

[0090] By comparing the first data and the second data, the VPX array storage card to be tested is tested. If the first data and the second data are consistent, a normal test result of the VPX array storage card to be tested is generated; if the first data and the second data are inconsistent, an abnormal test result of the VPX array storage card to be tested is generated, and the basic function test process is ended.

[0091] In the present application, a VPX array storage card adapter test device includes: an adapter board, a storage system host computer, a debugging machine, a hard disk array, and a power-off protection circuit, wherein the debugging machine loads a program to the storage controller in the VPX array storage card to be tested through a debugging interface to enable the VPX array storage card to be tested to run, and the storage system host computer is used to generate a virtual array storage space after building an array on the VPX array storage card to be tested after identifying the VPX array storage card to be tested, write first data to the virtual array storage space, read second data from the virtual array storage space, and test the VPX array storage card to be tested by comparing the first data and the second data. At present, due to the limitations of factors such as the interface form of the VPX array storage card to be tested, it is usually impossible to achieve docking test with a conventional form system host and supporting equipment in the early stage of development, and it is impossible to meet the early stage rapid testing requirements. It can be seen that in the present application, the VPX array storage card to be tested, the conventional form system host and supporting equipment can be docked and tested through the VPX array storage card adapter test device. It can be seen that the solution of the present application can meet the early stage rapid testing requirements.

[0092] The present application also provides a computing device. Figure 6 As shown, this figure is a schematic diagram of a computing device provided in an embodiment of the present application, and the computing device 600 includes a bus 601, a processor 602, a communication interface 603 and a memory 604. The processor 602, the memory 604 and the communication interface 603 communicate with each other through the bus 601.

[0093] The bus 601 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 6 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0094] The processor 602 may be any one or more of a central processing unit (CPU), a graphics processing unit (GPU), a microprocessor (MP), or a digital signal processor (DSP).

[0095] The communication interface 603 is used for communicating with the outside.

[0096] The memory 604 may include a volatile memory, such as a random access memory (RAM). The memory 604 may also include a non-volatile memory, such as a read-only memory (ROM), a flash memory, a hard disk drive (HDD), or a solid state drive (SSD).

[0097] The memory 604 stores executable codes, and the processor 602 executes the executable codes to perform the VPX array storage card switching test method.

[0098] The embodiment of the present application also provides a computer-readable storage medium. The computer-readable storage medium can be any available medium that can be stored by a computing device or a data storage device such as a data center that contains one or more available media. The available medium can be a magnetic medium (such as a floppy disk, a hard disk, a tape), an optical medium (such as a DVD), or a semiconductor medium (such as a solid-state hard disk). The computer-readable storage medium includes instructions that instruct the computing device to execute the above-mentioned method applied to the VPX array storage card transfer test device 100.

[0099] The embodiment of the present application further provides a computer program product, which includes one or more computer instructions. When the computer instructions are loaded and executed on a computing device, the process or function described in the embodiment of the present application is generated in whole or in part.

[0100] The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from one website, computer or data center to another website, computer or data center via wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means.

[0101] When the computer program product is executed by a computer, the computer executes any of the aforementioned VPX array storage card transfer test methods. The computer program product may be a software installation package, and when any of the VPX array storage card transfer test methods is required, the computer program product may be downloaded and executed on a computer.

[0102] The descriptions of the processes or structures corresponding to the above-mentioned figures have different emphases. For parts that are not described in detail in a certain process or structure, please refer to the relevant descriptions of other processes or structures.

[0103] The above description is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application.

Claims

1. A VPX array storage card transfer test device, characterized in that: The device comprises: an adapter board, a storage system host computer, a debugging machine, a hard disk array and a power-off protection circuit; The adapter board includes a SATA interface, a protection interface, a PCIE interface, a debugging interface and a VPX interface; The storage system host computer is connected to the adapter board through the PCIE interface, the debugging machine is connected to the adapter board through the debugging interface, the hard disk array is connected to the adapter board through the SATA interface, and the power-off protection circuit is connected to the adapter board through the protection interface; the VPX interface is used to connect to the VPX array storage card to be tested; The debugging machine is used to load a program to the storage controller in the VPX array storage card to be tested through a debugging interface, so as to enable the VPX array storage card to be tested to run; The storage system host computer is used to, after identifying the VPX array storage card to be tested, generate a virtual array storage space after building an array on the VPX array storage card to be tested, write first data to a target position of the virtual array storage space, read second data from the target position of the virtual array storage space, and test the VPX array storage card to be tested by comparing the first data with the second data.

2. The device according to claim 1, characterized in that The storage system host computer is specifically configured to generate a test result indicating that the VPX array storage card to be tested is normal if the first data is consistent with the second data.

3. The device according to claim 2, characterized in that The storage system host computer is further configured to generate a test result indicating that the VPX array storage card to be tested is abnormal if the first data is inconsistent with the second data.

4. The device according to claim 1, characterized in that The SATA interface includes a SATA connector, the protection interface includes a protection circuit pin connector, a power supply interface and a signal interface, the PCIE interface includes a PCIE connector, the debug interface includes a JTAG interface, a GPIO interface, an RS232 interface and a debug pin connector, and the VPX interface includes a VPX connector.

5. The device according to claim 4, characterized in that The adapter board also includes a power supply control circuit; the power-off protection circuit includes a power management unit and a delayed power supply unit; The power management unit is used to charge the delayed power supply unit; The storage system host computer is used to supply power to the power supply control circuit through the PCIE connector; The power supply control circuit is used to supply power to the VPX array storage card to be tested through the VPX connector; The debugging machine is further used to send a power-off control signal to the power supply control circuit; The power supply control circuit stops supplying power to the VPX array storage card to be tested according to the power-off control signal; The power management unit is used to use the electric energy stored in the delayed power supply unit to supply power to the VPX array storage card to be tested after detecting that the VPX array storage card to be tested is powered off.

6. A VPX array storage card transfer test method, characterized in that: The method is applied to a VPX array storage card adapter test device to be tested, and the VPX array storage card adapter test device to be tested includes: an adapter board, a storage system host computer, a debugging machine, a hard disk array and a power-off protection circuit; the adapter board includes a SATA interface, a protection interface, a PCIE interface, a debugging interface and a VPX interface; the storage system host computer is connected to the adapter board through the PCIE interface, the debugging machine is connected to the adapter board through the debugging interface, the hard disk array is connected to the adapter board through the SATA interface, and the power-off protection circuit is connected to the adapter board through the protection interface; the VPX interface is used to connect to the VPX array storage card to be tested; the method includes: The debugging machine loads a program to the storage controller in the VPX array storage card to be tested through the debugging interface, so as to enable the VPX array storage card to be tested to run; After identifying the VPX array storage card to be tested, the storage system host computer generates a virtual array storage space after building an array on the VPX array storage card to be tested, writes first data to a target position of the virtual array storage space, reads second data from the target position of the virtual array storage space, and tests the VPX array storage card to be tested by comparing the first data and the second data.

7. The method according to claim 6, characterized in that The testing of the VPX array storage card to be tested by comparing the first data with the second data includes: If the first data is consistent with the second data, a test result indicating that the VPX array storage card to be tested is normal is generated.

8. The method according to claim 7, characterized in that The method further comprises: If the first data is inconsistent with the second data, a test result indicating that the VPX array storage card to be tested is abnormal is generated.

9. A computing device, characterized in that including memory and processor; One or more computer programs are stored in the memory, and the one or more computer programs include instructions; when the instructions are executed by the processor, the computing device executes the method as claimed in any one of claims 6 to 8.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium is used to store a computer program, and the computer program is used to execute the method according to any one of claims 6 to 8.

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