Inverse class F power amplifier and communication equipment

Abstract

The invention discloses an inverse class-F power amplifier and communication equipment, relates to the technical field of integrated circuits, and aims to solve the problem that an existing inverse class-F power amplifier is large in circuit area while obtaining high efficiency. The inverse class F power amplifier comprises an input matching circuit, a power amplifying circuit, a harmonic control circuit and an output matching circuit which are electrically connected in sequence. The input matching circuit matches the input impedance to the target source impedance of the power amplification circuit, and then outputs an input matching signal based on the received input signal. The power amplification circuit carries out power amplification on the input matching signal and then outputs a power amplification signal. The harmonic control circuit controls the power amplification signal to be open-circuited at the second harmonic and to be short-circuited at the third harmonic. The output matching circuit matches the output impedance to the target load impedance of the power amplification circuit and then outputs a target power amplification signal, and the electrical length of a drain bias transmission line in the output matching circuit is larger than or equal to lambda / 8 and smaller than or equal to lambda / 6.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to an inverse class F power amplifier and communication equipment. Background Art

[0002] With the development of radio frequency wireless communication systems, new application scenarios have gradually emerged, and the performance requirements for power amplifiers have become increasingly higher, such as requiring high efficiency, high output power, and compact circuit area. The development of GaN (gallium nitride) technology helps to realize compact, high-efficiency, high-power power amplifier monolithic microwave integrated circuits (Monolithic Microwave Integrated Circuit, MMIC), which meet the requirements of base station miniaturization, reduced power loss and high output power. As a type of high-efficiency switching power amplifier, the inverse class F power amplifier controls the voltage and current waveforms of the transistor drain through the harmonic suppression network at the output end, ultimately achieving the goal of no overlap of voltage and current waveforms and 100% drain efficiency.

[0003] The circuit implementation of the traditional inverse class F power amplifier is complex and large in area, and can only be implemented using printed circuit board (PCB) technology. This means that although the existing inverse class F power amplifier has achieved high efficiency, it has a large area and is not suitable for application in various small base stations or portable communication devices. Summary of the invention

[0004] The object of the present invention is to provide an inverse class F power amplifier and a communication device, which are used to solve the problem that the existing inverse class F power amplifier has a large circuit area while achieving high efficiency.

[0005] In order to achieve the above object, the present invention provides the following technical solutions:

[0006] In a first aspect, the present invention provides an inverse class F power amplifier, comprising: an input matching circuit, a power amplifier circuit, a harmonic control circuit, and an output matching circuit electrically connected in sequence, wherein: the input matching circuit is used to match the input impedance to the target source impedance of the power amplifier circuit, and then output an input matching signal to the power amplifier circuit based on the received input signal. The power amplifier circuit is used to amplify the input matching signal and then output the power amplified signal to the harmonic control circuit. The harmonic control circuit is used to control the power amplified signal to be open-circuited at the second harmonic, and short-circuited at the third harmonic, and then output the power amplified signal to the output matching circuit. The output matching circuit is used to match the output impedance to the target load impedance of the power amplifier circuit, and then output the target power amplified signal after harmonic control and output matching, wherein the electrical length of the drain bias transmission line in the output matching circuit is greater than or equal to λ / 8 and less than or equal to λ / 6, wherein λ represents the wavelength.

[0007] Compared with the prior art, in the inverse class F power amplifier provided by the present invention, the input matching circuit can match the input impedance of the inverse class F power amplifier to the target source impedance of the power amplifier circuit, and realize the impedance matching between the input impedance and the input end of the power amplifier circuit, so that when the input matching signal is output to the power amplifier circuit based on the received input signal, the transmission power of the input matching signal is improved. After the power amplifier circuit amplifies the input matching signal, it outputs the power amplified signal to the harmonic control circuit. The harmonic control circuit can perform second harmonic and third harmonic control on the power amplified signal, so that the power amplified signal can realize an open circuit at the second harmonic, with infinite impedance, and realize a short circuit at the third harmonic, with impedance approximately zero, further reducing the nonlinear characteristics in the power amplified signal and effectively improving the linearity of the power amplified signal. Finally, the output matching circuit can match the output impedance to the target load impedance of the power amplifier circuit, and realize the impedance matching between the output impedance and the output end of the power amplifier circuit, so that when the power amplified signal processed by the harmonic control circuit is output, the transmission power of the power amplified signal is improved to output a high-efficiency target power amplified signal. At the same time, in the present invention, the electrical length of the drain bias transmission line in the output matching circuit is greater than or equal to λ / 8 and less than or equal to λ / 6. On the one hand, compared with the existing λ / 4, the electrical length of the drain bias transmission line is shortened, which can further reduce the circuit area of ​​the output matching circuit; on the other hand, the impedance of the drain bias transmission line at the fundamental wave can be compensated by increasing the characteristic impedance of the drain bias transmission line, so that the drain bias transmission line can be configured as a part of the fundamental wave impedance matching.

[0008] It can be seen from this that the inverse class-F power amplifier provided by the present invention can achieve high efficiency while reducing the circuit area.

[0009] In a second aspect, the present invention further provides a communication device, comprising the inverse class F power amplifier described in the technical solution of the first aspect.

[0010] Compared with the prior art, the beneficial effects of the communication device provided by the present invention are the same as the beneficial effects of the inverse class F power amplifier described in the above technical solution, and will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0012] Figure 1 A circuit diagram of an inverse class F power amplifier provided by an embodiment of the present invention;

[0013] Figure 2 A circuit diagram of a harmonic control circuit and an output matching circuit provided in an embodiment of the present invention;

[0014] Figure 3 A circuit diagram of an input matching circuit provided by an embodiment of the present invention;

[0015] Figure 4 A circuit diagram of a power amplifier circuit provided by an embodiment of the present invention;

[0016] Figure 5 A simulation diagram of the impedance amplitude of the harmonic control circuit and the output matching circuit of the inverse class F power amplifier provided in an embodiment of the present invention;

[0017] Figure 6 A simulation diagram of the impedance amplitude of the harmonic control circuit and the output matching circuit of the inverse class F power amplifier provided by the embodiment of the present invention in the Smith chart;

[0018] Figure 7 A schematic diagram of the waveforms of the drain current and drain voltage of the inverse class-F power amplifier provided in an embodiment of the present invention.

[0019] Reference numerals:

[0020] 1-Input matching circuit, 2-Power amplifier circuit,

[0021] 3- Harmonic control circuit, 4- Output matching circuit,

[0022] 41-drain bias subcircuit, 11-input matching subcircuit,

[0023] 12- Stabilization subcircuit, 13- Gate bias subcircuit. DETAILED DESCRIPTION

[0024] In order to clearly describe the technical solutions of the embodiments of the present invention, in the embodiments of the present invention, words such as "first" and "second" are used to distinguish the same items or similar items with basically the same functions and effects. For example, the first threshold and the second threshold are only used to distinguish different thresholds, and their order is not limited. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different.

[0025] It should be noted that, in the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0026] In the present invention, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, the combination of a and b, the combination of a and c, the combination of b and c, or the combination of a, b and c, where a, b, c can be single or multiple.

[0027] The power amplifier is the core module that determines the linearity, power consumption and efficiency of the communication system. With the development of RF wireless communication systems, new application scenarios such as aerospace, phased array radar and 5G base stations have emerged one after another, and higher requirements have been placed on the performance of power amplifiers. For example, high efficiency, large output power and compact circuit area are required.

[0028] Data shows that 5G power consumption will be 70% higher than 4G. In 2025, global data center energy consumption will account for 18% of total energy consumption. While energy consumption is increasing, carbon emissions are also required to be reduced, so higher requirements are placed on the conversion efficiency of power amplifiers. Compared with traditional silicon-based power devices, GaN (gallium nitride) has material advantages. High-speed switches made based on GaN have the characteristics of low on-resistance and low switching loss, which can provide higher system efficiency, reduce power loss, and achieve greater output power on a monolithic integrated circuit. And GaN's high-frequency characteristics are two to three times better than silicon, which can make the power amplifier operate at a higher frequency, smaller chip size, and better heat dissipation. Therefore, the development of GaN technology helps to realize compact, high-efficiency, and high-power power amplifier MMICs to meet the requirements of base station miniaturization, reduced power loss, and high-power output. As a type of high-efficiency switching power amplifier, the inverse class F power amplifier controls the voltage and current waveforms of the transistor drain through the harmonic suppression network at the output end, and finally achieves the purpose of no overlap of voltage and current waveforms and 100% drain efficiency.

[0029] The circuit implementation of the traditional inverse class F power amplifier is complex and the circuit area is large, and it can only be implemented using PCB technology. This means that although the existing inverse class F power amplifier has achieved high efficiency, it has a large area and is not suitable for application in various small base stations or portable communication devices.

[0030] In order to solve the above technical problems, Figure 1 As shown, an embodiment of the present invention provides an inverse class F power amplifier, comprising: an input matching circuit 1, a power amplifier circuit 2, a harmonic control circuit 3, and an output matching circuit 4 electrically connected in sequence, wherein: the input matching circuit 1 is used to match the input impedance to the target source impedance of the power amplifier circuit 2, and then output an input matching signal to the power amplifier circuit 2 based on the received input signal. The power amplifier circuit 2 is used to amplify the input matching signal, and then output the power amplified signal to the harmonic control circuit 3. The harmonic control circuit 3 is used to control the power amplified signal to be open-circuited at the second harmonic, and short-circuited at the third harmonic, and then output the power amplified signal to the output matching circuit 4. The output matching circuit 4 is used to match the output impedance to the target load impedance of the power amplifier circuit 2, and then output the target power amplified signal after harmonic control and output matching, wherein the electrical length of the drain bias transmission line in the output matching circuit 4 is greater than or equal to λ / 8, and less than or equal to λ / 6, wherein λ represents the wavelength.

[0031] It can be known from the specific structure of the above-mentioned inverse class F power amplifier that the input matching circuit 1 can match the input impedance of the inverse class F power amplifier to the target source impedance of the power amplifier circuit 2, and realize the impedance matching between the input impedance and the input end of the power amplifier circuit 2, so that when the input matching signal is output to the power amplifier circuit 2 based on the received input signal, the transmission power of the input matching signal is improved. After the power amplifier circuit 2 amplifies the input matching signal, it outputs the power amplified signal to the harmonic control circuit 3. The harmonic control circuit 3 can control the second harmonic and the third harmonic of the power amplified signal, so that the power amplified signal can be open-circuited at the second harmonic, with infinite impedance, and short-circuited at the third harmonic, with impedance approximately zero, further reducing the nonlinear characteristics in the power amplified signal and effectively improving the linearity of the power amplified signal. Finally, the output matching circuit 4 can match the output impedance to the target load impedance of the power amplifier circuit 2, and realize the impedance matching between the output impedance and the output end of the power amplifier circuit 2, so that when the power amplified signal processed by the harmonic control circuit 3 is output, the transmission power of the power amplified signal is improved to output a high-efficiency target power amplified signal. At the same time, in an embodiment of the present invention, the electrical length of the drain bias transmission line of the output matching circuit 4 is greater than or equal to λ / 8 and less than or equal to λ / 6. On the one hand, compared with the existing λ / 4, the electrical length of the drain bias transmission line is shortened, which can further reduce the circuit area of ​​the output matching circuit 4; on the other hand, the impedance of the drain bias transmission line at the fundamental wave can be compensated by increasing the characteristic impedance of the drain bias transmission line, so that the drain bias transmission line can be configured as a part of the fundamental wave impedance matching.

[0032] It can be seen from this that the inverse class-F power amplifier provided by the embodiment of the present invention can achieve high efficiency while reducing the circuit area.

[0033] It is understandable that the inverse class F power amplifier in the above embodiment may be an MMIC and manufactured using a 0.25 μm GaN-on-Si process, and the embodiment of the present invention does not specifically limit this.

[0034] In practice, Figure 1 As shown, the above-mentioned input impedance and output impedance are both 50 ohms (Ω), the target source impedance of the power amplifier circuit 2 is the optimal source impedance of the power amplifier circuit 2, and correspondingly, the target load impedance is the optimal load impedance of the power amplifier circuit 2. It can be understood that when the input end of the power amplifier circuit 2 meets the optimal source impedance and the output end meets the optimal load impedance, the power amplifier circuit 2 can achieve the maximum transmission power.

[0035] In one possible implementation, Figure 2As shown, the harmonic control circuit 3 includes a first transmission line TL1, a second transmission line TL2 and a third transmission line TL3, wherein: the first end of the first transmission line TL1 and the first end of the second transmission line TL2 are both electrically connected to the output end of the power amplifier circuit 2, the second end of the second transmission line TL2 and the first end of the third transmission line TL3 are both electrically connected to the output matching circuit 4, and the second end of the first transmission line TL1 and the second end of the third transmission line TL3 are both suspended. The electrical wavelength of the first transmission line TL1 is λ / 12, the electrical wavelength of the second transmission line TL1 is λ / 24, and the electrical wavelength of the third transmission line TL1 is λ / 8.

[0036] Based on this, the harmonic control circuit 3 in the embodiment of the present invention can be composed of only three transmission lines with electrical lengths of λ / 12, λ / 24 and λ / 8, respectively, which can not only achieve the purpose of opening the impedance at the second harmonic and shorting the impedance at the third harmonic, thereby improving the linearity of the power amplification signal, but also reduce the difficulty of circuit design, simplify the circuit structure, and further reduce the circuit area. It can be understood that since the electrical wavelengths of the three transmission lines are determined by the wavelength λ, when the center frequency of the inverse class F power amplifier is determined, the value of the wavelength λ can also be determined, and then the transmission line sizes of the first transmission line TL1, the second transmission line TL2 and the third transmission line TL3 can also be determined.

[0037] In one possible implementation, Figure 2 As shown, the output matching circuit 4 includes a drain bias subcircuit 41, an output matching capacitor C out and the output matching transmission line TL5, the first end of the drain bias sub-circuit 41 and the output matching capacitor C out The first end of each of the drain bias sub-circuit 41 is electrically connected to the output end of the harmonic control circuit 3, and the second end of the drain bias sub-circuit 41 is electrically connected to the drain bias power supply V DS Electrical connection, output matching capacitor C out The second end of is electrically connected to the first end of the output matching transmission line TL5, and the second end of the output matching transmission line TL5 is grounded.

[0038] See also Figure 2 In some embodiments, the drain bias subcircuit 41 includes a drain bias capacitor C b1 and a drain bias transmission line TL4, a first end of the drain bias transmission line TL4 and an output matching capacitor C out The first end of the drain bias transmission line TL4 is electrically connected to the drain bias power supply V DS Electrical connection.

[0039] Specifically, the drain bias subcircuit 41 is used to provide a drain bias voltage to the power amplifier circuit 2, wherein the drain bias transmission line TL4 is used to receive the drain bias power supply V DS , output the corresponding drain bias voltage to the power amplifier circuit 2. Output matching capacitor C out The output matching transmission line TL5 is mainly used to match the impedance at the fundamental wave, that is, the output impedance, to the target load impedance of the power amplifier circuit 2. The output matching capacitor C out It can also be used to maintain the static operating point of the inverse class F power amplifier stable, so as to reduce the noise in the target power amplification signal to a certain extent, and further optimize the target power amplification signal. DS =28V.

[0040] In addition, compared with the λ / 4 bias transmission line in the prior art, the electrical length of the drain bias transmission line TL4 in the embodiment of the present invention is greater than or equal to λ / 8 and less than or equal to λ / 6. For example, the electrical length of the transmission line TL4 can be λ / 7, 7λ / 50, 7λ / 48, etc., which is not specifically limited in the embodiment of the present invention. Based on this, the embodiment of the present invention can further reduce the circuit area of ​​the output matching circuit 4 by reducing the electrical length of the drain bias transmission line TL4. In practice, in order to have greater design freedom, the drain bias transmission line TL4 and the output matching capacitor C out Both can be regarded as a part of fundamental wave matching, which is beneficial to reducing the area of ​​the output matching circuit 4 and improving the output power and output efficiency of the inverse class F power amplifier.

[0041] In one possible implementation, Figure 3 As shown, the input matching circuit 1 includes an input matching subcircuit 11, a stabilizing subcircuit 12 and a gate biasing subcircuit 13, wherein: the output end of the input matching subcircuit 11 is electrically connected to the first end of the stabilizing subcircuit 12 and the first end of the gate biasing subcircuit 13 respectively, the second end of the stabilizing subcircuit 12 is electrically connected to the input end of the power amplifier circuit 2, and the second end of the gate biasing subcircuit 13 is electrically connected to the gate biasing power supply V GS Electrical connection.

[0042] See also Figure 3 In some embodiments, the input matching subcircuit 11 includes an input matching capacitor C in , grounding capacitor C1 and input matching transmission line TL6, where: input matching capacitor C in The first end is the receiving end of the input signal, and the input matching capacitor C in The second end is grounded through the grounding capacitor C1, and the input matching capacitor C in The second end of the stabilizing sub-circuit 12 is also electrically connected to the first end of the stabilizing sub-circuit 12 through the input matching transmission line TL6.

[0043] Specifically, the input matching capacitor C in , grounding capacitor C1 and input matching transmission line TL6 are mainly used to match the input impedance to the target source impedance of the power amplifier circuit 2. At the same time, the input matching capacitor C in It can also be used to keep the DC operating point of the inverse class F power amplifier stable.

[0044] In some embodiments, Figure 3 As shown, the above-mentioned stabilization subcircuit 12 includes a stabilization capacitor C s1 , the first stabilizing resistor R s1 and the second stabilizing resistor R s2 , stabilizing capacitor C s1 The first end and the first stabilizing resistor R s1 The first end of each of the capacitors is electrically connected to the output end of the input matching sub-circuit 11, and the stabilizing capacitor C s1 The second end of the first stabilizing resistor R s1 The second end of each of the second stabilizing resistor R s2 The first end of the second stabilizing resistor R is electrically connected to the gate bias transmission line TL7 in the gate bias sub-circuit 13. s2 The second end is connected to the gate bias power supply V GS Electrical connection.

[0045] In the specific implementation, by adjusting the stabilizing capacitor C s1 , the first stabilizing resistor R s1 and the second stabilizing resistor R s2 The value of can easily make the stability coefficient of the stabilizing subcircuit 12 greater than 1, so as to ensure that the inverse class F power amplifier can be unconditionally stable.

[0046] In some embodiments, Figure 3 As shown, the gate bias subcircuit 13 includes: a gate bias capacitor C b2 and a gate bias transmission line TL7, wherein a first end of the gate bias transmission line TL7 is electrically connected to an output end of the input matching subcircuit 11 and a first end of the stabilizing subcircuit 12, respectively, and a second end of the gate bias transmission line TL7 is electrically connected to an output end of the input matching subcircuit 11 and a first end of the stabilizing subcircuit 12 through a second stabilizing resistor R s2 and the gate bias power supply V GS and gate bias capacitor C b2 Electrical connection, gate bias capacitor C b2 The other end is grounded.

[0047] In practice, the gate bias subcircuit 13 is used to provide a gate bias voltage to the power amplifier circuit 2, wherein the gate bias transmission line TL7 is used to receive the gate bias power supply V GS, outputs a corresponding gate bias voltage to the power amplifier circuit 2. Exemplarily, the gate bias power supply V GS =-3.4V.

[0048] In one possible implementation, Figure 4 As shown, the power amplifier circuit 2 includes a first transistor Q1 and a second transistor Q2, the gate of the first transistor Q1 and the gate of the second transistor Q2 are both electrically connected to the output end of the input matching circuit 1, the drain of the first transistor Q1 and the drain of the second transistor Q2 are both electrically connected to the input end of the harmonic control circuit 3, and the source of the first transistor Q1 and the source of the second transistor Q2 are both grounded.

[0049] Exemplarily, in order to enable the power amplifier circuit 2 to obtain a higher gain and output power, the transistor Q1 and the second transistor Q2 can be two 8*125μm transistors made by GaN-based high electron mobility transistor (HEMT) process, and the embodiment of the present invention does not specifically limit this. Based on this, when the first transistor Q1 and the second transistor Q2 are transistors made by the above process, the maximum output power of the power amplifier circuit 2 formed by two 8*125μm GaN HEMTs in parallel can be greater than 38 decibel milliwatts (dBm). At the same time, the use of a parallel structure can also improve the heat dissipation performance of the power amplifier circuit 2.

[0050] See also Figure 5 In the figure, the horizontal axis Frequency represents the frequency, and the unit is GHz (gigahertz), the vertical axis Mag represents the amplitude, and Zin represents the impedance, and the unit of the impedance amplitude Mag (Zin) is Ω. The impedance amplitude of the inverse class F power amplifier provided by the embodiment of the present invention is 37.99Ω at the fundamental wave 3GHz, the impedance at the second harmonic 6GHz is infinite, and the impedance at the third harmonic 9GHz is 0.

[0051] See also Figure 6 In the Smith chart, the leftmost point is a short-circuit point, indicating that the real part of the impedance is 0 and the imaginary part is also 0. The rightmost point is an open-circuit point, indicating that the real impedance is infinite and the imaginary impedance is also 0. The point at the center of the circle is a matching point, indicating a standard resistance value, which is generally 50Ω. The optimal load impedance R of the embodiment of the present invention is opt，load =Z0*(0.520+j0.560), the impedance value at the fundamental wave is Z0*(0.559+j0.575). It can be seen that the impedance point at the fundamental wave basically coincides with the optimal load impedance point, indicating that the output matching circuit adjusts the fundamental wave impedance to the optimal load impedance of the power amplifier circuit.

[0052] Figure 7 The waveform diagram of the drain current and drain voltage is shown as an example. In the diagram, the horizontal axis Time represents time, and the unit is picoseconds (ps), the vertical axis Voltage on the left represents voltage, and the unit is V, and the vertical axis Current on the right represents current, and the unit is ampere (A). It can be seen from the figure that the waveform of the current is close to a square wave, and the waveform of the voltage is a half-sine wave. The overlapping area between them becomes smaller, which can reduce the device loss of the transistor in the power amplifier circuit, thereby improving the conversion efficiency of the power amplifier circuit.

[0053] It can be seen from the above that when the inverse class F power amplifier is manufactured using the process in the above embodiment, the inverse class F power amplifier can obtain a maximum power added efficiency of 64.5% at 3GHz, the output power at this time is 38.4dBm, the power gain is 10.3dB, and it can be achieved in a compact area (2.5mm×3mm). Therefore, the inverse class F power amplifier provided by the embodiment of the present invention has the advantages of small size, high efficiency and high output power, and can be widely used in 5G base stations, radars and portable communication equipment.

[0054] An embodiment of the present invention further provides a communication device, comprising the inverse class F power amplifier described in the above embodiment.

[0055] Compared with the prior art, the beneficial effects of the communication device provided by the embodiment of the present invention are the same as the beneficial effects of the inverse class F power amplifier described in the above embodiment, which will not be described in detail here.

[0056] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art may understand and implement other variations of the disclosed embodiments by viewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "one" or "an" does not exclude multiple situations. A single processor or other unit may implement several functions listed in the claims. Certain measures are recorded in different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0057] Although the present invention has been described in conjunction with specific features and embodiments thereof, it is apparent that various modifications and combinations may be made thereto without departing from the spirit and scope of the present invention. Accordingly, this specification and the accompanying drawings are merely exemplary illustrations of the present invention as defined by the appended claims and are deemed to cover any and all modifications, variations, combinations or equivalents within the scope of the present invention. Obviously, those skilled in the art may make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, the present invention is intended to include such modifications and variations if they fall within the scope of the claims of the present invention and their equivalents.

Claims

1. An inverse class F power amplifier, It is characterized in that include: An input matching circuit, a power amplifier circuit, a harmonic control circuit and an output matching circuit electrically connected in sequence, wherein: The input matching circuit is used to match the input impedance to the target source impedance of the power amplifier circuit, and then output an input matching signal to the power amplifier circuit based on the received input signal; The power amplifier circuit is used to output a power amplified signal to the harmonic control circuit after power amplifying the input matching signal; The harmonic control circuit is used to control the power amplified signal to be open-circuited at the second harmonic and short-circuited at the third harmonic, and then output the power amplified signal to the output matching circuit; The output matching circuit is used to match the output impedance to the target load impedance of the power amplifier circuit, and then output a target power amplified signal after harmonic control and output matching, wherein the electrical length of the drain bias transmission line in the output matching circuit is greater than or equal to λ / 8 and less than or equal to λ / 6, wherein λ represents the wavelength.

2. The inverse class F power amplifier according to claim 1, It is characterized in that The harmonic control circuit comprises a first transmission line, a second transmission line and a third transmission line, wherein: a first end of the first transmission line and a first end of the second transmission line are both electrically connected to the output end of the power amplifier circuit, a second end of the second transmission line and a first end of the third transmission line are both electrically connected to the output matching circuit, and a second end of the first transmission line and a second end of the third transmission line are both suspended; The electrical wavelength of the first transmission line is λ / 12, the electrical wavelength of the second transmission line is λ / 24, and the electrical wavelength of the third transmission line is λ / 8.

3. The inverse class F power amplifier according to claim 1, It is characterized in that The output matching circuit includes a drain bias subcircuit, an output matching capacitor and an output matching transmission line. The first end of the drain bias subcircuit and the first end of the output matching capacitor are both electrically connected to the output end of the harmonic control circuit, the second end of the drain bias subcircuit is electrically connected to a drain bias power supply, the second end of the output matching capacitor is electrically connected to the first end of the output matching transmission line, and the second end of the output matching transmission line is grounded.

4. The inverse class F power amplifier according to claim 3, It is characterized in that The drain bias subcircuit includes a drain bias capacitor and the drain bias transmission line, wherein a first end of the drain bias transmission line is electrically connected to a first end of the output matching capacitor, a second end of the drain bias transmission line is grounded through the drain bias capacitor, and a second end of the drain bias transmission line is also electrically connected to the drain bias power supply.

5. The inverse class F power amplifier according to claim 1, It is characterized in that The input matching circuit comprises an input matching subcircuit, a stabilization subcircuit and a gate bias subcircuit, wherein: The output end of the input matching subcircuit is electrically connected to the first end of the stabilizing subcircuit and the first end of the gate biasing subcircuit respectively, the second end of the stabilizing subcircuit is electrically connected to the input end of the power amplifier circuit, and the second end of the gate biasing subcircuit is electrically connected to the gate bias power supply.

6. The inverse class F power amplifier according to claim 5, It is characterized in that The input matching subcircuit includes an input matching capacitor, a grounding capacitor and an input matching transmission line, wherein: The first end of the input matching capacitor is the receiving end of the input signal, the second end of the input matching capacitor is grounded through the grounding capacitor, and the second end of the input matching capacitor is also electrically connected to the first end of the stabilizing subcircuit through the input matching transmission line.

7. The inverse class F power amplifier according to claim 5, It is characterized in that The stabilization subcircuit comprises a stabilization capacitor, a first stabilization resistor and a second stabilization resistor, the first end of the stabilization capacitor and the first end of the first stabilization resistor are both electrically connected to the output end of the input matching subcircuit, and the second end of the stabilization capacitor and the second end of the first stabilization resistor are both electrically connected to the input end of the power amplifier circuit; A first end of the second stabilizing resistor is electrically connected to a gate bias transmission line in the gate bias subcircuit, and a second end of the second stabilizing resistor is electrically connected to the gate bias power supply.

8. The inverse class F power amplifier according to claim 5, It is characterized in that The gate bias subcircuit includes: a gate bias capacitor and a gate bias transmission line, wherein a first end of the gate bias transmission line is electrically connected to an output end of the input matching subcircuit and a first end of the stabilizing subcircuit, respectively; a second end of the gate bias transmission line is electrically connected to a gate bias power supply and the gate bias capacitor, respectively, through a second stabilizing resistor in the stabilizing subcircuit; and the other end of the gate bias capacitor is grounded.

9. The inverse class F power amplifier according to claim 1, It is characterized in that The power amplifier circuit includes a first transistor and a second transistor, the gate of the first transistor and the gate of the second transistor are both electrically connected to the output end of the input matching circuit, the drain of the first transistor and the drain of the second transistor are both electrically connected to the input end of the harmonic control circuit, and the source of the first transistor and the source of the second transistor are both grounded.

10. A communication device, It is characterized in that The invention comprises the inverse class F power amplifier as claimed in any one of claims 1 to 9.

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