Complex interference resistant network flow beacon coding and decoding method

Abstract

The invention provides an anti-complex interference network flow beacon coding and decoding method, which comprises the following steps of: carrying out cyclic redundancy check (CRC) coding on data to be coded, combining the coded data with a known mark code sequence, then carrying out low density parity check (LDPC) coding processing, and for the data subjected to the LDPC coding, carrying out coding processing on the data subjected to the LDPC coding; removing a known mark code sequence, namely an M1 sequence, in the data, inserting mark codes into the data at equal intervals, inserting interval mark codes at the tail of the data, repeating a coding segment, respectively adding a start synchronization code and an end synchronization code at the beginning and the end of the coding segment, and continuously repeating the sequence added with the synchronization codes to form a code stream; and then decoding is carried out, and the correctness of a decoding result is verified. According to the method, the accuracy of data synchronization of the forward and backward algorithms is improved, the success rate of decoding is improved, interference errors which easily occur on a transmission channel are effectively handled, and a reliable solution is provided for realizing beacon-based tracing in an encrypted network environment.

Description

Technical Field

[0001] The present invention relates to the field of data encoding and decoding, and in particular to a network stream beacon encoding and decoding method that is resistant to complex interference. Background Art

[0002] With the rapid development of modern communication technology, network security has become the focus of people's attention, and the tracking and tracing of network attack behaviors has also become a hot topic of research. Active network stream watermarking technology tracks network traffic by embedding unique information identifiers. This technology is widely used in network security, tracking illegal information dissemination and other fields. Among them, watermark embedding based on inter-packet delay is a technology that embeds information identifiers by adjusting the sending time interval (inter-packet delay) of data packets. The sender represents binary "0" or "1" by increasing or decreasing the inter-packet delay, and embeds the beacon by controlling the sending time. The receiver extracts the sent binary sequence by monitoring the arrival time of the data packet and measuring the delay between adjacent data packets, and locates the starting position of the beacon and restores the embedded beacon according to the preset decoding rules. Since the watermark is embedded through timing and does not modify the content of the data packet, it is difficult for conventional network monitoring tools to directly detect the embedded watermark information, so this method has good concealment. However, this technology relies on a good network environment. Once data packets are out of order, lost, or jittery, the originally designed time interval between packets will be disrupted, resulting in insertion and deletion synchronization loss and replacement transmission errors in beacon transmission. Specifically, the detected watermark information will have bit insertion, deletion, and flipping, and the receiving end will be unable to correctly restore the information.

[0003] Traditional error correction coding technology is very mature in dealing with bit replacement errors, but it is no longer applicable under channel conditions where insertion, deletion, and replacement errors may occur. Therefore, it is particularly important to develop a coding and decoding technology with strong robustness and high anti-interference ability to ensure the reliable transmission of beacons. This technology must not only be able to adapt to complex and changing network environments, but also provide reliable guarantees in terms of data integrity and accuracy, laying a solid foundation for the stable transmission of beacons. Summary of the invention

[0004] Purpose of the invention: The purpose of the present invention is to provide a network stream beacon encoding and decoding method that is resistant to complex interference. The accuracy of forward and backward algorithm synchronization data is improved by repeated transmission, and interference errors that are prone to occur on the transmission channel, such as synchronization loss and delay jitter, are effectively dealt with. This method provides a reliable solution for realizing beacon-based tracking and tracing in an encrypted network environment.

[0005] Technical solution: The network flow beacon encoding method for resisting complex interference described in the present invention includes an encoding method and a decoding method, wherein the encoding method includes the following steps:

[0006] Step 1-1, generating data to be encoded by low-density parity check LDPC [ACM1] based on the data to be encoded A;

[0007] Step 1-2, the data [ACM1] is processed by LDPC coding, and the data mode is changed to data [ACD];

[0008] Step 1-3, inserting a known marker code and an interval marker code into the data [ACD] to obtain a coding segment;

[0009] Step 1-4, the coding segment is continuously repeated to form a continuous code stream X;

[0010] The decoding method comprises the following steps:

[0011] Step 2-1, the receiving end detects the end synchronization code by correlation, and detects the start synchronization code in reverse and forward direction after finding the end synchronization code. If the paired synchronization code is not detected until the end of the code stream, the decoding fails and no output is made;

[0012] Step 2-2, after detecting the start synchronization code and the end synchronization code, extract the code segment for decoding, and the inner decoder (maximum a posteriori probability MAP detector, cited from Wang, Feng, Dario Fertonani, and Tolga M. Duman. "Symbol-level synchronization and LDPC code design for insertion / deletionchannels." IEEE transactions on communications 59.5 (2011): 1287-1297) combines the forward-backward algorithm and the repeatability of the code segment to generate more accurate initial log-likelihood ratio LLR information and send it to the outer decoder;

[0013] Step 2-3, the outer decoder (LDPC decoder) decodes and iterates with the inner decoder until the maximum number of iterations N is reached i (N i Generally, 3 is taken) to get the decoding result , verify the correctness of the decoding result. If the decoding result can pass the cyclic redundancy check CRC, the decoding is successful and the decoding result is output Before Bits ;

[0014] Step 2-4, if the decoding result cannot pass the cyclic redundancy check CRC, adjust the start and end positions of the code segment according to the result of running the forward and backward algorithm, and decode again to obtain the decoding result If the decoding result can pass the cyclic redundancy check CRC, the decoding is successful and the decoding result is output Before Bits ;

[0015] Step 2-5, if the result is still incorrect, slide the starting position of the code segment right by t bits and the ending position left by t bits, and decode again to get the decoding result If the decoding result can pass the cyclic redundancy check CRC, the decoding is successful and the decoding result is output Before Bits ; If the decoding result is still wrong, continue to search for the start synchronization code and the end synchronization code, and repeat steps 2-2 to 2-5 to decode again. If the decoding result that can pass the cyclic redundancy check CRC is not obtained until the end of the code stream, the decoding fails and no output is made.

[0016] In step 1-1, the length is The length of the CRC encoding of the data A to be encoded is The verification information C is connected to form a binary sequence after the data to be encoded A is connected to the verification information C , in the binary sequence Add the length at the end A known marker code sequence , generate data to be encoded by low-density parity check LDPC [ACM1];

[0017] In step 1-2, the data [ACM1] is LDPC encoded to generate a coding result [ACM1D] of length L2, where D is the check information generated by LDPC encoding. After encoding, the known mark code sequence M1 is removed. At this time, the data mode becomes data [ACD], and the data length becomes , ;

[0018] In step 1-3, the sequence formed by the data [ACD] is recorded as B={b1, b2, ..., },in The first bits, insert the known marker code M2 ​​every q bits in sequence B, and finally insert the interval marker code M3 at the end of sequence B to form a sequence with a length of The coding segment [B(1:q) M2B(q+1:2q) M2...B( )M2 M3], where B(1:q) represents the 1st to qth bits of sequence B; Refers to ;

[0019] In steps 1-4, the length The coding segment is repeated ( Generally, 4) times are used, and the beginning is inserted by The start synchronization code consists of bits 0 and the sequence {1, 1, 1, 0, 1} , insert at the end The end synchronization code consists of 1 bits and the sequence {0, 1, 0, 0, 0} ; The lengths of the synchronization codes S1 and S2 are both s, and the code segment length is extended to , the code segment is repeated continuously to form a continuous code stream X.

[0020] Step 2-1 includes the following steps:

[0021] Step 2-1-1, create a sliding window of size s (s is generally 80) at the receiving end. The code stream X sent by the sender forms a code stream Z after channel interference. The correlation between the received sequence and the end synchronization code S2 is detected from the starting position of the received code stream Z. The correlation value at each position m is for:

[0022]

[0023] in Indicates the first bits;

[0024] Step 2-1-2, if the correlation value exceeds a preset threshold value p (p is generally 50) at a certain position, the position is recorded, and among all the recorded positions, the position with the largest correlation value is selected as the starting position d2 of the end synchronization code;

[0025] Step 2-1-3, start from position d2 and detect the start synchronization code backwards. In order to detect the end position of the start synchronization code, take the first d2 bits of the code stream Z to form the sequence to be detected Z1= ,in Indicates the first bits, reverse the sequence Z1 to be detected, and form the sequence Z2 after reversing = , perform correlation detection between the start synchronization code S1 and the sequence Z2, and obtain the position according to the method in step 2-1-2 , then the end position of the start synchronization code in the receiving sequence is , denoted as ;

[0026] Step 2-1-4, if the start synchronization code is not found, then starting from position d2, continue to search for a pair of start synchronization code and end synchronization code according to steps 2-1-1 to 2-1-3;

[0027] Step 2-1-5: If a pair of start synchronization code and end synchronization code cannot be detected until the end of the bit stream, the decoding fails and no output is made.

[0028] Step 2-2 includes the following steps:

[0029] Step 2-2-1, after detecting the start synchronization code and the end synchronization code, extract the code segment between the start synchronization code and the end synchronization code ,in Indicates the first bits, for convenience of representation, the code segment z is recorded as the code segment , the length of the code segment is recorded as , That is ;use represents the insertion probability of the channel, is the deletion probability, is the flip probability, is the probability that no insertion or deletion occurs, ;

[0030] Step 2-2-2, initialize forward probability , initialize the backward probability For the non-marker code position in the code segment, the prior information of the non-marker code position is initialized to P(x=0)=0.5 and P(x=1)=0.5, where x represents each bit sent by the sender, P(x=0) represents the probability of the bit being 0, and P(x=1) represents the probability of the bit being 1; for the mark code position, since the inner decoder knows its value, its prior information is completely accurate;

[0031] Step 2-2-3, start forward calculation, It represents the probability that the sender sends k bits, the receiver receives n bits after passing through the channel, and observes the first n-1 bits, which is calculated by the following formula:

[0032]

[0033]

[0034] in, represents the kth bit sent, represents the probability of the value of the kth bit sent;

[0035] function The formula is:

[0036]

[0037] Run forward calculation until ;

[0038] Step 2-2-4, start the backward calculation, It means that the sender sends k bits, the receiver receives n bits after passing through the channel, and observes the bits from the n+1th to the nth The probability of bits is calculated by the following formula:

[0039]

[0040]

[0041] Run backward calculation until ;

[0042] Step 2-2-5, calculate the conditional probability of each position based on the results of forward calculation and backward calculation:

[0043]

[0044] in Indicates that in the known Under the condition of the value, the receiver observes the first to the second The probability of bits;

[0045] Then get Group conditional probability information, where each group contains and , express When observing the code segment y from 1 to The probability of bits, express When observing the code segment y from 1 to The probability of bits;

[0046] Step 2-2-6, split the conditional probability information into Each segment contains Group information, for each non-marker code position, calculate the log-likelihood ratio information LLR, for the marked code position, skip and do not calculate the log-likelihood ratio information LLR; after the calculation is completed, the log-likelihood ratio information LLR sequence of the non-marker code position is obtained;

[0047] In step 2-2-7, the inner decoder can obtain the value and position of the marker code sequence M1 embedded before LDPC encoding. For each bit of the marker code sequence M1, if it is bit 0, the log-likelihood ratio information LLR value corresponding to the bit is initialized to H (H is generally 15). If it is bit 1, the log-likelihood ratio information LLR is initialized to -H. The log-likelihood ratio information LLR of the marker code sequence M1 is embedded into the corresponding position of the log-likelihood ratio information LLR sequence formed in step 2-2-6, that is, inserted in the first After the positions are obtained, a complete log-likelihood ratio information LLR sequence is formed;

[0048] Step 2-2-8, send the complete log-likelihood ratio information LLR sequence to the LDPC decoder, wait for the LDPC decoder to update the prior information of each bit, and repeat steps 2-2-2 to 2-2-8 again using the updated prior information until the maximum number of iterations of the inner and outer decoders is reached. .

[0049] In step 2-2-6, the log-likelihood ratio information LLR is calculated using the following formula:

[0050] + +…+

[0051] in, represents the kth position in the first segment of conditional probability information, The kth position in the second segment representing the conditional probability information The conditional probability information The kth position in the segment, Indicates When the bit at position k in the segment is 0, the code segment y from 1 to The probability of bits.

[0052] Step 2-3 includes the following steps:

[0053] Step 2-3-1, the LDPC decoder receives the LLR sequence of log-likelihood ratio information from the inner decoder and starts decoding. After decoding, the prior probability of each bit is updated and sent to the inner decoder, waiting for the inner decoder to update the initial log-likelihood ratio information, and using the initial log-likelihood ratio information updated by the inner decoder to perform LDPC decoding again and update the prior probability of each bit until the maximum number of iterations is reached. ;

[0054] Step 2-3-2: After reaching the maximum number of iterations, the decoding result Perform cyclic redundancy check CRC;

[0055] Step 2-3-3, if the cyclic redundancy check CRC passes, the decoding is successful and the decoding result is output Before Bits .

[0056] Steps 2-4 include the following steps:

[0057] Step 2-4-1, if the cyclic redundancy check CRC fails, calculate the last time the forward and backward algorithm was run and ,in express The corresponding maximum value value, express The corresponding maximum value value, shift the start position of the code segment to the right bits, the end position is offset to the left Bit;

[0058] Step 2-4-2, rerun the process of joint iterative decoding and verification of the inner and outer decoders, i.e., step 2-2-2 to step 2-3-3.

[0059] Steps 2-5 include the following steps:

[0060] Step 2-5-1, if the cyclic redundancy check CRC in step 2-4-2 fails, slide the starting position of the code segment to the right by t bits, slide the ending position to the left by t bits, and repeat steps 2-2-2 to 2-3-3;

[0061] Step 2-5-2, if the cyclic redundancy check CRC still fails, continue to detect the next start synchronization code and end synchronization code backward from the position of the end synchronization code, and repeat the decoding process from step 2-2-1 to step 2-5-2. If the decoding result that passes the cyclic redundancy check CRC cannot be obtained until the end of the code stream, the decoding fails.

[0062] The present invention also provides a computer storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the method described above are implemented.

[0063] The present invention also provides a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method when executing the computer program.

[0064] The present invention proposes a method for encoding and decoding beacons in a poor channel environment, using a forward-backward algorithm to correct bit insertion or deletion errors caused by data packet insertion or deletion, and then using an LDPC decoder to solve bit flip errors caused by random jitter, and finally restore the original beacon. However, the traditional forward-backward algorithm has limited synchronization capabilities, and the synchronization results in a poor channel environment are often far from the actual results, which easily leads to decoding errors in the LDPC decoder. The present invention improves the accuracy of the forward-backward algorithm synchronization data by repeatedly sending the LDPC-encoded watermark information, thereby improving the decoding accuracy, and finally correctly restores the original watermark information. At the same time, if the initial decoding result is incorrect, the result calculated by the forward-backward algorithm is used to reposition the start and end positions of the code segment, so that the start and end positions of the code segment can still be adjusted to the correct positions in a poor channel environment.

[0065] Compared with the prior art, the present invention has the following beneficial effects: 1. The design adopts the cascade coding structure of CRC coding as the inner code and LDPC code as the outer code, which can effectively deal with the interference such as bit flipping, replacement, insertion, etc. in the poor channel environment, adopts the form of repeated transmission, improves the accuracy of forward and backward algorithm synchronization data, and provides more accurate initial information for LDPC decoding. LDPC code corrects bit replacement errors and uses CRC to verify the decoding results, which further improves the reliability and anti-interference ability of data transmission; 2. If the decoding result cannot pass the CRC check, the design uses the forward and backward algorithm to calculate the result to relocate the start and end positions of the code segment. In a poor channel environment, the start and end positions of the code segment can still be adjusted to the correct position to maintain the stability of data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] Figure 1 This is a flow chart of the encoding and decoding steps of the present invention.

[0067] Figure 2 This is the coding structure diagram of the present invention.

[0068] Figure 3 The following is a specific flow chart for decoding the present invention. DETAILED DESCRIPTION

[0069] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments, and the above and / or other advantages of the present invention will become more clear.

[0070] like Figure 1As shown, this embodiment discloses a network stream beacon encoding and decoding method that is resistant to complex interference (including insertion, deletion, and replacement interference), wherein the encoding method includes: performing CRC encoding on the data to be encoded, and combining the encoded data with a known marker code sequence M1 to perform LDPC encoding processing, for the LDPC encoded data, removing the known marker code sequence, i.e., the M1 sequence, and inserting the marker code M2 ​​into the data at equal intervals, inserting the interval marker code M3 at the end of the data, and repeating this encoding segment N r The method comprises: detecting the code stream at the receiving end, extracting the code segment for decoding whenever the start synchronization code and the end synchronization code are detected, and the inner decoder generates a more accurate initial LLR value by combining the forward and backward algorithm and the repeatability of the code segment, and sending the initial LLR value to the outer decoder for decoding and updating the prior information of the sequence, and the inner and outer decoders iteratively decode until the maximum number of iterations set in advance is reached, and finally verifying the correctness of the decoding result. If it is incorrect, adjusting the start and end positions of the code segment and attempting decoding multiple times.

[0071] In a specific embodiment, Figure 2 As shown, the encoding method specifically includes the following steps:

[0072] Step 1-1, perform cyclic redundancy check (CRC) encoding on the 24-bit data A to be encoded to generate 12-bit check information C, and concatenate A and C to form a binary sequence A C , in A C Add a 10-bit known marker sequence at the end ={0,0,0,0,0,0,0,0,0,0} generates the data to be LDPC encoded [ACM1].

[0073] Step 1-2, the above data is LDPC encoded to generate a 135-bit encoding result [ACM1D] (where D is the check information generated by LDPC encoding). After encoding, the known mark code sequence, i.e., the M1 sequence, is removed. At this time, the data mode becomes [ACD], and the data length becomes bits.

[0074] Step 1-3: record the sequence formed by the above steps as B={b1,b2,…, }, insert the known marker code M2={1,0} every 4 bits in B, and finally insert the interval marker code M3={1,0,1} at the end of the data to form a coding segment with a length of L4 [B(1:4) M2B(5:8) M2...B( : )M2 M3].

[0075] Step 1-4, repeat the coded segment of length L4 4 times, and insert a start synchronization code consisting of 75 bits of 0 and the sequence {1,1,1,0,1} at the beginning ; Insert an end synchronization code consisting of 75 bits of 1 and the sequence {0,1,0,0,0} at the end ; The synchronization code length is 80 bits, and the code segment length is extended to , repeating this code segment continuously to form a continuous code stream X.

[0076] In a specific embodiment, Figure 3 As shown, the decoding method specifically includes the following steps:

[0077] Step 2-1, the receiving end detects the end synchronization code by correlation, and detects the start synchronization code in reverse and forward direction after finding the end synchronization code. If the paired synchronization code is not detected until the end of the code stream, the decoding fails and no output is made;

[0078] Step 2-2, after detecting the start synchronization code and the end synchronization code, extract the code segment for decoding, and the inner decoder combines the forward and backward algorithm and the repeatability of the code segment to generate more accurate initial log-likelihood ratio information and send it to the outer decoder;

[0079] Step 2-3: The outer decoder performs decoding and iterates with the inner decoder until 3 iterations are completed to obtain the decoding result. , verify the correctness of the decoding result. If the decoding result can pass the CRC check, the decoding is successful and the decoding result is output The first 24 bits of ;

[0080] Step 2-4, if the decoding result cannot pass the cyclic redundancy check CRC, adjust the start and end positions of the code segment according to the result of running the forward and backward algorithm, and decode again to obtain the decoding result ; If the decoding result can pass the cyclic redundancy check CRC, the decoding is successful and the decoding result is output The first 24 bits of ;

[0081] Step 2-5, if the result is still incorrect, slide the start position of the code segment 10 bits to the right and the end position 10 bits to the left, and decode again to get the decoding result If the decoding result can pass the cyclic redundancy check CRC, the decoding is successful and the decoding result is output The first 24 bits of ; If the decoding result is still wrong, continue to search for the start synchronization code and the end synchronization code, and repeat steps 2-2 to 2-5 to decode again. If the decoding result that can pass the cyclic redundancy check CRC is not obtained until the end of the code stream, the decoding fails and no output is made.

[0082] The step 2-1 specifically includes the following steps:

[0083] Step 2-1-1, create a sliding window of size 80 at the receiving end. The code stream X sent by the sender forms a code stream Z after channel interference. The correlation between the received sequence and the end synchronization code S2 is detected from the starting position of the received code stream Z. The correlation value R[m] at each position m is:

[0084]

[0085] Where Z[n+m] represents the n+mth bit of the code stream Z.

[0086] Step 2-1-2, if the correlation value exceeds 50 at a certain position, record the position, and among all the recorded positions, select the position with the largest correlation value as the starting position d2 of the end synchronization code;

[0087] Step 2-1-3, start from the starting position d2 and detect the start synchronization code backwards. In order to detect the end position of the start synchronization code, the first d2 bits of the code stream Z need to be taken to form the sequence to be detected Z1= (in represents the d2th bit of the code stream Z) and reverses it to form the sequence Z2= , perform correlation detection between the start synchronization code S1 and the sequence Z2, and obtain the position according to the method in step 2-1-2 , then the end position of the start synchronization code in the receiving sequence is , denoted as d1;

[0088] Step 2-1-4, if the start synchronization code is not found, continue to search for a pair of start synchronization code and end synchronization code according to steps 2-1-1 to 2-1-3 from the position where the end synchronization code is found;

[0089] Step 2-1-5: If a pair of start synchronization code and end synchronization code cannot be detected until the end of the bit stream, the decoding fails and no output is made.

[0090] The step 2-2 specifically includes the following steps:

[0091] Step 2-2-1, after detecting the start synchronization code and the end synchronization code, extract the code segment between the start synchronization code and the end synchronization code (in Indicates the first bits), for the convenience of representation, this code segment z is recorded as code segment , That is , the length of the code segment is recorded as ; Use P i represents the insertion probability of the channel, P d is the deletion probability, P s is the flip probability, P t is the probability that no insertion or deletion occurs, P t =1-P i -P d ;

[0092] Step 2-2-2, initialize forward probability , initialize the backward probability For the non-marker code position in the code segment, the prior information of the non-marker code position is initialized to P(x=0)=0.5 and P(x=1)=0.5, where x represents each bit sent by the sender, P(x=0) represents the probability of the bit being 0, and P(x=1) is the same; for the mark code position, since the inner decoder knows its value, its prior information is completely accurate;

[0093] Step 2-2-3, start forward calculation, It represents the probability that the sender sends k bits, the receiver receives n bits after passing through the channel, and observes the first n-1 bits. represents the kth bit sent, The probability of the kth bit being sent is calculated using the following formula:

[0094]

[0095]

[0096] in,

[0097]

[0098] Run forward calculation until ;

[0099] Step 2-2-4, start the backward calculation, It means that the sender sends k bits, the receiver receives n bits after passing through the channel, and observes the bits from the n+1th to the nth The probability of bits is calculated by the following formula:

[0100]

[0101]

[0102] Run backward calculation until ;

[0103] Step 2-2-5, based on the results of forward and backward calculations, calculate the conditional probability of each position (i.e., given the known Under the condition of taking value, the first to the second values ​​of y are observed at the receiving end. bits):

[0104]

[0105] get Group conditional probability information, where each group contains and , express When we observe the first to the The probability of bits, express When we observe the first to the The probability of bits;

[0106] Step 2-2-6, split the conditional probability information into Each segment contains L4 group information. For each non-marker code position, the log-likelihood ratio information LLR is calculated:

[0107] + +…+

[0108] in, represents the kth position in the first segment of conditional probability information, Represents the kth position in the second segment of conditional probability information Represents conditional probability information The kth position in the segment, Indicates When the bit at position k in the segment is 0, the first to the last bit of y are observed. The probability of bits; for the marker code position, the log likelihood ratio information LLR is skipped and not calculated; after the calculation is completed, the log likelihood ratio information LLR sequence of the unmarked code position is obtained;

[0109] Step 2-2-7, since the inner decoder knows the value and position of the marker code sequence M1 embedded before LDPC encoding, for each bit of the marker code sequence M1, if it is bit 0, initialize its log-likelihood ratio information LLR value to 15, if it is bit 1, initialize the log-likelihood ratio information LLR to -15, and embed the log-likelihood ratio information LLR of the marker code sequence M1 into the corresponding position of the log-likelihood ratio information LLR sequence of the unmarked code position, that is, insert it into the first After the positions are obtained, a complete log-likelihood ratio information LLR sequence is formed;

[0110] Step 2-2-8, send the complete log-likelihood ratio information LLR sequence to the LDPC decoder, wait for the LDPC decoder to update the prior information of each bit, and repeat steps 2-2-2 to 2-2-8 again using the updated prior information until 3 iterations are completed.

[0111] The steps 2-3 specifically include the following steps:

[0112] Step 2-3-1, the LDPC decoder receives the LLR sequence of log-likelihood ratio information from the inner decoder and starts decoding. After decoding, the prior probability of each bit is updated and sent to the inner decoder, and the inner decoder is waited for to update the initial log-likelihood ratio information. The initial log-likelihood ratio information updated by the inner decoder is used to perform LDPC decoding again and update the prior probability of each bit until 3 iterations are completed;

[0113] Step 2-3-2: After reaching the maximum number of iterations, the decoding result Perform cyclic redundancy check CRC;

[0114] Step 2-3-3, if the cyclic redundancy check CRC passes, the decoding is successful and the decoding result is output Before Bits .

[0115] The steps 2-4 specifically include the following steps:

[0116] Step 2-4-1, if the cyclic redundancy check CRC fails, calculate the last time the forward and backward algorithm was run and ,in express The corresponding n1 value when taking the maximum value, express Take the n2 value corresponding to the maximum value, shift the starting position of the code segment to the right by n2 bits, and shift the ending position to the left by n1 bits;

[0117] Step 2-4-2, rerun the process of joint iterative decoding and verification of the inner and outer decoders, i.e., step 2-2-2 to step 2-3-3.

[0118] The steps 2-5 specifically include the following steps:

[0119] Step 2-5-1, if the cyclic redundancy check CRC in step 2-4-2 fails, slide the start position of the code segment 10 bits to the right and the end position 10 bits to the left, and repeat steps 2-2-2 to 2-3-3;

[0120] Step 2-5-2, if the cyclic redundancy check CRC still fails, then continue to detect the next start synchronization code and end synchronization code from the end synchronization code position and repeat the decoding process from step 2-2-1 to step 2-5-2. If the decoding result that passes the cyclic redundancy check CRC cannot be obtained until the end of the code stream, the decoding fails.

[0121] Compared with the prior art, the codeword sequence designed by the present invention is shorter and more robust. It can cope with interference under channel conditions with high insertion, deletion and flipping probabilities and successfully detect and recover beacons with a higher probability. The encoding and decoding method proposed by the present invention has both error correction and error detection capabilities, which can not only resist various interferences in the channel, but also ensure the reliability of the decoding results.

[0122] The present invention provides a network stream beacon encoding and decoding method that resists complex interference. There are many methods and ways to implement the technical solution. The above is only a preferred implementation of the present invention. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made, and these improvements and modifications should also be regarded as the protection scope of the present invention. All components not specified in this embodiment can be implemented by existing technologies.

Claims

1. A network stream beacon encoding and decoding method resistant to complex interference, characterized in that: The invention comprises an encoding method and a decoding method, wherein the encoding method comprises the following steps: Step 1-1, generating data to be encoded by low-density parity check LDPC [ACM1] based on the data to be encoded A; Step 1-2, the data [ACM1] is processed by LDPC coding, and the data mode is changed to data [ACD]; Step 1-3, inserting a known marker code and an interval marker code into the data [ACD] to obtain a coding segment; Step 1-4, the coding segment is continuously repeated to form a continuous code stream X; The decoding method comprises the following steps: Step 2-1, the receiving end detects the end synchronization code by correlation, and detects the start synchronization code in reverse and forward direction after finding the end synchronization code. If the paired synchronization code is not detected until the end of the code stream, the decoding fails and no output is made; Step 2-2, after detecting the start synchronization code and the end synchronization code, extract the code segment for decoding, and the inner decoder combines the forward and backward algorithm and the repeatability of the code segment to generate more accurate initial log-likelihood ratio LLR information and send it to the outer decoder; Step 2-3: The outer decoder performs decoding and iterates with the inner decoder until the maximum number of iterations N is reached. i , get the decoding result , verify the correctness of the decoding result. If the decoding result can pass the cyclic redundancy check CRC, the decoding is successful and the decoding result is output Before Bits ; Step 2-4, if the decoding result cannot pass the cyclic redundancy check CRC, adjust the start and end positions of the code segment according to the result of running the forward and backward algorithm, and decode again to obtain the decoding result If the decoding result can pass the cyclic redundancy check CRC, the decoding is successful and the decoding result is output The first L1 bits of ; Step 2-5, if the result is still incorrect, slide the starting position of the code segment right by t bits and the ending position left by t bits, and decode again to get the decoding result If the decoding result can pass the cyclic redundancy check CRC, the decoding is successful and the decoding result is output The first L1 bits of ; If the decoding result is still wrong, continue to search for the start synchronization code and the end synchronization code, and repeat steps 2-2 to 2-5 to decode again. If the decoding result that can pass the cyclic redundancy check CRC is not obtained until the end of the code stream, the decoding fails and no output is made.

2. The method according to claim 1, characterized in that In step 1-1, the length of the encoded data A is cyclically redundancy checked (CRC) to generate a length of L c The verification information C is connected to the data to be encoded A and the verification information C to form a binary sequence A C , in the binary sequence A C Add a length of L at the end m1 The known marker code sequence M1 generates the data to be low-density parity check LDPC encoded [ACM1]; In step 1-2, the data [ACM1] is LDPC encoded to generate a coding result [ACM1D] of length L2, where D is the check information generated by LDPC encoding. After encoding, the known mark code sequence M1 is removed. At this time, the data mode becomes data [ACD], and the data length becomes L3, L3= L2-L m1 ; In step 1-3, the sequence formed by the data [ACD] is recorded as B={b1, b2, ..., },in Indicates the L3th bit of sequence B. A known marker code M2 ​​is inserted every q bits in sequence B. Finally, an interval marker code M3 is inserted at the end of sequence B to form a coding segment with a length of L4 [B(1:q) M2B(q+1:2q) M2...B( )M2 M3], where B(1:q) represents the 1st to qth bits of sequence B; Refers to ; In step 1-4, the encoding segment of length L4 is repeated N times. r Insert a start synchronization code consisting of N0 bits of 0 and the sequence {1, 1, 1, 0, 1} at the beginning , insert an end synchronization code consisting of N1 bits 1 and the sequence {0, 1, 0, 0, 0} at the end ; The lengths of the synchronization codes S1 and S2 are both s, and the code segment length is extended to , the code segment is repeated continuously to form a continuous code stream X.

3. The method according to claim 2, characterized in that Step 2-1 includes the following steps: Step 2-1-1, create a sliding window of size s at the receiving end. The code stream X sent by the sender forms a code stream Z after channel interference. The correlation between the received sequence and the end synchronization code S2 is detected from the starting position of the received code stream Z. The correlation value at each position m is for: ， in Indicates the first bits; Step 2-1-2, if the correlation value exceeds a preset threshold value p at a certain position, the position is recorded, and among all the recorded positions, the position with the largest correlation value is selected as the starting position d2 of the end synchronization code; Step 2-1-3, start from position d2 and detect the start synchronization code backwards. In order to detect the end position of the start synchronization code, take the first d2 bits of the code stream Z to form the sequence to be detected Z1= ,in Indicates the first bits, reverse the sequence Z1 to be detected, and form the sequence Z2 after reversing = , perform correlation detection between the start synchronization code S1 and the sequence Z2, and obtain the position according to the method in step 2-1-2 , then the end position of the start synchronization code in the receiving sequence is , denoted as d1; Step 2-1-4, if the start synchronization code is not found, then starting from position d2, continue to search for a pair of start synchronization code and end synchronization code according to steps 2-1-1 to 2-1-3; Step 2-1-5: If a pair of start synchronization code and end synchronization code cannot be detected until the end of the bit stream, the decoding fails and no output is made.

4. The method according to claim 3, characterized in that Step 2-2 includes the following steps: Step 2-2-1, after detecting the start synchronization code and the end synchronization code, extract the code segment between the start synchronization code and the end synchronization code ,in Indicates the first bits, and code segment z is recorded as code segment , the length of the code segment is recorded as , That is ; Use P i represents the insertion probability of the channel, P d is the deletion probability, P s is the flip probability, P t is the probability that no insertion or deletion occurs, P t =1-P i -P d ; Step 2-2-2, initialize forward probability , initialize the backward probability For the non-marker code position in the code segment, the prior information of the non-marker code position is initialized to P(x=0)=0.5 and P(x=1) = 0.5, where x represents each bit sent by the sender, P(x=0) represents the probability of the bit being 0, and P(x=1) represents the probability of the bit being 1; Step 2-2-3, start forward calculation, It represents the probability that the sender sends k bits, the receiver receives n bits after passing through the channel, and observes the first n-1 bits, which is calculated by the following formula: ， in, represents the kth bit sent, represents the probability of the value of the kth bit sent; function The formula is: ， Run the forward calculation until ; Step 2-2-4, start the backward calculation, It means that the sender sends k bits, the receiver receives n bits after passing through the channel, and observes the bits from the n+1th to the nth The probability of bits is calculated by the following formula: ， Run backward calculation until k=0; Step 2-2-5, calculate the conditional probability of each position based on the results of forward calculation and backward calculation: ， in Indicates that in the known Under the condition of the value, the receiver observes the first to the second The probability of bits; Then get Group conditional probability information, where each group contains and , express When observing the code segment y from 1 to The probability of bits, express When observing the code segment y from 1 to The probability of bits; Step 2-2-6, divide the conditional probability information into N r Segments, each segment contains L4 group information, for each non-marker code position, the log likelihood ratio information LLR is calculated, and for the marked code position, the log likelihood ratio information LLR is skipped and not calculated; after the calculation is completed, the log likelihood ratio information LLR sequence of the non-marker code position is obtained; Step 2-2-7, the inner decoder can obtain the value and position of the marker code sequence M1 embedded before LDPC encoding. For each bit of the marker code sequence M1, if it is bit 0, the log-likelihood ratio information LLR value corresponding to the bit is initialized to H. If it is bit 1, the log-likelihood ratio information LLR is initialized to -H. The log-likelihood ratio information LLR of the marker code sequence M1 is embedded into the corresponding position of the log-likelihood ratio information LLR sequence formed in step 2-2-6, that is, inserted into the L1+ L C After the positions are obtained, a complete log-likelihood ratio information LLR sequence is formed; Step 2-2-8, send the complete log-likelihood ratio information LLR sequence to the LDPC decoder, wait for the LDPC decoder to update the prior information of each bit, and repeat steps 2-2-2 to 2-2-8 again using the updated prior information until the maximum number of iterations N of the inner and outer decoders is reached. i .

5. The method according to claim 4, characterized in that In step 2-2-6, the log-likelihood ratio information LLR is calculated using the following formula: + +…+ ， Among them, k1 represents the kth position in the first segment of the conditional probability information, and k2 represents the kth position in the second segment of the conditional probability information. The Nth r The kth position in the segment, Indicates the Nth r When the bit at position k in the segment is 0, the code segment y from 1 to The probability of bits.

6. The method according to claim 5, characterized in that Step 2-3 includes the following steps: Step 2-3-1, the LDPC decoder receives the LLR sequence of log-likelihood ratio information from the inner decoder and starts decoding. After decoding, the prior probability of each bit is updated and sent to the inner decoder, waiting for the inner decoder to update the initial log-likelihood ratio information, and using the initial log-likelihood ratio information updated by the inner decoder to perform LDPC decoding again and update the prior probability of each bit until the maximum number of iterations N is reached. i ; Step 2-3-2: After reaching the maximum number of iterations, the decoding result Perform cyclic redundancy check CRC; Step 2-3-3, if the cyclic redundancy check CRC passes, the decoding is successful and the decoding result is output The first L1 bits of .

7. The method according to claim 6, characterized in that Steps 2-4 include the following steps: Step 2-4-1, if the cyclic redundancy check CRC fails, calculate the last time the forward and backward algorithm was run and ,in express The corresponding n1 value when taking the maximum value, express Take the n2 value corresponding to the maximum value, shift the starting position of the code segment to the right by n2 bits, and shift the ending position to the left by n1 bits; Step 2-4-2, rerun the process of joint iterative decoding and verification of the inner and outer decoders, i.e., step 2-2-2 to step 2-3-3.

8. The method according to claim 7, characterized in that Steps 2-5 include the following steps: Step 2-5-1, if the cyclic redundancy check CRC in step 2-4-2 fails, slide the starting position of the code segment to the right by t bits, slide the ending position to the left by t bits, and repeat steps 2-2-2 to 2-3-3; Step 2-5-2, if the cyclic redundancy check CRC still fails, continue to detect the next start synchronization code and end synchronization code backward from the position of the end synchronization code, and repeat the decoding process from step 2-2-1 to step 2-5-2. If the decoding result that passes the cyclic redundancy check CRC cannot be obtained until the end of the code stream, the decoding fails.

9. A computer storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 8 are implemented.

10. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 8 are implemented.

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