Potentially occluded rasterization

Abstract

Examples described herein relate to rendering an image using reduced fidelity shading on portions of a triangle that are potentially occluded by other objects. The computer device may pre-fill a potentially occluded depth map in a graphics processing unit (GPU) of a current frame based on depth data of a previous frame, low resolution depth pre-pass, or rasterized occlusion geometry. The GPU may determine, at a rasterization level, that a portion of the triangle being processed is deeper than a corresponding tile in the potentially occluded depth map. The GPU may, in response to determining that the depth of the portion of the triangle is deeper than the depth of the corresponding tile, reduce the fidelity of the shading applied to the at least the portion of the triangle compared to a specified fidelity of the triangle.

Description

Background Art

[0001] The present disclosure relates to computer graphics systems and, more particularly, to rendering images including objects at different depths.

[0002] A computer graphics system can render an image based on multiple objects from the perspective of a camera. As in the real world, when a virtual object is viewed from a certain angle, other objects may block (or occlude) all or part of the view of that object. Generally speaking, closer objects occlude farther objects. In a computer graphics system, overdraw occurs when a closer object is drawn using pixels that already contain another object. The existing pixels are replaced with pixels from the closer object. Typically, overdraw is considered wasteful because the properties of each overdrawn pixel are determined multiple times, using additional processing resources.

[0003] One solution to reduce or eliminate overdraw is to use a depth prepass, which is available on modern graphics processing units (GPUs). In this scheme, each object is rendered twice. In the first iteration, only the closest depth per pixel is recorded into the depth buffer. In the second iteration, only the closest object passes the depth buffer test and writes the pixel data. This avoids overdraw, but at the cost of processing each object twice. This cost can sometimes outweigh the benefit of eliminating overdraw, resulting in a net loss.

[0004] Another solution to reduce overdraw is to perform low-resolution occlusion rendering, typically using a central processing unit (CPU). Low-resolution occlusion geometry is rendered to an occlusion buffer, for example, a box for a building or a rectangle for a wall or fence. This occlusion rendering is used to test a single bounding volume for each object, typically a box. If the entire bounding box is occluded, the software can prevent rendering of that object. However, it is often the case that an object may only be partially occluded, so software occlusion rendering may still render the entire object, resulting in rendering many pixels that are occluded and subsequently overdrawn. Rendering part of an object may result in pixels not being rendered, leaving detectable artifacts in the final image.

[0005] Therefore, there is a need in the art for improved graphics processing to determine how to efficiently render pixels. Summary of the invention

[0006] A simplified overview of one or more implementations of the present disclosure is presented below to provide a basic understanding of these implementations. The present disclosure is not an exhaustive overview of all conceived implementations, nor is it intended to identify important or critical elements of all implementations nor to describe the scope of any or all implementations. Its sole purpose is to present some concepts of one or more implementations of the present disclosure in a simplified form as a preface to a more detailed description that will be presented later.

[0007] In some aspects, the techniques described herein relate to a method of rendering an image, comprising: pre-populating a potentially occluded depth map in a graphics processing unit (GPU) for a current frame based on depth data of a previous frame, a low-resolution depth prepass, or rasterized occluding geometry; determining, at a rasterization stage of the GPU, that a depth of a portion of a triangle being processed is deeper than a depth of a corresponding tile in the potentially occluded depth map; and in response to determining that the depth of the portion of the triangle is deeper than a depth of the corresponding tile, reducing the fidelity of shading applied to at least the portion of the triangle compared to a specified fidelity for the triangle.

[0008] In some aspects, the techniques described herein relate to a method in which pre-populating the potentially occluded depth map for a current frame includes rendering occluding geometry into the potentially occluded depth map.

[0009] In some aspects, the techniques described herein relate to a method in which pre-populating the potentially occluded depth map for a current frame includes reading or projecting a depth buffer from a previous frame.

[0010] In some aspects, the techniques described herein relate to a method in which projecting the depth buffer from the previous frame includes transforming values ​​of the depth buffer from the previous frame by a difference between a camera of the current frame and a camera of the previous frame.

[0011] In some aspects, the techniques described herein relate to a method in which the potentially occluded depth map includes a full-resolution or reduced-resolution copy of values ​​from a depth buffer of the previous frame.

[0012] In some aspects, the technology described herein relates to a method in which determining that a depth of a portion of a triangle being processed is deeper than a depth of the corresponding tile in the potentially occluded depth map includes: projecting the triangle into screen space onto one or more tiles, each tile including one or more pixels having depth; and comparing the depth of each pixel within the tile, or the nearest depth of a set of pixels, to the depth of the corresponding tile in the potentially occluded depth map.

[0013] In some aspects, the techniques described herein relate to a method wherein reducing the fidelity of shading includes reducing a variable rate shading parameter for the corresponding tile.

[0014] In some aspects, the techniques described herein relate to a method wherein the specified fidelity of the triangle is a variable rate shading parameter.

[0015] In some aspects, the techniques described herein relate to a method in which reducing the fidelity of shading includes reducing the number of texture sampling taps or changing the mip bias to facilitate lower resolution mip textures.

[0016] In some aspects, techniques described herein relate to a method in which reducing the fidelity of shading includes indicating to a shader that the fidelity of shading is to be reduced.

[0017] In some aspects, the technology described herein relates to a method wherein, to reduce the fidelity of shading, the shader is configured to perform one or more of the following: reduce the sampling rate of shadows or the frequency with which a shadow map is sampled; reduce the quality of lighting; reduce the number of rays cast; reduce the sample count of volumetric effects; or reduce the accuracy when stepping through a texture map as a volume search for intersection points.

[0018] In some aspects, the techniques described herein relate to a method in which the portion of the triangle includes one or more pixels to be dispatched to a pixel shader.

[0019] In some aspects, the technology described herein relates to a computer device comprising: a memory; and a graphics processing unit (GPU) in communication with the memory, wherein the GPU is configured to: determine at a rasterization level that a depth of a portion of a triangle being processed is deeper than a depth of a corresponding tile in a pre-populated potentially occluded depth map for a current frame; and in response to the depth of the triangle being deeper than the depth of the corresponding tile, reduce the fidelity of shading applied to at least a portion of the triangle compared to a specified fidelity for the triangle.

[0020] In some aspects, the techniques described herein relate to a computer device in which the GPU is configured to render occluding geometry into a potentially occluded depth map to pre-populate a depth data buffer of the current frame.

[0021] In some aspects, the techniques described herein relate to a computer device in which the GPU is configured to read or project the pre-populated potentially occluded depth map from a depth data buffer of a previous frame.

[0022] In some aspects, the techniques described herein relate to a computer device in which, to determine that a depth of a portion of a triangle being processed is deeper than a depth of the corresponding tile in the potentially occluded depth map, a GPU is configured to: project the triangle into screen space onto one or more tiles, each tile including one or more pixels having depth; and compare the depth of each pixel within the tile, or the nearest depth of a set of pixels, to the depth of the corresponding tile in the potentially occluded depth map.

[0023] In some aspects, the techniques described herein relate to a computer device wherein, to reduce fidelity of shading, the GPU is configured to reduce variable rate shading parameters of the corresponding tile.

[0024] In some aspects, the techniques described herein relate to a computer device wherein the specified fidelity of the triangle is a variable rate shading parameter.

[0025] In some aspects, the techniques described herein relate to a computer device wherein, to reduce fidelity of shading, the GPU is configured to reduce the number of texture sampling taps or change the mip bias to facilitate lower resolution mip textures.

[0026] In some aspects, the techniques described herein relate to a computer device wherein, to reduce the fidelity of shading, the GPU is configured to indicate to a shader that the fidelity of shading is to be reduced.

[0027] In some aspects, the techniques described herein relate to a computer device wherein the shader is configured to perform one or more of: reducing the sampling rate of shadows or the frequency with which a shadow map is sampled; reducing the quality of lighting; reducing the number of rays cast; reducing the sample count of volumetric effects; or reducing the accuracy when stepping through a texture map as a volume search for intersection points.

[0028] Additional advantages and novel features related to the implementation of the present disclosure will be set forth in part in the following description and will become apparent in part when those skilled in the art analyze the following or learn from practice thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In the attached picture:

[0030] Figure 1 is a schematic block diagram of an example system for performing depth test based shading according to an implementation of the present disclosure.

[0031] Figure 2 is a diagram of a GPU configured to implement stages of an example logical graphics pipeline that can perform reduced-fidelity shading on potentially occluded pixels in accordance with one implementation of the present disclosure.

[0032] Figure 3 is an example image including a first object partially occluded by a second object according to an implementation of the present disclosure.

[0033] Figure 4 is a flow chart of an example method for rendering an image by reducing the fidelity of shading of potentially occluded pixels according to an implementation of the present disclosure.

[0034] Figure 5 is a schematic block diagram of an example computer device according to an implementation of the present disclosure. DETAILED DESCRIPTION

[0035] The present disclosure provides systems and methods for drawing images on a display with relatively low latency (compared to current solutions). In graphics-intensive computer applications (e.g., video games), the user experience is often improved by increasing the speed at which a particular system can render images. For example, faster rendering can achieve higher frame rates, which users perceive as smoother motion. As another example, faster rendering can allow the use of higher resolutions, more effects, or more content while keeping the frame rate constant.

[0036] Occlusion culling attempts to render graphics faster by removing occluded objects. While occlusion culling is effective in reducing the amount of work, it may be limited in cases where only a portion of an object is occluded. Even when culling is performed at a per-tile or per-pixel level, pixels that should be displayed may be culled, for example due to resolution differences between frames and / or movement or objects. This culling can introduce artifacts of incorrect pixels that may stand out in the image.

[0037] Variable rate shading attempts to render graphics faster by assigning certain parts of the image to a lower shading rate. These parts can be selected on a per-object, per-vertex, or per-primitive or per-screen-space tile basis via a coarse shading rate parameter (SRP) map. While variable rate shading maintains high quality or fidelity for important parts of the image and speeds up rendering of less important parts of the image, variable rate shading does not provide a solution in the case of partial or full occlusion. Variable rate shading relies on the rasterization stage of the rendering pipeline to dispatch shader threads according to variable rate shading. Traditionally, the rasterization stage does not perform any occlusion testing, so variable rate shading is performed at the specified rate regardless of whether the pixel may be overdrawn later.

[0038] In one aspect, for example, the present disclosure provides a system and method for a graphics processing unit (GPU) to determine at a rasterization level whether a portion of a triangle (such as a pixel or tile) is likely to be occluded based on a pre-filled depth data buffer. For portions that are likely to be occluded, the rasterization level can reduce the fidelity of the shading applied to the pixel or set of pixels compared to the specified fidelity for the triangle. As a result, shading can be performed faster because potentially occluded pixels are shaded at a lower fidelity, which uses fewer operations. In addition, in the case where a pixel or set of pixels is indicated as potentially occluded but is ultimately visible, the lower fidelity shading prevents artifacts of unshaded pixels. A human observer is less likely to notice a difference in fidelity for a small number of pixels in a frame, especially on the first frame where those pixels are likely to be visible.

[0039] Reference now Figure 1 , the example computer system 100 includes a computer device 110. The computer device 110 can be, for example, any mobile or fixed computer device, including but not limited to a desktop computer or a laptop computer or a tablet computer, a cellular phone, a gaming device, a mixed reality or virtual reality device, a music device, a television, a navigation system, a camera, a personal digital assistant (PDA), a handheld device, any other computer device with wired and / or wireless connection capabilities to one or more other devices, or any other type of computerized device. The computer device 110 may include a display 112 for displaying a rendered image. The display 112 may be updated periodically at a refresh rate (e.g., 30 Hz-120 Hz). The computer device 110 may use a graphics processing unit (GPU) 120 to provide an image for display on the display 112, the graphics processing unit 120 including: a graphics queue 124 for receiving commands to render objects in an image, and a rendering pipeline 126 including a rasterization stage 160, a depth component 134 for providing depth data, and a pixel shader 162 for reducing the fidelity of segments that may be occluded.

[0040] Computer device 110 may also include CPU 114 that executes instructions stored in memory 116. For example, CPU 114 may execute operating system 140 and one or more applications 150. Operating system 140 may include display controller 142 to control GPU 120. For example, display controller 142 may send rendering commands to GPU 120. In some cases, display controller 142 may execute on CPU 114 to generate occlusion geometry 155, which may be a full resolution or reduced resolution depth rendering of an image.

[0041] The computer device 110 may include a memory 116 and a CPU 114 configured to control the operation of the computer device 110. The memory 116 may be configured to store data and / or computer executable instructions defining and / or associated with an operating system 140 and / or an application 150, and the CPU 114 may execute the operating system 140 and / or the application 150. Examples of the memory 116 may include, but are not limited to, computer-usable memory types such as random access memory (RAM), read-only memory (ROM), tapes, magnetic disks, optical disks, volatile memory, non-volatile memory, and any combination thereof. The memory 116 may store a local version of an application executed by the CPU 114.

[0042] CPU 114 may include one or more processors for executing instructions. Examples of CPU 114 may include, but are not limited to, any processor specifically programmed as described herein, including a controller, a microcontroller, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a system on a chip (SoC), or other programmable logic or state machine. CPU 114 may include other processing components, such as an arithmetic logic unit (ALU), registers, and a control unit.

[0043] Operating system 140 may include instructions, such as applications 150, stored in memory 116 and executable by CPU 114. Operating system 140 may include display controller 142 for controlling GPU 120. For example, display controller 142 may receive objects 148 from applications 150 and provide commands 146 to GPU 120 to perform one or more specific graphics processing operations, such as rendering a source image or performing adjustments.

[0044] The GPU 120 may include one or more processors and dedicated hardware for image processing. In one implementation, the GPU 120 may be integrated with the CPU 114 on the motherboard of the computer device or may be a discrete chip. The GPU 120 may include a dedicated memory 122. The GPU 120 may be connected to the display 112 via a display interface 138. The GPU 120 may periodically scan out an image from the image buffer 128 according to the refresh rate of the display 112 to reach the display 112 via the display interface 138.

[0045] The GPU 120 may include a graphics queue 124, a rendering pipeline 126, a depth component 134, and a potential occluded depth map 129. The potential occluded depth map 129 may include depth values ​​representing the depth of the nearest object for each screen space tile. The graphics queue 124 may receive commands for rendering images from the display controller 142. The graphics queue 124 may generally provide commands to the rendering pipeline 126. The rendering pipeline 126 may perform multiple stages of image processing. For example, the rendering pipeline 126 may include an input assembler stage, a vertex shader stage, a hull shader stage, a tessellator stage, a domain shader stage, a geometry shader stage, a stream output stage, a rasterization stage, a pixel shader stage, and an output merger stage.

[0046] In one aspect, the depth component 134 can make the rasterization stage 160 and / or the pixel shader 162 occlusion-aware to reduce the fidelity of shading of pixels or sets of pixels (e.g., fragments) that may be occluded. For example, the depth component 134 can be part of the rasterization stage 160, after the rasterization stage 160, or before the pixel shader 162. The depth component 134 can access the potentially occluded depth map 129 representing the depth of the objects closest to the camera for each screen space tile to determine whether the fragment being processed is likely to be occluded. In some implementations, the rasterization stage 160 can be referred to as a rasterizer or scan converter. A shader is a piece of code that runs on a dedicated processing unit (also called a shader unit or shader processor), typically executing multiple data threads at a time, and is programmed to generate the appropriate level of color and / or special effects for the fragment being rendered. Specifically, for example, the pixel shader 162 processes the characteristics of the pixel (texture value, color, z depth, and alpha value). The pixel shader 162 can be provided by the application 150.

[0047] The GPU 120 may include one or more depth buffers for storing depth data related to occlusion. For example, the depth buffer may include full-resolution depth data 136 and / or a layered depth buffer 130, which may also be referred to as a layered z buffer or HZB. The layered depth buffer 130 may also include metadata 132, which may include additional information about a pixel group. For example, the layered depth buffer 130 and metadata 132 may include information about a pixel group called a tile. A tile may be a single pixel (1x 1), a quadrilateral (2x 2), or a larger size, such as 4x 4 or 8x 8. The layered depth buffer 130 contains the minimum and / or maximum depth values ​​of the pixel set contained in the tile. These minimum and maximum depth values ​​may be conservatively quantized, for example using 14 bits or 16 bits, while the full-resolution depth data 136 may be stored using more bits (e.g., 32 bits). Therefore, the layered depth buffer 130 may have a lower precision than the actual GPU 120 calculation. The metadata 132 may also include clear status bits and other data for accelerating depth testing or clearing operations. The minimum and maximum depth values ​​of the hierarchical depth buffer 130 may be packed together with other values ​​of the metadata 132 to form a complete machine word, such as 32-bit data, or they may be stored separately.

[0048] In one aspect, the potentially occluded depth map 129 may be pre-populated. For example, the depth component 134 may pre-populate the potentially occluded depth map 129 based on depth data generated by the CPU 114 or the GPU 120. The potentially occluded depth map 129 may be based on depth data of a previous frame, a low-resolution depth pre-pass, or rasterized occluding geometry. For example, the CPU 114 may execute a depth pre-pass component 152 including a depth renderer that generates occluding geometry 155. The depth pre-pass component 152 may include a sampler 156 that copies sampled depth values ​​158 from the occluding geometry into the potentially occluded depth map 129. In some implementations, the occluding geometry 155 may be rendered at the same resolution as the potentially occluded depth map 129. In some implementations, the occluding geometry may be rendered directly into the potentially occluded depth map 129. As another example, the depth component 134 can read or project a depth buffer (e.g., the layered depth buffer 130 or the full-resolution depth data 136) from a previous frame into the potentially occluded depth map 129 of the current frame. Projecting the depth buffer from the previous frame can include transforming the values ​​of the depth buffer from the previous frame by the difference between the camera of the current frame and the camera of the previous frame. The potentially occluded depth map can include a full-resolution copy or a reduced-resolution copy or projection of the values ​​of the depth buffer from the previous frame.

[0049] In one example, display interface 138 may be communicatively coupled to GPU 120 and / or memory 122 for communicating with display 112. Display interfaces referred to herein may also include various types of ports, including a High Definition Multimedia Interface (HDMI) port, a Display Serial Interface (DSI) port, a Mobile Industry Processor Interface (MIPI) DSI port, a Universal Serial Bus (USB) port, a FireWire port, or other embedded or external wired or wireless display ports that may allow communication between computer device 110 and display 112.

[0050] The applications 150 may include graphics components involved in rendering images to the display 112. For example, the applications 150 may include a video game that renders a series of images to the display 112 at a certain frame rate. Typically, application developers may seek to improve the user experience by maximizing frame rate, resolution, color depth, or other image attributes, or by letting the user select such attributes. One or more applications 150 may include a depth pre-pass component 152 for pre-populating a potentially occluded depth map. The depth pre-pass component 152 may include a depth renderer 154 for rendering occluding geometry 155 to pre-populate the potentially occluded depth map 129 based on sampled depth values ​​158 of the occluding geometry 155.

[0051] The depth renderer 154 may include instructions for performing only depth rendering of the scene to generate occlusion geometry 155. The occlusion geometry 155 may have the same resolution as the final full-resolution image or a lower resolution. For example, the lower resolution may be one-quarter, one-eighth, or less of the full resolution. The depth renderer 154 may instruct the CPU 114 or the GPU 120 to perform only depth rendering. In some implementations, because only depth rendering may omit some processing-intensive pixel-level operations, the CPU 114 or the GPU 120 may be able to quickly perform only depth rendering. The application designer may select whether the CPU 114 or the GPU 120 performs only depth rendering based on the specific needs of the application 150 and other work performed on each of the CPU 114 or the GPU 120. The occlusion geometry 155 generated by only depth rendering may include a depth value for each pixel of the screen space in the only depth rendering. The depth value 158 may be the depth of the nearest object / surface rendered. When the resolution of the depth data is less than the full resolution, the depth value 158 may be the depth value that is farthest from the corresponding depth value set of the higher resolution depth data. A larger depth value 158 may indicate that the object is farther from the camera or screen, or if the application is employing a Reverse-Z algorithm, a smaller depth value 158 may indicate that the object is farther from the camera. The sampler 156 may sample the depth values ​​158 of the occluding geometry 155 for pre-populating the potentially occluded depth map 129. In some implementations, the depth renderer 154 may render the occluding geometry 155 directly into the potentially occluded depth map 129.

[0052] In one aspect, the depth component 134 may operate at or between the rasterizer stage 160 and the pixel shader 162 to reduce processing of occluded pixels. For example, the rasterizer stage 160 may output a pixel or a group of pixels. The depth component 134 may perform a Z test 164 to compare the depth of the pixel or group of pixels with the depth buffer of the current frame (e.g., the layered depth buffer 130 or the full-resolution depth data 136). However, the depth buffer of the current frame does not include the depth of objects that have not yet been drawn for the current frame. Therefore, even if a portion of a triangle passes the Z test 164, that portion of the triangle may subsequently be overdrawn. In one aspect, the depth component 134 may attempt to reduce the fidelity of pixels that may be overdrawn based on the potential occluded depth map 129. For example, the depth component 134 may be configured to perform a fidelity test 166 to compare the depth of the pixel or group of pixels being processed with the depth stored in the potential occluded depth map 129. If a portion of a pixel or group of pixels being processed is farther away than a corresponding tile of the potentially occluded depth map 129 , the depth component 134 may reduce the fidelity of the portion of the triangle when providing the portion of the triangle to the pixel shader 162 .

[0053] refer to Figure 2 For example, in one example, GPU 120 can be configured to implement various stages of an example logical graphics pipeline 214 that can perform reduced-fidelity shading of occluded pixels, as described herein. In one aspect, one or more of the various stages can be programmable, for example, to utilize or modify a sampling rate parameter (SRP) value. SRP can be a parameter for variable rate shading and can alternatively be referred to as a shading rate parameter. In addition, in one aspect, a common shader core can be represented by a rounded rectangular block. This programmability makes the graphics pipeline 214 extremely flexible and adaptable. The purpose of each stage is briefly described below, and additional functionality will be further described with reference to subsequent figures.

[0054] The input assembler stage 280 provides data (triangles, lines, points and indices) to the pipeline.

[0055] Vertex shader stage 282 processes vertices, typically performing operations such as transformation, skinning, and lighting. Vertex shader stage 82 takes a single input vertex and produces a single output vertex. Moreover, as indicated at 210, vertex shader stage 282 optionally outputs SRPv, which is calculated or looked up. In some implementations, logical graphics pipeline 214 may include mesh shader stage 283. An application may choose to use vertex shader stage 282 or mesh shader stage 283. A mesh shader may perform the same work as a vertex shader, but in addition, a mesh shader may process triangles, including culling or generating any primitive data, including shading rates. It should be noted that in some implementations, such as when a high-order surface is used, SRPv comes from shell shader stage 284.

[0056] The hull shader stage 284, the tessellator stage 286, and the domain shader stage 288 comprise a tessellation stage. The tessellation stage converts the high-order surface into triangles, e.g., primitives, as indicated at 222, for rendering within the logical graphics pipeline 214. Optionally, as indicated at 211, the hull shader stage 284 may generate an SRPv value for each vertex of each generated primitive (e.g., triangle).

[0057] The geometry shader stage 290 optionally processes entire primitives 222 (e.g., the stage may be bypassed). Its input may be a complete primitive 222 (three vertices for a triangle, two vertices for a line, or a single vertex for a point), a quadrilateral, or a rectangle. In addition, each primitive may also include vertex data for any edge-neighboring primitives. This may include up to three additional vertices for a triangle or two additional vertices for a line. The geometry shader stage 290 also supports limited geometry magnification and de-magnification. Given an input primitive 222, the geometry shader may discard the primitive, or issue one or more new primitives. Each primitive emitted outputs an SRPv for each vertex.

[0058] The stream output stage 292 streams primitive data from the graphics pipeline 214 to the graphics memory 122 on the way to the rasterization stage 160. Data can be streamed out and / or passed to the rasterization stage 160. Data streamed out to the graphics memory 122 can be recycled back into the graphics pipeline 214 as input data or read back from the CPU 114 ( Figure 1 ). This stage can optionally stream out SRPv values ​​for use in subsequent rendering passes.

[0059] The rasterizer stage 160 clips primitives, prepares primitives for the pixel shader stage 296, and determines how to invoke the pixel shader 162. In addition, the rasterizer stage 160 performs coarse scan conversion and determines per-fragment variable rate shading parameter values ​​(SRPf) (e.g., where a fragment may be a tile, sub-tile, quad, pixel, or sub-pixel region), as generally indicated at 218. Additionally, the rasterizer stage 160 performs fine scan conversion and determines the pixel sample locations covered by the fragment.

[0060] In addition, the rasterizer 160 may also obtain a lookup value (SRPm) from the coarse SRP map 216, as indicated at 217. The lookup value corresponds to a shading rate specified for a larger area, such as the screen space of an image or the entire image. Additionally, the rasterizer 160 may calculate SRPf as a function of the SRPv and the lookup value (SRPm), as described in further detail below.

[0061] The pixel shader stage 296 receives interpolated data of primitives and / or fragments and generates per-pixel data, such as color and sample coverage masks. The pixel shader stage 296 can use one thread for one or more pixels to operate on one or more pixels at a time. The pixel shader thread set can be executed in the form of waves, usually with 8, 16, 32 or 64 pixels per wave. On the one hand, the pixel shader stage 296 may include a pixel shader 162, which is configured to perform pixel shading with reduced fidelity based on instructions from the rasterization stage 160, or alternatively, the pixel shader 162 can load a potential occluded depth map 129 and perform comparison operations. In some implementations, the rasterization stage 160 can group pixels designated for reduced fidelity into the same wave. All potentially occluded pixels in the wave can use the same code path in the pixel shader. Potentially unoccluded pixels can also be grouped into waves, and all use different code paths in the pixel shader.

[0062] Output merger stage 298 combines the various types of pipeline output data (pixel shader values, depth and stencil information, and coverage masks) with the contents of the render target and depth / stencil buffers to generate the final result for graphics pipeline 14. Output merger stage 298 may cause overdrawing of depth-based pixels.

[0063] Furthermore, as described above and as Figure 2 As illustrated, the graphics pipeline 214 can operate in conjunction with the graphics memory 122 to exchange and store data. For example, in one aspect, the graphics memory 122 includes one or more vertex buffers 202, each of which contains vertex data for defining the geometry of an image. The vertex data includes position coordinates, color data, texture coordinate data, normal data, etc. The simplest example of a vertex buffer 202 is a vertex buffer that contains only position data. More commonly, a vertex buffer 202 contains all the data required to fully specify a 3D vertex. An example of this can be a vertex buffer 202 that contains each vertex position, normal, and texture coordinate. This data is typically organized as a set of per-vertex elements.

[0064] Additionally, in one aspect, graphics memory 122 may include one or more index buffers 203 that contain integer offsets to vertex buffers 202 and are used to more efficiently render primitives 222. Each index buffer 203 contains a set of consecutive indices; each index is used to identify a vertex in vertex buffer 202.

[0065] Also, in one aspect, graphics memory 122 may include one or more constant buffers 204 that allow efficient supply of shader constants, shader data, and / or any other shader resources to graphics pipeline 214. Furthermore, constant buffers 204 may be used to store results of stream output stage 292. Furthermore, graphics memory 122 may include one or more texture buffers or texture data 205, such as a bitmap of pixel colors that give an object a textured appearance.

[0066] Additionally, in one aspect, graphics memory 122 may include one or more out-of-order access resources 206 (which include buffers, textures, and texture arrays—without multisampling). An out-of-order access resource 206 allows temporary out-of-order read / write access from multiple threads. This means that this resource type can be read / written by multiple threads simultaneously without creating memory conflicts by using certain defined functions.

[0067] Furthermore, in one aspect, graphics memory 122 may include one or more render target buffers 208 that contain a rendered target or drawing for each pixel of an image produced by graphics pipeline 214 .

[0068] As described in more detail below with respect to a method of operation of a graphics pipeline 214 according to the described aspects, the rasterizer stage 160 can consider possible occlusion when dispatching threads to the pixel shader stage 296. The graphics memory 122 can include a potentially occluded depth map 129. The rasterizer stage 160 can access the potentially occluded depth map 129 and compare the depth data with a portion of a triangle (e.g., a fragment or tile) being processed. For example, the rasterizer stage 160 can compare the depth of the fragment with the depth 230 of the corresponding tile in the potentially occluded depth map 129 to determine whether the fragment is likely to be occluded. When the depth of the fragment is farther from the camera than the depth 230 of the corresponding tile in the potentially occluded depth map 129, the fragment is likely to be occluded. In implementations where a fragment includes multiple pixels, there can be one or more comparisons made to the potentially occluded depth map 129, or a single comparison can be made to the potentially occluded depth map 129 using the nearest depth of one or more pixels. If a fragment is likely to be occluded, the rasterizer stage 160 may reduce the fidelity of the shading applied to the fragment.

[0069] In some implementations, the rasterizer stage 160 may reduce the SRP (e.g., SRPf) of a fragment based on possible occlusion. For example, as mentioned above, the mesh shader stage 283 and / or the vertex shader stage 282 are configured to determine a per-vertex SRP value (SRPv) 210 for each vertex of each primitive 222 of the image. For example, the per-vertex SRP value (SRPv) 210 may be determined based on one or more SRP values ​​per object (SRPo), an SRP value per primitive (SRPp), or an SRPp value (SRPf) provided by the application 150. Figure 1 ) to determine the SRPv value 210 for each vertex, for example at 212, and / or by the mesh shader stage 283, for example at 215. The rasterizer stage 160 may receive the SRPm value 217 from the coarse SRP map 216. In addition, the rasterizer stage 160 may interpolate and quantize the corresponding SRPv values ​​210 for different sub-tiles or fragments of each primitive 222 to define an SRP value (SRPf) 218 ​​for each fragment. If the depth of a portion of a triangle is deeper than the depth in the potentially occluded depth map 129, the rasterizer stage 160 may reduce the SRPf 218 of the portion of the triangle. That is, the rasterizer stage 160 may set the SRPf 218 of the portion of the triangle (e.g., the fragment) to a lower value than it would otherwise be set (e.g., based on the SRPv and SRPm values). For example, rasterizer stage 160 may set SRPf 218 to a minimum value (eg, 1 / 4) or to a coarser value than provided (eg, full rate to half rate, or half rate to quarter rate, etc.).

[0070] In some implementations, the rasterizer 160 may reduce another shading parameter, such as the number of texture sampling taps or the mip (multi-level asymptotic) texture bias. For example, the rasterizer 160 may reduce the number of texture sampling taps of one or more textures whose values ​​contribute to a pixel when dispatching a pixel shader thread. As another example, the rasterizer 160 may change the mip bias of one or more textures to facilitate lower resolution mip textures.

[0071] In some implementations, the rasterization stage 160 can indicate to the shader that the fidelity of the shading will be reduced. For example, when dispatching a pixel shader thread, the rasterization stage 160 can indicate a specific fidelity level or the pixel shader 162 will use a reduced fidelity. Because the shader can be programmed for a separate application, the pixel shader 162 can have a great degree of flexibility in how to achieve reduced fidelity. In some implementations, the pixel shader can rely on parameters (e.g., SRP) provided by the rasterization stage 160 to perform reduced fidelity shading. In some implementations, the pixel shader 162 can be programmed to perform zero or more actions based on the instructions. For example, the pixel shader 162 can reduce the sampling rate of the shadow or the frequency of sampling the shadow map. The rasterization stage 160 can specify the sampling rate or sampling frequency of the shadow, or the rasterization stage can indicate the reduced fidelity and the pixel shader 162 can select a lower or minimum rate or frequency. As another example, the pixel shader can reduce the lighting quality or apply global lumens. As another example, the pixel shader 162 can reduce the number of rays cast. For example, reducing the number of rays cast can include generating occlusion terms, soft shadows, area light shadows, or sampling reflected radiance. As another example, the pixel shader 162 can reduce the sample count of volumetric effects such as fog or atmospheric scattering. As yet another example, the pixel shader 162 can reduce the accuracy when stepping through the texture map as a volume search for intersection points. Reduced fidelity can include any action that reduces the runtime of the pixel shader 162.

[0072] Reference now Figure 3 For example, example image 300 generated by graphics pipeline 214 includes vehicle 310 and building 320. Building may be drawn as one or more large triangles 330. Vehicle 310 may be closer to the camera and occlude some portions of building 320. Separate variable rate shading may result in high fidelity shading being performed on occluded pixels.

[0073] For some implementations of variable rate shading, different shading rates may be specified for different areas of the image. In some implementations, the shading rate may be specified based on anti-aliasing (AA), which indicates the number of coverage samples evaluated by the rasterization stage 160 for each pixel and included in the coverage mask. For example, shading rates, such as but not limited to 1 / 4xAA, 1xAA, 2xAA, 4xAA, may be specified for the area according to the level of detail of different parts or areas of the image 300. For example, the shading rate may be represented by a rough SRP map 216. In some implementations, a shading rate may be specified for each object, each primitive (e.g., triangle 330), or each vertex. In any case, some parts of the building 320 may be assigned a relatively high shading rate compared to other parts of the image. For example, the portion of the building 320 behind the vehicle 310 may be located in a high level of detail area of ​​the image (e.g., because the vehicle is important) and / or the building itself may be associated with a high shading rate. However, because some parts of the wall are blocked by the vehicle 310, a high shading rate will result in a waste of effort or time because the rendered pixels will be overdrawn.

[0074] In one aspect, when the rasterizer 160 is dispatching threads for the triangle 330 corresponding to the building 320, the rasterizer 160 compares the depth of each fragment being processed to the potentially occluded depth map 129 to determine whether to reduce the fidelity of the fragment. For example, a fragment can be a single pixel or a group of pixels. For example, a triangle can include fragments 322, 324, and 326. The rasterizer 160 can process each fragment 322, 324, 326 and dispatch a corresponding pixel shader thread or threads.

[0075] In the illustrated example, the fragment 322 is completely occluded by the vehicle 310. Therefore, the rasterizer 160 can reduce the fidelity of the fragment 322. For example, although the coarse SRP map 216 indicates that the SRP of the area including the fragment 322 is 4xAA, the rasterizer 160 can set a minimum SRP (e.g., 1 / 4xAA). The rasterizer 160 can similarly reduce other SRP values. The rasterizer 160 can alternatively or additionally reduce the fidelity based on texture sampling or by indicating a lower fidelity to the pixel shader.

[0076] As shown, fragment 324 is partially occluded by vehicle 310. That is, depending on the resolution of potentially occluded depth map 129 and the size of fragment 324, a comparison of the depth of fragment 324 with the depth of the corresponding tile in potentially occluded depth map 129 may indicate that fragment 324 is farther or closer than potentially occluded depth map 129. For example, if the nearest pixel of building 320 is compared to the depth corresponding to the portion of vehicle 310, the entire fragment 324 may be considered farther away and potentially occluded. In some implementations, if potentially occluded depth map 129 is based on a previous frame, vehicle 310 may also have moved, thereby changing whether fragment 324 is occluded. If the fragment (or subset of pixels) is not actually occluded and the fidelity of fragment 324 is reduced, the general properties of shading will be correct and the reduced fidelity may be difficult to detect. If the fragment (or subset of pixels) is actually occluded and the fidelity of the fragment 324 is not reduced, the additional processing of the small number of incorrectly determined fragments is still less than performing high-fidelity processing on all occluded fragments. Therefore, reducing fidelity based on potential occlusion can provide desired or acceptable results for boundary or blurred fragments.

[0077] As shown, the fragment 326 is not occluded by the vehicle 310. Therefore, the rasterizer stage 160 may not reduce the fidelity of the fragment 326, thereby providing high-fidelity shading as indicated.

[0078] Reference now Figure 4 , the example method 400 provides a computer device 110 to render a potentially occluded portion of a triangle at reduced fidelity. For example, the method 400 may be performed by performing graphics processing using a GPU 120. In some implementations, some blocks of the method 400 may be performed by an application 150 executing on a CPU 114.

[0079] In block 410, method 400 may include pre-populating a potentially occluded depth map based on depth data of a previous frame, a low-resolution depth pre-pass of a current frame, or rasterized occlusion geometry of a current frame. For example, GPU 120 or CPU 114 may pre-populate potentially occluded depth map 129 based on depth data of a previous frame, a low-resolution depth pre-pass of a current frame, or rasterized occlusion geometry of a current frame. In some implementations, at sub-block 412, block 410 may include rendering occlusion geometry into the potentially occluded depth map. For example, application 150 may execute depth renderer 154 to render occlusion geometry 155 into potentially occluded depth map 129. Depth renderer 154 may render occlusion geometry 155 on CPU 114 or GPU 120. As another example, at sub-block 414, block 410 may optionally include reading or projecting a depth buffer from a previous frame. For example, the GPU 120 may read the layered depth buffer 130 from the previous frame or project it into the potentially occluded depth map 129 of the current frame. Sub-block 414 may include transforming the values ​​of the depth buffer from the previous frame by the difference between the camera of the current frame and the camera of the previous frame at sub-block 416. For example, the GPU 120 may project the layered depth buffer 130 by transforming the values ​​of the depth buffer by the difference between the camera of the current frame and the camera of the previous frame.

[0080] In some implementations, the potentially occluded depth map may be at a reduced resolution, such as a fraction of the full resolution. In one implementation, the reduced resolution may be one-eighth of the full resolution. For example, a 4k frame (3840 x 2160 pixels) may use a reduced resolution of 270p (480 x 270 pixels). One pixel of the occluding geometry 155 may correspond to one pixel on the potentially occluded depth map, or multiple pixels in the occluding geometry 155 may correspond to one pixel in the potentially occluded depth map, in which case the nearest depth value is selected for each corresponding pixel. Other resolutions may also be selected based on available processing resources of, for example, the CPU 114 or the GPU 120. In some implementations, the potentially occluded depth map includes a full-resolution or reduced-resolution copy of the values ​​from a previous frame.

[0081] At block 420, method 400 may include determining, at a rasterization stage of the GPU, that a portion of a triangle being processed has a depth that is deeper than a depth of a corresponding tile in the potentially occluded depth map. For example, rasterization stage 160 may determine that a portion of triangle 330 being processed has a depth that is deeper than a depth of a corresponding tile in potentially occluded depth map 129. In some implementations, at sub-block 422, block 420 may optionally include projecting the triangle into screen space onto one or more tiles, each tile including one or more pixels having depth. For example, rasterization stage 160 may project triangle 330 into screen space. Triangle 330 includes, for example, fragments 322, 324, 326, which may be projected as tiles including one or more pixels. At sub-block 424, block 420 may optionally include comparing the depth of each tile of the triangle to the depth of a corresponding tile in the potentially occluded depth map. For example, the rasterizer 160 may compare the depth of each tile of the triangle 330 (eg, corresponding to the fragments 322 , 324 , 326 ) to the depth of the corresponding tile in the potentially occluded depth map 129 .

[0082] At block 430, the method 400 may include, in response to determining that the depth of the portion of the triangle is deeper than the depth of the corresponding tile, reducing the fidelity of shading applied to at least the portion of the triangle compared to a specified fidelity for the triangle. For example, in one implementation, the rasterizer 160 may reduce the fidelity of shading applied to at least a portion of the triangle (e.g., the fragments 322, 324, 326) compared to the specified fidelity for the triangle in response to block 420. In some implementations, in block 432, block 430 may optionally include reducing a variable rate shading parameter (e.g., SRP) for the corresponding tile. In some implementations, in block 434, block 430 may optionally include reducing a number of texture sampling taps or changing a mip bias to facilitate lower resolution mip textures. In some implementations, in block 436, block 430 may optionally include indicating to a shader (e.g., the pixel shader 162) that the fidelity of shading is to be reduced. For example, rasterizer stage 160 may indicate that shading is to be reduced or specify a reduced shading level when dispatching a pixel shader thread.

[0083] Reference now Figure 5 , shows an example computer device 500 according to an implementation, which includes Figure 1In one example, computer device 500 may include processor 48 for performing processing functions associated with one or more components and functions described herein. Processor 48 may include a single or multiple sets of processors or a multi-core processor. In addition, processor 48 may be implemented as an integrated processing system and / or a distributed processing system. In one implementation, for example, processor 48 may include CPU 114 and / or GPU 120. In one example, computer device 500 may include memory 50 for storing instructions that can be executed by processor 48 to perform the functions described herein. In one implementation, for example, memory 50 may include memory 116 and / or memory 122.

[0084] In addition, the computer device 500 may include a communication component 52 that provides for establishing and maintaining communications with one or more parties using hardware, software, and services as described herein. The communication component 52 may host communications between components on the computer device 110 and between the computer device 110 and external devices (such as devices located on a communication network and / or devices connected serially or locally to the computer device 110). For example, the communication component 52 may include one or more buses and may further include a transmit chain component and a receive chain component associated with a transmitter and a receiver, respectively, which are operable to interface with external devices.

[0085] In addition, computer device 500 may include data storage 54, which may be any suitable combination of hardware and / or software that provides mass storage of information, databases, and programs employed in conjunction with the implementations described herein. For example, data storage 54 may be operating system 140 ( Figure 1 ) and / or application 150( Figure 1 ) data repository.

[0086] The computer device 500 may also include a user interface component 56 that is operable to receive input from a user of the computer device 500 and is also operable to generate output for presentation to the user. The user interface component 56 may include one or more input devices, including but not limited to a keyboard, a numeric keypad, a mouse, a touch-sensitive display, a digitizer, a navigation key, a function key, a microphone, a voice recognition component, any other mechanism capable of receiving input from a user, or any combination thereof. In addition, the user interface component 56 may include one or more output devices, including but not limited to a display (e.g., display 112), a speaker, a tactile feedback mechanism, a printer, any other mechanism capable of presenting output to a user, or any combination thereof.

[0087] In one implementation, the user interface component 56 may transmit and / or receive messages corresponding to the operation of the operating system 140 and / or the application 150. In addition, the processor 48 executes the operating system 140 and / or the application 150, and the memory 50 or the data storage 54 may store them.

[0088] As used in this application, the terms "component", "system", etc. are intended to include computer-related entities, such as but not limited to hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component can be, but not limited to: a process running on a processor, a processor, an object, an executable code, a thread of execution, a program, and / or a computer. As an illustration, both an application running on a computer device and a computer device can be a component. One or more components may reside in a process and / or a thread of execution, and a component may be located on a computer and / or distributed between two or more computers. In addition, these components can be executed from various computer-readable media having various data structures stored thereon. These components can communicate through local and / or remote processes, such as according to a signal having one or more data packets, such as, in a local system, a distributed system, and / or across a network (such as the Internet) with other systems, data that a component interacts with another component through a signal.

[0089] Furthermore, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless specified otherwise or clear from the context, the phrase "X employs A or B" is intended to mean any of the natural inclusive permutations. That is, the phrase "X employs A or B" is satisfied by any of the following instances: X employs A; X employs B; or X employs both A and B. In addition, the articles "a" and "an" as used in this application and the appended claims should generally be construed to mean "one or more" unless stated otherwise or clear from the context to be directed to the singular form.

[0090] Various implementations or features may have been presented in terms of systems that may include multiple devices, components, modules, etc. It should be understood and appreciated that the various systems may include additional devices, components, modules, etc. and / or may not include all of the devices, components, modules, etc. discussed in conjunction with the figures. Combinations of these approaches may also be used.

[0091] The actions of the various illustrative logics, logic blocks, and methods described in conjunction with the embodiments disclosed herein may be implemented or performed using a specially programmed general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in an alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computer devices, for example, a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. In addition, at least one processor may include one or more components operable to perform one or more of the above steps and / or actions.

[0092] In addition, the steps and / or actions of the methods or procedures described in conjunction with the implementation disclosed herein can be implemented directly in hardware, in a software module executed by a processor, or in a combination of the two. The software module can reside in a RAM memory, a flash memory, a ROM memory, an EPROM memory, an EEPROM memory, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium can be coupled to a processor so that the processor can read information from the storage medium and write information to the storage medium. In an alternative, the storage medium can be integrated into the processor. In addition, in some implementations, the processor and the storage medium can reside in an ASIC. In addition, the ASIC can reside in a user terminal. In an alternative, the processor and the storage medium can reside in a user terminal as discrete components. In addition, in some implementations, the steps and / or actions of the methods or procedures can reside as one or any combination or set of codes and / or instructions on a machine-readable medium and / or a computer-readable medium, and these steps and / or actions can be incorporated into a computer program product.

[0093] In one or more implementations, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, each function may be stored on or transmitted by a computer-readable medium as one or more instructions or codes. Computer-readable media include both computer storage media and communication media, including any media that facilitates the transfer of a computer program from one place to another. Storage media may be any available medium that can be accessed by a computer. As an example and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage or other magnetic storage devices, or any other medium that can be used to carry or store the desired program code in the form of an instruction or data structure and can be accessed by a computer. As used herein, disks and discs include compact discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks, and blue-ray discs, wherein disks often reproduce data magnetically, and discs usually reproduce data optically with lasers. The above combination should also be included in the scope of computer-readable media.

[0094] Although each implementation of the present disclosure has been described in conjunction with its examples, it will be appreciated by those skilled in the art that changes and modifications may be made to the above implementations without departing from the scope of the present invention. Other implementations will be apparent to those skilled in the art by considering the specification or practicing according to the examples disclosed herein.

Claims

1. A computer device comprising: Memory; as well as a graphics processing unit (GPU) in communication with the memory, wherein the GPU is configured to: determining that a depth of a portion of a triangle being processed is deeper than a depth of a corresponding tile in a pre-filled depth data buffer for a current frame; as well as In response to the depth of the triangle being deeper than the depth of the corresponding tile, a fidelity of shading applied to at least a portion of the triangle is reduced compared to a specified fidelity for the triangle.

2. The computer device according to claim 1, wherein: The GPU is configured to render occluding geometry into a potentially occluded depth map to pre-populate a depth data buffer for the current frame.

3. The computer device according to claim 1, wherein: The GPU is configured to read depth values ​​from a previous frame or project the pre-filled depth data buffer therefrom.

4. The computer device according to any one of claims 1 to 3, characterized in that: To determine that the depth of the portion of the triangle being processed is deeper than the depth of the corresponding tile in the pre-filled depth data buffer, the GPU is configured to: Projecting the triangle into screen space onto one or more tiles, each tile comprising one or more pixels having depth; as well as The depth of each pixel, or the most recent depth of a set of pixels, within a tile is compared to the depth of the corresponding tile in the pre-filled depth data buffer.

5. The computer device according to any one of claims 1 to 4, characterized in that: To reduce shading fidelity, the GPU is configured to reduce variable rate shading parameters of the corresponding tile.

6. The computer device according to any one of claims 1 to 5, characterized in that: The specified fidelity of the triangle is a variable rate shading parameter.

7. The computer device according to any one of claims 1 to 6, characterized in that: To reduce shading fidelity, the GPU is configured to reduce the number of texture sampling taps or change the mip bias to facilitate lower resolution mip textures.

8. The computer device according to any one of claims 1 to 6, characterized in that: To reduce the fidelity of shading, the GPU is configured to indicate to the shader that the fidelity of shading is to be reduced.

9. The computer device according to claim 8, characterized in that The shader is configured to perform one or more of the following: Reduce the shadow sampling rate or how often the shadow map is sampled; Reduced lighting quality; Reduce the number of rays cast; Reduce the sample count for volume effects; or Reduced accuracy when marching through a texture map as a volume search for intersection points.

10. A method for rendering an image, comprising: pre-populating a potential occluded depth map in a graphics processing unit (GPU) of a current frame based on depth data of a previous frame, a low-resolution depth pre-pass of the current frame, or rasterized occluded geometry of the current frame; determining, at the GPU, that a depth of a portion of a triangle being processed is deeper than a depth of a corresponding tile in the potentially occluded depth map; as well as In response to determining that the depth of the portion of the triangle is deeper than the depth of the corresponding tile, the fidelity of shading applied to at least the portion of the triangle is reduced compared to a specified fidelity for the triangle.

11. The method according to claim 10, characterized in that Pre-populating the potentially occluded depth map for a current frame includes rendering occluding geometry into the potentially occluded depth map.

12. The method according to claim 10, characterized in that Pre-populating the potentially occluded depth map for the current frame includes reading or projecting a depth buffer from a previous frame.

13. The method according to any one of claims 10 to 12, characterized in that Determining that a depth of a portion of a triangle being processed is deeper than a depth of the corresponding tile in the potentially occluded depth map comprises: Projecting the triangle into screen space onto one or more tiles, each tile comprising one or more pixels having depth; and The depth of each pixel, or the nearest depth of a set of pixels, within a tile is compared to the depth of the corresponding tile in the potentially occluded depth map.

14. The method according to claim 10, characterized in that Reducing the fidelity of shading includes reducing variable rate shading parameters of the corresponding tile, reducing the number of texture sampling taps, or changing the mip bias to facilitate lower resolution mip textures.

15. The method according to claim 10, characterized in that Reducing the fidelity of shading includes indicating to the shader that the fidelity of shading is to be reduced.

Images