Epitaxial base and epitaxial equipment

Abstract

This application discloses an epitaxial substrate and epitaxial equipment, belonging to the field of silicon wafer manufacturing technology. The epitaxial substrate includes a support portion and a limiting portion. The limiting portion includes a first body and a first protrusion. The first body is disposed along the circumferential direction and connected to the support portion. The first body has a first reference surface in the axial direction, and the first protrusion is connected to the first reference surface. The first protrusion has opposing first and second surfaces in the circumferential direction. The first and second surfaces are connected to the first reference surface and can extend from the first reference surface in a direction away from the first body. The distance between the first and second surfaces in the circumferential direction decreases along the axial direction. This application, by setting the first protrusion, blocks the airflow blown radially from the outside of the substrate towards the silicon wafer at locations where the silicon wafer growth rate is relatively fast, thereby making the growth rate of the silicon wafer more uniform throughout, and thus enabling the silicon wafer to achieve better flatness after epitaxy.

Description

Technical Field

[0001] This application belongs to the field of silicon wafer manufacturing technology, specifically relating to epitaxial substrates and epitaxial equipment. Background Technology

[0002] Silicon wafer epitaxial growth is a key process used to manufacture semiconductor devices. During the growth process, silicon substrate is heated and silicon gas is transported to the reaction chamber. With appropriate temperature control, silicon atoms are deposited on the surface and gradually form a polycrystalline silicon or monocrystalline silicon layer.

[0003] However, during the epitaxial growth of silicon wafers, various factors cause different growth rates in different directions. These different growth rates result in uneven surfaces on the epitaxial silicon wafers, leading to significant thickness differences in different parts of the wafers. Consequently, the surface flatness of the silicon wafers is low, and silicon wafers with low flatness can no longer meet the requirements of small linewidth production and usage needs. Summary of the Invention

[0004] Purpose of the invention: This application provides an epitaxial substrate to solve the technical problem that the height of a silicon wafer at certain azimuth angles is significantly greater than the height at other azimuth angles; another purpose of this application is to provide an epitaxial device.

[0005] Technical solution: This application provides an epitaxial base, comprising:

[0006] The support portion has an axial direction and a radial direction perpendicular to the axial direction, and a circumferential direction surrounding the axial direction, and the support portion has an edge in the radial direction;

[0007] The limiting part includes a first body and a first protrusion. The first body is disposed along the circumferential direction and connected to the edge. The first body has a first reference surface in the axial direction. The first protrusion is connected to the first reference surface. The first protrusion, the first body, and the bearing part together form a bearing space for placing a silicon wafer. The first protrusion is used to block at least part of the airflow blowing toward the silicon wafer along the radial direction.

[0008] The first protrusion has a first surface and a second surface opposite each other in the circumferential direction. The first surface and the second surface are connected to the first reference surface and can extend from the first reference surface in a direction away from the first body. The distance between the first surface and the second surface in the circumferential direction decreases along the axial direction.

[0009] In some embodiments, one end of the first surface away from the first reference surface along the axial direction is connected to one end of the second surface away from the first reference surface along the axial direction.

[0010] In some embodiments, the first protrusion further has a third surface located between the first surface and the second surface and connected to the first surface and the second surface respectively, the third surface being connected to the end of the first surface and the second surface away from the first reference surface.

[0011] In some embodiments, the first surface protrudes toward the direction of the second surface, and / or the second surface protrudes toward the direction of the first surface.

[0012] In some embodiments, the limiting portion includes a plurality of first protrusions, which are spaced apart along the circumferential direction. Adjacent first protrusions are provided with a groove, and the first surface, the second surface, and the first reference surface form the groove. Airflow can pass through the groove and blow toward the silicon wafer along the radial direction.

[0013] In some embodiments, the support portion includes:

[0014] The second body is connected to the first body, and the second body and the first body enclose the bearing space;

[0015] The second protrusion is disposed in the bearing space along the circumferential direction and is connected to the second body and the first body. The second protrusion is used to support the silicon wafer so that the silicon wafer is spaced apart from the second body.

[0016] The second protrusion has a minimum dimension D along the radial direction, satisfying: 6.25mm≤D≤11.25mm.

[0017] In some embodiments, the support portion includes:

[0018] The second body is connected to the first body, and the second body and the first body enclose the bearing space;

[0019] The second protrusion is disposed in the bearing space along the circumferential direction and is connected to the second body and the first body. The second protrusion is used to support the silicon wafer so that the silicon wafer is spaced apart from the second body.

[0020] The second protrusion has a fourth surface that is away from the second body. The fourth surface is used to support the silicon wafer. The surface where the fourth surface is located has an angle α with the surface where the first reference surface is located, satisfying: 3.1°≤α≤4.1°.

[0021] In some embodiments, the first body further has a second reference surface, the second reference surface being opposite to the first reference surface along the axial direction, and the first reference surface and the second reference surface having a maximum distance d1 in the axial direction;

[0022] The second body has a third reference surface that is away from the fourth surface, the third reference surface being flush with the second reference surface in the radial direction, and the fourth surface having a maximum distance d2 between it and the third reference surface in the axial direction;

[0023] The condition is satisfied that d1 > d2.

[0024] In some embodiments, d1 and d2 satisfy: 0.8mm ≤ d1 - d2 ≤ 1.2mm. In some embodiments, the second body includes:

[0025] First sub-section;

[0026] The second sub-part is disposed along the circumferential direction and connected to the first sub-part along the radial direction. The second sub-part has a plurality of through holes communicating with the bearing space.

[0027] The third sub-part is disposed along the circumferential direction and connected to the second sub-part on the side away from the first sub-part along the radial direction. The third sub-part is connected to the first body along the radial direction, and the second protrusion is connected to the third sub-part along the axial direction.

[0028] In some embodiments, the maximum dimension of the first sub-part along the radial direction is I1, and the maximum dimension of the second sub-part along the radial direction is I2, satisfying: 220mm≤I1≤240mm, 260mm≤I2≤280mm.

[0029] In some embodiments, the maximum dimension of the first protrusion along the circumferential direction is L, which satisfies: 30πmm≤L≤41πmm.

[0030] In some embodiments, the first protrusion has a maximum dimension H1 along the axial direction, satisfying: 0.3mm≤H1≤0.7mm.

[0031] Accordingly, this application also provides an epitaxial device, including an epitaxial base as described in any of the above embodiments.

[0032] Beneficial effects: Compared with the prior art, the epitaxial base and epitaxial device provided in this application include a support portion and a limiting portion. The support portion has an axial direction, a radial direction perpendicular to the axial direction, and a circumferential direction surrounding the axial direction. The support portion has an edge in the radial direction. The limiting portion includes a first body and a first protrusion. The first body is disposed along the circumferential direction and connected to the edge. The first body has a first reference surface in the axial direction. The first protrusion is connected to the first reference surface. The first protrusion, the first body, and the support portion together enclose a support space for placing a silicon wafer. The first protrusion is used to block at least part of the airflow blowing towards the silicon wafer in the radial direction. The first protrusion has opposing first and second surfaces in the circumferential direction. The first and second surfaces are connected to the first reference surface and can extend from the first reference surface in a direction away from the first body. The distance between the first and second surfaces in the circumferential direction decreases in the axial direction. This application provides a first protrusion to block the airflow blowing radially from the outside of the substrate onto the silicon wafer at points where the growth rate is relatively fast. This reduces the growth rate at these points and makes the growth rate more uniform across the silicon wafer, resulting in better flatness after epitaxy. Attached Figure Description

[0033] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0034] Figure 1 This is a schematic diagram of the structure of an epitaxial base provided in one embodiment of this application;

[0035] Figure 2 A front view of the extensional base provided in an embodiment of this application;

[0036] Figure 3 for Figure 2 Detailed image of section AA;

[0037] Figure 4 This application is one embodiment of the present application. Figure 3 Detailed view of section B in the middle frame;

[0038] Figure 5 This is a front view of an extensional base provided in one embodiment of this application;

[0039] Figure 6 In another embodiment of this application Figure 3 Detailed view of section B in the middle frame;

[0040] Figure 7 A front view of an extensional base provided in another embodiment of this application;

[0041] Figure 8 This is yet another embodiment of the present application. Figure 3 Detailed view of section B in the middle frame;

[0042] Figure 9 A front view of an extensional base provided in yet another embodiment of this application;

[0043] Figure 10 for Figure 3 Detailed view of section C in the middle frame;

[0044] Figure 11 An azimuth angle variation diagram of the height of the silicon wafer produced from the epitaxial substrate provided in an embodiment of this application;

[0045] Figure 12 This is an internal schematic diagram of the epitaxial device provided in an embodiment of this application;

[0046] Figure 13 A radial variation diagram of the height of the silicon wafer produced from the epitaxial substrate provided in an embodiment of this application;

[0047] Figure 14 Another radial variation diagram of the height of the silicon wafer produced from the epitaxial substrate provided in this application embodiment.

[0048] Reference numerals in the figures: 1-Epipolar base, 11-Supporting portion, 111-Edge, 112-Second body, 1121-Third reference surface, 1122-First sub-part, 1123-Second sub-part, 1124-Through hole, 1125-Third sub-part, 113-Second protrusion, 1131-Fourth surface, 12-Limiting portion, 121-First body, 1211-First reference surface, 1212-Second reference surface, 122-First protrusion, 1221-First surface, 1222-Second surface, 1223-Third surface, 1224-First ridge, 123-Supporting space, 124-Groove, 2-Silicon wafer, 21-First protrusion, 22-Second protrusion, 23-Third protrusion, 3-Airflow. Detailed Implementation

[0049] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0050] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows for mutual communication; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two elements or the interaction between two elements. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances. In the description of this application, "multiple" means two or more, unless otherwise expressly and specifically limited. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more features.

[0051] It should also be noted that in the accompanying drawings of the embodiments of this application, the arrows labeled X, Y, and Z represent the radial direction X, the circumferential direction Y, and the axial direction Z, respectively. The description of this application introduces the radial direction X, the circumferential direction Y, and the axial direction Z to more clearly express the relative positional relationships involved in this application. The radial direction X and the axial direction Z are intersecting and perpendicular to each other, and the circumferential direction Y is the direction surrounding the axial direction Z. The three are relative directions rather than absolute directions. In practical applications, the radial direction X, the circumferential direction Y, and the axial direction Z may differ from the drawings provided in the specification of this application, as long as the relative relationships of the three are maintained.

[0052] The following disclosure provides many different implementations or examples for carrying out different structures of this application. To simplify the disclosure of this application, the components and arrangements of specific examples are described below. Of course, these are merely examples and are not intended to limit this application.

[0053] Silicon wafer epitaxial growth is a key process used to manufacture semiconductor devices. During the growth process, silicon substrate is heated and silicon gas is transported to the reaction chamber. With appropriate temperature control, silicon atoms are deposited on the surface and gradually form a polycrystalline silicon or monocrystalline silicon layer.

[0054] However, during the epitaxial growth process of silicon wafer 2, various factors cause different growth rates in different directions. The difference in growth rate will make the surface of the epitaxial silicon wafer 2 uneven, resulting in a large difference in thickness in different parts of the silicon wafer 2. Consequently, the surface flatness of the silicon wafer 2 is low. The silicon wafer 2 with low flatness can no longer meet the requirements of small linewidth production and use needs.

[0055] Specifically, please refer to Figure 11 , Figure 11This diagram illustrates the azimuth variation of the height of the silicon wafer produced from the epitaxial substrate provided in this embodiment. Here, "height," as well as "thickness," "high," and "low" in the following text, all describe the dimension along the axial direction Z or the relative relationship between dimensions along the axial direction Z. The horizontal axis represents the azimuth angle, and the vertical axis represents the thickness of the silicon wafer 2 in the axial direction Z. Figure 11 The dashed line represents the variation trend of the height of silicon wafer 2 after epitaxy with respect to the azimuth angle, and the solid line represents the variation trend of the height of silicon wafer 2 after epitaxy with respect to the azimuth angle produced using the epitaxial substrate 1 in this embodiment of the application. Figure 11 As can be seen, the epitaxial silicon wafer 2 exhibits a first convex band 21 that is significantly higher than other parts at certain azimuth angles, meaning that the growth rate of the produced silicon wafer 2 is significantly higher at certain azimuth angles than at other parts. Reducing the growth rate at these azimuth angles would decrease the height at these angles, thereby improving the flatness of the silicon wafer 2.

[0056] To address the technical problem that the growth rate of silicon wafer 2 at certain azimuth angles is significantly higher than that at other azimuth angles, resulting in a significantly greater height of silicon wafer 2 at certain azimuth angles than at other azimuth angles, the first embodiment of this application provides an epitaxial substrate 1. Please refer to... Figure 1 It includes a support portion 11 and a limiting portion 12. The support portion 11 has an axial direction Z, a radial direction X perpendicular to the axial direction Z, and a circumferential direction Y surrounding the axial direction Z. The support portion 11 has an edge 111 in the radial direction X. Please refer to [link to relevant documentation]. Figure 10 The limiting part 12 includes a first body 121 and a first protrusion 122. The first body 121 is disposed along the circumferential direction Y and connected to the edge 111. The first body 121 has a first reference surface 1211 in the axial direction Z. The first protrusion 122 is connected to the first reference surface 1211. The first protrusion 122, the first body 121 and the supporting part 11 together form a supporting space 123 for placing the silicon wafer 2. The first protrusion 122 is used to block at least part of the airflow 3 blowing towards the silicon wafer 2 in the radial direction X. The first protrusion 122 has a first surface 1221 and a second surface 1222 opposite to each other in the circumferential direction Y. The first surface 1221 and the second surface 1222 are connected to the first reference surface 1211 and can extend from the first reference surface 1211 in a direction away from the first body 121. The distance between the first surface 1221 and the second surface 1222 in the circumferential direction Y decreases in the axial direction Z.

[0057] Specifically, please refer to Figure 4 The distance between the first surface 1221 and the second surface 1222 in the circumferential direction Y is Figure 4In this context, M decreases along the axial direction Z away from the first body 121, and increases along the axial direction Z towards the first body 121. In other words, in... Figure 4 In the axial direction Z, the value of M decreases as it goes upwards and increases as it goes downwards.

[0058] Specifically, the distance between the first surface 1221 and the second surface 1222 in the circumferential direction Y gradually decreases in the axial direction Z toward the direction away from the first body 121.

[0059] Specifically, the first surface 1221 and / or the second surface 1222 can be a surface composed of multiple planes, a curved surface, or a surface composed of planes and curved surfaces.

[0060] It is understandable that the airflow 3 flows from the outside along the radial direction X to the surface of the silicon wafer 2 in the bearing space 123, so that deposition occurs on the surface of the silicon wafer 2. The faster the deposition rate, the faster the growth rate, and vice versa.

[0061] In the above embodiment, the first protrusion 122, which is a barrier in the direction of airflow 3, causes the airflow 3 to change direction and bypass the barrier. This reduces the airflow 3 flow rate behind the barrier in the direction of airflow 3 flow, specifically, the airflow 3 flow rate towards at least a portion of the silicon wafer 2 located inside the first protrusion 122 in the radial direction X is reduced. This slows down the deposition rate and growth rate of the silicon wafer 2, resulting in a reduced height after epitaxy, thereby improving flatness. (Observation...) Figure 11 As can be seen from the solid line portion, the height of the first convex band 21 has been reduced compared to the dashed line portion.

[0062] Furthermore, it can be understood that the higher the height of the first protrusion 122, the more efficient it is at blocking the airflow 3. Consequently, the flow rate of the airflow 3 along the radial direction X towards at least a portion of the silicon wafer 2 located inside the first protrusion 122 is smaller, resulting in a slower deposition rate and lower growth rate for that portion of the silicon wafer 2. Conversely, the lower the height of the first protrusion 122, the lower the efficiency of blocking the airflow 3, and the smaller the effect on reducing the thickness of the epitaxial portion of the silicon wafer 2.

[0063] In some embodiments, the projection of the first protrusion 122 along the axial direction Z onto the plane where the first reference surface 1211 is located falls within the projection of the first reference surface 1211 along the axial direction Z onto the plane where the first reference surface 1211 is located; in other embodiments, the projection of the first protrusion 122 along the axial direction Z onto the plane where the first reference surface 1211 is located not only overlaps with the projection of the first reference surface 1211 along the axial direction Z onto the plane where the first reference surface 1211 is located, but also overlaps with the projection of the bearing portion 11 along the axial direction Z onto the plane where the first reference surface 1211 is located.

[0064] Furthermore, the first protrusion 122 also has an inner surface that is opposite to each other and located inside in the radial direction X and an outer surface that is located outside in the radial direction X. The inner surface is connected to the first surface 1221 and the second surface 1222 respectively, and the outer surface is also connected to the first surface 1221 and the second surface 1222 respectively. The first surface 1221, the second surface 1222, the inner surface and the outer surface are used to form the first protrusion 122.

[0065] Please see Figure 3 The dimensions of the epitaxial silicon wafer 2 along the circumferential direction Y at the first protrusion 21 are not consistent along the axial direction Z. Instead, the dimensions along the axial direction Z gradually decrease along the circumferential direction Y. That is, the dimensions of the first protrusion 21 along the circumferential direction Y gradually decrease along the direction from the first body 121 to the first protrusion 122. It can be understood that the reason why the dimensions of the first protrusion 21 along the circumferential direction Y are different along the axial direction Z is due to different deposition efficiencies; the higher the protrusion, the higher the deposition efficiency, and the lower the deposition efficiency.

[0066] In the above embodiments, please refer to Figure 2 The distance between the first surface 1221 and the second surface 1222 in the circumferential direction Y gradually decreases along the axial direction Z. That is, the size of the first protrusion 122 in the circumferential direction Y gradually decreases along the direction from the first body 121 to the first protrusion 122, matching the shape of the first protrusion 21. In other words, this application makes the shape of the first protrusion 122 in the radial direction X similar to the shape of the first protrusion 21 in the radial direction X, so as to reduce the flow rate of the airflow 3 flowing through the end of the first protrusion 21 to a greater extent and reduce the flow rate of the airflow 3 flowing through the root of the first protrusion 21 to a smaller extent, thereby making the first protrusion 21 more flat and thus improving the flatness of the epitaxial silicon wafer 2.

[0067] In some embodiments, please refer to Figure 1 The end of the first surface 1221 that is away from the first reference surface 1211 along the axial direction Z is connected to the end of the second surface 1222 that is away from the first reference surface 1211 along the axial direction Z.

[0068] In some embodiments, please refer to Figure 5 The first surface 1221 and the second surface 1222 are connected to form a first edge 1224. The projection of the first edge 1224 along the axial direction Z onto the plane where the first reference plane 1211 is located falls within the projection of the first protrusion 122 along the axial direction Z onto the plane where the first reference plane 1211 is located. In other embodiments, the projection of the first edge 1224 along the axial direction Z onto the plane where the first reference plane 1211 is located partially or completely falls outside the projection of the first protrusion 122 along the axial direction Z onto the plane where the first reference plane 1211 is located.

[0069] It is understandable that, in order to avoid stress concentration at the junction of the first surface 1221 and the second surface 1222 of the epitaxial base 1, in some embodiments, the first edge 1224 is rounded or beveled.

[0070] In the above embodiment, the first surface 1221 and the second surface 1222 of the first protrusion 122 are directly connected to form the first ridge 1224, so that the shape of the first protrusion 122 is more consistent with the shape of the first protrusion 21 on the silicon wafer 2 produced in the present technology along the radial direction X, so that the epitaxial silicon wafer 2 is flatter at the place where the first protrusion 21 would have been generated, thereby improving the flatness of the epitaxial silicon wafer 2.

[0071] In some embodiments, please refer to Figure 6 , Figure 7 , Figure 8 and Figure 9 The first protrusion 122 also has a third surface 1223, which is located between the first surface 1221 and the second surface 1222 and is connected to the first surface 1221 and the second surface 1222 respectively. The third surface 1223 is connected to the end of the first surface 1221 and the second surface 1222 away from the first body 121.

[0072] Specifically, in some embodiments, please refer to Figure 8 and Figure 9 The first surface 1221 and the second surface 1222 are not connected, and the third surface 1223 is located between the first surface 1221 and the second surface 1222 and connects the first surface 1221 and the second surface 1222; in other embodiments, please refer to Figure 6 and Figure 7 A portion of the first surface 1221 is connected to a portion of the second surface 1222, and a third surface 1223 is located between and connected to another portion of the first surface 1221 and another portion of the second surface 1222.

[0073] In some embodiments, the projection of the third surface 1223 along the axial direction Z onto the plane where the first reference plane 1211 is located falls within the projection of the first protrusion 122 along the axial direction Z onto the plane where the first reference plane 1211 is located; in other embodiments, the projection of the third surface 1223 along the axial direction Z onto the plane where the first reference plane 1211 is located partially or completely falls outside the projection of the first protrusion 122 along the axial direction Z onto the plane where the first reference plane 1211 is located.

[0074] In some embodiments, the third surface 1223 is a curved surface; in other embodiments, the third surface 1223 is a plane; in still other embodiments, the third surface 1223 is composed of a plane and / or a curved surface.

[0075] In the above embodiments, by providing a third surface 1223 to adjust the flow direction and velocity of the airflow 3 bypassing the first protrusion 122, the first protrusion 122 can be better adapted to actual production needs. Furthermore, providing the third surface 1223 can reduce or avoid the possibility of stress concentration in the epitaxial base 1, thus extending the service life of the epitaxial base 1.

[0076] In some embodiments, please refer to Figure 4 , Figure 6 and Figure 8 The first surface 1221 protrudes toward the direction of the second surface 1222, and / or the second surface 1222 protrudes toward the direction of the first surface 1221.

[0077] Specifically, in some embodiments, the first surface 1221 protrudes toward the direction of the second surface 1222, and the second surface 1222 protrudes toward the direction of the first surface 1221; in other embodiments, only the first surface 1221 protrudes toward the direction of the second surface 1222; and in still other embodiments, only the second surface 1222 protrudes toward the direction of the first surface 1221.

[0078] For further details, please refer to Figure 4 , Figure 6 and Figure 8 In some embodiments, the distance between the first surface 1221 and the second surface 1222 decreases along the circumferential direction Y at a rate that first accelerates and then decelerates along the axial direction Z.

[0079] By observation Figure 11As shown by the dotted line, the circumferential dimension of the epitaxial silicon wafer 2 at the first protrusion 21 decreases at a rate that first accelerates and then decelerates in the axial direction Z. Therefore, in the above embodiment, the first surface 1221 of the first protrusion 122 is concave towards the second surface 1222 in the circumferential direction Y, and the shape of the second surface 1222 concave towards the first surface 1221 in the radial direction X is more similar to the shape of the first protrusion 21 in the radial direction X. This makes the reduction effect on the height of the first protrusion 21 more significant, thereby enabling the epitaxial silicon wafer 2 to obtain better flatness. In addition, the concave first surface 1221 and second surface 1222 in the circumferential direction Y can reduce the volume of the first protrusion 122, reduce the weight of the epitaxial base 1, and make the working performance of the epitaxial base 1 more excellent.

[0080] In some embodiments, please refer to Figure 1 The limiting part 12 includes a plurality of first protrusions 122, which are spaced apart along the circumferential direction Y. There is a groove 124 between adjacent first protrusions 122, and the first surface 1221, the second surface 1222 and the first reference surface 1211 form the groove 124. The airflow 3 can pass through the groove 124 and blow towards the silicon wafer 2 along the radial direction X.

[0081] Please see Figure 11 It can be seen that there are multiple first protrusions 21, specifically four. Therefore, in the above embodiment, by setting multiple first protrusions 122, each first protrusion 21 can correspond to at least one first protrusion 122 so that each first protrusion 21 can play a role in reducing the thickness, thereby further improving the flatness of the epitaxial silicon wafer 2.

[0082] Furthermore, in some embodiments, the first body 121 includes multiple equal parts connected sequentially along the circumferential direction Y, with each first protrusion 122 connected to one of the multiple equal parts.

[0083] Furthermore, in some other embodiments, the limiting part 12 includes at least four first protrusions 122, and the first body 121 includes four equal parts connected sequentially along the circumferential direction Y, with each of the four equal parts connected to at least one first protrusion 122.

[0084] Furthermore, in some other embodiments, at least four first protrusions 122 are symmetrical about the rotation axis of the extensional base 1.

[0085] Furthermore, it is understandable that flatness is used to measure whether the surface of silicon wafer 2 is flat, and flatness can be improved not only by reducing the thickness at higher points, but also by increasing the thickness at lower points.

[0086] In the above embodiments, at least four first protrusions 122 are provided to respectively reduce the height of the first protrusion 21 of the epitaxial silicon wafer 2, thereby improving the flatness of the epitaxial silicon wafer 2. Furthermore, the groove 124 allows a larger flow rate of airflow 3 to flow to the silicon wafer 2, increasing the growth rate relative to the lower portion of the first protrusion 21 and increasing the thickness relative to the lower portion of the first protrusion 21, thereby further improving the flatness of the epitaxial silicon wafer 2. Additionally, since in some embodiments the first surface 1221 and the second surface 1222 protrude towards each other, the flow cross-sectional area of ​​the groove 124 is larger, and the flow rate of airflow 3 flowing through the groove 124 is greater, further reducing the difference between the highest and lowest points of the epitaxial silicon wafer 2, thereby further improving the flatness of the epitaxial silicon wafer 2.

[0087] In some embodiments, the support portion 11 includes a second body 112 and a second protrusion 113; the second body 112 is connected to the first body 121, and the second body 112 and the first body 121 enclose a support space 123; the second protrusion 113 is disposed in the support space 123 along the circumferential direction Y, the second protrusion 113 is connected to the second body 112, the second protrusion 113 is connected to the first body 121, and the second protrusion 113 is used to support the silicon wafer 2, so that the silicon wafer 2 is spaced apart from the second body 112; wherein, the second protrusion 113 has a minimum radial dimension D, satisfying: 6.25mm≤D≤11.25mm.

[0088] Specifically, the second protrusion 113 has an inner diameter and an outer diameter along the radial direction X, and the value of half the difference between the outer diameter and the inner diameter is D, which satisfies: 6.25mm≤D≤11.25mm.

[0089] Specifically, the value of D can be any one of the following values: 6.25mm, 6.75mm, 7.25mm, 7.75mm, 8.25mm, 8.75mm, 9.25mm, 9.75mm, 10.25mm, 10.75mm, 11.25mm, or any value within a range of any two values.

[0090] It is understandable that when the radial X dimension of the epitaxial base 1 remains unchanged, a change in the D value will cause a change in the radial X dimension of the limiting portion 12, thereby affecting the dimension of the first protrusion 122 in the radial X direction. It is understood that the larger the dimension of the first protrusion 122 in the radial X direction, the higher the efficiency of blocking the airflow 3; conversely, the smaller the dimension of the first protrusion 122 in the radial X direction, the lower the efficiency of blocking the airflow 3. The efficiency of the first protrusion 122 in blocking the airflow 3 can, in turn, affect the epitaxial growth rate of the silicon wafer 2. When the value of D is within the range defined in the embodiments of this application, the first protrusion 122 can effectively block the airflow 3, thereby enabling the epitaxial silicon wafer 2 to achieve better flatness.

[0091] In the above embodiment, by limiting the minimum size of the second protrusion 113 along the radial direction X, the flatness of the outer edge of the silicon wafer 2 is improved.

[0092] In some embodiments, the support portion 11 includes a second body 112 and a second protrusion 113. The second body 112 is connected to the first body 121, and the second body 112 and the first body 121 enclose a support space 123. The second protrusion 113 is disposed in the support space 123 along the circumferential direction Y and is connected to the second body 112 and the first body 121. The second protrusion 113 is used to support the silicon wafer 2, such that the silicon wafer 2 is spaced apart from the second body 112. The second protrusion 113 has a fourth surface 1131 facing away from the second body 112. The fourth surface 1131 is used to support the silicon wafer 2. The surface where the fourth surface 1131 is located has an included angle α with the surface where the first reference surface 1211 is located, satisfying: 3.1°≤α≤4.1°.

[0093] Specifically, the value of α can be any one of 3.1°, 3.2°, 3.3°, 3.4°, 3.5°, 3.6°, 3.7°, 3.8°, 3.9°, 4.0°, 4.1° or any value within a range of any two values.

[0094] Please see Figure 14 ,in, Figure 14 The x-axis in the figure represents the radius of silicon wafer 2. Figure 14 The closer the center is to the left, the closer it is to the axis of silicon wafer 2; the closer it is to the right, the closer it is to the edge of silicon wafer 2. It can be found that the epitaxial silicon wafer 2 also has a second convex band 22 extending along the circumferential direction Y and close to the outer edge of silicon wafer 2. In the above embodiment, when the included angle α is within the range defined by the embodiments of this application, it can be found that the second convex band 22 moves to the right in the radial direction X, that is, moves towards the edge of silicon wafer 2. That is, the inner diameter of the annular second convex band 22 increases, so that the second convex band 22 can move out of the flatness measurement area, that is, eliminate the influence of the second convex band 22 on the flatness, and thus reduce the flatness of the epitaxial silicon wafer 2.

[0095] Furthermore, as can be seen from the above, the larger the angle of α, the more the second convex band 22 on the epitaxial silicon wafer 2 will move outward along the radial direction X. The part of the silicon wafer 2 that is closer to the first convex band 122 along the radial direction X is more effectively blocked by the first convex band 122. Therefore, when α is within the range defined in the embodiments of this application, it can also enhance the effect of the first convex band 122 in reducing the height of the overlap between the first convex band 21 and the second convex band 22, thereby improving the flatness of the silicon wafer 2.

[0096] In some embodiments, please refer to Figure 10The first body 121 also has a second reference surface 1212, which is opposite to the first reference surface 1211 along the axial direction Z, and the first reference surface 1211 and the second reference surface 1212 have a maximum distance d1 in the axial direction Z.

[0097] The second body 112 has a third reference surface 1121 that is far from the fourth surface 1131. The third reference surface 1121 is flush with the second reference surface 1212 in the radial direction X, and the fourth surface 1131 and the third reference surface 1121 have a maximum distance d2 in the axial direction Z; satisfying: d1 > d2.

[0098] In the above embodiment, by setting a size difference along the axial direction Z between the first body 121 and the second protrusion 113, the first body 121 can limit the rotation of the silicon wafer 2. When the silicon wafer 2 moves along the radial direction X, the first body 121, which is higher than the second protrusion 113, can block the silicon wafer 2 and limit its position, so as to stabilize the growth environment of the silicon wafer 2 and obtain better flatness.

[0099] In some embodiments, d1 and d2 satisfy: 0.8mm ≤ d1 - d2 ≤ 1.2mm. Specifically, the value of d1 - d2 can be any one of 0.8mm, 0.85mm, 0.9mm, 0.95mm, 1.0mm, 1.05mm, 1.1mm, 1.05mm, 1.2mm, or any value within a range of any two of these values.

[0100] In the above embodiments, when d1-d2 is within the range defined in the embodiments of this application, the limiting part 12 can effectively limit the silicon wafer 2, preventing the silicon wafer 2 from being thrown out when the epitaxial base 1 rotates. Simultaneously, when d1-d2 is within the range defined in the embodiments of this application, it can also prevent the limiting part 12 from excessively obstructing the airflow 3. Furthermore, the larger the value of d1-d2, the better the limiting effect of the limiting part 12 on the silicon wafer 2; the smaller the value of d1-d2, the smaller the impact of the limiting part 12 on the airflow 3.

[0101] In some embodiments, please refer to Figure 10 The support portion 11 includes a first sub-part 1122, a second sub-part 1123, a third sub-part 1125, and a second protrusion 113. The second sub-part 1123 is disposed along the circumferential direction Y and connected to the first sub-part 1122 along the radial direction X. The second sub-part 1123 has a plurality of through holes 1124 communicating with the support space 123. The third sub-part 1125 is disposed along the circumferential direction Y and connected to the side of the second sub-part 1123 away from the first sub-part 1122 along the radial direction X. The third sub-part 1125 is connected to the first body 121 along the radial direction X. The second protrusion 113 is connected to the third sub-part 1125 along the axial direction Z.

[0102] It is understandable that after the silicon wafer 2 is placed in the bearing space 123 of the epitaxial base 1, a closed space is formed between the silicon wafer 2, the second protrusion 113, and the bearing portion 11. The through hole 1124 enables the closed space to communicate with the space on the side of the epitaxial base 1 away from the silicon wafer 2, thereby allowing the gas in the closed space to circulate with the outside, thus relatively reducing the temperature of the gas in the closed space, thereby reducing the temperature and growth rate of the silicon wafer 2.

[0103] Furthermore, along the axial direction Z, the second sub-section 1123 with through holes 1124 can reduce the temperature of the portion of the silicon wafer 2 corresponding to the second sub-section 1123 along the axial direction Z.

[0104] Please see Figure 13 Wherein, the horizontal axis represents the radius of silicon wafer 2, the vertical axis represents the dimension of silicon wafer 2 along the axial direction Z, the dashed line represents the height of silicon wafer 2 after epitaxy, and the solid line represents the height of silicon wafer 2 produced using the epitaxial substrate 1 in this embodiment of the application. By observation Figure 13 As shown by the dashed line, the epitaxial silicon wafer 2 also has an annular third convex band 23. When at least a portion of the projection of the portion where the third convex band 23 would normally form onto the plane containing the first reference plane 1211 along the axial direction Z is located within the projection of the second sub-part 1123 onto the plane containing the first reference plane 1211 along the axial direction Z, please refer to... Figure 13 In the solid line portion, compared to the dashed line portion, the second sub-part 1123 with through-hole 1124 can reduce the temperature of the epitaxial silicon wafer 2, thereby reducing the possibility of the third convex band 23 being generated, and thus improving the flatness of the epitaxial silicon wafer 2.

[0105] In some embodiments, please refer to Figure 2 and Figure 10 The maximum dimension of the first sub-part 1122 along the radial direction X is I1, which satisfies: 220mm≤I1≤240mm.

[0106] In some embodiments, when the extension base 1 is a circular base, the value of I1 is the diameter of the first sub-part 1122. In other words, the value of I1 is the inner diameter of the annular second sub-part 1123.

[0107] Specifically, the value of I1 mm can be any one of the following values, or any value within a range consisting of any two of the following: 220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, and 240.

[0108] When the value of I1 mm is within the range defined in the embodiments of this application, the via 1124 is most effective in eliminating the third protrusion 23, minimizing the likelihood of the third protrusion 23 being generated, thereby improving the flatness of the epitaxial silicon wafer 2. When the value of I1 mm is outside the range defined in the embodiments of this application, the effect of the via 1124 in eliminating the third protrusion 23 is not as good as when the value of I1 mm is within the range defined in the embodiments of this application.

[0109] In some embodiments, please refer to Figure 2 The maximum dimension of the first protrusion 122 along the circumferential direction Y is L, which satisfies: 30πmm≤L≤41πmm.

[0110] Specifically, the value of L mm can be any one of 30π, 31π, 32π, 33π, 34π, 35π, 36π, 37π, 38π, 39π, 40π, 41π or any value within a range of any two values.

[0111] Specifically, in some embodiments, the maximum dimension of the first protrusion 122 along the circumferential direction Y is the dimension of the outer surface of the first protrusion 122 in the circumferential direction Y.

[0112] In the above embodiments, when L is within the range defined in the embodiments of this application, the first protrusion 21 can be effectively reduced, thereby improving the flatness of the epitaxial silicon wafer 2. Conversely, when L is less than the range defined in the embodiments of this application, the first protrusion 21 is still relatively obvious, resulting in a small improvement in the flatness of the epitaxial silicon wafer 2. When L is greater than the range defined in the embodiments of this application, the first protrusion 122 blocks the airflow 3 from flowing to the parts with slower growth rates, making the growth rate of these parts even slower. That is, the depth of the recess around the first protrusion 21 is deeper, the height difference between it and the first protrusion 21 is greater, and the flatness is difficult to improve. In some embodiments, the first protrusion 122 has a maximum size H1 along the axial direction Z, satisfying: 0.3mm≤H1≤0.7mm.

[0113] Specifically, the value of H1 mm can be any one of 0.3, 0.4, 0.5, 0.6, and 0.7, or any value within a range of any two values. In the above embodiments, when H1 is within the range defined in the embodiments of this application, the first protrusion 21 can be effectively reduced, thereby improving the flatness of the epitaxial silicon wafer 2. It can be understood that the larger the value of H1, the better the interception effect of the first protrusion 122 on the airflow 3; the smaller the value of H1, the less material is consumed in manufacturing the epitaxial base 1, and the smaller the volume and weight of the epitaxial base 1.

[0114] The present application will be further described in detail below with reference to specific embodiments, which should not be construed as limiting the scope of protection claimed in the present application.

[0115] Example 1

[0116] In Example 1, the minimum radial dimension D of the second protrusion 113 is 5.25 mm.

[0117] Examples 2-8

[0118] Except for the following differences, the extension base 1 in Examples 2-8 is the same as in Example 1: the value of the minimum radial dimension D of the second protrusion 113 is adjusted. For specific parameters, please refer to Table 1.

[0119] In an optional embodiment of this application, the flatness of silicon wafer 2 is represented by measuring and calculating the ESFQR (Edge Flatness Ratio), which affects overall flatness. The ESFQR value indicates the degree of flatness variation between the outer edge region of the wafer and the inner wafer surface. A smaller ESFQR indicates higher flatness of silicon wafer 2; a larger ESFQR indicates lower flatness of silicon wafer 2.

[0120] The following methods can be used to measure and calculate the ESFQR value of silicon wafer 2:

[0121] 1. Divide the silicon wafer into 72 sectors at equal angles;

[0122] 2. Determine the maximum height of the least squares reference plane for each sector;

[0123] 3. Take the area 2mm away from the arc edge of the sector and the radial length of the sector as the measurement area and measure the thickness. Then, obtain the sum of the absolute value of the maximum height above the least squares reference plane and the absolute value of the minimum height below the least squares reference plane.

[0124] 4. Compare the sum of the absolute values ​​of the maximum height above the least squares reference plane and the minimum height below the least squares reference plane in the 72 sectors, and take the maximum value among the 72 values ​​as the ESFQR of silicon wafer 2.

[0125] Among them, when the ESFQR value is less than 35nm, the quality of silicon wafer 2 is considered to be better; when the ESFQR value is greater than 35nm, the quality of silicon wafer 2 is considered to be worse than that of silicon wafer with an ESFQR value less than 35nm.

[0126] Table 1

[0127]

[0128]

[0129] As shown in Table 1, referring to Examples 1-8 respectively, as the value of D increases, the ESFQR value of silicon wafer 2 first decreases and then increases. That is, the flatness of silicon wafer 2 at the outer edge is first improved and then gradually deteriorates. The ESFQR value is the largest in Example 1, which is 42, and the ESFQR value is the second largest in Example 8, which is 37.3. This means that the quality of silicon wafer 2 produced using epitaxial substrate 1 in Examples 1 and 8 is not as good as the quality of silicon wafer 2 produced using epitaxial substrate 1 in Examples 2-7. The ESFQR value is the smallest in Example 4, which is 27.2 nm. This indicates that in Examples 1-8 of this application, as D increases, the size of the limiting portion 12 in the radial direction X gradually decreases, and the size of the first protrusion 122 in the radial direction X gradually decreases.

[0130] Referring to Examples 2-7, the values ​​of D are all within the range defined in this application, and the values ​​of ESFQR are all less than 35nm. The silicon wafers 2 produced by the epitaxial substrate 1 in Examples 2-7 are of good quality.

[0131] In contrast, in Embodiment 1, D is smaller in the epitaxial substrate 1, and the size of the first protrusion 122 in the radial direction X is larger. The obstruction effect of the first protrusion 122 on the airflow 3 exceeds the actual requirement, resulting in an excessively low growth rate in the part of the silicon wafer 2 where the growth rate needs to be reduced. The surface of the epitaxial silicon wafer 2 is not smooth enough, which in turn leads to a larger ESFQR value of the silicon wafer 2. Therefore, the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Embodiment 1 is not as good as the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Embodiments 2-7.

[0132] In contrast, in Example 8, the epitaxial substrate 1 has a larger D, and the first protrusion 122 has a smaller size in the radial direction X. The first protrusion 122 does not effectively block the airflow 3 as required, resulting in the growth rate of the silicon wafer 2, which needs to be reduced, still being relatively high. Consequently, the EDFQR value of the silicon wafer 2 is relatively large, and the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Example 8 is not as good as the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Examples 2-7.

[0133] Example 9

[0134] In Example 9, the value of α for the epitaxial base 1 is 1.6.

[0135] Examples 10-15

[0136] Except for the following differences, the epitaxial base 1 in Examples 10-15 is the same as in Example 9: the value of α is adjusted, please refer to Table 2 for details.

[0137] Table 2 α / ° ESFQR / nm Example 9 1.6 45.7 Example 10 2.1 33.8 Example 11 2.6 28.4 Example 12 3.1 23.2 Example 13 3.6 26.5 Example 14 4.1 34.4 Example 15 4.6 42.3

[0138] As shown in Table 2, referring to Examples 9-15, with the increase of α, the ESFQR value of silicon wafer 2 first decreases and then increases. That is, the flatness of silicon wafer 2 at the outer edge is first improved and then gradually deteriorates. The ESFQR value is the largest in Example 9, at 45.7, and the ESFQR value is the second largest in Example 15, at 42.3. This means that the quality of silicon wafer 2 produced using epitaxial substrate 1 in Examples 9 and 15 is not as good as that produced using epitaxial substrate 1 in Examples 10-14. The ESFQR value is the smallest in Example 12, at 23.2 nm. This indicates that in Examples 9-15 of this application, with the increase of α, the maximum distance between the outer edge of silicon wafer 2 and the substrate in the axial direction Z is larger, and the temperature at the outer edge of silicon wafer 2 is lower.

[0139] Referring to Examples 10-14, the values ​​of α are all within the range defined in this application, and the values ​​of ESFQR are all less than 35nm. The silicon wafers 2 produced by the epitaxial substrate 1 in Examples 10-14 are of good quality.

[0140] In contrast, in Example 9, the value of α is smaller in the epitaxial substrate, the maximum distance between the outer edge of the silicon wafer 2 and the second body 112 is smaller, the temperature at the outer edge of the silicon wafer 2 is higher, and the growth rate at the outer edge of the silicon wafer 2 is faster, significantly faster than the growth rate of the part near the center of the outer edge of the silicon wafer 2. This results in the surface of the silicon wafer 2 being less flat, which in turn results in the ESFQR value of the silicon wafer 2 being larger. Therefore, the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Example 9 is not as good as the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Examples 10-14.

[0141] In contrast, in Example 15, the value of α is relatively large in the epitaxial substrate 1, the maximum distance between the outer edge of the silicon wafer 2 and the second body 112 is relatively large, the temperature at the outer edge of the silicon wafer 2 is relatively low, and the growth rate at the outer edge of the silicon wafer 2 is relatively slow, slower than the growth rate of the part near the center of the outer edge of the silicon wafer 2. As a result, the surface of the silicon wafer 2 is not smooth enough, which in turn leads to a larger ESFQR value of the silicon wafer 2. The quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Example 15 is not as good as the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Examples 10-14.

[0142] Example 16

[0143] In Example 16, the value of d1-d2 of the epitaxial base 1 is 0.7.

[0144] Examples 17-22

[0145] Except for the following differences, the epitaxial base 1 in Examples 17-22 is the same as in Example 16: the values ​​of d1-d2 are adjusted, please refer to Table 3 for details.

[0146] Table 3

[0147] <![CDATA[d1-d2 / mm]]> ESFQR / nm Example 16 0.7 45.1 Example 17 0.8 31.5 Example 18 0.9 32.8 Example 19 1.0 33.4 Example 20 1.1 34 Example 21 1.2 34.6 Example 22 1.3 40.1

[0148] As shown in Table 3, referring to Examples 16-22, as the values ​​of d1-d2 increase, the ESFQR value of silicon wafer 2 gradually increases, meaning that the flatness of silicon wafer 2 at the outer edge gradually deteriorates. Example 22 has the highest ESFQR value of 40.1, indicating that the limiting portion 12 in the epitaxial substrate 1 of Example 22 obstructs a significant amount of airflow 3. Therefore, the quality of silicon wafer 2 produced using the epitaxial substrate 1 provided in this example is not as good as that produced using the epitaxial substrate 1 of Examples 17-21. The silicon wafer 2 produced using the epitaxial substrate 1 in Example 17 has the lowest ESFQR value. This indicates that in Embodiments 16-22 of this application, under the condition that the limiting part 12 can effectively limit the silicon wafer 2, the smaller the value of d1-d2, the smaller the effect of the limiting part 12 on blocking the airflow 3, the larger the depth of the groove 124 along the axial direction Z, the more significant the effect of the groove 124, the smoother the surface of the epitaxial silicon wafer 2, and the smaller the ESFQR value of the epitaxial silicon wafer 2.

[0149] Referring to Examples 17-21, when the values ​​of d1-d2 are within the range defined in this application, the ESFQR values ​​are all less than 35nm, and the silicon wafers 2 produced by the epitaxial substrate 1 in Examples 17-21 are of good quality.

[0150] In contrast, in Example 16, the values ​​of d1-d2 are too small and smaller than the size of silicon wafer 2 in the axial direction Z. The epitaxial substrate 1 has a poor effect on the airflow distribution of airflow 3. The ESFQR value of the epitaxial silicon wafer 2 is greater than 35nm. The quality of silicon wafer 2 produced by epitaxial substrate 1 in Example 16 is not as good as the quality of silicon wafer 2 produced by epitaxial substrate 1 in Examples 17-21.

[0151] In contrast, in Example 22, the values ​​of d1-d2 are relatively large, and the limiting part 12 blocks a large amount of airflow 3. The flow rate of airflow 3 flowing to silicon wafer 2 through groove 124 is insufficient, and the ESFQR value of silicon wafer 2 is greater than 35nm. Therefore, the quality of silicon wafer 2 produced by epitaxial substrate 1 in Example 22 is not as good as the quality of silicon wafer 2 produced by epitaxial substrate 1 in Examples 17-21.

[0152] Example 23

[0153] In Example 23, the value of L is 29π.

[0154] Examples 24-29

[0155] Except for the following differences, the epitaxial base 1 in Examples 24-29 is the same as in Example 23: the value of L is adjusted, please refer to Table 4 for details.

[0156] Table 4

[0157] L / mm ESFQR / nm Example 23 29π 44.2 Example 24 30π 33.5 Example 25 33π 26.7 Example 26 36π 22.4 Example 27 39π 25.5 Example 28 41π 31.8 Example 29 42π 41.5

[0158] As shown in Table 4, referring to Examples 23-29, with the increase of L, the ESFQR value of silicon wafer 2 first decreases and then increases. That is, the flatness of silicon wafer 2 at the outer edge is first improved and then gradually deteriorates. The ESFQR value is the largest in Example 23, at 44.2, and the ESFQR value is the second largest in Example 29, at 41.5. This means that the quality of silicon wafer 2 produced using epitaxial substrate 1 in Examples 23 and 29 is not as good as that produced using epitaxial substrate 1 in Examples 24-28. The ESFQR value is the smallest in Example 26, at 22.4 nm. This indicates that in Examples 23-29 of this application, with the increase of L, the circumferential dimension of the first protrusion 122 gradually increases, that is, the obstruction effect of the first protrusion 122 on the airflow 3 gradually strengthens.

[0159] Referring to Examples 24-28, the values ​​of L are all within the range defined in this application, and the values ​​of ESFQR are all less than 35nm. The silicon wafers 2 produced by the epitaxial substrate 1 in Examples 24-28 are of good quality.

[0160] In contrast, in embodiment 23, the size of the first protrusion 122 along the circumferential direction Y is smaller than the range defined in the embodiments of this application. The first protrusion 122 cannot effectively block the airflow 3 and cannot suppress the growth rate of the silicon wafer 2. As a result, the growth rates of different parts of the silicon wafer 2 are still quite different, which leads to an uneven surface of the epitaxial silicon wafer 2 and a larger ESFQR. Therefore, the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in embodiment 23 is not as good as the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in embodiments 24-28.

[0161] In contrast, in embodiment 29, the circumferential dimension of the first protrusion 122 is larger than the range defined in the embodiments of this application. The first protrusion 122 excessively suppresses the flow rate of the airflow 3, suppressing the growth rate of the parts of the silicon wafer 2 that do not need to have their growth rate suppressed. This results in a large difference in the growth rate of each part of the silicon wafer 2, which in turn leads to an uneven surface of the epitaxial silicon wafer 2 and a larger ESFQR of the epitaxial silicon wafer 2. Therefore, the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in embodiment 29 is not as good as the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in embodiments 24-28.

[0162] Example 30

[0163] In Example 30, the value of H1 is 0.2 mm.

[0164] Examples 31-36

[0165] Except for the following differences, the epitaxial base 1 in Examples 31-36 is the same as in Example 30: the value of H1 is adjusted, please refer to Table 5 for details.

[0166] Table 5

[0167] <![CDATA[H1 / mm]]> ESFQR / nm Example 30 0.2 44.8 Example 31 0.3 34.2 Example 32 0.4 33.5 Example 33 0.5 28.1 Example 34 0.6 26.4 Example 35 0.7 23.7 Example 36 0.8 23.4

[0168] As shown in Table 5, referring to Examples 30-36, as the value of H1 increases, the ESFQR value of silicon wafer 2 gradually decreases, meaning that the flatness of silicon wafer 2 at the outer edge gradually improves. Example 30 has the highest ESFQR value of 44.8, indicating that the quality of silicon wafer 2 produced using the epitaxial substrate 1 in Example 30 is not as good as that produced using the epitaxial substrate 1 in Examples 31-36. Example 36 has the lowest ESFQR value for silicon wafer 2 produced using the epitaxial substrate 1. Furthermore, as the value of H1 increases, the trend of decreasing ESFQR value slows down, meaning that the value of H1 does not need to increase indefinitely. This indicates that after the dimension of the first protrusion 122 in the axial direction Z increases to a certain extent, it can achieve a good blocking effect on the airflow 3, and as the dimension of the first protrusion 122 in the axial direction Z increases, the blocking effect of the first protrusion 122 on the airflow 3 does not significantly improve.

[0169] Referring to Examples 31-35, when the value of H1 is within the range defined in this application, the value of ESFQR is less than 35nm, and the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Examples 31-35 is better.

[0170] In contrast, in embodiment 30, the value of H1 is less than the range defined in this application. The first protrusion 122 cannot effectively block the airflow 3. The ESFQR of the epitaxial silicon wafer 2 is larger, and the quality of the silicon wafer 2 is not as good as that of the silicon wafer 2 produced by the epitaxial substrate 1 in embodiments 31-36.

[0171] In contrast, in embodiment 36, the value of H1 is greater than the range defined in this application. Although the first protrusion 122 can effectively block the airflow 3 and the ESFQR of the epitaxial silicon wafer 2 meets the requirements, the effect of the additional portion of the first protrusion 122 along the axial direction Z is not obvious compared to embodiments 31-35.

[0172] Example 37

[0173] In Example 37, the value of I1 is 218 mm and the value of D is 9.25 mm.

[0174] Examples 38-41

[0175] Example 31 - The epitaxial base 1 in Example 31 is the same as in Example 30 except for the following differences: the value of I1 is adjusted, please refer to Table 6 for details.

[0176] Table 6

[0177] <![CDATA[I1 / mm]]> ESFQR / nm Example 37 218 38.6 Example 38 220 31.2 Example 39 230 25.7 Example 40 240 33.8 Example 41 242 36.9

[0178] Referring to Examples 37-41, as the value of I1 increases, the ESFQR value of silicon wafer 2 first decreases and then increases, meaning that the flatness of silicon wafer 2 at the epitaxial layer first gradually improves and then gradually deteriorates. In Examples 37 and 41, the values ​​of I1 are outside the range defined by the embodiments of this application. The larger ESFQR values ​​in Examples 37 and 41 indicate that the quality of silicon wafer 2 produced by epitaxial substrate 1 in Examples 37 and 41 is not as good as the quality of silicon wafer 2 produced by epitaxial substrate 1 in Examples 38-40. Conversely, the smaller ESFQR value in Example 39 indicates that the quality of silicon wafer 2 produced by epitaxial substrate 1 in Example 39 is better.

[0179] Accordingly, please refer to Figure 12 This application also provides an epitaxial device, including an epitaxial base 1 as described in any of the above embodiments.

[0180] The foregoing has provided a detailed description of an epitaxial base and epitaxial device provided in the embodiments of this application. Specific examples have been used in this application to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A base for epitaxy, characterized in that, include: The support portion (11) has an axial direction (Z) and a radial direction (X) perpendicular to the axial direction (Z), and a circumferential direction (Y) surrounding the axial direction (Z). The support portion (11) has an edge (111) in the radial direction (X). The limiting part (12) includes a first body (121) and a first protrusion (122). The first body (121) is disposed along the circumferential direction (Y) and connected to the edge (111). The first body (121) has a first reference surface (1211) in the axial direction (Z). The first protrusion (122) is connected to the first reference surface (1211). The first body (121) and the supporting part (11) together define a supporting space (123) for placing the silicon wafer (2). The first protrusion (122) is used to block at least part of the airflow (3) blowing toward the silicon wafer (2) along the radial direction (X). The first protrusion (122) has a first surface (1221) and a second surface (1222) opposite each other in the circumferential direction (Y). The first surface (1221) and the second surface (1222) are connected to the first reference surface (1211) and can extend from the first reference surface (1211) in a direction away from the first body (121). The distance between the first surface (1221) and the second surface (1222) in the circumferential direction (Y) decreases along the axial direction (Z). The first surface (1221) protrudes toward the second surface (1222), and the second surface (1222) protrudes toward the first surface (1221). The supporting part (11) includes: The second body (112) is connected to the first body (121), and the second body (112) and the first body (121) enclose the bearing space (123). The second protrusion (113) is disposed in the bearing space (123) along the circumferential direction (Y) and connected to the second body (112) and the first body (121). The second protrusion (113) is used to support the silicon wafer (2) so that the silicon wafer (2) is spaced apart from the second body (112). The second protrusion (113) has a fourth surface (1131) facing away from the second body (112), the fourth surface (1131) is used to support the silicon wafer (2), and the surface where the fourth surface (1131) is located has an angle α with the surface where the first reference surface (1211) is located, satisfying: 3.1°≤α≤4.1°; The first body (121) also has a second reference surface (1212), which is opposite to the first reference surface (1211) along the axial direction (Z), and the first reference surface (1211) and the second reference surface (1212) have a maximum distance d1 between them in the axial direction (Z). The second body (112) has a third reference surface (1121) that is away from the fourth surface (1131), the third reference surface (1121) and the second reference surface (1212) are flush in the radial direction (X), and the fourth surface (1131) and the third reference surface (1121) have a maximum distance d2 in the axial direction (Z); It satisfies: 0.8mm≤d1-d2≤1.2mm.

2. The epitaxial base according to claim 1, characterized in that, The end of the first surface (1221) away from the first reference surface (1211) along the axial direction (Z) is connected to the end of the second surface (1222) away from the first reference surface (1211) along the axial direction (Z).

3. The epitaxial base according to claim 2, characterized in that, The first protrusion (122) also has a third surface (1223) located between the first surface (1221) and the second surface (1222) and connected to the first surface (1221) and the second surface (1222) respectively. The third surface (1223) is connected to the end of the first surface (1221) and the second surface (1222) away from the first reference surface (1211).

4. The epitaxial base according to claim 1, characterized in that, The limiting part (12) includes a plurality of first protrusions (122), which are spaced apart along the circumferential direction (Y). Adjacent first protrusions (122) have a groove (124), and the first surface (1221), the second surface (1222), and the first reference surface (1211) form the groove (124). Airflow (3) can pass through the groove (124) and blow toward the silicon wafer (2) along the radial direction (X).

5. The epitaxial base according to claim 1, characterized in that, The supporting part (11) includes: The second body (112) is connected to the first body (121), and the second body (112) and the first body (121) enclose the bearing space (123). The second protrusion (113) is disposed in the bearing space (123) along the circumferential direction (Y) and connected to the second body (112) and the first body (121). The second protrusion (113) is used to support the silicon wafer (2) so that the silicon wafer (2) is spaced apart from the second body (112). The second protrusion (113) has a minimum dimension D along the radial direction (X) that satisfies: 6.25mm≤D≤11.25mm.

6. The epitaxial base according to claim 5, characterized in that, The second body (112) includes: First subsection (1122); The second sub-part (1123) is disposed along the circumferential direction (Y) and connected to the first sub-part (1122) along the radial direction (X). The second sub-part (1123) has a plurality of through holes (1124) communicating with the bearing space (123). The third sub-part (1125) is disposed along the circumferential direction (Y) and connected along the radial direction (X) to the side of the second sub-part (1123) away from the first sub-part (1122). The third sub-part (1125) is connected to the first body (121) along the radial direction (X). The second protrusion (113) is connected to the third sub-part (1125) along the axial direction (Z).

7. The epitaxial base according to claim 6, characterized in that, The maximum dimension of the first sub-part (1122) along the radial direction (X) is I1, which satisfies: 220mm≤I1≤240mm.

8. The epitaxial base according to claim 1, characterized in that, The maximum dimension of the first protrusion (122) along the circumferential direction (Y) is L, which satisfies: 30πmm≤L≤41πmm.

9. The epitaxial base according to claim 1, characterized in that, The first protrusion (122) has a maximum dimension H1 along the axial direction (Z) that satisfies: 0.3mm≤H1≤0.7mm.

10. An epitaxial device, characterized in that, Includes an epitaxial base as described in any one of claims 1-9.

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