Storage address reconstruction method, chip, electronic equipment and storage medium

Abstract

The invention discloses a storage address reconstruction method, a chip, electronic equipment and a storage medium. The method comprises the following steps: determining a corresponding second access address according to a first access address and address reconstruction mapping information; accessing a storage medium according to the second access address; wherein the addressable range of the first access address is smaller than the address range corresponding to all storage spaces of the storage medium; the storage spaces, corresponding to the second access address, on the storage medium are all available storage spaces. According to the scheme provided by the embodiment of the invention, the addressing range of the logic address is externally provided based on the size of the available storage space in the storage medium, and the logic address is converted into the physical address according to the address reconstruction mapping information, so that bad blocks actually existing in the storage medium can be effectively shielded, and the available space of the storage medium is flexibly and fully utilized; and the influence of various bad block conditions on the access of peripheral software and hardware to the storage medium is greatly reduced.

Description

Technical Field

[0001] The present disclosure relates to, but is not limited to, the field of storage technology, and in particular to a storage address reconstruction method, chip, electronic device, and storage medium. Background Art

[0002] Nowadays, the scale of chip systems is becoming increasingly large and complex, and the amount of data that SoC (System on Chip) needs to process in specific application scenarios is constantly increasing. Therefore, the demand for large-capacity on-chip storage media in the chip design stage is becoming increasingly strong. The working performance and bandwidth of a series of modules such as CPU (Central Processing Unit), DSP (Digital Signal Processing) and BB (Baseband) integrated in the system depend on the reliability of the on-chip storage medium. With the continuous development of advanced process technology, the cost of chip tape-out continues to rise, and the yield rate of high-density and large-volume on-chip storage media is also a major challenge. Generally speaking, the larger the capacity of the storage medium, the more defects will appear. If the impact of the bad chip rate of the on-chip storage medium in production and manufacturing on the overall yield rate of the chip cannot be reduced, it will inevitably make the functions defined by the chip design not meet expectations, seriously hinder the process of mass production and lead to an increase in mass production costs.

[0003] In fact, it is quite common for on-chip storage media to produce bad chips during production and manufacturing. How to overcome the impact of bad chips on the subsequent chip function execution is a problem that needs to be faced and solved in the chip design field. Summary of the invention

[0004] The embodiments of the present disclosure provide a storage address reconstruction method, chip, electronic device and storage medium. Based on the size of the available storage space in the storage medium, an addressing range of a logical address is provided to the outside, and the conversion from the logical address to the physical address is performed according to the address reconstruction mapping information. The bad blocks actually existing in the storage medium can be effectively shielded to the outside, and it is ensured that when the addressing instruction hits the bad block, it is converted into an access to a normal available storage block, so that the available space of the storage medium is flexibly and fully utilized, and the influence of various bad block conditions on the access of peripheral software and hardware to the storage medium is greatly reduced.

[0005] The present disclosure provides a storage address reconstruction method, including:

[0006] Determine a corresponding second access address according to the first access address and the address reconstruction mapping information;

[0007] accessing the storage medium according to the second access address;

[0008] The addressable range of the first access address is smaller than the address range corresponding to all storage spaces of the storage medium; and the storage spaces corresponding to the second access address on the storage medium are all available storage spaces.

[0009] The present disclosure also provides a chip, including:

[0010] storage medium and reconstruction module;

[0011] The reconstruction module is configured to determine a corresponding second access address according to the first access address and the address reconstruction mapping information; and access the storage medium according to the second access address;

[0012] The addressable range of the first access address is smaller than the address range corresponding to all storage spaces of the storage medium; and the storage spaces corresponding to the second access address on the storage medium are all available storage spaces.

[0013] The present disclosure also provides an electronic device, including:

[0014] one or more processors;

[0015] a storage device for storing one or more programs,

[0016] When the one or more programs are executed by the one or more processors, the one or more processors implement the storage address reconstruction method as described in any embodiment of the present disclosure.

[0017] An embodiment of the present disclosure further provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the storage address reconstruction method as described in any embodiment of the present disclosure is implemented.

[0018] Other aspects will be apparent upon reading and understanding the drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0020] Figure 1 It is a schematic diagram of an achievable on-chip storage medium access architecture;

[0021] Figure 2 is a flow chart of a storage address reconstruction method provided by an embodiment of the present invention;

[0022] Figure 3 is a flow chart of another storage address reconstruction method provided by an embodiment of the present invention;

[0023] Figure 4 is a schematic diagram of the structure of a chip provided by an embodiment of the present invention;

[0024] Figure 5 is a schematic diagram of the structure of another chip provided by an embodiment of the present invention;

[0025] Figure 6 is a schematic diagram of the structure of another chip provided by an embodiment of the present invention;

[0026] Figure 7 is a schematic diagram of the structure of another chip provided by an embodiment of the present invention;

[0027] Figure 8 It is a schematic diagram of the structure of another chip provided by an embodiment of the present invention.

[0028] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0029] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0030] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0031] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0032] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0033] In addition, the technical solutions between the various embodiments of the present invention can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0034] In order to solve the problem of storage medium damage during manufacturing, some repair solutions have been proposed in the art. In some feasible solutions, redundant circuits are added, and redundant row (Column) storage media and column (Row) storage media are usually provided as backup in addition to the main storage medium. At the same time, additional MBIST (Memory Built-In Self Test) circuits and EFUSE (Electronic Fuses) circuits need to be added to cooperate with the repair. When a row or a column of the main storage medium is defective / damaged, it can be replaced by a redundant storage medium. Prevent the erroneous / damaged main storage medium from affecting the normal application function of the SoC. This solution protects the main storage medium of the chip within the size range of the redundant storage medium. However, if the number of redundant storage media is too small and the number of defects is too large, exceeding the scope of repair, then the protection mechanism of this redundant circuit will fail; if the number of redundant storage media is too large, then it is a waste of the area and manufacturing cost of the entire chip.

[0035] In some realizable SoC chips, the access framework of the internal storage medium is as follows Figure 1As shown, it includes: a storage medium access module, an address bus control module, and an on-chip storage medium. Among them, the storage medium access module can be a series of on-chip working modules such as CPU, DSP, BB, etc. that need to access the on-chip storage medium. The address bus control module receives access requests issued by different storage medium access modules, parses and processes the generated address information, read-write control information, and read-write data information, and then transmits it to the on-chip storage medium for data read and write access. Once the on-chip storage medium is repaired by redundant storage media, there are still bad chips in some address spaces, and the access behavior hits the bad storage medium interval, which will inevitably lead to functional errors and cause serious consequences.

[0036] Therefore, the embodiments of the present disclosure provide a storage address reconstruction method, chip, electronic device and storage medium, which provide an addressing range of a logical address based on the size of the available storage space in the storage medium, convert the logical address to the physical address according to the address reconstruction mapping information, and can effectively shield the bad blocks actually existing in the storage medium from the outside, and ensure that when the addressing instruction hits the bad block, it is converted into an access to a normal available storage block, so as to flexibly and fully utilize the available space of the storage medium and greatly reduce the influence of various bad block conditions on the access of peripheral software and hardware to the storage medium.

[0037] It should be noted that, in the embodiments of the present disclosure, available means that the storage is not damaged and data can be accessed normally, and unavailable means that the storage is damaged or defective and data cannot be accessed normally, regardless of whether the relevant storage is occupied.

[0038] The present disclosure provides a storage address reconstruction method, such as Figure 2 As shown, including:

[0039] Step 210, determining a corresponding second access address according to the first access address and address reconstruction mapping information;

[0040] Step 220, accessing a storage medium according to the second access address;

[0041] The addressable range of the first access address is smaller than the address range corresponding to all storage spaces of the storage medium; and the storage spaces corresponding to the second access address on the storage medium are all available storage spaces.

[0042] The storage medium can be accessed to read data according to the second access address, that is, the second access address can be understood as the physical address of the storage medium. Relatively speaking, the first access address needs to be converted to obtain the second access address, which can be understood as a logical address. Among them, the second access address obtained after the first access address is converted can be the same as or different from the first access address before the conversion, which is determined according to the address reconstruction mapping information.

[0043] It can be understood that the addressable range of the first access address is smaller than the address range corresponding to the total storage space of the storage medium, that is, the total amount of storage space corresponding to the addressable range of the first access address is smaller than the total amount of the total storage space of the storage medium. Among them, the total storage space of the storage medium includes available space and non-available space. For example, the total storage space of the storage medium is 256M, and the actual physical access address is: 0x0000 0000-0x0FFF FFFF, among which 128M is not damaged and can be used normally, and 128M is damaged and unavailable during production. For the 128M available storage space, the maximum searchable range of the first access address provided to the outside is 0x0000 0000-0x07FF FFFF. The available 128M storage space is not necessarily continuously distributed in the first 128M of the total storage space of 256M, and can be any continuous or scattered position. It can be seen that the first access address is a continuous address range, and the total amount of storage space corresponding to the maximum addressable range is the maximum total amount of available storage space of the storage medium. That is, the external software and hardware system uses the continuous first access address to access the undamaged available storage space in the storage medium without paying attention to the actual physical address (second access address) of the available storage space.

[0044] In some exemplary embodiments, the total amount of storage space corresponding to the addressable range of the first access address is all or part of the available storage space on the storage medium.

[0045] For example, the total storage space of the storage medium is 256M, the total available storage space is 128M, the total storage space corresponding to the addressable range of the first access address can be 128M, or the available storage space is 100M of 128M, or the available storage space is 64M of 128M.

[0046] In some exemplary embodiments, all storage spaces of the storage medium are divided into a plurality of address groups, and the plurality of address groups include one or more available address groups and one or more unavailable address groups;

[0047] The total amount of storage space corresponding to the addressable range of the first access address is the total amount of storage space corresponding to one or more available address groups in the multiple address groups;

[0048] Wherein, all storage spaces corresponding to each of the available address groups are available.

[0049] It can be seen that the storage medium divides the entire storage space into multiple physical address groups, and the physical addresses of the storage space corresponding to each address group are continuous. The storage space corresponding to the available address group is all available, and the storage space corresponding to the unavailable address group is not all available; that is, there is at least one unavailable / damaged storage address in the storage space corresponding to the unavailable address group.

[0050] According to the above embodiment, the storage space is managed in groups, and the addressable range of the first access address is published to the outside. The size of the storage space corresponding to each address group is flexibly set as needed, that is, each address group includes one or more continuous physical addresses and is not limited to specific aspects. For example, a 256M storage medium is divided into 256 address groups, each group is 1M, including 128 available address groups and 128 non-available address groups, or including 64 available address groups and 192 non-available address groups. For another example, a 256M storage medium is divided into 64 address groups, each group is 4M, including 32 available address groups and 32 non-available address groups, or including 15 available address groups and 49 non-available address groups. It can be understood that the more dispersed the lossy / unavailable storage space actually existing in the storage medium is, the fewer available address groups are included after grouping. Optionally, the storage space contained in each address group may also be different. For example, a 256M storage space is divided into 64 address groups, the first 32 groups are 4M each, and the last 16 groups are 8M each, of which 16 4M available address groups and 8 8M available address groups, a total of 128M available address groups. More examples are not described here one by one.

[0051] In some exemplary embodiments, the address reconstruction mapping information includes address reconstruction mapping information of all or part of the plurality of address groups, or includes address remapping information of the one or more non-available address groups;

[0052] The address reconstruction mapping information of each address group includes: a reconstruction mapping address group;

[0053] The reconstructed mapping address group corresponding to the unavailable address group points to an available address group.

[0054] It can be seen that, matching the storage medium being divided into groups, the address reconstruction mapping information includes address reconstruction mapping information corresponding to one or more address groups, respectively indicating the corresponding address groups after mapping, ie, the reconstructed mapping address groups.

[0055] In some exemplary embodiments, the address reconstruction mapping information of each address group further includes: an address group index, wherein the address group index is determined according to the first access address.

[0056] In some exemplary embodiments, the reconstructed mapping address groups corresponding to the available address groups point to themselves or another available address group.

[0057] It can be understood that the reconstructed mapping address groups recorded in the address reconstruction mapping information all point to the actually available address groups, that is, the second access addresses obtained by mapping according to the first access address all correspond to accessing the available storage medium.

[0058] For example, the address reconstruction mapping information includes the address reconstruction mapping information of all the address groups, as shown in Table 1 below:

[0059] Table 1 - Address Reconstruction Mapping Information Table

[0060] Address Group (index) Reconstruct the mapping address group (index) 0 Remap Index 0 1 Remap Index 1 … N-1 Remap Index N-1

[0061] That is, all the storage spaces of the storage medium are divided into N groups, and Table 1 includes the reconstruction mapping information of all N address groups. These N address groups include available address groups and unavailable address groups.

[0062] Again, for example, all the storage spaces of the storage medium are divided into N groups, and Table 1 includes the reconstruction mapping information of n address groups, where n < N. These n address groups include available address groups and unavailable address groups.

[0063] Among them, the reconstructed mapping address groups corresponding to the available address groups point to themselves or another available address group, and the reconstructed mapping address groups corresponding to the unavailable address groups point to an available address group.

[0064] For example, the address reconstruction mapping information includes the address remapping information of one or more non-available address groups, as shown in Table 2 below:

[0065] Table 2 - Address Reconstruction Mapping Information Table

[0066] Address Group (index) Reconstruct the mapping address group (index) 0 Remap Index 0 3 Remap Index 3 … N-3 Remap Index N-3

[0067] That is, the entire storage space of the storage medium is divided into N groups. The reconstruction mapping information of n unavailable address groups is included in Table 2, where n < N. The reconstruction mapping address group corresponding to each unavailable address group points to an available address group. For other available address groups, since the reconstruction mapping address group index is the same as its own address group index, they may not be included in the address reconstruction mapping information table. As shown in Table 2, for example, since the address group corresponding to address group index 1 is available and is still mapped to reconstruction mapping address group 1, and the address group corresponding to address group index 2 is available and is still mapped to reconstruction mapping address group 2, the mapping information of address group indices 1 and 2 is not included in the address reconstruction mapping information table at this time. It can be understood that when looking up this address reconstruction mapping information table, if the corresponding reconstruction mapping address group index cannot be found according to the address group index, it indicates that the actual reconstruction mapping address group index is the same as its own address group index.

[0068] In some exemplary embodiments, the entire storage space of the storage medium is divided into N groups, among which there are n available address groups. The addressing range of the first access address covers the first n address groups. Then the address reconstruction mapping information includes the address reconstruction mapping information of the n address groups, that is, it includes: the first n address group indices and the corresponding reconstruction mapping address groups. It can be understood that the address index is determined according to the first access address. Since the addressing range of the first address only covers the address range of the first n address groups, therefore, the address group index determined according to the first access address is from 0 to n - 1, and the address group indices from n to N - 1 cannot be obtained; at this time, the subsequent N - n pieces of address reconstruction mapping information may not be included.

[0069] In some exemplary embodiments, the reconstruction mapping address group corresponding to the non - available address group points to an available address group outside the addressable range of the first access address.

[0070] It can be understood that for external software or hardware modules, data reading and writing in the storage medium are performed through the first access address. When the physical address group corresponding to the first access address is an unavailable address group, with the help of its corresponding reconstruction mapping address group, it points to a physical address group outside the addressable range of the first access address, which can avoid affecting the physical address groups within the addressable range of the first access address and avoid more complex address group remapping relationship configurations.

[0071] In some exemplary embodiments, determining the corresponding second access address according to the first access address and the address reconstruction mapping information includes:

[0072] Determining a first address group according to the first access address;

[0073] Determining the first address reconstruction mapping information corresponding to the first address group;

[0074] Determine the second access address according to the first address reconstruction mapping information and the first access address;

[0075] The first access address and the second access address both include: address group information and intra-group address information, and the intra-group address information of the first access address and the intra-group address information of the second access address correspond one to one.

[0076] In some exemplary embodiments, the intra-group address information of the first access address is the same as the intra-group address information of the second access address.

[0077] In some exemplary embodiments, the address group information of the first access address is high-bit information of the first access address, and the intra-group address information of the first access address is low-bit information of the first access address.

[0078] In some exemplary embodiments, the address group information of the second access address is high-bit information of the second access address, and the intra-group address information of the second access address is low-bit information of the second access address.

[0079] In some exemplary embodiments, determining first address reconstruction mapping information corresponding to the first address group includes:

[0080] According to the first address group, searching for preset address reconstruction mapping information;

[0081] When a matching item is found and the reconstructed mapping address group included in the matching item is not empty, determining that the matched address reconstruction mapping information is the first address reconstruction mapping information;

[0082] When no matching item is found, or when a matching item is found but the reconstructed mapping address group included in the matching item is empty, it is determined that the reconstructed mapping address group included in the first address reconstruction information is the first address group.

[0083] The preset address reconstruction mapping information includes address reconstruction mapping information of at least one address group.

[0084] It can be understood that in some exemplary embodiments, the preset address reconstruction mapping information is searched according to the first access address, and in the case of a hit, the second access address is determined according to the specific address reconstruction mapping information indicated by the matching result; in the case of a miss, it is determined that the physical address group indicated by the first access address is available itself and does not need to be remapped to other physical address groups. Wherein, when a certain address group in the preset address reconstruction mapping information is hit according to the first access address, the physical address corresponding to the address group itself may be available or unavailable. The reconstructed mapping address group corresponding to the unavailable address group points to an available physical address group, and the reconstructed mapping address group corresponding to the available address group points to itself or another physical address group. Wherein, the address group index is determined according to the first access address, and then the corresponding reconstructed mapping address group index can be matched from the preset address reconstruction mapping information according to the address group index, indicating a (hit); if the corresponding reconstructed mapping address group index cannot be matched, it indicates a miss.

[0085] It should be noted that the preset address reconstruction mapping information includes address reconstruction mapping information of one or more address groups (first address groups), which is used to point the first address group determined according to the first access address to the new second address group (reconstruction mapping address group), thereby realizing the reconstruction of the first access address. The specific mapping method can be flexibly determined according to needs, with the goal of providing reliable storage functions to the outside. The reconstructed mapping address groups corresponding to the first address groups within the coverage range of the first access address all indicate available physical address groups, and the available physical address groups indicated by the reconstructed mapping address groups corresponding to each first address group within the coverage range of the first access address are different. Based on this, the storage medium can be read and written normally according to the first access address without conflict, without paying attention to the physical address where the actual bad block is located. It can be seen that, depending on whether each physical address group is actually available, the first address group before mapping and the second address group after mapping in the address reconstruction mapping information can be the same or different. Since the first address group (index) determined according to the first access address may be different from the corresponding second address group (group) in the address reconstruction mapping information, the step of determining the second address group (index) according to the first address group (index) is also called address group redirection.

[0086] It can be seen that, according to the address group information included in the first access address, the corresponding first address group is determined, and the corresponding address reconstruction mapping information is obtained, which is recorded as the first address reconstruction mapping information;

[0087] Then, the address group information included in the second access address is determined according to the reconstructed mapping address group in the first reconstructed mapping information, and the intra-group address information included in the second access address is determined according to the intra-group address information included in the first access address, and finally the second access address is determined.

[0088] In some exemplary embodiments, the storage medium includes a plurality of memories;

[0089] The address reconstruction mapping information of each address group further includes: a memory number.

[0090] For example, the address reconstruction mapping information includes address reconstruction mapping information of all the address groups, as shown in Table 3 below:

[0091] Table 3 - Address reconstruction mapping information table

[0092] Address Group (index) Memory number Reconstruct the mapping address group (index) 0 1 Remap Index 0 1 1 Remap Index 1 2 2 Remap Index 3 … … N-1 2 Remap Index N-1

[0093] In some exemplary embodiments, determining the corresponding second access address according to the first access address and the address reconstruction mapping information includes:

[0094] Determine a first address group and corresponding first address reconstruction mapping information according to the first access address;

[0095] Determine the second access address according to the first address reconstruction mapping information and the first access address;

[0096] The first access address and the second access address both include: address group information and intra-group address information, and the intra-group address information of the first access address corresponds to the intra-group address information of the second access address in one-to-one correspondence;

[0097] The second access address is an access address on the memory indicated by the memory number in the first address reconstruction mapping information.

[0098] It can be seen that, according to the address group information included in the first access address, the corresponding first address group is determined, and the corresponding address reconstruction mapping information is obtained, which is recorded as the first address reconstruction mapping information;

[0099] Then, determine the memory corresponding to the second access address according to the memory number in the first reconstructed mapping information; determine the address group information included in the second access address according to the reconstructed mapping address group in the first reconstructed mapping information; determine the intra-group address information included in the second access address according to the intra-group address information included in the first access address, and finally determine the second access address, which is the access address on the memory indicated by the memory number in the reconstructed mapping information of the first address.

[0100] For example, the storage medium in the system includes two memories 1 and 2. The total storage space of memory 1 is 128M, of which 64M is available. The total storage space of memory 2 is 256M, of which 192M is available, that is, there are 256M available storage space in the total storage space 128+256=384M. In some exemplary embodiments, the searchable range of the first access address is 0-256M. The upper-level software uses a continuous first access address to access the data in the 256M available storage space, but the actual storage location of this 256M data is distributed in the continuous and / or discontinuous memory space in memories 1 and 2. According to the above-mentioned address reconstruction mapping information table, the memory number and the physical address (second access address) in the determined memory can be determined by the first access address, and the corresponding data can be accessed accordingly. It can be understood that in the case of multiple memories, the second access address includes the memory number (identification) and the access address in the memory. More examples are not recorded here one by one.

[0101] In some exemplary embodiments, the multiple memories may be multiple memories on one SoC chip; or multiple memories on multiple SoC chips, without limitation to a specific aspect.

[0102] In some exemplary embodiments, the address reconstruction mapping information of each address group further includes: a redirection flag indicating whether the address grouping flag needs to be re-determined to obtain a new address grouping flag. In some exemplary embodiments, the address grouping flag is an address grouping index, and the redirection flag is used to indicate whether the address grouping index needs to be re-determined to obtain a new address grouping index.

[0103] For example, the address reconstruction mapping information includes address reconstruction mapping information of all the address groups, as shown in the following Table 4:

[0104] Table 4- Address reconstruction mapping information table

[0105] Address Group (index) Redirection ID Reconstruct the mapping address group (index) 0 0 1 1 Remap Index 1 2 1 Remap Index 3 … … N-1 0

[0106] In Table 4, the address groups with indexes 1 and 2 are unavailable and need to be remapped. In this case, a reconstructed mapping address group is configured to point to the available address group, and its redirection flag is 1, indicating that the address group indexes 1 and 2 need to be re-determined to obtain new address group indexes Remap Index 1 and Remap Index 3. Other address groups are available and do not need to be configured with a reconstructed mapping address group. Its redirection flag is 0, indicating that these address group indexes do not need to be re-determined, and the corresponding reconstructed mapping address group is empty. Alternatively, each reconstructed mapping address group is uniformly configured.

[0107] In some exemplary embodiments, the storage medium is an on-chip storage medium.

[0108] The present disclosure also provides a storage address reconstruction method. Figure 3 As shown, including:

[0109] Step 310, storage media grouping;

[0110] Step 320, the machine tests and determines the bad block / bad chip address information of the storage medium;

[0111] Step 330: determine address reconstruction mapping information according to the bad block / bad slice address information.

[0112] Among them, steps 310 and 320 are not limited to a specific order, and the machine test can be performed first and then the grouping can be performed.

[0113] It can be understood that after the machine test, the address information of the bad block (also called bad chip) can be clearly known, and then which address groups are available address groups can be determined, and then the addressable range of the first access address can be determined.

[0114] The storage medium grouping refers to logical grouping of all available space of the storage medium. The total number of groups and the size of space corresponding to each group are determined according to application requirements and are not limited to a specific method.

[0115] In some exemplary embodiments, the address reconstruction mapping information includes address reconstruction mapping information of all or part of the plurality of address groups, or includes address remapping information of the one or more non-available address groups;

[0116] The address reconstruction mapping information of each address group includes: a reconstruction mapping address group;

[0117] The reconstructed mapping address group corresponding to the unavailable address group points to an available address group.

[0118] In some exemplary embodiments, the storage medium includes 4M storage space, which is divided into 8 groups, each with 0.5M continuous physical address space. In the case of bad blocks, different specifications of chips can be defined based on this, for example, 3.5M, 3M, 2.5M and other different storage medium spaces.

[0119] For example, there are 8 physical address groups, and the address group indexes are 0-7. If the bad block is in physical address group 1, then all accesses to physical address group 1 need to be remapped to another group where no bad blocks exist, such as physical address group 7. According to the mapping strategy, the address reconstruction mapping information is determined as shown in Table 5 below:

[0120] Table 5- Address reconstruction mapping information table

[0121] Address Group (index) Reconstruct the mapping address group (index) 0 0 1 7 2 2 3 3 4 4 5 5 6 6 7 7

[0122] When the storage medium is used, the software obtains the specific storage medium specifications through this address remapping information. At the software level, it only needs to control the access interval within the specification range, without considering the actual address of the defect, to ensure the normal use of the chip function without wasting other development resources and cost resources. At this time, the chip with a specification of 3.5M is defined, that is, the addressing range of the external software or hardware module is 0~3.5M. The external software or hardware module uses the first access address to read and write data in the address space of 0~3.5M. That is, from the software perspective, only a continuous 0~3.5M accessible address space will be seen, thereby achieving maximum application freedom.

[0123] It can be understood that although the reconstructed mapping address groups of address groups 1 and 7 in Table 5 both point to the 7th physical address group, no access conflict will occur. This is because within the addressable range of the first access address of 0 to 3.5M, the first access address will not directly hit the mapping information of the 7th physical address group (target address index 7), but will only hit the mapping information of the 7 groups 0-6.

[0124] For another example, according to the mapping strategy, the address reconstruction mapping information is determined as shown in Table 6 below:

[0125] Table 6-Address reconstruction mapping information table

[0126]

[0127]

[0128] It can be understood that although the reconstructed mapping address groups of address group 7 in Table 6 all point to the first physical address group, it will not cause read and write errors. Because in the addressable range of the first access address of 0 to 3.5M, the first access address will not directly hit the seventh physical address group, but will only hit the 7 groups 0-6. Due to partial damage to the 4M memory, the final available storage space is only 3.5M, and the product specification released to the outside is 3.5M. The addressable range of the first access address is 0 to 3.5M, corresponding to 7 address groups. Optionally, Table 6 can also include only the first 7 rows, without including the row corresponding to address group (index) 7.

[0129] It can be understood that the storage space of the available address group of the storage medium is determined based on the machine test, and then the storage specifications available to the external software or hardware module are determined, that is, the addressable range is determined; and then step 330 is executed to determine the address reconstruction mapping information. When the storage medium is used subsequently, the external software or hardware module uses the first access address to access data within the continuous address space included in the addressable range. There is no need to pay attention to the location of the physical address of the actual bad block. While making full use of the storage medium with some bad blocks, a simple use solution is provided to the outside. Even in the case of new bad blocks, the address reconstruction of the storage medium can be easily achieved by redetermining the reconstruction mapping relationship and updating the address reconstruction mapping information.

[0130] It can be seen that compared with the storage repair solution of adding redundant circuits, the embodiment of the present disclosure does not need to add spare storage media, and only reconstructs access addresses based on the remaining available storage space. It is not limited to the proportion and distribution of bad blocks in the storage medium, and the available storage specifications can be re-determined according to actual conditions. From the perspective of external users of the storage medium, they will only see a storage space with continuous accessible addresses, achieving maximum application freedom.

[0131] The present disclosure also provides a chip, such as Figure 4 As shown, including:

[0132] Storage medium 410 and reconstruction module 420;

[0133] The reconstruction module 420 is configured to determine a corresponding second access address according to the first access address and the address reconstruction mapping information; and access the storage medium 410 according to the second access address;

[0134] The addressable range of the first access address is smaller than the address range corresponding to all storage spaces of the storage medium; and the storage spaces corresponding to the second access address on the storage medium are all available storage spaces.

[0135] In some exemplary embodiments, the total amount of storage space corresponding to the addressable range of the first access address is all or part of the available storage space on the storage medium.

[0136] In some exemplary embodiments, Figure 5 As shown, it also includes:

[0137] The address reconstruction mapping information module 430 is configured to store the address reconstruction mapping information.

[0138] In some exemplary embodiments, the address reconstruction mapping information includes address reconstruction mapping information of all or part of the plurality of address groups, or includes address remapping information of the one or more non-available address groups;

[0139] The address reconstruction mapping information of each address group includes: a reconstruction mapping address group;

[0140] The reconstructed mapping address group corresponding to the unavailable address group points to an available address group.

[0141] In some exemplary embodiments, the address reconstruction mapping information module is a storage module implemented using electronic fuses (Electronic Fuses, EFUSE).

[0142] It can be understood that the address reconstruction mapping information in the address reconstruction mapping information module 430 can be fixed in the EFUSE, or can be configured through computer instructions, and is not limited to a specific aspect.

[0143] In some exemplary embodiments, Figure 6 As shown, the storage medium 410 includes one or more memories 4110;

[0144] The reconstruction module 420 is configured to determine the corresponding memory 4110 and the second access address according to the first access address and the address reconstruction mapping information; and access the determined memory 4110 according to the second access address.

[0145] In some exemplary embodiments, the entire storage space of the storage medium 410 is divided into a plurality of address groups;

[0146] The second access address includes: address group information and intra-group address information.

[0147] In some exemplary embodiments, Figure 7 As shown, the reconstruction module 420 includes: a mapping unit 4210 and at least one selector 4220, each selector 4220 corresponds to an address group;

[0148] The mapping unit 4210 is configured to determine a corresponding selector 4220 according to the address group information included in the second access address; and access the storage medium according to the intra-group address information included in the second access address through the determined selector 4420.

[0149] In some exemplary embodiments, when multiple memories 4110 are included, the storage space of each memory is evenly divided into one or more address groups, and each selector 4220 corresponds to an address group on a memory. It can be understood that, when multiple memories 4110 are included, it is possible to provide a continuous address access space to the outside after cascading the available storage spaces on the multiple memories, thereby breaking through the space limitation of a single memory / storage chip and making the most flexible use of the undamaged available space of each memory.

[0150] In some exemplary embodiments, the storage medium includes one or more of the following: static random access memory SRAM, dynamic random access memory DRAM, enhanced dynamic random access memory e-DRAM and flash memory FLASH.

[0151] In some exemplary embodiments, the multiple memories may be multiple memories on one SoC chip; or multiple memories on multiple SoC chips, without limitation to a specific aspect.

[0152] In some exemplary embodiments, Figure 8 As shown, the chip also includes:

[0153] The address bus control module 440 is configured to receive a storage access instruction from the storage medium access module and forward the instruction to the reconstruction module 420 ; wherein the storage access instruction includes the first access address.

[0154] In some exemplary embodiments, the address bus control module 440 is further configured to receive an access result of the reconstruction module 420 accessing the storage medium according to the second access address, and forward the result to the storage medium access module.

[0155] The storage medium access module includes one or more.

[0156] In some exemplary embodiments, the storage medium access module includes a hardware module and / or a software module.

[0157] Optionally, in addition to the address bus interface mode, other interface paths such as FIFO (First In First Out) interface, etc. may be used between the storage medium access module and the chip. Not limited to a specific aspect.

[0158] In some exemplary embodiments, the chip further includes:

[0159] A storage repair circuit, including: a repair configuration circuit, an MBIST (Memory Built-In Self Test) circuit, an EFUSE (Electronic Fuses) circuit and a backup storage medium;

[0160] The backup storage medium includes a row (Column) storage medium and / or a column (Row) storage medium.

[0161] The MBIST circuit is used to determine the fault information of the storage medium 410;

[0162] The EFUSE circuit is used to store the fault information;

[0163] The repair configuration circuit is used for mapping the access address to the spare storage medium according to the fault information.

[0164] It should be noted that the specific scheme of using the storage repair circuit to repair the storage medium and the specific access scheme of these repaired address spaces according to the second access address are not discussed in detail in this application. In some exemplary embodiments, the address space in the storage medium repaired by the storage repair circuit is regarded as an available address.

[0165] The present disclosure also provides a chip, including:

[0166] Storage media and storage repair circuits;

[0167] The storage repair circuit includes: a repair configuration circuit, an MBIST (Memory Built-In Self Test) circuit, an EFUSE (Electronic Fuses) circuit and a spare storage medium;

[0168] The backup storage medium includes a row (Column) storage medium and / or a column (Row) storage medium.

[0169] The MBIST circuit is used to determine the fault information of the storage medium 410;

[0170] The EFUSE circuit is used to store the fault information;

[0171] The repair configuration circuit is used for mapping the access address to the spare storage medium according to the fault information.

[0172] In which, relative to the backup storage medium, the repaired storage medium is also referred to as the primary storage medium. In the implementation of this application, unless otherwise specified, the storage medium and the primary storage medium are equivalent concepts.

[0173] It can be seen that by only using the storage repair circuit to repair the main storage medium, the main storage medium of the chip can be protected within the size range of the redundant storage medium.

[0174] If the storage space of the redundant backup storage medium is less than the defective storage space in the main storage medium, it is beyond the scope of repair. In this case, the storage address reconstruction scheme provided by the embodiment of the present disclosure can be used to reconstruct the storage address based on the available storage space without defects in the main storage medium, or based on the total available storage space after repair in the main storage medium, to provide continuous address access space for the external device.

[0175] An embodiment of the present disclosure further provides a system on chip (SoC), comprising: a chip including a storage medium and a reconstruction module as described in any embodiment of the present disclosure.

[0176] In some exemplary embodiments, the chip further includes: a storage repair circuit.

[0177] An embodiment of the present disclosure further provides a system on chip (SoC), comprising: a chip including a main storage medium and a storage repair circuit as described in any embodiment of the present disclosure.

[0178] In some exemplary embodiments, the SoC further includes one or more of the following processors: a CPU (Central Processing Unit), a DSP (Digital Signal Processing) and a BB (Baseband) processor.

[0179] The present disclosure also provides an electronic device, including:

[0180] one or more processors;

[0181] a storage device for storing one or more programs,

[0182] When the one or more programs are executed by the one or more processors, the one or more processors implement the storage address reconstruction method as described in any embodiment of the present disclosure.

[0183] An embodiment of the present disclosure further provides a computer-readable storage medium on which a computer program is stored. The program is used by a processor to implement the storage address reconstruction method as described in any embodiment of the present disclosure.

[0184] It can be seen that based on the storage address reconstruction method provided by the embodiment of the present disclosure, redundant storage can be provided without the help of additional hardware circuits, and the first access address to the second access address can be reconstructed based on the address reconstruction mapping information, so as to ensure that the access of the relevant system chip is converted to the access to the good storage medium when hitting the bad storage medium interval, thereby ensuring the normal function of the chip. For chips with different bad block\bad chip address space sizes, after the reconstruction mapping provided by the embodiment of the present disclosure, they can be defined as different storage function specifications, that is, chips with different storage medium space sizes, and applied to actual working scenarios with different requirements, instead of a one-size-fits-all approach to eliminate chips that cannot be completely repaired by redundant circuits, which can reduce cost waste and improve the yield of mass production. Through the storage address reconstruction solution provided by the implementation of the present disclosure, after eliminating the address space of the bad block\bad chip, the remaining available / accessible good block\good chip addresses can be connected, thereby facilitating the development of external software\hardware modules for chips of different specifications, and will not increase the additional complexity of use for the storage medium user, greatly reducing the impact on the use of the software\hardware level.

[0185] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all components may be implemented as software executed by a processor, such as a digital signal processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those of ordinary skill in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0186] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A storage address reconstruction method, characterized in that: include: Determine a corresponding second access address according to the first access address and the address reconstruction mapping information; accessing the storage medium according to the second access address; The addressable range of the first access address is smaller than the address range corresponding to all storage spaces of the storage medium; and the storage spaces corresponding to the second access address on the storage medium are all available storage spaces.

2. The method according to claim 1, characterized in that The total amount of storage space corresponding to the addressable range of the first access address is all or part of the available storage space on the storage medium.

3. The method according to claim 1 or 2, characterized in that All storage spaces of the storage medium are divided into a plurality of address groups, wherein the plurality of address groups include one or more available address groups and one or more unavailable address groups; The total amount of storage space corresponding to the addressable range of the first access address is the total amount of storage space corresponding to one or more available address groups in the multiple address groups; Wherein, all storage spaces corresponding to each of the available address groups are available.

4. The method according to claim 3, characterized in that The address reconstruction mapping information includes address reconstruction mapping information of all or part of the plurality of address groups, or includes address remapping information of the one or more non-available address groups; The address reconstruction mapping information of each address group includes: a reconstruction mapping address group; The reconstructed mapping address group corresponding to the unavailable address group points to an available address group.

5. The method according to claim 4, characterized in that The determining the corresponding second access address according to the first access address and the address reconstruction mapping information includes: determining a first address group according to the first access address; Determine first address reconstruction mapping information corresponding to the first address group; Determine the second access address according to the first address reconstruction mapping information and the first access address; The first access address and the second access address both include: address group information and intra-group address information, and the intra-group address information of the first access address and the intra-group address information of the second access address correspond one to one.

6. The method according to claim 5, characterized in that The intra-group address information of the first access address is the same as the intra-group address information of the second access address.

7. The method according to claim 4, characterized in that The reconstructed mapping address group corresponding to the non-available address group points to an available address group outside the addressable range of the first access address.

8. The method according to claim 4, characterized in that The storage medium includes a plurality of memories; The address reconstruction mapping information of each address group further includes: a memory number.

9. The method according to claim 8, characterized in that The determining the corresponding second access address according to the first access address and the address reconstruction mapping information includes: Determine a first address group and corresponding first address reconstruction mapping information according to the first access address; Determine the second access address according to the first address reconstruction mapping information and the first access address; The first access address and the second access address both include: address group information and intra-group address information, and the intra-group address information of the first access address corresponds to the intra-group address information of the second access address in one-to-one correspondence; The second access address is an access address on the memory indicated by the memory number in the first address reconstruction mapping information.

10. A chip, characterized in that: include: storage medium and reconstruction module; The reconstruction module is configured to determine a corresponding second access address according to the first access address and the address reconstruction mapping information; accessing the storage medium according to the second access address; The addressable range of the first access address is smaller than the address range corresponding to all storage spaces of the storage medium; and the storage spaces corresponding to the second access address on the storage medium are all available storage spaces.

11. The chip according to claim 10, characterized in that: Also includes: The address reconstruction mapping information module is configured to store the address reconstruction mapping information.

12. The chip according to claim 11, characterized in that: The address reconstruction mapping information module is a storage module implemented by electronic fuses.

13. The chip according to claim 10, characterized in that: The storage medium includes one or more memories; The reconstruction module is configured to determine a corresponding memory and a second access address according to the first access address and the address reconstruction mapping information; and access the determined memory according to the second access address.

14. The chip according to any one of claims 10 to 13, characterized in that: All storage spaces of the storage medium are divided into a plurality of address groups; The second access address includes: address group information and intra-group address information; The reconstruction module includes: a mapping unit and at least one selector, each selector corresponding to an address group; The mapping unit is configured to determine a corresponding selector according to the address group information included in the second access address; and access the storage medium according to the intra-group address information included in the second access address through the determined selector.

15. The chip according to any one of claims 10 to 13, characterized in that: The storage medium includes one or more of the following: static random access memory SRAM, dynamic random access memory DRAM, enhanced dynamic random access memory e-DRAM and flash memory FLASH.

16. An electronic device, characterized in that: include: one or more processors; a storage device for storing one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors implement the storage address reconstruction method according to any one of claims 1 to 9.

17. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the storage address reconstruction method according to any one of claims 1 to 9 is implemented.

Images