Matching network design method and system for reducing insertion loss, terminal and medium

Abstract

The invention provides a matching network design method and system for reducing insertion loss, a terminal and a medium, and the method comprises the steps: firstly designing a matching network based on a circuit design target, replacing a non-ideal device in the designed matching network with an ideal device model, and carrying out the modeling of an ideal device according to the equivalent load condition of a post-stage circuit, the method comprises the following steps of: drawing an impedance matching track diagram of a load under the action of a matching network by utilizing a Smith chart, and finally adjusting a matching track in the impedance matching track diagram by adjusting component parameters in the matching network to obtain the matching network for reducing insertion loss. According to the method, the insertion loss of the matching network is optimized by analyzing the matching track, so that the due matching function of the matching network is ensured and the insertion loss of the matching network can be optimized under the condition that the manufacturing process and the structure of the matching network are determined, and high-efficiency energy transmission is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency microwave circuit design, and in particular to a matching network design method, system, terminal and medium for reducing insertion loss. Background Art

[0002] The matching network is an essential module in RF microwave circuit design. Its function is to achieve the maximum energy transmission between the previous and next circuits or loads, or to make the previous circuit work in the best state. Insertion loss is an indicator in circuit design, which is used to measure the energy loss caused by inserting a module into the circuit. Since the matching network usually includes passive components such as inductors, capacitors, resistors, transformers, etc., its insertion loss is a design difficulty that makes RF microwave engineers extremely headache.

[0003] In order to solve the above problems, the existing technology usually adopts the improvement of circuit structure to reduce the insertion power consumption of matching network, but it needs to change the circuit structure, which not only increases the complexity of design, but also makes the design process cumbersome and time-consuming. In addition, such changes in circuit structure may also affect the matching function, and there is no solution for how to achieve the optimal insertion loss under a certain structure, which makes it difficult to adapt to the needs of diverse application scenarios, limiting its wide application. Summary of the invention

[0004] In view of the shortcomings of the prior art mentioned above, the purpose of the present invention is to provide a matching network design method, system, terminal and medium for reducing insertion loss, which is used to solve the technical problem that the insertion power consumption of the matching network is reduced by changing the circuit structure in the prior art, the design complexity and loss matching function are increased, and no solution is proposed for how to achieve the optimal insertion loss under a certain structure, which makes it difficult to adapt to diverse needs.

[0005] To achieve the above-mentioned purpose and other related purposes, the present invention provides a matching network design method for reducing insertion loss, the method comprising: designing a matching network based on a circuit design goal; replacing non-ideal devices in the designed matching network with ideal device modeling to obtain an equivalent model of the matching network; using a Smith chart to draw an impedance matching trajectory diagram of the load under the action of the matching network according to the equivalent load condition of the subsequent circuit; and adjusting the matching trajectory in the impedance matching trajectory diagram by adjusting the component parameters in the matching network to obtain a matching network with reduced insertion loss.

[0006] In one embodiment of the present invention, designing a matching network based on a circuit design goal includes: constructing a matching network according to an architecture of the matching network determined by circuit requirements, selecting a plurality of passive components, and establishing a connection relationship between each passive component in the matching network.

[0007] In one embodiment of the present invention, the non-ideal devices in the designed matching network are modeled and replaced by ideal devices to obtain an equivalent model of the matching network, including: according to microwave radio frequency circuit theory, each non-ideal device in the designed matching network is modeled and replaced by multiple ideal devices with single characteristics to obtain an equivalent model of the matching network.

[0008] In one embodiment of the present invention, the method of using a Smith chart to draw an impedance matching trajectory diagram of the load under the action of a matching network according to the equivalent load of a subsequent circuit includes: using a Smith chart to draw a plurality of target points and a plurality of trajectory curve segments formed by sequentially connecting adjacent target points according to the equivalent load of the subsequent circuit and the equivalent model of the matching network, so as to obtain an impedance matching trajectory diagram having a matching trajectory composed of a plurality of trajectory curve segments; wherein the number of the drawn target points is equal to the number of components of the equivalent model of the matching network plus one; and the number of trajectory curve segments is the same as the number of components of the equivalent model of the matching network.

[0009] In one embodiment of the present invention, the matching trajectory in the impedance matching trajectory diagram is adjusted by adjusting the component parameters in the matching network to obtain a matching network with reduced insertion loss, including: finding target points other than the first and last target points on the matching trajectory in the impedance matching trajectory diagram as matching intermediate target points, and determining the minimum resistance point passed by the current matching trajectory among the matching intermediate target points; adjusting the component parameters of the equivalent model of the matching network to move the position of the minimum resistance point toward the large resistance area until the matching trajectory meets the optimal trajectory, thereby determining a matching network with reduced insertion loss.

[0010] In one embodiment of the present invention, the method of adjusting the parameters of the components of the equivalent model of the matching network so that the position of the minimum resistance point moves toward the large resistance area until the matching trajectory conforms to the optimal trajectory, and determining the matching network with reduced insertion loss includes: based on the insertion loss optimization strategy, adjusting the values ​​of one or more devices in the equivalent model of the matching network to sequentially move the positions of the trajectory curve segments of the matching trajectory so that the position of the minimum resistance point moves toward the large resistance area until the matching trajectory is adjusted to the optimal trajectory; determining the parameters of the components in the adjusted matching network based on the values ​​of each device in the equivalent model of the matching network adjusted to the optimal trajectory, and determining the matching network with reduced insertion loss in combination with the structure of the designed matching network.

[0011] In one embodiment of the present invention, the insertion loss optimization strategy includes: without changing the impedance values ​​of the first and last target points, moving the minimum resistance point to a direction with a larger resistance value as much as possible, while ensuring that the resistance values ​​of all other matching intermediate points are not less than the resistance value of the minimum resistance point.

[0012] To achieve the above-mentioned purpose and other related purposes, the present invention provides a matching network system for reducing insertion loss, the system comprising: a preliminary design module, used to design a matching network based on a circuit design goal; an equivalent substitution module, connected to the preliminary design module, used to replace the non-ideal devices in the designed matching network with ideal device modeling to obtain an equivalent model of the matching network; a matching trajectory drawing module, connected to the equivalent substitution module, used to draw an impedance matching trajectory diagram of the load under the action of the matching network according to the equivalent load condition of the subsequent circuit using a Smith chart; an insertion loss optimization module, connected to the matching trajectory drawing module, used to adjust the matching trajectory in the impedance matching trajectory diagram by adjusting the parameters of the components in the matching network to obtain a matching network with reduced insertion loss.

[0013] To achieve the above-mentioned purpose and other related purposes, the present invention provides an electronic terminal, comprising: one or more memories and one or more processors; the one or more memories are used to store computer programs; the one or more processors are connected to the memories and are used to run the computer programs to execute the matching network method for reducing insertion loss.

[0014] To achieve the above-mentioned object and other related objects, the present invention provides a computer-readable storage medium storing a computer program, wherein the computer program executes the matching network method for reducing insertion loss when executed by one or more processors.

[0015] As described above, the present invention is a matching network method, system, terminal and medium for reducing insertion loss, and has the following beneficial effects: the present invention first designs a matching network based on the circuit design target, and replaces the non-ideal devices in the designed matching network with ideal device modeling, and then uses the Smith chart to draw the impedance matching trajectory diagram of the load under the action of the matching network according to the equivalent load of the subsequent circuit, and finally adjusts the matching trajectory in the impedance matching trajectory diagram by adjusting the component parameters in the matching network to obtain a matching network with reduced insertion loss. The present invention optimizes the insertion loss of the matching network by analyzing the matching trajectory. When the manufacturing process is determined and the matching network structure is determined, it not only ensures the matching function of the matching network, but also optimizes the insertion loss of the matching network, thereby achieving high-efficiency energy transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic flow chart of a matching network method for reducing insertion loss in one embodiment of the present invention.

[0017] Figure 2 It is a schematic diagram of a Smith chart marking the inductance region and the capacitance region in one embodiment of the present invention.

[0018] Figure 3 Shown is a schematic diagram of a Smith chart identifying a large resistance region and a small resistance region in one embodiment of the present invention.

[0019] Figure 4 Shown is a schematic diagram of a matching network structure in an embodiment of the present invention.

[0020] Figure 5 Shown is a schematic diagram of the T-type equivalent model structure of a transformer in an embodiment of the present invention.

[0021] Figure 6 Shown is a schematic diagram of an equivalent model structure of a matching network in an embodiment of the present invention.

[0022] Figure 7 Shown is a schematic diagram of a matching trajectory of a matching network in an embodiment of the present invention.

[0023] Figure 8 Shown is a schematic diagram of an original matching trajectory of a matching network in an embodiment of the present invention.

[0024] Fig. 9 Shown is a schematic diagram of a matching trajectory after optimizing the insertion loss of the matching network in one embodiment of the present invention.

[0025] Fig.10 Shown is a schematic structural diagram of a matching network system for reducing insertion loss in an embodiment of the present invention.

[0026] Fig.11 Shown is a schematic structural diagram of an electronic terminal in an embodiment of the present invention. DETAILED DESCRIPTION

[0027] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0028] It should be noted that in the following description, reference is made to the accompanying drawings, which describe several embodiments of the present invention. It should be understood that other embodiments may also be used, and that mechanical composition, structural, electrical and operational changes may be made without departing from the spirit and scope of the present invention. The following detailed description should not be considered restrictive, and the scope of the embodiments of the present invention is limited only by the claims of the published patents. The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. Spatially related terms, such as "upper", "lower", "left", "right", "below", "below", "lower", "above", "upper", etc., may be used in the text to facilitate the description of the relationship between an element or feature shown in the figure and another element or feature.

[0029] Throughout the specification, when a part is said to be "connected" to another part, this includes not only the case of "direct connection" but also the case of "indirect connection" by placing other elements therebetween. In addition, when a part is said to "include" a certain constituent element, unless otherwise stated, it does not exclude other constituent elements, but means that other constituent elements may be included.

[0030] The terms first, second and third mentioned herein are used to describe various parts, components, regions, layers and / or segments, but are not limited thereto. These terms are only used to distinguish a certain part, component, region, layer or segment from other parts, components, regions, layers or segments. Therefore, the first part, component, region, layer or segment described below may refer to the second part, component, region, layer or segment within the scope of the present invention.

[0031] Furthermore, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless there is an indication to the contrary in the context. It should be further understood that the terms "comprise", "include" indicate the presence of the described features, operations, elements, components, items, kinds, and / or groups, but do not exclude the presence, occurrence or addition of one or more other features, operations, elements, components, items, kinds, and / or groups. The terms "or" and "and / or" used herein are interpreted as inclusive, or mean any one or any combination. Therefore, "A, B or C" or "A, B and / or C" means "any of the following: A; B; C; A and B; A and C; B and C; A, B and C". Exceptions to this definition will only occur when the combination of elements, functions or operations is inherently mutually exclusive in some way.

[0032] The present invention provides a matching network method for reducing insertion loss. First, a matching network is designed based on a circuit design target, and non-ideal devices in the designed matching network are replaced by ideal device modeling. Then, according to the equivalent load of the subsequent circuit, an impedance matching trajectory diagram of the load under the action of the matching network is drawn using a Smith chart. Finally, by adjusting the parameters of the components in the matching network, the matching trajectory in the impedance matching trajectory diagram is adjusted to obtain a matching network with reduced insertion loss. The present invention optimizes the insertion loss of the matching network by analyzing the matching trajectory. When the manufacturing process and the matching network structure are determined, the matching function of the matching network is guaranteed, and the insertion loss of the matching network can be optimized, thereby achieving high-efficiency energy transmission.

[0033] The following is a detailed description of the embodiments of the present invention with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention. The present invention can be embodied in many different forms and is not limited to the embodiments described herein.

[0034] like Figure 1 A flow chart showing a matching network method for reducing insertion loss in an embodiment of the present invention.

[0035] The method comprises:

[0036] Step S1: designing a matching network based on a circuit design goal.

[0037] In one embodiment, step S1 includes:

[0038] According to the circuit requirements, determine the architecture of the matching network; specifically, the circuit requirements can refer to: circuit bandwidth, target matching impedance, subsequent equivalent impedance, chip area requirements, etc.; in the field of RF microwave circuits, the architecture of the matching network usually includes: L-type, Π-type, transformer-based, short-stub combination, open-line combination, etc. Each architecture has its unique advantages and applicable scenarios. Designers need to choose the most suitable matching network architecture based on specific circuit requirements.

[0039] Select multiple passive components that need to be set in the matching network; specifically, the selection of passive components is divided into two parts. One is to select the type of passive components required. Designers need to select the most suitable type from a series of passive components, which may include inductors, capacitors, resistors, transformers, and microstrip lines. The other is to determine the number of each passive component selected, which not only involves the complexity of the matching network, but also the overall performance of the circuit and the economy of the design. Designers need to comprehensively consider factors such as the bandwidth of the circuit, the target impedance, and the equivalent impedance of the subsequent stage to determine the number of components required to achieve the best matching effect.

[0040] Establish the connection relationship of each passive device in the matching network; for example, a certain inductor and capacitor are in series, a certain capacitor and microstrip line are in parallel, etc.

[0041] The matching network is constructed according to the architecture of the matching network determined by the circuit requirements, the selected multiple passive components, and the established connection relationship between each passive component in the matching network.

[0042] It should be noted that, from the implementation of the matching network, the matching network for reducing insertion loss of the present solution may include any number of inductors, capacitors, resistors, transformers, and microstrip lines. However, considering the general laws of physics, the more passive devices there are, the more insertion losses there will be. In other words, the more passive devices a matching network includes, the greater the optimal value of its insertion loss will be. The number of passive devices in the implementation and specific embodiments of the present invention generally does not exceed 10.

[0043] Step S2: replacing the non-ideal devices in the designed matching network with ideal device modeling to obtain an equivalent model of the matching network.

[0044] In one embodiment, the matching network generally includes passive devices such as inductors, capacitors, resistors and transformers. For these devices, we are mainly concerned with their inductive, capacitive, resistive or transformer characteristics. However, the actual situation is far more complicated than the ideal model. For example, an inductor, although mainly inductive in the frequency band of interest, also exhibits certain resistive and capacitive characteristics. Although these secondary characteristics are relatively weak, they are crucial to the insertion loss analysis of the circuit, especially the resistive characteristics. Such devices that have multiple characteristics at the same time are called non-ideal devices. In contrast, ideal devices refer to those that only exhibit a single main characteristic. In order to simplify analysis and design, we usually use ideal devices to equate non-ideal devices. This method can help us more accurately predict and control the behavior of the circuit at a specific frequency. Through the process of equivalent substitution, we can more effectively analyze and optimize the performance of the matching network, thereby achieving more accurate impedance matching and lower insertion loss.

[0045] Step S2 includes:

[0046] According to microwave radio frequency circuit theory, each non-ideal device in the designed matching network is modeled and replaced by multiple ideal devices with single characteristics to obtain an equivalent model of the matching network.

[0047] Specifically, according to microwave radio frequency circuit theory, the inductor in the matching network is replaced by the inductor and resistor of ideal devices, the capacitor in the matching network is replaced by the capacitor and resistor of ideal devices, and the transformer in the matching network is replaced by the inductor and resistor of ideal devices, ensuring that the equivalent model of the matching network used to analyze the loss contains only inductor, capacitor and resistor.

[0048] Step S3: According to the equivalent load condition of the subsequent circuit, the impedance matching trajectory diagram of the load under the action of the matching network is drawn using a Smith chart.

[0049] In order to better describe the impedance matching trajectory diagram, the relevant background knowledge of the Smith chart is now described so as to subsequently describe the principle of insertion loss optimization.

[0050] The Smith chart is a graphical design tool in electronic engineering. It cleverly combines parameters such as impedance value, network quality factor (Q value), matching trajectory, etc. into one chart. This tool shows the influence of circuit components on impedance matching in an intuitive way. In the Smith chart, a matching trajectory corresponding to a series inductor rotates clockwise on the equal resistance circle, a series capacitor rotates counterclockwise on the equal resistance circle, a parallel inductor rotates counterclockwise on the equal admittance circle, a parallel capacitor rotates clockwise on the equal admittance circle, and a series or parallel resistor moves the corresponding matching trajectory on the equal reactance curve.

[0051] The Smith chart layout also has clear area divisions, which helps to quickly identify the characteristics of the circuit. In general, the left side of the Smith chart represents the low resistance area, and the right side represents the high resistance area. The upper part of the chart is the inductive area, and the lower part is the capacitive area. The impedance point at the center of the circle is 50+0j, which is an important reference point and is often used for standardized impedance matching.

[0052] The following two figures explain in detail the elements of the Smith chart. Specifically, Figure 2 The upper semicircle area is marked as the inductance area (i.e. the inductive area mentioned above), and the lower semicircle area is marked as the capacitance area (i.e. the capacitive area mentioned above). At the same time, the equal resistance circle, equal admittance circle and equal reactance curve mentioned above can be seen in the figure; the equal inductive reactance curve and the equal capacitive reactance curve are collectively referred to as the equal reactance curve. Figure 3 The small resistance region and the large resistance region described above are additionally shown in FIG.

[0053] In one embodiment, step S3 includes:

[0054] First, it is necessary to clarify the equivalent load impedance of the subsequent circuit (usually in complex form, including real and imaginary parts) and the equivalent model of the selected matching network. The equivalent model of the matching network may include components such as inductors, capacitors, resistors, etc., and the number of its components is N. The number of components determines the number of target points and trajectory curve segments that need to be drawn later.

[0055] Based on the equivalent model of the equivalent load of the subsequent circuit and the matching network, the transformation point corresponding to each component is determined, which represents the impedance value matched after connecting each device, and the number and position of each target point are obtained; among them, since in addition to the transformation point corresponding to each component, a starting point (usually the load impedance point) is required, the number of target points is N+1. The transformation effect of each component on the impedance can be calculated by analytical or numerical methods, so as to obtain the position of each target point on the Smith chart. This usually involves the series or parallel transformation formula of impedance.

[0056] Next, on the Smith chart, according to the connection mode and order of each component in the matching network, draw the target points TP1, TP2, TP3, ...TPN in sequence. These points will serve as the endpoints of the trajectory curve segment.

[0057] According to the connection mode and order of each component in the matching network, adjacent target points are connected in sequence to form trajectory curve segments. Therefore, there are N trajectory curve segments; these curve segments depend on the type of components (inductor, capacitor) and the connection mode (series, parallel). According to the relevant knowledge of the Smith chart, each trajectory segment is obtained: in the Smith chart, a series connection of an inductor corresponds to a matching trajectory rotating clockwise on the equal resistance circle, a series connection of a capacitor corresponds to a matching trajectory rotating counterclockwise on the equal resistance circle, a parallel connection of an inductor corresponds to a matching trajectory rotating counterclockwise on the equal admittance circle, a parallel connection of a capacitor corresponds to a matching trajectory rotating clockwise on the equal admittance circle, and a series or parallel connection of a resistor corresponds to a matching trajectory moving on the equal reactance curve.

[0058] A matching trajectory consisting of N+1 points and N trajectory curve segments is obtained, and an impedance matching trajectory diagram is obtained.

[0059] Step S4: adjusting the matching trajectory in the impedance matching trajectory diagram by adjusting the parameters of components in the matching network to obtain a matching network with reduced insertion loss.

[0060] In one embodiment, step S4 includes:

[0061] Find the target points TP2 ... TPN-1 other than the first and last target points TP1 and TPN on the matching track in the impedance matching track diagram as the matching intermediate target points, and determine the minimum resistance point TPmin passed by the current matching track in the matching intermediate target points according to the background knowledge about the Smith chart;

[0062] By adjusting the component parameters of the equivalent model of the matching network, the position of the minimum resistance point TPmin is moved to the large resistance area until the matching trajectory meets the optimal trajectory, and the matching network with reduced insertion loss is determined.

[0063] In a specific embodiment, the step of adjusting the component parameters of the equivalent model of the matching network so that the position of the minimum resistance point moves toward the large resistance region until the matching trajectory meets the optimal trajectory, and determining the matching network for reducing the insertion loss includes:

[0064] Based on the insertion loss optimization strategy, the positions of the curve segments of the matching track are moved in sequence by adjusting the values ​​of one or more devices in the equivalent model of the matching network, so that the position of the minimum resistance point TPmin moves to the large resistance area until the matching track is adjusted to the optimal track;

[0065] When adjusting to the optimal trajectory, the component parameters in the adjusted matching network are determined according to the values ​​of each device in the equivalent model of the matching network corresponding to the current trajectory, and then the matching network with reduced insertion loss is determined based on the structure of the designed matching network and the component parameters in the adjusted matching network. At this time, the loss of the matching network is the lowest value under the current process and circuit architecture.

[0066] In one embodiment, the insertion loss optimization strategy includes: without changing the impedance values ​​of the first and last target points, moving the minimum resistance point to a direction with a larger resistance value as much as possible, while ensuring that the resistance values ​​of all other matching intermediate points are not less than the resistance value of the minimum resistance point.

[0067] The specific implementation method is to adjust the values ​​of one or more devices in the equivalent model of the matching network in turn, and move the positions of the curve segments of the matching trajectory in turn. Since adjusting the values ​​of the devices in the matching network may also cause other matching intermediate points to move to the low resistance area, when adjusting the values ​​of the devices in the matching network and paying attention to the position of TPmin, it is also necessary to pay attention to the changing trends of other matching intermediate points TP2...TPN-1, and it is necessary to ensure that the resistance values ​​of other matching intermediate points TP2...TPN-1 will not be less than the minimum resistance point TPmin; and since the matching network has a fixed variable impedance requirement, the impedance values ​​of the first and last target points TP1 and TPN need to be fixed. Therefore, when adjusting the matching trajectory, it is also necessary to ensure that the resistance values ​​of the first and last target points remain unchanged.

[0068] When it is impossible to adjust the values ​​of the devices in the matching network so that the resistance value corresponding to TPmin can continue to increase without the resistance values ​​of other intermediate points on the matching trajectory being less than the resistance value corresponding to TPmin, the matching trajectory is adjusted to the optimal trajectory, and a high-efficiency, low-insertion-loss matching network is designed.

[0069] The method provided in this solution combines with the Smith chart tool to visualize how to optimize insertion loss without the need for tedious calculations or a large amount of computer software and hardware resources.

[0070] In order to better describe the matching network method for reducing insertion loss, it is now described in conjunction with the following specific embodiments.

[0071] Example

[0072] This design aims to design a matching network using inductors, capacitors, resistors, and transformers. The matching network can achieve impedance transformation from 50 ohms to 27 ohms at 5GHz, and the insertion loss of the matching network is as low as possible.

[0073] First, based on the above design goals and combined with the relevant knowledge of RF circuits, determine the structure of the matching network as follows: Figure 4 As shown, it is a two-port matching network including a transformer and two capacitors C1 and C2, wherein the transformer includes two non-ideal inductors with their own losses and mutual inductance. Their self-inductance and quality factors are L1, L2 and Q1, Q2 respectively, and the mutual inductance between the two coils is M.

[0074] According to circuit theory, Figure 4 The transformer in the Figure 5 The T-type equivalent model shown in the circuit on the right is replaced by equivalent, and the mutual inductance parameter M in the transformer is equivalent to the lumped component, so as to analyze the matching trajectory of the matching network; specifically, an ideal inductor with an inductance value of L1-M and an ideal resistor with a resistance value of R1 are used to replace one of the coils with self-inductance and quality factor L1 and Q1, respectively, and an ideal inductor with an inductance value of L2-M and an ideal resistor with a resistance value of R2 are used to replace another coil with self-inductance and quality factor L2 and Q2, respectively, and an ideal inductor with an inductance value of M is used to replace the mutual inductance parameter M between the two coils in the transformer. There are 7 components in the equivalent model of the matching network. Among them, R1 = 2*pi*f*L1 / Q1, R2 = 2*pi*f*L2 / Q2, pi is the pi constant, usually 3.1415926, and f is the frequency at which the circuit works.

[0075] Considering that the requirement of this example is to transform the 50 ohm impedance to about 27 ohms, all you need to do is connect the 50 ohm to Figure 6 Port 2 of the matching network shown in the figure, by selecting the parameters of each device in the matching network, makes the impedance seen by port 1 about 27 ohms, and the energy loss from port 1 to port 2 is minimal. Here, the energy loss from port 1 to port 2 is generally measured using the S parameter S21 of the two-port network. Since the matching network equivalent model has been determined, according to the relevant theory of the Smith chart, it can be known that the matching trajectory of the matching network based on 50 ohms is roughly as follows Figure 7 shown.

[0076] First, according to the relevant theory of RF circuit, the value of the device is selected so that the impedance is matched to about 27 ohms. The values ​​of various parameters are determined as shown in Table 1. At this time, it can be calculated that from port 1 at 5GHz, 50 ohms is matched to 27.55 ohms, and the S21 value of the network is -3.06dB, that is, the insertion loss is 3.06dB.

[0077] Table 1: Component parameter table of matching network

[0078] L1 Q1 C1 L2 Q2 C2 M 0.5nH 3.93 1.4pF 1.1nH 6.9 0.6pF 0.5nH

[0079] According to the method proposed by the present invention, the matching trajectory realized by the above network is analyzed, specifically as follows Figure 8 As shown: Since there are 7 devices in the equivalent model of the matching network, there are 8 target points TP1, TP2, TP3, ... TP8 on the Smith chart, which represent the impedance value matched after each device is connected starting from a 50 ohm load. Figure 8 Two equal resistance circles, a small resistance circle and a large resistance circle, are marked in the figure. It can be seen that the area where TP5, TP6 and TP7 are located is close to the small resistance circle, while the area where TP1, TP2, TP3, TP4 and TP8 are located has a larger resistance than the large resistance circle. Therefore, in order to optimize the insertion loss of this matching network, the length of the matching path from TP1 to TP2, from TP2 to TP3, and from TP4 to TP5 can be adjusted in sequence, so that TP5, TP6 and TP7 move to the right, and this matching path Figure 6 Therefore, according to the theory of the Smith chart, TP5, TP6 and TP7 can be moved to the right by adjusting the above parameters. However, in this way, the final matched impedance point TP8 will definitely deviate from the original 27 ohms. Therefore, it is necessary to synchronously adjust the parameters of other components in the equivalent model of the matching network to ensure that TP8 remains basically unchanged at 27 ohms.

[0080] The corresponding matching trajectory is as follows Fig. 9 It can be seen that at this time, the points TP2, TP5, and TP6 on the matching trajectory that are closest to the small resistance circle are almost on the same equal resistance circle. If the network is adjusted to make TP5 and TP6 closer to the large resistance circle, TP2 will be closer to the small resistance circle. If the network is adjusted to make TP2 closer to the large resistance circle, TP5 and TP6 will be closer to the small resistance circle. Therefore, it can be considered that it is no longer possible to further make these matching points move away from the small resistance circle by adjusting the device values ​​of the matching network. Therefore, it can be considered that the insertion loss of the network has reached the optimal value.

[0081] After comprehensive adjustment, the network parameters calculated from the component parameters adjusted in the equivalent model of the matching network are adjusted as shown in the following table. At this time, the matched impedance is 27.144 ohms and the insertion loss is 2.31 dB, that is, the insertion loss is optimized by about 0.7 dB.

[0082] Table 2: Component parameters of the adjusted matching network

[0083] L1 Q1 C1 L2 Q2 C2 M 1nH 7.854 0.52pF 1.6nH 10.05 0.85pF 1nH

[0084] This embodiment fully demonstrates that the matching trajectory can be adjusted by precisely controlling the component parameters in the matching network to achieve the purpose of optimizing the insertion loss of the matching network. Under the given manufacturing process and matching network structure conditions, this method not only ensures that the matching network can fully exert its due matching function, but also successfully reduces the insertion loss, providing an innovative and effective design idea for achieving efficient energy transmission.

[0085] Similar to the principle of the above embodiment, the present invention provides a matching network system for reducing insertion loss.

[0086] The following provides specific embodiments in conjunction with the accompanying drawings:

[0087] like Fig.10 A schematic structural diagram of a matching network system for reducing insertion loss in an embodiment of the present invention is shown.

[0088] The system comprises:

[0089] Preliminary design module 1, used to design a matching network based on the circuit design goal;

[0090] An equivalent replacement module 2, connected to the preliminary design module 1, is used to replace the non-ideal devices in the designed matching network with ideal device modeling to obtain an equivalent model of the matching network;

[0091] A matching trajectory drawing module 3 is connected to the equivalent substitution module 2 and is used to draw an impedance matching trajectory diagram of the load under the action of the matching network using a Smith chart according to the equivalent load condition of the subsequent circuit;

[0092] The insertion loss optimization module 4 is connected to the matching trajectory drawing module 3 and is used to adjust the matching trajectory in the impedance matching trajectory diagram by adjusting the parameters of components in the matching network to obtain a matching network with reduced insertion loss.

[0093] It should be understood that Fig.10The division of each module in the system embodiment is only a division of logical functions. In actual implementation, they can be fully or partially integrated into one physical entity, or physically separated. And these units can all be implemented in the form of software calling through processing elements; they can also be all implemented in the form of hardware; some units can also be implemented in the form of processing elements calling software, and some units can be implemented in the form of hardware.

[0094] Since the implementation principle of the matching network system for reducing insertion loss has been described in the aforementioned embodiment, it will not be repeated here.

[0095] The matching network method for reducing insertion loss provided in the embodiment of the present invention can be implemented on the terminal side or the server side. As for the hardware structure of the electronic terminal, please refer to Fig.11 , is an optional hardware structure diagram of a matching network terminal 1000 for reducing insertion loss provided in an embodiment of the present invention. The terminal 1000 may be a mobile phone, a computer device, a tablet device, a personal digital processing device, a factory background processing device, etc. The terminal 1000 includes: at least one processor 1001, a memory 1002, at least one network interface 10010 and a user interface 1009. The various components in the device are coupled together through a bus system 1005. It can be understood that the bus system 1005 is used to achieve connection and communication between these components. In addition to the data bus, the bus system 1005 also includes a power bus, a control bus and a status signal bus. However, for the sake of clarity, in Fig.11 In the specification, various buses are labeled as bus systems.

[0096] The user interface 1009 may include a display, a keyboard, a mouse, a trackball, a click gun, keys, buttons, a touch pad or a touch screen.

[0097] It is understood that the memory 1002 can be a volatile memory or a non-volatile memory, and can also include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), which is used as an external cache. By way of exemplary but not limiting explanation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM). The memory described in the embodiments of the present invention is intended to include but is not limited to these and any other suitable categories of memory.

[0098] The memory 1002 in the embodiment of the present invention is used to store various categories of data to support the operation of the terminal 1000. Examples of these data include: any executable program for operating on the terminal 1000, such as an operating system 10021 and an application 10022; the operating system 10021 includes various system programs, such as a framework layer, a core library layer, a driver layer, etc., for implementing various basic services and processing hardware-based tasks. The application 10022 may include various applications, such as a media player (MediaPlayer), a browser (Browser), etc., for implementing various application services. The matching network method for reducing insertion loss provided in the embodiment of the present invention may be included in the application 10022.

[0099] The method disclosed in the above embodiment of the present invention can be applied to the processor 1001, or implemented by the processor 1001. The processor 1001 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the hardware integrated logic circuit in the processor 1001 or the instruction in the form of software. The above processor 1001 may be a general processor, a digital signal processor (DSP, Digital Signal Processor), or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The processor 1001 can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiment of the present invention. The general processor 1001 can be a microprocessor or any conventional processor, etc. In combination with the steps of the accessory optimization method provided in the embodiment of the present invention, it can be directly embodied as a hardware decoding processor to execute, or it can be executed by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium, which is located in a memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0100] In an exemplary embodiment, the terminal 1000 may be implemented by one or more application specific integrated circuits (ASIC), DSP, programmable logic device (PLD), complex programmable logic device (CPLD) to execute the aforementioned method.

[0101] Those skilled in the art can understand that all or part of the steps of implementing the above-mentioned method embodiments can be completed by hardware related to the computer program. The aforementioned computer program can be stored in a computer-readable storage medium. When the program is executed, the steps of the above-mentioned method embodiments are executed; and the aforementioned storage medium includes: ROM, RAM, magnetic disk or optical disk and other media that can store program codes.

[0102] In the embodiments provided in the present application, the computer readable and writable storage medium may include a read-only memory, a random access memory, an EEPROM, a CD-ROM or other optical disk storage device, a disk storage device or other magnetic storage device, a flash memory, a USB flash drive, a mobile hard disk, or any other medium that can be used to store a desired program code in the form of an instruction or data structure and can be accessed by a computer. In addition, any connection can be appropriately referred to as a computer-readable medium. For example, if the instruction is sent from a website, a server or other remote source using a coaxial cable, an optical fiber cable, a twisted pair, a digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwaves, the coaxial cable, optical fiber cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwaves are included in the definition of the medium. However, it should be understood that computer readable and writable storage media and data storage media do not include connections, carriers, signals, or other temporary media, but are intended to be non-temporary, tangible storage media. Disk and disc, as used in this application, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers.

[0103] In summary, the matching network method, system, terminal and medium for reducing insertion loss of the present invention first designs a matching network based on the circuit design target, and replaces the non-ideal devices in the designed matching network with ideal devices by modeling, and then uses the Smith chart to draw the impedance matching trajectory diagram of the load under the action of the matching network according to the equivalent load of the subsequent circuit, and finally adjusts the matching trajectory in the impedance matching trajectory diagram by adjusting the component parameters in the matching network to obtain a matching network with reduced insertion loss. The present invention optimizes the insertion loss of the matching network by analyzing the matching trajectory. When the manufacturing process is determined and the matching network structure is determined, it not only ensures the matching function of the matching network, but also optimizes the insertion loss of the matching network, thereby achieving high-efficiency energy transmission. Therefore, the present invention effectively overcomes the various shortcomings in the prior art and has a high industrial utilization value.

[0104] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A matching network design method for reducing insertion loss, characterized in that: The method comprises: Based on the circuit design objectives, design a matching network; The non-ideal devices in the designed matching network are replaced by ideal device modeling to obtain an equivalent model of the matching network; According to the equivalent load of the subsequent circuit, the impedance matching trajectory of the load under the action of the matching network is drawn using the Smith chart; By adjusting the parameters of components in the matching network, the matching track in the impedance matching track diagram is adjusted to obtain a matching network with reduced insertion loss.

2. The matching network method for reducing insertion loss according to claim 1, characterized in that: Based on the circuit design goal, designing a matching network includes: The matching network is constructed according to the architecture of the matching network determined by the circuit requirements, the selected multiple passive components, and the established connection relationship between each passive component in the matching network.

3. The matching network design method for reducing insertion loss according to claim 1, characterized in that: The method of replacing the non-ideal devices in the designed matching network with ideal devices to obtain an equivalent model of the matching network includes: According to microwave radio frequency circuit theory, each non-ideal device in the designed matching network is modeled and replaced by multiple ideal devices with single characteristics to obtain an equivalent model of the matching network.

4. The matching network design method for reducing insertion loss according to claim 1, characterized in that: The method of using a Smith chart to draw an impedance matching trajectory diagram of the load under the action of the matching network according to the equivalent load condition of the subsequent circuit includes: According to the equivalent load of the subsequent circuit and the equivalent model of the matching network, a Smith chart is used to draw multiple target points and a plurality of trajectory curve segments formed by sequentially connecting adjacent target points, so as to obtain an impedance matching trajectory diagram having a matching trajectory composed of a plurality of trajectory curve segments; wherein the number of the drawn target points is equal to the number of components of the equivalent model of the matching network plus one; and the number of the trajectory curve segments is the same as the number of components of the equivalent model of the matching network.

5. The matching network design method for reducing insertion loss according to claim 4, characterized in that: The step of adjusting the matching track in the impedance matching track diagram by adjusting the parameters of components in the matching network to obtain a matching network with reduced insertion loss comprises: Finding target points other than the first and last target points on the matching track in the impedance matching track diagram as matching intermediate target points, and determining the minimum resistance point passed by the current matching track among the matching intermediate target points; By adjusting the component parameters of the equivalent model of the matching network, the position of the minimum resistance point is moved to the large resistance area until the matching trajectory meets the optimal trajectory, and the matching network with reduced insertion loss is determined.

6. The matching network design method for reducing insertion loss according to claim 5, characterized in that: The step of adjusting the parameters of the components of the equivalent model of the matching network so that the position of the minimum resistance point moves toward the large resistance region until the matching trajectory meets the optimal trajectory, and determining the matching network for reducing the insertion loss includes: Based on the insertion loss optimization strategy, the positions of the curve segments of the matching track are moved in sequence by adjusting the values ​​of one or more devices in the equivalent model of the matching network, so that the position of the minimum resistance point is moved to the large resistance area until the matching track is adjusted to the optimal track; Based on the values ​​of each device in the equivalent model of the matching network adjusted to the optimal trajectory, the parameters of the components in the adjusted matching network are determined, and the matching network with reduced insertion loss is determined in combination with the structure of the designed matching network.

7. The matching network design method for reducing insertion loss according to claim 6, characterized in that: The insertion loss optimization strategy includes: without changing the impedance values ​​of the first and last target points, moving the minimum resistance point to a direction with a larger resistance value as much as possible, while ensuring that the resistance values ​​of all other matching intermediate points are not less than the resistance value of the minimum resistance point.

8. A matching network design system for reducing insertion loss, characterized in that: The system comprises: A preliminary design module is used to design a matching network based on the circuit design objectives; An equivalent replacement module, connected to the preliminary design module, is used to replace the non-ideal devices in the designed matching network with ideal device modeling to obtain an equivalent model of the matching network; A matching trajectory drawing module, connected to the equivalent substitution module, is used to draw an impedance matching trajectory diagram of the load under the action of the matching network using a Smith chart according to the equivalent load condition of the subsequent circuit; The insertion loss optimization module is connected to the matching trajectory drawing module and is used to adjust the matching trajectory in the impedance matching trajectory diagram by adjusting the parameters of components in the matching network to obtain a matching network with reduced insertion loss.

9. An electronic terminal, characterized in that: include: one or more memories and one or more processors; The one or more memories are used to store computer programs; The one or more processors, connected to the memory, are configured to run the computer program to perform the method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: A computer program is stored, and when the computer program is executed by one or more processors, the method according to any one of claims 1 to 7 is performed.

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