Preparation method of semiconductor structure
By using the hydrogen pretreatment step during the etching process, the formation of TiOFx by-products is suppressed, the V0 through-hole breaking problem is solved, and the electrical connection performance of the metal interconnection structure is improved.
Patent Information
- Application Number
- CN202411278552.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-12
- Publication Date
- 2024-12-20
AI Technical Summary
When preparing metal interconnect structures, TiOFx by-products are prone to accumulate during the etching process, resulting in V0 through-hole disconnection problems, affecting the electrical connection performance of metal interconnect structures.
During the etching process, hydrogen pretreatment steps are used to reduce the moisture and fluorocarbon groups in the etching chamber, inhibit the formation of titanium fluoropolymer, evaporate moisture through high radio frequency power and bind the fluorocarbon groups to hydrogen. Combined to produce easily removed small molecule carbon polymer and hydrogen fluoride gas.
It effectively solves the problem of V0 through hole etching and circuit breaking, and improves the electrical connection performance of metal interconnection structures.
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Figure CN119170564A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of semiconductor manufacturing and relates to a method for preparing a semiconductor structure. Background Art
[0002] With the continuous advancement of semiconductor technology, the reduction of semiconductor process nodes and the improvement of integration have become a development trend. The critical dimension (CD) of semiconductor devices continues to shrink, and the device density continues to increase, which has also challenged the process of forming metal interconnect structures.
[0003] As the characteristic size of metal interconnect structures continues to shrink, the difficulty of etching increases. The pattern stability of the mask in the etching process determines the morphology of the opening formed, and correspondingly determines the morphology and characteristic size of the metal interconnect structure formed by etching. In order to improve the pattern stability of the mask, titanium nitride (TiN) hard mask is mostly used in the preparation of metal interconnect structures. However, when the etching process is used to prepare V0 vias (Via), especially for V0 vias located in sparse areas (ISO), the TiN hard mask will be oxidized (Oxidation) during the etching process to form TiOF x By-product, the reaction mechanism is as follows:
[0004] CF*+H2O→COF*+HF↑;
[0005] COF*+Ti→Ti-OF*↓+CO2↑
[0006] Among them, CF* comes from the dissociated free radicals of etching gases such as CF4 or C4F8, and H2O comes from the water vapor supply of the dielectric layer (such as SiOCH).
[0007] TiOF x Byproducts tend to accumulate in the sidewalls of the V0 through-holes, and TiOF x The byproducts will hinder the subsequent second trench dry etching, resulting in the top of the V0 via being sealed, leading to the V0 via being open, and further affecting the ability to fill the metal material in the V0 via, resulting in a decrease in the electrical connection performance of the prepared metal interconnect structure. Therefore, it is necessary to provide a method for preparing a semiconductor structure. Summary of the invention
[0008] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a method for preparing a semiconductor structure, which is used to solve the problem of TiOF x The generation of by-products leads to the problem of V0 through-hole etching disconnection.
[0009] To achieve the above object and other related objects, the present invention provides a method for preparing a semiconductor structure, comprising the following steps:
[0010] Providing a substrate, wherein a surface of the substrate has a dielectric layer;
[0011] forming a titanium nitride hard mask on the surface of the dielectric layer;
[0012] forming a first photoresist layer on the titanium nitride hard mask film, and patterning the first photoresist layer;
[0013] Based on the patterned first photoresist layer, patterning the titanium nitride hard mask to form a trench opening penetrating the titanium nitride hard mask;
[0014] removing the first photoresist layer;
[0015] forming a second photoresist layer on the titanium nitride hard mask film, wherein the second photoresist layer covers the trench opening;
[0016] Patterning the second photoresist layer to form a through hole opening penetrating the second photoresist layer, wherein the through hole opening exposes the side wall of the titanium nitride hard mask;
[0017] Based on the through hole opening, a first dry etching is performed using a carbon-fluorine-containing gas to form a partial through hole in the dielectric layer;
[0018] removing the second photoresist layer;
[0019] Perform hydrogen pretreatment to reduce carbon fluoride groups and moisture in the etching chamber to inhibit the formation of titanium oxyfluoride polymer;
[0020] Based on the groove opening, a second dry etching is performed to form a groove in the dielectric layer, and the through hole penetrates the dielectric layer, wherein the formed groove is connected to the through hole.
[0021] Optionally, in the hydrogen pretreatment, the high RF power ranges from 400 to 800 W, the low RF power ranges from 0 W; the hydrogen flow rate is 120 to 300 sccm; the reaction time is 90 to 180 sec; and the pressure in the etching chamber is 50 to 150 mT.
[0022] Optionally, during the hydrogen pretreatment, the reaction mechanism includes evaporating water under high radio frequency power conditions and converting carbon fluoride groups into carbon-containing polymers and hydrogen fluoride gas by combining with hydrogen bonds.
[0023] Optionally, after forming the groove, a wet cleaning step is also included.
[0024] Optionally, both the upper and lower surfaces of the titanium nitride hard mask have anti-reflective coatings.
[0025] Optionally, the carbon-fluorine-containing gas includes a gas combination containing CF4 gas or a gas combination containing C4F8 gas.
[0026] Optionally, the process of removing the first photoresist layer and the process of removing the second photoresist layer both include an ashing process, and the gas of the ashing process includes an oxygen-containing gas.
[0027] Optionally, an active device is formed in the substrate, and the through hole exposes an electrical connection of the active device.
[0028] Optionally, an isolation layer is further provided between the substrate and the dielectric layer, and the isolation layer includes a silicon nitride layer or a silicon carbide layer.
[0029] Optionally, the dielectric layer includes a silicon carbide layer with a low dielectric constant.
[0030] As described above, the method for preparing the semiconductor structure of the present invention, after the process step of etching to form a through hole and removing the photoresist layer, adds a hydrogen (H2) pretreatment step to volatilize the water (H2O) in the etching chamber and to make the carbon fluoride groups (CF*) in the etching chamber combine with hydrogen bonds (H*) to generate easily removable small molecular carbon polymers (CC x ) and hydrogen fluoride (HF) gas, so that the formation of titanium oxide fluoride polymer (Ti-OF*) can be suppressed through hydrogen pretreatment, which can effectively solve the problem of V0 through-hole etching disconnection. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] Figure 1-7b The figure shows a schematic diagram of the structures presented at various steps in the process of preparing a semiconductor structure according to an embodiment of the present invention.
[0032] Figure 8a Shown is a top view of a semiconductor structure prepared without hydrogen pretreatment in an embodiment of the present invention.
[0033] Figure 8b Shown is a top view of a semiconductor structure prepared after hydrogen pretreatment in an embodiment of the present invention.
[0034] Description of Reference Numerals
[0035] 100 Substrate
[0036] 200 Dielectric layer
[0037] 300 Titanium Nitride Hard Mask
[0038] 410 first photoresist layer
[0039] 420 second photoresist layer
[0040] 510 First Anti-Reflective Coating
[0041] 520 Second anti-reflective coating
[0042] 600 Isolation Layer
[0043] 710 Groove opening
[0044] 720 Through hole opening DETAILED DESCRIPTION
[0045] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0046] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic view is only an example, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional space dimensions of length, width and depth should be included.
[0047] For ease of description, spatial relational terms such as “under”, “below”, “below”, “below”, “over”, etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatial relational terms are intended to include other orientations of the device in use or operation in addition to the orientation depicted in the drawings, and may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed between the first and second features, so that the first and second features may not be in direct contact. In addition, when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or one or more intervening layers may also be present.
[0048] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0049] See also Figure 1 to Figure 7b The schematic diagram of the structure presented in each step of the semiconductor structure preparation process of this embodiment is shown. For comparison, Figure 8aThe diagram is a top view of a semiconductor structure prepared without hydrogen pretreatment. Figure 8b The diagram shows a top view of a semiconductor structure prepared after hydrogen pretreatment.
[0050] in, Figure 1 , Figure 2 , Figure 3a , Figure 4a , Figure 5a , Figure 6a , Figure 7a Indicated as Figure 8b Schematic diagram of the cross-sectional structure along the B-B' line. Figure 4b , Figure 5b , Figure 6b , Figure 7b Indicated as Figure 8b The following is a schematic diagram of the cross-sectional structure along the line AA'. The preparation of the semiconductor structure in the present application is further introduced in conjunction with the accompanying drawings.
[0051] First, a substrate 100 is provided, wherein a dielectric layer 200 is provided on a surface of the substrate 100 .
[0052] For details, see Figure 1 Active devices (not shown) may be formed in the substrate 100, and the active devices may be electrically led out through a subsequently prepared metal interconnect structure located in the dielectric layer 200. The material of the substrate 100 may include, for example, a silicon substrate, a silicon nitride substrate, etc., which is not limited here.
[0053] The material of the dielectric layer 200 may include a silicon oxide dielectric layer with a low dielectric constant (Low K), such as a silicon carbide hydroxide layer (SiOCH). The type of the dielectric layer 200 is not excessively limited herein.
[0054] See also Figure 1 In this embodiment, an isolation layer 600 is further formed between the substrate 100 and the dielectric layer 200. The isolation layer 600 may include a silicon nitride layer or a silicon carbide layer, so as to protect the active devices located in the substrate 100 through the isolation layer 600 to avoid damage to the active devices caused by etching. The specific type of the isolation layer 600 is selected according to needs.
[0055] Next, a titanium nitride (TiN) hard mask 300 is formed on the surface of the dielectric layer 200 .
[0056] Specifically, it is preferred to form an anti-reflective coating on both the upper and lower surfaces of the titanium nitride hard mask 300, such as Figure 1A first anti-reflection coating 510 is disposed on the upper surface of the titanium nitride hard mask 300 and a second anti-reflection coating 520 is disposed on the lower surface of the titanium nitride hard mask 300 to improve the photolithography effect. Figure 1 In this embodiment, a nitrogen-free anti-reflective coating (NFARC) is formed on both the upper and lower surfaces of the titanium nitride hard mask 300 .
[0057] Next, a first photoresist layer 410 is formed on the titanium nitride hard mask film 300 , and the first photoresist layer 410 is patterned.
[0058] Specifically, the step of forming the patterned first photoresist layer 410 may include coating, exposure, development, etc. Through the patterned first photoresist layer 410 , an etching window for subsequently etching the titanium nitride hard mask 300 may be formed.
[0059] Next, see Figure 2 Based on the patterned first photoresist layer 410, the titanium nitride hard mask 300 is patterned to form a trench opening 710 penetrating the titanium nitride hard mask 300. When the titanium nitride hard mask 300 is patterned, the etching gas and etching process used are not limited here.
[0060] Next, see Figure 2 , remove the first photoresist layer 410, wherein the removal method may adopt an ash process, and the gas of the ash process may include an oxygen-containing gas, such as O2 or CO2.
[0061] Next, see Figure 3a and Figure 3b , a second photoresist layer 420 is formed on the titanium nitride hard mask film 300 , wherein the second photoresist layer 420 covers the trench opening 710 .
[0062] Next, see Figure 3a and Figure 3b , patterning the second photoresist layer 420 to form a through hole opening 720 penetrating the second photoresist layer 420 , and the through hole opening 720 exposes the sidewall of the titanium nitride hard mask film 300 .
[0063] Specific, combined Figure 3a , Figure 3b and Figure 8bIt can be seen that in the direction along A-A', the groove opening 710 and the through-hole opening 720 have the same width, and in the direction along B-B', the length of the groove opening 710 is much larger than the length of the through-hole opening 720, so that after the second photoresist layer 420 is patterned to form the through-hole opening 720, the through-hole opening 720 exposes the side wall of the titanium nitride hard mask 300, so as to facilitate the subsequent preparation of the through hole by etching.
[0064] Next, see Figure 4a and Figure 4b Based on the through hole opening 720 , a first dry etching is performed using a carbon-fluorine-containing gas to form a partial through hole in the dielectric layer 200 .
[0065] Specifically, the carbon-fluorine-containing gas may include a gas combination containing CF4 gas or a gas combination containing C4F8 gas. In this embodiment, the carbon-fluorine-containing gas uses CF4 gas, and of course C4F8 gas may also be used.
[0066] During the first dry etching, since the through hole opening 720 exposes the side wall of the titanium nitride hard mask 300, the following reaction will also occur while etching the dielectric layer 200 to form the through hole:
[0067] CF*+H2O→COF*+HF↑;
[0068] COF*+Ti→Ti-OF*↓+CO2↑
[0069] The carbon fluoride group (CF*) originates from the free radicals dissociated from the etching gas such as CF4 or C4F8, and the water (H2O) originates from the water vapor supply of the dielectric layer 200 (such as SiOCH). The exposed sidewalls of the titanium nitride hard mask 300 react with the titanium oxyfluoride polymer (COF*) to form TiOF x Byproducts, while TiOF x The byproducts will hinder the subsequent second trench dry etching, resulting in the top of the V0 via being sealed, leading to the V0 via open circuit problem, which in turn affects the ability to fill the metal material in the V0 via, resulting in a decrease in the electrical connection performance of the prepared metal interconnect structure. Figure 8a As the etching process proceeds, the opening of the through hole will shrink or even close. This embodiment can solve the problem of through hole etching disconnection by adding a hydrogen pretreatment step. Please refer to the following description for details, which will not be introduced here.
[0070] Next, see Figure 5a and Figure 5b, remove the second photoresist layer 420, wherein the removal method can adopt an ash process, and the gas of the ash process includes an oxygen-containing gas, such as O2 or CO2.
[0071] Next, a hydrogen pretreatment is performed to reduce carbon fluoride groups (CF*) and water (H2O) in the etching chamber to inhibit the formation of titanium oxide fluoride polymer titanium (COF*).
[0072] Among them, the high RF power in the hydrogen pretreatment can range from 400 to 800W, such as RF is 60MHz or 40MHz, power is 400W, 600W, 800W, etc., and the low RF power range is 0W, such as RF is 13MHz or 2MHz, power is 0W; the hydrogen flow rate can be 120 to 300sccm, such as 120sccm, 150sccm, 180sccm, 200sccm, 250sccm, 300sccm, etc.; the reaction time can be 90 to 180sec, such as 90sec, 100sec, 120sec, 160sec, 180sec, etc.; the pressure in the etching chamber can be 50 to 150mT, such as 50mT, 100mT, 150mT, etc.
[0073] In the hydrogen pretreatment, the reaction mechanism includes evaporating water (H2O) under high radio frequency power conditions and converting carbon fluoride groups (CF*) into carbon-containing polymers (CC x ) and hydrogen fluoride (HF) gas, the reaction mechanism is as follows:
[0074] CF*+H*→CC x +HF↑
[0075] H2O+Baking(High PW)→H2O↑
[0076] Under high RF power conditions, the temperature in the etching chamber can be increased, so that water (H2O) can be evaporated to reduce the water content, and H* can react with CF* to generate small molecular carbon-containing polymers (CC x ), such as CC x The value of x in the process can be 1 to 5, and hydrogen fluoride (HF) gas can be generated, thereby reducing the content of CF* in the etching chamber. Therefore, through the hydrogen pretreatment, the contents of CF* and H2O can be reduced, thereby effectively reducing the generation of COF* and inhibiting the generation of Ti-OF*.
[0077] Next, see Figure 6a and Figure 6bBased on the groove opening 710, a second dry etching is performed to form a groove in the dielectric layer 200, and the through hole penetrates the dielectric layer 200, wherein the formed groove is connected to the through hole.
[0078] Specifically, the etching process used in the second dry etching may refer to the first dry etching, wherein the etching gas may be a carbon-fluorine-containing gas, such as a gas combination containing CF4 gas or a gas combination containing C4F8 gas.
[0079] For further information, see Figure 7a and Figure 7b Since the isolation layer 600 is provided in this embodiment, after etching to form the groove and the through hole, a step of etching the isolation layer 600 is also included to expose the active device located in the substrate 100 .
[0080] Furthermore, after forming the groove, a wet cleaning step may be included, wherein during the wet cleaning, the carbon-containing polymer produced during the hydrogen pretreatment process may be removed simultaneously, and during the wet cleaning, the cleaning liquid may include H2SO4 or H2O2.
[0081] In summary, the method for preparing a semiconductor structure of the present invention, after the process step of etching to form a through hole to remove the photoresist layer, adds a hydrogen pretreatment step to volatilize the moisture in the etching chamber and allow the carbon fluorine groups in the etching chamber to combine with hydrogen bonds to generate easily removable small molecular carbon polymers and hydrogen fluoride gas, thereby suppressing the formation of titanium oxide fluorine polymers through hydrogen pretreatment, and effectively solving the problem of V0 through hole etching short circuit.
[0082] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. A method for preparing a semiconductor structure, It is characterized in that The following steps are involved: Providing a substrate, wherein a surface of the substrate has a dielectric layer; forming a titanium nitride hard mask on the surface of the dielectric layer; forming a first photoresist layer on the titanium nitride hard mask film, and patterning the first photoresist layer; Based on the patterned first photoresist layer, patterning the titanium nitride hard mask to form a trench opening penetrating the titanium nitride hard mask; removing the first photoresist layer; forming a second photoresist layer on the titanium nitride hard mask, wherein the second photoresist layer covers the trench opening; Patterning the second photoresist layer to form a through hole opening penetrating the second photoresist layer, wherein the through hole opening exposes the side wall of the titanium nitride hard mask; Based on the through hole opening, a first dry etching is performed using a carbon-fluorine-containing gas to form a partial through hole in the dielectric layer; removing the second photoresist layer; Perform hydrogen pretreatment to reduce carbon fluoride groups and moisture in the etching chamber to inhibit the formation of titanium oxyfluoride polymer; Based on the groove opening, a second dry etching is performed to form a groove in the dielectric layer, and the through hole penetrates the dielectric layer, wherein the formed groove is connected to the through hole.
2. The method for preparing a semiconductor structure according to claim 1, Features: In the hydrogen pretreatment, the high RF power ranges from 400 to 800 W, the low RF power ranges from 0 W; the hydrogen flow rate is 120 to 300 sccm; the reaction time is 90 to 180 seconds; and the pressure in the etching chamber is 50 to 150 mT.
3. The method for preparing a semiconductor structure according to claim 1, Features: When the hydrogen pretreatment is performed, the reaction mechanism includes evaporating water under high radio frequency power conditions and converting carbon fluoride groups into carbon-containing polymers and hydrogen fluoride gas by combining with hydrogen bonds.
4. The method for preparing a semiconductor structure according to claim 1, Features: After the groove is formed, a wet cleaning step is also included.
5. The method for preparing a semiconductor structure according to claim 1, Features: The upper and lower surfaces of the titanium nitride hard mask are both provided with anti-reflective coatings.
6. The method for preparing a semiconductor structure according to claim 1, Features: The carbon-fluorine-containing gas includes CF 4 Gas composition or gas containing C 4 F 8 Gas combinations of gases.
7. The method for preparing a semiconductor structure according to claim 1, Features: The process of removing the first photoresist layer and the process of removing the second photoresist layer both include an ashing process, and the gas of the ashing process includes an oxygen-containing gas.
8. The method for preparing a semiconductor structure according to claim 1, Features: Active devices are formed in the substrate, and the through holes expose electrical connections of the active devices.
9. The method for preparing a semiconductor structure according to claim 8, Features: An isolation layer is also provided between the substrate and the dielectric layer, and the isolation layer includes a silicon nitride layer or a silicon carbide layer.
10. The method for preparing a semiconductor structure according to claim 1, Features: The dielectric layer includes a silicon carbide hydroxide layer having a low dielectric constant.
