IBC battery and preparation method thereof

Abstract

The embodiment of the invention provides an IBC battery and a preparation method thereof, laser doping treatment is performed on a first region, in contact with a first grid line, of the back surface of a silicon wafer subjected to diffusion doping treatment, so that high-concentration doping can be performed on the first region, and low-concentration light doping is performed on a light absorption region; a transverse n + / n high-low junction or a p + / p high-low junction is obtained at the junction of a lightly doped region and a highly doped region, and an n + / p junction or a p + / n junction is obtained under an electrode grid line, so that the contact resistance of an emitter and the dark saturation current of an emitter region can be reduced, the filling factor, the short-circuit current and the open-circuit voltage can be improved, the conversion efficiency of the battery is improved, and the service life of the battery is prolonged. Therefore, the problems that an existing IBC battery is low in open-circuit voltage value and poor in photoelectric conversion efficiency are solved.

Description

Technical Field

[0001] The present invention relates to the technical field of crystalline silicon solar cell manufacturing, and in particular to an IBC cell and a preparation method thereof. Background Art

[0002] The interdigitated back contact (IBC) battery is a new type of battery in which the contact electrodes of the P / N junction, substrate and emitter region are made in an interdigitated shape on the back of the battery. Its core technology is to prepare high-quality p-regions and n-regions arranged in an interdigitated shape on the back of the battery.

[0003] The emitter contact resistance of existing IBC batteries is relatively large, resulting in a low open circuit voltage value of the battery and poor photoelectric conversion efficiency of the battery. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide an IBC battery and a preparation method thereof, so as to solve the problems of low open circuit voltage and poor photoelectric conversion efficiency of existing IBC batteries.

[0005] In order to solve the above problems, the present invention is achieved through the following technical solutions:

[0006] The present invention provides a method for preparing an IBC battery, which comprises:

[0007] Perform diffusion doping on the back of the silicon wafer;

[0008] After the back side is subjected to diffusion doping treatment, a first area on the back side of the silicon wafer is subjected to laser doping treatment, wherein the first area is used for contacting with the first gate line;

[0009] Grooving a second region on the back side of the laser-doped silicon wafer to form an n-type doped region and a p-type doped region arranged in an interdigitated manner, wherein the second region is different from the first region;

[0010] After the grooving process, a passivation film layer and an anti-reflection film layer are formed on both sides of the silicon wafer;

[0011] After the anti-reflection film layer is formed, a first gate line in contact with the first region and a second gate line in contact with the second region are formed on the back of the silicon wafer to manufacture an IBC cell.

[0012] Furthermore, in the preparation method, the laser wavelength of the laser doping treatment is 330-380 nm, the pulse length is 10-30 ns, and the power is 550-650 watts.

[0013] Furthermore, in the preparation method, before the second area on the back side of the laser doped silicon wafer is grooved, the method further comprises:

[0014] The laser doped silicon wafer is subjected to oxidation annealing.

[0015] Furthermore, in the preparation method, the oxidation temperature of the oxidation annealing treatment is 950-1050° C., the time is 60-80 minutes, and the oxygen flow rate is 19000-21000 sccm.

[0016] Furthermore, in the preparation method, the passivation layer is an aluminum oxide layer, and the anti-reflection film layer is a silicon nitride layer.

[0017] Furthermore, in the preparation method, before the diffusion doping process is performed on the back side of the silicon wafer, the method further comprises:

[0018] Performing alkali polishing on the silicon wafer;

[0019] Before forming the passivation film layer and the anti-reflection film layer on both sides of the silicon wafer, the method further includes:

[0020] The silicon wafers after the groove processing are chain pickled and texturing treated.

[0021] Furthermore, in the preparation method, before the diffusion doping process is performed on the back side of the silicon wafer, the method further comprises:

[0022] Performing a texturing process on the silicon wafer;

[0023] Before forming the passivation film layer and the anti-reflection film layer on both sides of the silicon wafer, the method further includes:

[0024] The silicon wafers after laser grooving are chain pickled and alkaline polished.

[0025] Furthermore, in the preparation method, the back side of the silicon wafer is subjected to diffusion doping treatment, comprising:

[0026] Perform boron diffusion doping on the back of the N-type silicon wafer;

[0027] or

[0028] The back side of the P-type silicon wafer is doped with phosphorus diffusion.

[0029] Furthermore, in the preparation method, the sheet resistance of the silicon wafer after laser doping treatment is 40 to 80 ohms.

[0030] The present invention also provides an IBC battery, which is prepared by the above method.

[0031] Compared with the prior art, the embodiments of the present invention have the following advantages:

[0032] In an embodiment of the present invention, a diffusion doping treatment is performed on the back side of a silicon wafer; after the diffusion doping treatment is performed on the back side, a laser doping treatment is performed on a first area on the back side of the silicon wafer, the first area being used to contact a first gate line; a groove treatment is performed on a second area on the back side of the silicon wafer that has been subjected to the laser doping treatment to form an n-type doping area and a p-type doping area that are arranged in an interdigitated manner, and the second area is different from the first area; after the groove treatment, a passivation film layer and an anti-reflection film layer are formed on both sides of the silicon wafer; after the anti-reflection film layer is formed, a first gate line contacting the first area and a second gate line contacting the second area are formed on the back side of the silicon wafer to produce an IBC battery. By performing laser doping treatment on the first area on the back side of the silicon wafer that has been diffused doped and in contact with the first gate line, the first area can be doped with a high concentration, while the light absorption area can be lightly doped with a low concentration, so as to obtain a lateral n+ / n high-low junction or p+ / p high-low junction at the junction of the lightly doped area and the highly doped area, and obtain an n+ / p junction or p+ / n junction under the electrode gate line, which can reduce the emitter contact resistance and the dark saturation current of the emitter area, improve the fill factor, short-circuit current and open-circuit voltage, and thus improve the conversion efficiency of the battery, thereby solving the problems of low open-circuit voltage and poor photoelectric conversion efficiency of existing IBC batteries.

[0033] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 It is a flow chart of the method for preparing an IBC battery provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0035] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0036] The applicant of the present invention has found that IBC can be divided into N-type IBC and P-type IBC cells according to the type of original silicon wafer. Among them, the P-type IBC cell adopts the P-type original silicon wafer, and its aluminum grid line is printed into the laser groove connected to the P+ area. The direct contact between aluminum and silicon causes a large metal composite, and the open circuit voltage of the battery is significantly reduced. The N-type IBC cell adopts the N-type original silicon wafer and needs to use silver-aluminum paste in the P+ area. It will also face the problem of large metal composite, and the open circuit voltage of the battery is significantly reduced, which is easy to affect the efficiency of the battery cell itself.

[0037] In order to solve the above problems, the embodiment of the present invention provides a method for preparing an IBC battery, which includes steps 101 to 105:

[0038] Step 101, performing diffusion doping treatment on the back side of the silicon wafer;

[0039] Step 102, after the diffusion doping treatment is performed on the back side, a laser doping treatment is performed on a first area on the back side of the silicon wafer, wherein the first area is used for contacting with a first gate line;

[0040] Step 103, groove the second region on the back side of the laser-doped silicon wafer to form an n-type doped region and a p-type doped region arranged in an interdigitated manner, wherein the second region is different from the first region;

[0041] Step 104: after the grooving process, forming a passivation film layer and an anti-reflection film layer on both sides of the silicon wafer;

[0042] Step 105: After forming the anti-reflection film layer, forming a first gate line in contact with the first region and a second gate line in contact with the second region on the back side of the silicon wafer to manufacture an IBC battery.

[0043] In an embodiment of the present invention, by performing laser doping treatment on the first area on the back side of the silicon wafer that has been diffused doped and in contact with the first gate line, the first area can be doped with a high concentration, while the light absorption area is lightly doped with a low concentration, so as to obtain a lateral n+ / n high-low junction or p+ / p high-low junction at the junction of the lightly doped area and the highly doped area, and obtain an n+ / p junction or p+ / n junction under the electrode gate line, which can reduce the emitter contact resistance and the dark saturation current of the emitter area, improve the fill factor, short-circuit current and open-circuit voltage, and thus improve the conversion efficiency of the battery, thereby solving the problems of low open-circuit voltage and poor photoelectric conversion efficiency of existing IBC batteries.

[0044] In the above step 101, the above silicon wafer may be a P-type silicon wafer or an N-type silicon wafer.

[0045] Optionally, in one implementation, the above step 101 includes:

[0046] The back side of the N-type silicon wafer is doped with boron.

[0047] In this embodiment, an N-type silicon wafer is fed into a furnace tube for boron diffusion doping to form a P-type doping region on the back side of the silicon wafer.

[0048] In the above step 102, after the silicon wafer is treated with boron diffusion and doping, a boron-rich borosilicate glass layer is formed on the surface of the silicon wafer. The selective emitter (SE) laser emitter uses the phosphosilicate glass layer as a doping source to emit laser pulses at high frequency to melt the surface of the silicon wafer, so that the phosphorus atoms in the phosphosilicate glass layer are pushed to the surface of the silicon wafer. After the doped phosphorus atoms are solidified, they will quickly replace the positions of silicon atoms, thereby achieving the purpose of diffusion and advancement of the doped atoms, and completing the above laser doping treatment.

[0049] In this embodiment, by performing laser doping treatment on the first area on the back side of the silicon wafer that has been treated with boron diffusion and is in contact with the first gate line (positive gate line), laser can be used to promote doping to form a P+ structure, forming high and low doping concentration areas, that is, high concentration doping is performed in the electrode area, and low concentration light doping is performed in the light absorption area, so that a lateral p+ / p high-low junction can be obtained at the junction of the lightly doped area and the highly doped area, and a p+ / n junction can be obtained under the electrode gate line. The above structure can reduce the emitter contact resistance and the dark saturation current of the emitter area, and improve the fill factor, short-circuit current and open-circuit voltage.

[0050] Optionally, in some embodiments, the sheet resistance after boron diffusion doping is 100-150 ohms, and the surface concentration is 4E+20-5E+20 atoms / cm 3 .

[0051] Optionally, in some embodiments, the sheet resistance after boron diffusion doping is 140 ohms and the surface concentration is 4.5E+20atoms / cm 3 .

[0052] Optionally, in a specific embodiment, in the above step 103, the second area on the back side of the silicon wafer is laser grooved to expose the original silicon wafer area, that is, the n-type doped area, to form n-type doped areas and p-type doped areas arranged in a finger-like manner, and then a chain machine can be used to remove the borosilicate glass coated on the front side by single-sided film removal using the principle of reaction between alkaline solution and borosilicate glass.

[0053] Optionally, in a specific embodiment, the laser wavelength of the above-mentioned laser doping treatment is 330-380nm, the pulse length is 10-30ns, and the power is 550-650 watts, that is, a laser is used, and the first area on the back side of the silicon wafer is doped under the conditions of a laser wavelength of 330-380nm, a pulse length of 10-30ns, and a power of 550-650 watts, which can effectively promote the boron atoms on the surface of the silicon wafer to form a P+ structure in a high-concentration boron-doped area.

[0054] Optionally, in some embodiments, the laser doping treatment has a laser wavelength of 350 to 360 nm, a pulse length of 15 to 25 ns, and a power of 600 watts.

[0055] Optionally, a femtosecond laser is used to perform the above laser doping treatment. A femtosecond laser has the highest power and is more conducive to doping.

[0056] Optionally, in another implementation, the above step 101 includes:

[0057] The back side of the P-type silicon wafer is doped with phosphorus diffusion.

[0058] In this embodiment, a P-type silicon wafer is fed into a furnace tube for phosphorus diffusion doping to form an N-type doping region on the back side of the silicon wafer.

[0059] In the above step 102, after the silicon wafer is treated with phosphorus diffusion doping, a phosphorus-rich phosphosilicate glass layer is formed on the surface of the silicon wafer. The selective emitter (SE) laser transmitter uses the phosphosilicate glass layer as a doping source and emits laser pulses at high frequency to melt the surface of the silicon wafer, so that the phosphorus atoms in the phosphosilicate glass layer are pushed to the surface of the silicon wafer. After the doped phosphorus atoms are solidified, they will quickly replace the positions of silicon atoms, thereby achieving the purpose of diffusion and advancement of the doped atoms, and completing the above laser doping treatment.

[0060] In this embodiment, by laser doping the first area on the back side of the silicon wafer that has been treated with phosphorus diffusion and is in contact with the second gate line (negative gate line), laser can be used to promote doping to form an n+ structure, forming high and low doping concentration areas, that is, high concentration doping is performed in the electrode area, and low concentration light doping is performed in the light absorption area, so that a lateral n+ / n high-low junction can be obtained at the junction of the lightly doped area and the highly doped area, and an n+ / p junction can be obtained under the electrode gate line. The above structure can reduce the emitter contact resistance and the dark saturation current of the emitter area, and improve the fill factor, short-circuit current and open-circuit voltage.

[0061] Optionally, in a specific embodiment, in the above step 103, the second area on the back side of the silicon wafer is laser grooved to expose the original silicon wafer area, that is, the p-type doped area, to form n-type doped areas and p-type doped areas arranged in a finger-like manner, and then a chain machine can be used to remove the phosphosilicate glass coated on the front side by single-sided film removal using the principle of reaction between alkaline solution and phosphosilicate glass.

[0062] Optionally, when laser grooving the back side of the silicon wafer, a laser is used to perform grooving using picosecond green light and laser marking, with a pulse width of 0.8 picoseconds and a pulse number of 2; the laser marking speed is 35,000 to 45,000 mm / second, the laser power is 500 to 600 w, the frequency is 1,000 to 1,500 Hz, and the width of the laser back groove is 200 to 300 microns and the depth is 1 to 3 microns.

[0063] For example, the laser is used for laser marking at 550 W, with a speed of 40,000 mm / s and a frequency of 1,200 Hz, and forms a laser groove with a width of 250 microns and a depth of 1.5 microns.

[0064] In the embodiment of the present invention, the square resistance of the cell after laser doping treatment is 40 to 80 ohms.

[0065] Optionally, in some embodiments, the square resistance of the cell after laser doping is 60 ohms.

[0066] Optionally, in a specific embodiment, the laser wavelength of the above-mentioned laser doping treatment is 330-380nm, the pulse length is 10-30ns, and the power is 550-650 watts, that is, a laser is used, and the first area on the back side of the silicon wafer is doped under the conditions of a laser wavelength of 330-380nm, a pulse length of 10-30ns, and a power of 550-650 watts, which can effectively promote the boron atoms on the surface of the silicon wafer to form a P+ structure in a high-concentration boron-doped area.

[0067] Optionally, in some embodiments, the laser doping treatment has a laser wavelength of 350 to 360 nm, a pulse length of 15 to 25 ns, and a power of 600 watts.

[0068] Optionally, a femtosecond laser is used to perform the above laser doping treatment. A femtosecond laser has the highest power and is more conducive to doping.

[0069] Optionally, in one implementation, before the above step 103, step 1031 is further included:

[0070] The laser doped silicon wafer is subjected to oxidation annealing.

[0071] In this embodiment, by performing oxidation annealing on the laser doped silicon wafer, not only can high temperature advancement be achieved to redistribute the diffused doping elements, but an oxide layer can also be formed to provide protection during subsequent alkaline polishing.

[0072] Optionally, in a specific embodiment, the oxidation annealing treatment has an oxidation temperature of 950-1050° C., a time of 60-80 minutes, and an oxygen flow rate of 19000-21000 sccm.

[0073] Optionally, in some embodiments, the oxidation annealing treatment is performed at an oxidation temperature of 1000° C., for 70 minutes, and with an oxygen flow rate of 20000 sccm.

[0074] In the embodiment of the present invention, the sheet resistance of the silicon wafer after oxidation degradation treatment is 90-100 ohms, for example, 95 ohms.

[0075] Optionally, in the above step 104, an atomic layer deposition (ALD) process is used to plate a passivation layer on the entire front and back of the product to form field passivation; after the passivation layer is formed, an anti-reflection film layer is first plated on the front of the battery, and then an anti-reflection film layer is plated on the back to further enhance the passivation effect of the battery cell.

[0076] Optionally, the passivation layer is an aluminum oxide film layer, that is, the aluminum oxide film layer is plated on the entire front surface and the entire back surface as the passivation layer.

[0077] Optionally, the anti-reflection film layer is a silicon nitride layer, that is, the anti-reflection film is formed by coating the entire front surface and the entire back surface with a silicon nitride layer; wherein the anti-reflection film includes multiple layers of silicon nitride layers, which can further enhance the anti-reflection effect.

[0078] In the above step 105, the silicon wafer with the anti-reflection film formed thereon is screen-printed and then sintered at high temperature, so that the first gate line contacting the first area and the second gate line contacting the second area can be prepared.

[0079] Optionally, in one embodiment, silver-aluminum paste is printed on a third area of ​​the anti-reflection film layer on the back side of the silicon wafer, and the projection of the third area is within the above-mentioned p-type doped area to form a positive gate line that is conductive to the p+ doped area; at the same time, silver paste needs to be printed on a fourth area of ​​the anti-reflection film layer on the back side, and the projection of the fourth area is within the above-mentioned n-type doped area to form a negative gate line separated from the positive gate line.

[0080] In this embodiment, when the silicon wafer is an N-type silicon wafer, silver-aluminum paste is printed on the third area of ​​the anti-reflection film layer on the back side of the silicon wafer, and the projection of the third area is within the above-mentioned p+ doped area, that is, a positive gate line that is conductive to the p+ doped area can be formed; at the same time, silver paste needs to be printed on the fourth area of ​​the anti-reflection film layer on the back side, and the projection of the fourth area is within the n-type doped area to form a negative gate line separated from the positive gate line.

[0081] In this embodiment, when the silicon wafer is a P-type silicon wafer, silver-aluminum paste is printed on the third area of ​​the anti-reflection film layer on the back side of the silicon wafer, and the projection of the third area is within the above-mentioned p-type doped area, that is, a positive gate line that is conductive to the p-type doped area can be formed; at the same time, silver paste needs to be printed on the fourth area of ​​the anti-reflection film layer on the back side, and the projection of the fourth area is within the n+ doped area to form a negative gate line separated from the positive gate line.

[0082] Optionally, in one embodiment, the components constituting the above-mentioned silver-aluminum paste include organic additives, silver powder, aluminum powder, boron-aluminum alloy powder, organic binder and glass powder.

[0083] Among them, silver powder and aluminum powder are the main components, aluminum powder is mainly used to replace the P+ emitter of the battery, and silver paste has good thermal conductivity, electrical conductivity and burn-through performance; glass powder is an inorganic adhesive, which will melt into liquid under high temperature conditions and condense when cooled to play a bonding role; organic binder can ensure the overall bonding effect; organic additives can reduce the overall viscosity of the silver paste; because boron aluminum alloy powder can be mixed with metallic aluminum liquid, boron can be introduced into the silicon surface and diffused into the silicon for heavy doping, which is beneficial to improve the contact performance of the slurry and reduce the reaction contact area between aluminum and silicon; the above-mentioned silver aluminum paste can quickly form a good alloy with silicon under lower sintering temperature conditions, reduce the contact resistivity between the front silver aluminum grid and the battery, thereby improving the battery filling and battery efficiency.

[0084] Optionally, in one embodiment, in the above-mentioned silver-aluminum paste, the mass percentage of organic additives is 0.4-0.6%; the mass percentage of silver powder is 65-75%; the mass percentage of aluminum powder is 3-5%; the mass percentage of boron-aluminum alloy powder is 0.05-0.1%; the mass percentage of organic binder is 17.5-30.55%; and the mass percentage of glass powder is 1-1.8%.

[0085] For example, in the silver-aluminum paste, the mass fractions of the organic additive, silver powder, aluminum powder, boron-aluminum alloy powder, organic binder and glass powder are 0.4%, 77%, 3%, 0.1%, 17.7% and 1.8% respectively.

[0086] For example, in the silver-aluminum paste, the mass fractions of the organic additive, silver powder, aluminum powder, boron-aluminum alloy powder, organic binder and glass powder are 0.6%, 65%, 5%, 0.05%, 28.35% and 1%, respectively.

[0087] For example, in the silver-aluminum paste, the mass fractions of the organic additive, silver powder, aluminum powder, boron-aluminum alloy powder, organic binder and glass powder are 0.5%, 75%, 4%, 0.75%, 18.25% and 1.5%, respectively.

[0088] For example, in the silver-aluminum paste, the mass fractions of the organic additive, silver powder, aluminum powder, boron-aluminum alloy powder, organic binder and glass powder are 0.4%, 65%, 3%, 0.05%, 30.55% and 1%, respectively.

[0089] Optionally, in one embodiment, the aluminum powder includes a micron-grade aluminum powder with a mass fraction of 75-80% and a D50 of 5-6 μm, and a micron-grade aluminum powder with a mass fraction of 20-25% and a D50 of 9-10 μm; the silver powder includes a micron-grade silver powder with a mass fraction of 88-94% and a nano-grade silver powder with a mass fraction of 6-12%. Specifically, the aluminum powder includes a spherical aluminum powder with a purity of 3 nines and a mass fraction of 75-80% and a D50 of 5-6 μm, and a spherical aluminum powder with a purity of 3 nines and a mass fraction of 20-25% and a D50 of 9-10 μm. The silver powder is a micron-grade spherical silver powder with a purity of 3 nines and a mass fraction of 88-94% and a nano-grade spherical silver powder with a purity of 3 nines and a mass fraction of 6-12%. In the embodiment of the present invention, the above-mentioned silver powder is a micron-grade spherical silver powder with a purity of 3 nines. Among them, because there are gaps between micron-sized silver powders and gaps between micron-sized aluminum powders, the above-mentioned nano-sized spherical silver powder can just fill and penetrate into the gaps between the micron-sized ones.

[0090] The above-mentioned boron aluminum alloy powder is a micron-level boron aluminum alloy powder, which has the characteristics of high tap density, low oxygen content and high activity. By adding the micron-level boron aluminum alloy powder, the silver aluminum paste can quickly form a good alloy with silicon under lower sintering temperature conditions, thereby reducing the contact resistivity between the front silver aluminum fine grid and the battery.

[0091] Optionally, in one embodiment, the organic additive includes at least one of a silane coupling agent, lauryl phosphate, silicone oil, and a dibasic acid ester.

[0092] In the IBC battery aluminum paste provided in the embodiment of the present invention, the above-mentioned organic binder includes a polymer resin and an organic solvent; wherein the polymer resin is dissolved in the organic solvent, so that the organic solvent can be used as an organic binder, that is, the paste plays a role of bonding powder after drying.

[0093] Optionally, in one embodiment, the mass fraction of the high molecular weight polymer in the organic binder is 9-15%; the mass fraction of the organic solvent in the organic binder is 85-91%.

[0094] Optionally, in one embodiment, the high molecular weight polymer is one or more of ethyl cellulose-N20, ethyl cellulose N-50, and ethyl cellulose-N100;

[0095] The organic solvent comprises at least four of benzyl alcohol, diethyl phthalate, terpineol, butyl carbitol, butyl carbitol acetate, tributyl citrate, Span 85 and alcohol ester twelve.

[0096] Optionally, in one embodiment, the glass powder is obtained by sintering and crushing 20 to 25 parts of Bi2O3, 6 to 8 parts of Al2O3, 10 to 12 parts of SiO2, 5 to 29 parts of ZnO, 15 to 20 parts of Sb2O5, 5 to 20 parts of BaO, 5 to 8 parts of B2O3, and 15 to 22 parts of TeO3, by mass, and the D50 of the glass powder is 1.2 to 2 μm. If D50 is less than 1.2 μm, the glass activity is too high, and if D50 is greater than 2 μm, the glass activity is too low.

[0097] Among them, Bi2O3 is the main network structure, ZnO can break the network structure and promote glass crystallization, Al2O3 can adjust glass stability and increase viscosity; SiO2 is used for glass network formation, promoting glass stability and increasing glass melting point; Sb2O5 is used for clarification and uniformity of glass liquid; BaO is used for local crystallization; B2O3 is a network body; and TeO3 reduces the glass formation temperature. The D50 of glass powder is 1.5~2μm.

[0098] Optionally, the high temperature sintering temperature is 750-800°C, for example, 750°C, 766°C or 800°C.

[0099] Optionally, in one implementation, step 1001 is included before step 101 , and step 1041 is included before step 104 .

[0100] Step 1001: performing alkali polishing on the silicon wafer.

[0101] Step 1041, chain pickling and texturing treatment are performed on the silicon wafer after the groove processing.

[0102] In step 1001, the purpose of the alkali polishing treatment is to remove the surface damage from the original wafer cutting process; at the same time, the alkali polishing treatment also increases the surface area of ​​the battery cell to prepare for the increase of the junction area for diffusion.

[0103] In step 1041, before forming the passivation film layer and the anti-reflection film layer on both sides of the silicon wafer, chain pickling can be performed, and then double-sided texturing can be performed using a wet method.

[0104] Among them, chain pickling is to use pickling to remove metal impurities such as Al, Fe, Zn, Ni on the surface of the silicon wafer, as well as to remove metal hydroxides attached to the natural oxide film; and double-sided texturing can greatly reduce the reflectivity of the battery cell surface.

[0105] In practical applications, alkaline solution can be used to anisotropically etch single crystal silicon wafers to produce a velvet surface. The reaction principle is as follows: Si+2NaOH+H2O=Na2SiO3+2H2↑.

[0106] In essence, velvet is to etch a crystalline silicon wafer through anisotropic etching, and finally form a number of four side cones on the surface, that is, a "pyramid" structure. After the formation of this structure, when light is incident on a certain angle of the pyramid slope, the light will reflect the slope of another angle, forming two or more absorptions, thereby reducing the reflectivity of the silicon wafer surface, that is, the trapping effect. The better the size and uniformity of the "pyramid" structure, the more obvious the trapping effect, and the lower the surface emissivity of the silicon wafer.

[0107] Optionally, in another implementation, step 1002 is included before the above step 101 , and step 1042 is included before the above step 104 .

[0108] Step 1002, performing texturing treatment on the silicon wafer;

[0109] Step 1042: performing chain pickling and alkali polishing on the silicon wafer after the groove processing.

[0110] In this embodiment, a process of first texturing and then polishing is adopted to form a polished surface inside the laser groove, which can strengthen the contact between the slurry and the silicon wafer, thereby improving the efficiency of the battery and avoiding the problem that part of the slurry components are stuck because the slurry surface is too small, resulting in the slurry being unable to contact the bottom of the silicon.

[0111] In the method for preparing an IBC battery provided in an embodiment of the present invention, the block size after alkali polishing is 7 to 10 microns, for example, 7 microns, 8 microns or 10 microns.

[0112] Optionally, the alkali polishing treatment is to perform wet alkali polishing on the original silicon wafer in the form of KOH+alkali polishing additive, wherein the mass percentage concentration of KOH is 1.5%, the alkali polishing additive is Tobang EP12V88, the processing time is 250-350s, and the processing temperature is 65-75°C.

[0113] Optionally, the alkali polishing treatment is to perform wet alkali polishing on the original silicon wafer in the form of KOH + alkali polishing additive, wherein, by volume, the alkali polishing solution includes 20 parts of concentrated KOH solution with a mass percentage concentration of 45%, 5 parts of alkali polishing additive and 350 parts of water, the treatment time is 300s, and the treatment temperature is 70°C.

[0114] Optionally, the chain pickling uses 2% by mass hydrochloric acid and 5% by mass hydrofluoric acid to clean the silicon wafer after laser grooving, and the cleaning time is 30 seconds.

[0115] Optionally, the texturing treatment is a trough texturing treatment of the silicon wafer using KOH+texturing additive, wherein the mass percentage concentration of KOH is 1.2%, the texturing additive is EP12V58, the processing time is 620-670s, and the processing temperature is 77-82°C.

[0116] Optionally, the texturing treatment is a wet texturing treatment of the silicon wafer by using KOH + texturing additive, wherein, by volume, the texturing solution includes 10 parts of 45% concentrated KOH solution, 3 parts of texturing additive and 400 parts of water, the treatment time is 650s, and the treatment temperature is 80°C.

[0117] The present invention also provides an IBC battery, wherein the battery is prepared by the above-mentioned IBC battery preparation method.

[0118] The present invention is described in detail below by way of examples.

[0119] Example 1

[0120] (1) Take a 182*182 N-type silicon wafer and perform alkali polishing to form 7-10 μm squares on the surface; wherein, by volume, the alkali polishing solution includes 20 parts of a 45% concentrated KOH solution, 5 parts of an alkali polishing additive Tuobang EP12V88 and 350 parts of water, the treatment time is 300 seconds, and the treatment temperature is 70°C;

[0121] (2) Boron diffusion doping treatment is performed on the back of the N-type silicon wafer, and the surface doping concentration is 4.5E+20atoms / cm 3 ;

[0122] (3) using a laser, and under the conditions of a laser wavelength of 350 nm, a pulse length of 20 ns, and a power of 600 watts, laser doping treatment is performed on a first area on the back side of the silicon wafer, where the first area is used to contact the positive gate line;

[0123] (4) performing an oxidation annealing treatment on the silicon wafer after the laser doping treatment, wherein the oxidation temperature of the oxidation annealing treatment is 1000° C., the time is 70 minutes, and the oxygen flow rate is 20000 sccm;

[0124] (5) laser grooving a second region different from the first region on the back side of the N-type silicon wafer to form an n-type doped region and a p-type doped region arranged in an interdigitated manner;

[0125] (6) Take the silicon wafer after laser grooving, use 2% hydrochloric acid + 5% hydrofluoric acid for chain pickling for 30 seconds, and then perform texturing treatment; wherein, by volume, the texturing solution includes 10 parts of 45% concentrated KOH solution, 3 parts of texturing additive EP12V58 and 400 parts of water, the treatment time is 650 seconds, and the treatment temperature is 80°C;

[0126] (7) after forming an aluminum oxide layer as a passivation layer on both sides and a silicon nitride layer as an anti-reflection film layer on both sides, printing a silver aluminum paste on a third region of the anti-reflection film layer on the back side of the silicon wafer, wherein the projection of the third region is within the impure region of the first region; and simultaneously, printing a silver paste on a fourth region of the anti-reflection film layer on the back side, wherein the projection of the fourth region is within the n-type doped region;

[0127] (8) The N-type silicon wafer is subjected to high-temperature sintering to obtain an IBC battery. The peak sintering temperature is 782° C. to obtain an IBC battery.

[0128] After sintering, the electrical properties tested were: open circuit voltage of 0.7261V and photoelectric conversion efficiency of 25.352%.

[0129] Example 2

[0130] (1) Take a 182*182 P-type silicon wafer and perform alkali polishing to form 7-10 μm squares on the surface; wherein, by volume, the alkali polishing solution includes 20 parts of a 45% concentrated KOH solution, 5 parts of an alkali polishing additive Tuobang EP12V88 and 350 parts of water, the treatment time is 300 seconds, and the treatment temperature is 70°C;

[0131] (2) Phosphorus diffusion doping treatment is performed on the back of the P-type silicon wafer, and the surface doping concentration is 4.5E+20atoms / cm 3 ;

[0132] (3) using a laser, and under the conditions of a laser wavelength of 350 nm, a pulse length of 20 ns, and a power of 600 watts, laser doping treatment is performed on a first area on the back side of the silicon wafer, where the first area is used to contact the negative electrode grid line;

[0133] (4) performing an oxidation annealing treatment on the silicon wafer after the laser doping treatment, wherein the oxidation temperature of the oxidation annealing treatment is 1000° C., the time is 70 minutes, and the oxygen flow rate is 20000 sccm;

[0134] (5) laser grooving a second region different from the first region on the back side of the P-type silicon wafer to form an n-type doped region and a p-type doped region arranged in an interdigitated manner;

[0135] (6) Take the silicon wafer after laser grooving, use 2% hydrochloric acid + 5% hydrofluoric acid for chain pickling for 30 seconds, and then perform texturing treatment; wherein, by volume, the texturing solution includes 10 parts of 45% concentrated KOH solution, 3 parts of texturing additive EP12V58 and 400 parts of water, the treatment time is 650 seconds, and the treatment temperature is 80°C;

[0136] (7) after forming an aluminum oxide layer as a passivation layer on both sides and a silicon nitride layer as an anti-reflection film layer on both sides, printing a silver aluminum paste on a fourth region of the anti-reflection film layer on the back side of the silicon wafer, wherein the projection of the fourth region is within the impure region of the first region; and simultaneously, printing a silver paste on a third region of the anti-reflection film layer on the back side, wherein the projection of the third region is within the p-type doped region;

[0137] (8) The P-type silicon wafer is subjected to high-temperature sintering to obtain an IBC battery. The peak sintering temperature is 782°C to obtain an IBC battery.

[0138] After sintering, the electrical properties tested were: open circuit voltage of 0.7271V and photoelectric conversion efficiency of 25.391%.

[0139] Comparative Example 1

[0140] (1) Take a 182*182 N-type silicon wafer and perform alkali polishing to form 7-10 μm squares on the surface; wherein, by volume, the alkali polishing solution includes 20 parts by mass of a 45% concentrated KOH solution, 5 parts by mass of an alkali polishing additive Tuobang EP12V88 and 350 parts by volume of water, the treatment time is 300 seconds, and the treatment temperature is 70°C;

[0141] (2) Boron diffusion doping treatment is performed on the back of the N-type silicon wafer, and the surface doping concentration is 4.5E+20atoms / cm 3 ;

[0142] (3) laser grooving the back side of an N-type silicon wafer to form interdigitated n-type doped regions and p-type doped regions;

[0143] (4) Take the silicon wafer after laser grooving, use 2% hydrochloric acid + 5% hydrofluoric acid for chain pickling for 30 seconds, and then perform texturing treatment; wherein, by volume, the texturing solution includes 10 parts of 45% concentrated KOH solution, 3 parts of texturing additive EP12V58 and 400 parts of water, the treatment time is 650 seconds, and the treatment temperature is 80°C;

[0144] (5) after forming an aluminum oxide layer as a passivation layer on both sides and a silicon nitride layer as an anti-reflection film layer on both sides, printing a silver aluminum paste on a first region of the anti-reflection film layer on the back side of the silicon wafer, wherein the projection of the first region is within the range of the p-type doped region; and simultaneously, printing a silver paste on a second region of the anti-reflection film layer on the back side, wherein the projection of the second region is within the range of the n-type doped region;

[0145] (6) The N-type silicon wafer is subjected to high-temperature sintering to obtain an IBC battery. The peak sintering temperature is 782° C. to obtain an IBC battery.

[0146] After sintering, the electrical properties tested were: open circuit voltage of 0.722V, photoelectric conversion efficiency of 25.125%.

[0147] Comparative Example 2

[0148] (1) Take a 182*182 P-type silicon wafer and perform alkali polishing to form 7-10 μm squares on the surface; wherein, by volume, the alkali polishing solution includes 20 parts of a 45% concentrated KOH solution, 5 parts of an alkali polishing additive Tuobang EP12V88 and 350 parts of water, the treatment time is 300 seconds, and the treatment temperature is 70°C;

[0149] (2) Phosphorus diffusion doping treatment is performed on the back of the P-type silicon wafer, and the surface doping concentration is 4.5E+20atoms / cm 3 ;

[0150] (3) laser grooving the back side of the P-type silicon wafer to form interdigitated n-type doped regions and p-type doped regions;

[0151] (4) Take the silicon wafer after laser grooving, use 2% hydrochloric acid + 5% hydrofluoric acid for chain pickling for 30 seconds, and then perform texturing treatment; wherein, by volume, the texturing solution includes 10 parts of 45% concentrated KOH solution, 3 parts of texturing additive EP12V58 and 400 parts of water, the treatment time is 650 seconds, and the treatment temperature is 80°C;

[0152] (5) after forming an aluminum oxide layer as a passivation layer on both sides and a silicon nitride layer as an anti-reflection film layer on both sides, printing a silver aluminum paste on a first region of the anti-reflection film layer on the back side of the silicon wafer, wherein the projection of the first region is within the range of the p-type doped region; and simultaneously, printing a silver paste on a second region of the anti-reflection film layer on the back side, wherein the projection of the second region is within the range of the n-type doped region;

[0153] (6) The P-type silicon wafer is subjected to high-temperature sintering to obtain an IBC battery. The peak sintering temperature is 782°C to obtain an IBC battery.

[0154] After sintering, the electrical properties tested were: open circuit voltage of 0.7227V and photoelectric conversion efficiency of 25.159%.

[0155] By comparing Example 1 with Comparative Example 1, it can be seen that by adding the laser doping process in the process of the N-type IBC battery, the photoelectric conversion efficiency of the battery can be increased by 0.227% and the opening voltage can be increased by 4.1mv.

[0156] By comparing Example 2 with Comparative Example 2, it can be seen that by adding the laser doping process in the process of the P-type IBC battery, the photoelectric conversion efficiency of the battery can be increased by 0.232% and the opening voltage can be increased by 4.4mv.

[0157] To summarize, in this embodiment, by performing laser doping treatment on the first area on the back side of the silicon wafer that has been diffused doped and in contact with the first gate line, the first area can be doped with a high concentration, while the light absorption area can be lightly doped with a low concentration, so as to obtain a lateral n+ / n high-low junction or p+ / p high-low junction at the junction of the lightly doped area and the highly doped area, and obtain an n+ / p junction or p+ / n junction under the electrode gate line, which can reduce the emitter contact resistance and the dark saturation current of the emitter area, improve the fill factor, short-circuit current and open-circuit voltage, and thus improve the conversion efficiency of the battery, thereby solving the problems of low open-circuit voltage and poor photoelectric conversion efficiency of existing IBC batteries.

[0158] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they are aware of the basic creative concept. Therefore, the claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0159] The IBC battery and its preparation method provided by the present invention are introduced in detail above. The principle and implementation mode of the present invention are explained in this article by using specific examples. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation mode and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A method for preparing an IBC battery, characterized in that: include: Perform diffusion doping on the back of the silicon wafer; After the back side is subjected to diffusion doping treatment, a first area on the back side of the silicon wafer is subjected to laser doping treatment, wherein the first area is used for contacting with the first gate line; Grooving a second region on the back side of the laser-doped silicon wafer to form an n-type doped region and a p-type doped region arranged in an interdigitated manner, wherein the second region is different from the first region; After the grooving process, a passivation film layer and an anti-reflection film layer are formed on both sides of the silicon wafer; After the anti-reflection film layer is formed, a first gate line in contact with the first region and a second gate line in contact with the second region are formed on the back of the silicon wafer to manufacture an IBC cell.

2. The preparation method according to claim 1, characterized in that: The laser wavelength of the laser doping treatment is 330-380nm, the pulse length is 10-30ns, and the power is 550-650W.

3. The preparation method according to claim 1, characterized in that: Before performing a groove process on the second area on the back side of the laser doped silicon wafer, the method further comprises: The laser doped silicon wafer is subjected to oxidation annealing.

4. The preparation method according to claim 3, characterized in that: The oxidation annealing treatment has an oxidation temperature of 950-1050° C., a time of 60-80 minutes, and an oxygen flow rate of 19000-21000 sccm.

5. The preparation method according to claim 1, characterized in that: The passivation layer is an aluminum oxide layer, and the anti-reflection film layer is a silicon nitride layer.

6. The preparation method according to claim 1, characterized in that: Before performing diffusion doping treatment on the back side of the silicon wafer, the method further comprises: Performing alkali polishing on the silicon wafer; Before forming the passivation film layer and the anti-reflection film layer on both sides of the silicon wafer, the method further includes: The silicon wafers after the groove processing are chain pickled and texturing treated.

7. The preparation method according to claim 1, characterized in that: Before performing diffusion doping treatment on the back side of the silicon wafer, the method further comprises: Performing a texturing process on the silicon wafer; Before forming the passivation film layer and the anti-reflection film layer on both sides of the silicon wafer, the method further includes: The silicon wafers after laser grooving are chain pickled and alkaline polished.

8. The preparation method according to claim 1, characterized in that: Diffusion doping treatment is performed on the back side of the silicon wafer, including: Perform boron diffusion doping on the back of the N-type silicon wafer; or The back side of the P-type silicon wafer is doped with phosphorus diffusion.

9. The preparation method according to claim 1, characterized in that: The square resistance of the silicon wafer after laser doping treatment is 40 to 80 ohms.

10. An IBC battery, characterized in that: The invention is prepared by the method described in claims 1 to 9.

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