Heterojunction solar cell and manufacturing method and device thereof
By introducing the back intrinsic layer and transparent conductive layer of microcrystalline silicon or nanocrystalline silicon into heterojunction solar cells, the problem of difficult current leakage and crystallinity is solved, and a more efficient battery structure and process is achieved, which improves the Battery conversion efficiency and selectivity.
Patent Information
- Application Number
- CN202411272593.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-11
- Publication Date
- 2024-12-20
AI Technical Summary
Existing heterojunction solar cells have current leakage problems at the side edges. The high light absorption coefficient and low doping efficiency of amorphous silicon materials limit the improvement of cell efficiency, especially the crystallinity of P-type microcrystalline silicon is difficult to achieve, which affects the Process and equipment requirements.
In the structure of heterojunction solar cells, the back surface intrinsic layer of microcrystalline silicon or nanocrystalline silicon is introduced, and the PECVD method is deposited, and reacting gases such as silane and hydrogen are used to increase oxygen sources such as carbon dioxide or laughing gas to form a transparent conductive layer. Thin the incubation layer thickness of P-type microcrystalline silicon, and a flip mechanism is provided in the deposition chain to avoid boron element contamination.
It effectively isolates the pollution of the passivation layer by the back doped layer, improves the passivation effect of the battery, reduces current leakage, promotes the rapid crystallization of microcrystalline silicon, and improves the conversion efficiency and battery selectivity.
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Figure CN119170703A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a heterojunction solar cell and a manufacturing method and equipment thereof. Background Art
[0002] Heterojunction solar cells have attracted wide attention due to their high opening voltage and high conversion efficiency. Their cell structures usually use N-type silicon wafers, deposit intrinsic amorphous silicon passivation layers on both sides, deposit N-type doped amorphous silicon on the front side and P-type doped amorphous silicon on the back side. For example, the Chinese patent with publication number CN113302751B discloses a back emitter solar cell structure with heterojunction and a method and device for manufacturing the same. Among them, the cell structure is specifically as follows: the front side is composed of at least one front intrinsic layer of intrinsic amorphous silicon, and at least one front doped layer is composed of amorphous silicon on the top side, and the back side is composed of at least one back intrinsic layer of intrinsic amorphous silicon, and at least one back doped layer is composed of amorphous silicon on the top side, and the doping type is opposite to that of the front side. On the side edge of the back emitter solar cell structure with heterojunction, on the edge area of the semiconductor substrate, the order of layers exists from the inside to the outside in the following order: back intrinsic layer, front intrinsic layer, front doped layer and back doped layer. According to the patent specification, the double intrinsic layer structure on the edge or side edge of the semiconductor substrate can improve the shunt resistance and reverse current at the edge of the solar cell and reduce the leakage current on the edge of the substrate. However, the technical solution still has the following defects:
[0003] First, the double intrinsic layer structure can improve the shunt resistance and reverse current at the edge of the solar cell to a certain extent and reduce the leakage current at the edge of the substrate because it completely wraps the substrate. However, outside the double intrinsic layer structure at the side edge, there is still a certain leakage current in the front doped layer and the back doped layer.
[0004] Second, both the front doping layer and the back doping layer use amorphous silicon materials, but the amorphous silicon materials used as doping layers have a high light absorption coefficient and extremely low doping efficiency, which limits the breakthrough in the efficiency of heterojunction cells.
[0005] Microcrystalline silicon materials have good light transmittance and excellent doping efficiency, and have been reported to replace amorphous silicon doping layers to form better passivation contacts. However, how to achieve good crystallization rate of microcrystalline silicon at a shorter deposition time and thinner film thickness in large-scale mass production of heterojunction cells is a major challenge currently faced. Especially for P-type microcrystalline silicon, boron doping is usually used to form the doping layer of P-type microcrystalline silicon, but the atomic radius of boron is small and it is easy to move in the microcrystalline silicon film, causing the amorphization of the film layer, that is, the boron element has a significant inhibitory effect on the crystallization of microcrystalline silicon, and it is usually more difficult to achieve high crystallinity. Therefore, P-type microcrystalline silicon has higher requirements for processes and equipment, and new processes and film structures need to be proposed. Some solutions have been proposed to improve the crystallization rate of P-type microcrystalline silicon, including increasing the hydrogen dilution ratio of the deposition process, or using CO2 or H2 plasma to treat the intrinsic amorphous silicon layer of the substrate before depositing microcrystalline P. However, increasing the hydrogen dilution ratio usually intensifies etching and reduces the deposition rate of the film layer, affecting the yield of large-scale mass production of heterojunction cells. However, plasma treatment with CO2 or H2 usually causes serious damage to the passivation, reduces the open circuit voltage of the heterojunction battery and thus affects the conversion efficiency. In addition, the current large-scale mass production of heterojunction battery equipment usually has three deposition chains, namely, the first deposition chain is used to deposit at least one back intrinsic layer on the back of the substrate. The second deposition chain is used to deposit at least one front intrinsic layer and at least one front doped layer on the front. The third deposition chain is used to deposit at least one back doped layer on the back intrinsic layer, which directly deposits the back doped layer on the back amorphous silicon intrinsic layer, that is, p-type doping. Due to the diffusion of boron, it further affects the passivation effect of the back amorphous silicon intrinsic layer.
[0006] Therefore, there is an urgent need to develop a new process and cell structure to achieve rapid deposition of high-quality, high-crystallization-rate microcrystalline silicon film layers. Summary of the invention
[0007] The object of the present invention is to provide a heterojunction solar cell and a method and device for manufacturing the same.
[0008] The technical solution to achieve the purpose of the present invention is:
[0009] The present invention proposes a method for manufacturing a heterojunction solar cell, which includes the following steps in order: providing a silicon substrate with a first conductive type doping; forming at least one back passivation layer composed of an intrinsic amorphous silicon-based material on the back side of the silicon substrate; forming at least one front passivation layer composed of an intrinsic amorphous silicon-based material on the front side of the silicon substrate; forming at least one front doped layer on the at least one front passivation layer; forming at least one back intrinsic layer on the at least one back passivation layer; and forming at least one back doped layer on the at least one back intrinsic layer.
[0010] As an embodiment, the heterojunction solar cell includes: a silicon substrate doped with a first conductive type, at least one front passivation layer, at least one front doped layer, at least one transparent front conductive layer and at least one front electrode located on the front side of the silicon substrate; at least one back passivation layer, at least one back intrinsic layer, at least one back doped layer, at least one transparent back conductive layer and at least one back electrode located on the back side of the silicon substrate; among the front doped layer and the back doped layer, one doping type is the first conductive type, and the other doping type is the second conductive type opposite to the first conductive type.
[0011] As an embodiment, the sequential steps are such that: on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate, the order of layers exists from the inside to the outside in the following order: at least one back passivation layer, at least one front passivation layer on the at least one back passivation layer, at least one front doped layer on the at least one front passivation layer, at least one back intrinsic layer on the at least one front doped layer, and at least one back doped layer on the at least one back intrinsic layer.
[0012] The present invention also proposes another method for manufacturing a heterojunction solar cell, which includes the following steps in order: providing a silicon substrate with a first conductive type doping; forming at least one front passivation layer composed of an intrinsic amorphous silicon-based material on the front side of the silicon substrate; forming at least one back passivation layer composed of an intrinsic amorphous silicon-based material on the back side of the silicon substrate; forming at least one front doped layer on the at least one front passivation layer; forming at least one back intrinsic layer on the at least one back passivation layer; and forming at least one back doped layer on the at least one back intrinsic layer.
[0013] As an embodiment, the heterojunction solar cell includes: a silicon substrate doped with a first conductive type, at least one front passivation layer, at least one front doped layer, at least one transparent front conductive layer and at least one front electrode located on the front side of the silicon substrate; at least one back passivation layer, at least one back intrinsic layer, at least one back doped layer, at least one transparent back conductive layer and at least one back electrode located on the back side of the silicon substrate; among the front doped layer and the back doped layer, one doping type is the first conductive type, and the other doping type is the second conductive type opposite to the first conductive type.
[0014] As an embodiment, the sequential steps are such that: on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate, the order of layers exists from the inside to the outside in the following order: at least one front passivation layer, at least one back passivation layer on the at least one front passivation layer, at least one front doped layer on the at least one back passivation layer, at least one back intrinsic layer on the at least one front passivation layer, and at least one back doped layer on the at least one back intrinsic layer.
[0015] As an embodiment, the methods proposed in the above-mentioned present invention also include the following steps in sequence: forming at least one transparent back conductive layer on at least one back doped layer; forming at least one transparent front conductive layer on at least one front doped layer; forming a back electrode on at least one transparent back conductive layer; forming a front electrode on at least one transparent front conductive layer.
[0016] As an embodiment, in the above-mentioned methods proposed by the present invention, the silicon substrate adopts an N-type silicon wafer, the first conductivity type is N-type, and the second conductivity type is P-type, or the silicon substrate adopts a P-type silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type.
[0017] As an implementation mode, in each of the methods proposed by the present invention, the back intrinsic layer is composed of a microcrystalline silicon-based material.
[0018] As an embodiment, in each of the methods proposed in the present invention, the back intrinsic layer is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material, and is deposited by a PECVD method, and the reaction gas includes silane and hydrogen, and the power density is 50 to 250 mW / cm 2 , the silane flow rate is 30-120 sccm, the hydrogen flow rate is 3000-25000 sccm, the film thickness of the back intrinsic layer is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.7. The oxygen source is at least one of carbon dioxide, nitrous oxide or oxygen.
[0019] As an embodiment, in the above-mentioned methods proposed by the present invention, the front doping layer is composed of a microcrystalline silicon-based material, the front doping layer is deposited by a PECVD method, and the reaction gas includes silane, hydrogen, phosphine and an oxygen source, wherein phosphine is a phosphorus source, and the oxygen source is at least one of carbon dioxide, nitrous oxide or oxygen; the film thickness of the front doping layer is in the range of 12-28nm, and the refractive index is in the range of 2.1-3.3; the back doping layer is composed of a microcrystalline silicon-based material, and the back doping layer is deposited by a PECVD method, and the reaction gas includes silane, hydrogen, borane and an oxygen source, wherein borane is a boron source, and the oxygen source is at least one of carbon dioxide, nitrous oxide or oxygen, and the film thickness of the back doping layer is in the range of 18-36nm, and the refractive index is in the range of 2.6-3.7.
[0020] The present invention provides a heterojunction solar cell, the heterojunction solar cell structure comprising: a silicon substrate with a first conductive type doping; at least one front passivation layer formed on the front side of the silicon substrate and composed of an intrinsic amorphous silicon-based material; at least one front doped layer formed on the at least one front passivation layer; at least one back passivation layer formed on the back side of the silicon substrate and composed of an intrinsic amorphous silicon-based material; at least one back intrinsic layer formed on the at least one back passivation layer; at least one back doped layer formed on the at least one back intrinsic layer; at least one transparent front conductive layer formed on the at least one front doped layer; at least one transparent back conductive layer formed on the at least one back doped layer; a front electrode formed on the at least one transparent front conductive layer; a back electrode formed on the at least one transparent back conductive layer; in the front doped layer and the back doped layer, one doping type is the first conductive type, and the other doping type is the second conductive type opposite to the first conductive type.
[0021] As an embodiment, on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate, the order of layers exists from the inside to the outside in the following order: at least one back passivation layer, at least one front passivation layer on the at least one back passivation layer, at least one front doped layer on the at least one front passivation layer, at least one back intrinsic layer on the at least one front doped layer, and at least one back doped layer on the at least one back intrinsic layer.
[0022] As another embodiment, on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate, the order of layers exists from the inside to the outside in the following order: at least one front passivation layer, at least one back passivation layer on the at least one front passivation layer, at least one front doped layer on the at least one back passivation layer, at least one back intrinsic layer on the at least one front passivation layer, and at least one back doped layer on the at least one back intrinsic layer.
[0023] As an embodiment, in each heterojunction solar cell proposed in the present invention, the silicon substrate adopts an N-type textured silicon wafer, the first conductivity type is N-type, and the second conductivity type is P-type; or, the silicon substrate adopts a P-type textured silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type.
[0024] As an implementation manner, in each heterojunction solar cell proposed in the present invention, the back intrinsic layer is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material.
[0025] As an implementation mode, in each heterojunction solar cell proposed in the present invention, the front doping layer is composed of a microcrystalline silicon-based material, and the back doping layer is composed of a microcrystalline silicon-based material.
[0026] The present invention also proposes a device for manufacturing heterojunction solar cells, the device is used to deposit at least one front passivation layer on the front side of a silicon substrate, deposit at least one back passivation layer on the back side of the silicon substrate, deposit at least one front doped layer on the at least one front passivation layer, deposit at least one back intrinsic layer on the at least one back passivation layer, and deposit at least one back doped layer on the at least one back intrinsic layer; in the front doped layer and the back doped layer, one doping type is a first conductivity type, and the other doping type is a second conductivity type opposite to the first conductivity type; the device has four layer deposition chains, wherein: the first layer deposition chain is used to deposit at least one front passivation layer on the front side of the silicon substrate; the second layer deposition chain is used to deposit at least one back passivation layer on the back side of the silicon substrate; the third layer deposition chain is used to deposit at least one front doped layer on the front passivation layer; the fourth layer deposition chain is used to deposit at least one back intrinsic layer on the back passivation layer; and at least one back doped layer is deposited on at least one back intrinsic layer; and includes a flipping mechanism between the first layer deposition chain and the second layer deposition chain, between the second layer deposition chain and the third layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain.
[0027] The present invention also proposes another device for manufacturing heterojunction solar cells, the device is used to deposit at least one back passivation layer on the back side of a silicon substrate, deposit at least one front passivation layer on the front side of a silicon substrate, deposit at least one front doped layer on the at least one front passivation layer, deposit at least one back intrinsic layer on the at least one back passivation layer, and deposit at least one back doped layer on the at least one back intrinsic layer; in the front doped layer and the back doped layer, one doping type is a first conductivity type, and the other doping type is a second conductivity type opposite to the first conductivity type; the device has four layer deposition chains, wherein: the first layer deposition chain is used to deposit at least one back passivation layer on the back side of the silicon substrate; the second layer deposition chain is used to deposit at least one front passivation layer on the front side of the silicon substrate; the third layer deposition chain is used to deposit at least one front doped layer on the front passivation layer; the fourth layer deposition chain is used to deposit at least one back intrinsic layer on the back passivation layer; and at least one back doped layer is deposited on at least one back intrinsic layer; and includes a flipping mechanism between the first layer deposition chain and the second layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain. As an optimization method, a vacuum isolation chamber is set between the second layer deposition chain and the third layer deposition chain; or, the battery structure in the process of processing is subjected to vacuum breaking treatment when being transferred between the second layer deposition chain and the third layer deposition chain.
[0028] The present invention also proposes another device for manufacturing heterojunction solar cells, the device is used to deposit at least one back passivation layer on the back side of a silicon substrate, deposit at least one front passivation layer on the front side of the silicon substrate and deposit at least one front doped layer on the at least one front passivation layer, deposit at least one back intrinsic layer on the at least one back passivation layer, and deposit at least one back doped layer on the at least one intrinsic microcrystalline silicon layer; in the front doped layer and the back doped layer, one doping type is a first conductivity type, and the other doping type is a second conductivity type opposite to the first conductivity type; the device has four layer deposition chains, wherein: the first layer deposition chain is used to deposit at least one back passivation layer on the back side of the silicon substrate; the second layer deposition chain is used to deposit at least one front passivation layer on the front side of the silicon substrate, and deposit at least one front doped layer on the front passivation layer; the third layer deposition chain is used to deposit at least one back intrinsic layer on the back passivation layer; the fourth layer deposition chain is used to deposit at least one back doped layer on at least one back intrinsic layer; and includes a flipping mechanism between the first layer deposition chain and the second layer deposition chain, and between the second layer deposition chain and the third layer deposition chain.
[0029] The present invention also proposes another device for manufacturing heterojunction solar cells, the device is used to form and deposit at least one back passivation layer on the back side of a silicon substrate, deposit at least one front passivation layer on the front side of the silicon substrate, deposit at least one front doped layer on the at least one front passivation layer, deposit at least one back intrinsic layer on the at least one back passivation layer, and deposit at least one back doped layer on the at least one back intrinsic layer; in the front doped layer and the back doped layer, one doping type is a first conductivity type, and the other doping type is a second conductivity type opposite to the first conductivity type; the device has five layer deposition chains, wherein: the first layer deposition chain is used to deposit at least one back passivation layer on the back side of the silicon substrate; the second layer deposition chain is used to deposit at least one front passivation layer on the front side of the silicon substrate; the third layer deposition chain is used to deposit at least one front doped layer on the front passivation layer; the fourth layer deposition chain is used to deposit at least one back intrinsic layer on the back passivation layer; the fifth layer deposition chain is used to deposit at least one back doped layer on at least one back intrinsic layer; and includes a flipping mechanism between the first layer deposition chain and the second layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain.
[0030] As an embodiment, in each heterojunction solar cell manufacturing device proposed in the present invention, the back intrinsic layer is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material, which is deposited by a PECVD method, and the reaction gas includes silane, hydrogen and an oxygen source, wherein the oxygen source is at least one of carbon dioxide, nitrous oxide or oxygen, and the power density is 50 to 250 mW / cm 2 , the silane flow rate is 30-120 sccm, the hydrogen flow rate is 3000-25000 sccm; the film thickness of the back intrinsic layer is 3-15 nm, and the refractive index is in the range of 2.4-3.7.
[0031] As an embodiment, in each heterojunction solar cell manufacturing device proposed in the present invention, the front doping layer is composed of a microcrystalline silicon-based material, the front doping layer is deposited by a PECVD method, and the reaction gas includes silane, hydrogen, phosphine and an oxygen source, wherein phosphine is a phosphorus source, and the oxygen source is at least one of carbon dioxide, nitrous oxide or oxygen; the film thickness of the front doping layer is in the range of 12-28nm, and the refractive index is in the range of 2.1-3.3; the back doping layer is composed of a microcrystalline silicon-based material, the back doping layer is deposited by a PECVD method, and the reaction gas includes silane, hydrogen, borane and an oxygen source, wherein borane is a boron source, and the oxygen source is at least one of carbon dioxide, nitrous oxide or oxygen, the film thickness of the back doping layer is in the range of 18-36nm, and the refractive index is in the range of 2.6-3.7.
[0032] Compared with the prior art, the present invention has the following significant advantages:
[0033] (1) The present invention sets a back intrinsic layer between the back passivation layer and the back doping layer, which can isolate the back passivation layer from the contamination of the back doping layer by the boron element when the back doping layer is formed, thereby improving the passivation of the heterojunction battery.
[0034] (2) The present invention sets a back intrinsic layer between the back passivation layer and the back doping layer. On the side edge of the heterojunction solar cell, the back intrinsic layer serves to isolate the front doping layer from the back doping layer, further reducing the current leakage on the edge side of the silicon substrate.
[0035] (3) When the back doping layer of P-type microcrystalline silicon is formed by doping with boron, the boron has an adverse inhibitory effect on the crystallization of microcrystalline silicon, affecting the crystallization rate of P-type microcrystalline silicon. To this end, the heterojunction solar cell proposed by the present invention inserts a back intrinsic layer composed of microcrystalline silicon-based materials or nanocrystalline silicon-based materials between the back passivation layer and the P-type microcrystalline silicon to form an intrinsic microcrystalline silicon-based material layer or a nanocrystalline silicon-based material layer. The boron element has no adverse effect on the intrinsic microcrystalline silicon-based material layer or the nanocrystalline silicon-based material layer in inhibiting crystallization. In this way, the back doping layer of P-type microcrystalline silicon is grown on the basis of the intrinsic microcrystalline silicon-based material layer or the nanocrystalline silicon-based material layer, and can crystallize more quickly, reducing the inhibitory effect of the boron element on the crystallization of P-type microcrystalline silicon, promoting the rapid crystallization of microcrystalline silicon, and then greatly reducing the thickness of the incubation layer of P-type microcrystalline silicon. At the same time, the provision of the intrinsic microcrystalline silicon-based material layer or the nanocrystalline silicon-based material layer can further isolate the contamination of the back passivation layer by the boron element when the back doping layer is formed, thereby improving the passivation of the heterojunction battery. In addition, the intrinsic microcrystalline silicon-based material layer or nanocrystalline silicon-based material layer can further isolate the front doped layer from the back doped layer of P-type microcrystalline silicon on the side edge of the silicon substrate, further reducing current leakage on the edge side of the silicon substrate.
[0036] (4) The oxygen doping achieved by the present invention using nitrous oxide can increase the stress of the front doped layer and the back doped layer of the microcrystalline silicon film, which is helpful for the nucleation of microcrystalline silicon and also helps the rapid crystallization of microcrystalline silicon; at the same time, it can reduce the thickness of the incubation layer of P-type microcrystalline silicon and improve the selectivity of the hole contact of the heterojunction battery.
[0037] (5) In the four-stage deposition chain device proposed in the present invention, after the second deposition chain deposits the front passivation layer and the front doping layer, a third deposition chain is added to deposit the back intrinsic layer, and the fourth deposition chain deposits the back doping layer. In this way, the added third deposition chain avoids the contamination of the boron element from the carrier and the process chamber in the fourth deposition chain, ensures the purity of the back intrinsic layer, and ensures that the process chamber and the carrier are free of boron elements. In the five-stage deposition chain device proposed in the present invention, the fourth deposition chain is used to deposit the back intrinsic layer, and the fifth deposition chain is used to deposit the back doping layer. Similarly, the back intrinsic layer can avoid the contamination of the boron element from the carrier and the process chamber in the fifth deposition chain, ensures the purity of the back intrinsic layer, and ensures that the process chamber and the carrier are free of boron elements.
[0038] (6) In the four-stage deposition chain device proposed in the present invention, after the front-side doped microcrystalline silicon is formed, a third deposition chain is added to deposit an intrinsic microcrystalline silicon layer, and a P-type doped microcrystalline silicon layer on the back is deposited in the fourth deposition chain. In this way, the added third deposition chain avoids the contamination of the boron element from the carrier and the process chamber in the fourth deposition chain, ensures the purity of the intrinsic microcrystalline silicon layer, and ensures that the process chamber and the carrier are free of boron elements. It is beneficial to improve the crystallization rate of the P-type doped microcrystalline silicon layer on the back, achieve good selectivity for collecting holes on the back side of the heterojunction, and improve the conversion efficiency of the battery. In the five-stage deposition chain device proposed in the present invention, the fourth deposition chain is used to deposit the intrinsic microcrystalline silicon layer, and the fifth deposition chain is used to deposit the P-type doped microcrystalline silicon layer. Similarly, the intrinsic microcrystalline silicon layer can avoid the contamination of the boron element from the carrier and the process chamber in the fifth deposition chain, ensure the purity of the intrinsic microcrystalline silicon layer, and ensure that the process chamber and the carrier are free of boron elements.
[0039] Other features and advantages of the present invention will be described in the following description, and part of them will become obvious from the description, or will be understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the written description, claims, and drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] Figure 1 Schematic diagram of the structure of the front and back sides of a solar cell in an embodiment of the present invention.
[0041] Figure 2 It is a schematic structural diagram of the side edge of the solar cell substrate in an embodiment of the present invention.
[0042] Figure 3 Schematic diagram of another structure of the side edge of the solar cell substrate in an embodiment of the present invention.
[0043] Figure 4 Schematic diagram of the structure of a deposition chain including at least one process chamber in an embodiment of the present invention.
[0044] Figure 5 Schematic diagram of the structure of a deposition chain including at least two process chambers in an embodiment of the present invention.
[0045] Figure 6 It is a schematic structural diagram of two front and rear deposition chains provided with isolation chambers in an embodiment of the present invention. DETAILED DESCRIPTION
[0046] It is easy to understand that according to the technical solution of the present invention, without changing the essential spirit of the present invention, a person skilled in the art can imagine various embodiments of the present invention. Therefore, the following specific embodiments and drawings are only exemplary descriptions of the technical solution of the present invention, and should not be regarded as the whole of the present invention or as a limitation or limitation of the technical solution of the present invention. On the contrary, the purpose of providing these embodiments is to enable those skilled in the art to understand the present invention more thoroughly. The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of this application and are used together with the embodiments of the present invention to illustrate the innovative concept of the present invention.
[0047] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangement of components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless otherwise specifically stated.
[0048] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
[0049] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered as part of the specification.
[0050] In all examples shown and discussed herein, any specific values should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.
[0051] Combination Figure 1The heterojunction solar cell of the present invention comprises a silicon substrate 10 doped with a first conductive type. On the front side of the silicon substrate 10, there are provided: at least one front passivation layer 11 located on the front side of the silicon substrate 10, at least one front doped layer 12, at least one transparent front conductive layer 13 and at least one front electrode 14. On the back side of the silicon substrate 10, there are provided: at least one back passivation layer 21 located on the back side of the silicon substrate 10, at least one back intrinsic layer 22, at least one back doped layer 23, at least one transparent back conductive layer 24 and at least one back electrode 25. In the front doped layer 12 and the back doped layer 23, one doping type is the first conductive type, and the other doping type is the second conductive type opposite to the first conductive type. In the present invention, at least one back intrinsic layer 22 is provided between the back passivation layer 21 and the back doped layer 23. The back doped layer 23 serves to isolate the back passivation layer 21 from the back doped layer 23, thereby bringing benefits to the battery structure and processing sequence. For example, the current leakage at the edge of the substrate can be reduced, and the contamination or adverse effect of the back passivation layer 21 caused by the formation process of the back doping layer 23 can be avoided.
[0052] Combination Figure 1 , the above content describes the basic structure of the front and back sides of the silicon substrate 10 of the heterojunction solar cell of the present invention. As described in the Chinese patent CN113302751B, in each processing step of the heterojunction solar cell, when the silicon substrate 10 or other layers are in the atmosphere, an oxide layer will grow on the surface of the corresponding layer. The oxide layer is a naturally occurring oxidation phenomenon when the silicon substrate 10 or other layers are in the atmosphere. The specific layer on which the oxide layer grows depends mainly on the timing when the silicon substrate 10 or other layers are in the atmosphere during the processing steps of the heterojunction solar cell. Therefore, in the case that the present invention does not clearly define it, for the heterojunction solar cell structure of the present invention, whether there is an oxide layer in each layer and how many oxide layers there are are not the contents that need to be defined by the present invention. Therefore, in each schematic diagram, the oxide layer is not shown.
[0053] As a preferred embodiment, in a heterojunction solar cell, in the front doped layer 12 and the back doped layer 23, one of the doping types is a first conductivity type, and the other doping type is a second conductivity type opposite to the first conductivity type. For example, the silicon substrate 10 uses an N-type silicon wafer, the first conductivity type is N-type, and the second conductivity type is P-type. Alternatively, the silicon substrate 10 uses a P-type silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type. In this way, a heterojunction solar cell with an emitter located on the back can be formed.
[0054] As a preferred embodiment, at least one front passivation layer 11 composed of an intrinsic amorphous silicon-based material is formed on the front surface of the silicon substrate 10; and at least one back passivation layer 21 composed of an intrinsic amorphous silicon-based material is formed on the back surface of the silicon substrate 10.
[0055] As an embodiment, the front doping layer 12 and the back doping layer 23 of the present invention can be composed of amorphous silicon materials, and doped according to the specific conductivity type. Usually, phosphorus doping is used for N-type doping, and boron doping is used for P-type doping. As a more preferred embodiment, the front doping layer 12 and the back doping layer 23 of the present invention are composed of microcrystalline silicon-based materials, and doped according to the specific conductivity type. Phosphorus doping can be used for N-type doping, and boron doping can be used for P-type doping. The front doping layer 12 and the back doping layer 23 are composed of microcrystalline silicon-based materials, which can form better passivation contacts.
[0056] As a preferred embodiment, the back intrinsic layer 22 is formed by a microcrystalline silicon-based material or a nanocrystalline silicon-based material. When the back intrinsic layer 22 is formed by a microcrystalline silicon-based material or a nanocrystalline silicon-based material, a microcrystalline silicon-based material layer or a nanocrystalline silicon-based material layer is formed. In this way, when a boron-doped back doping layer 23 is formed after the back intrinsic layer 22, the back intrinsic layer 22 can play a role in isolating the back passivation layer 21 from the back doping layer 23, preventing the boron element from contaminating the back passivation layer, and improving the passivation of the heterojunction battery. When the back doping layer 23 is also composed of a microcrystalline silicon-based material, the back doping layer of the boron-doped P-type microcrystalline silicon is grown on the basis of the back intrinsic layer 22, and can crystallize more quickly, reducing the inhibitory effect of the boron element on the crystallization of the P-type microcrystalline silicon, which is conducive to the rapid growth of the P-type microcrystalline silicon, and then greatly reducing the thickness of the incubation layer of the P-type microcrystalline silicon.
[0057] Combination Figure 2As an embodiment, on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate 10, the order of layers is from inside to outside in the following order: at least one back passivation layer 21, at least one front passivation layer 11 on the at least one back passivation layer 21, at least one front doping layer 12 on the at least one front passivation layer 11, at least one back intrinsic layer 22 on the at least one front doping layer, and at least one back doping layer 23 on the at least one back intrinsic layer 22. In this way, the back passivation layer 21 and the front passivation layer 11 completely wrap the silicon substrate 10, which can improve the shunt resistance and reverse current at the edge of the solar cell to a certain extent, and reduce the leakage current at the edge of the substrate. Further, on the side edge of the solar cell, at least one back intrinsic layer 22 is arranged between the front doping layer and the back doping layer 23. The back intrinsic layer 22 plays the role of isolating the back passivation layer 21 from the back doping layer 23, thereby bringing benefits to the cell structure and processing sequence. For example, the current leakage on the edge side of the substrate can be reduced, and the formation process of the back doping layer 23 can be avoided from contaminating or adversely affecting the back passivation layer 21. The back intrinsic layer 22 is preferably composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material to form a microcrystalline silicon-based material layer or a nanocrystalline silicon-based material layer. At this time, the back intrinsic layer 22 composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material plays a role in isolating the front doped layer 12 and the back doped layer 23 at the edge side of the silicon substrate, which can further reduce the current leakage at the edge side of the silicon substrate.
[0058] Combination Figure 3As another embodiment, on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate 10, the order of layers exists from the inside to the outside in the following order: at least one front passivation layer 11, at least one back passivation layer 21 on the at least one front passivation layer 11, at least one front doped layer 12 on the at least one back passivation layer 21, at least one back intrinsic layer 22 on the at least one front passivation layer 12, and at least one back doped layer 23 on the at least one back intrinsic layer 22. In this way, the back passivation layer 21 and the front passivation layer 11 completely wrap the silicon substrate 10, which can improve the shunt resistance and reverse current at the edge of the solar cell to a certain extent, and reduce the leakage current at the edge of the substrate. Furthermore, on the side edge of the solar cell, at least one back intrinsic layer 22 is arranged between the front doped layer 12 and the back doped layer 23. The back intrinsic layer 22 plays the role of isolating the front doped layer 12 from the back doped layer 23, thereby bringing benefits to the cell structure and processing sequence. For example, the current leakage on the edge of the substrate can be reduced, and the formation process of the back doping layer 23 can be avoided to pollute or adversely affect the back passivation layer 21. The back intrinsic layer 22 is preferably composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material to form a microcrystalline silicon-based material layer or a nanocrystalline silicon-based material layer. At this time, the back intrinsic layer 22 composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material has a better effect of isolating the front doping layer 12 and the back doping layer 23, and can further reduce the current leakage on the edge of the silicon substrate.
[0059] Figure 2 and Figure 3 In the illustrated embodiment, the structures of the front and back sides of the silicon substrate 10 are basically the same, but they are different at the side edges. Figure 2 In the embodiment shown, the side edge of the silicon substrate 10 is formed from the inside to the outside, first by the back passivation layer 21 and then by the front passivation layer 11. Figure 3 In the embodiment shown, the side edge of the silicon substrate 10 is from the inside to the outside, first the front passivation layer 21, then the back passivation layer 11. This is mainly due to the different order of steps in the heterojunction solar cell manufacturing method. Figure 2 The structure and Figure 3 Different methods for manufacturing heterojunction solar cells of the illustrated embodiment structures.
[0060] In one embodiment of the method for manufacturing a heterojunction solar cell, the heterojunction solar cell comprises: a silicon substrate 10 doped with a first conductive type, at least one front passivation layer 11, at least one front doped layer 12, at least one transparent front conductive layer 13 and at least one front electrode 14 located on the front side of the silicon substrate 10; at least one back passivation layer 21, at least one back intrinsic layer 22, at least one back doped layer 23, at least one transparent back conductive layer 24 and at least one back electrode 25 located on the back side of the silicon substrate 10; in the front doped layer 12 and the back doped layer 23, one doping type is the first conductive type, and the other doping type is the second conductive type opposite to the first conductive type. The structure of the heterojunction solar cell on the front and back sides of the silicon substrate 10 is not limited thereto, and also includes other more specific front structures and back structures in the preferred embodiments described above, as well as other front structures and back structures that are obviously obtained by those skilled in the art based on the contents recorded in this patent document. In this embodiment, the method for manufacturing a heterojunction solar cell includes the following steps in order: providing a silicon substrate 10 with a first conductive type doping; forming at least one back passivation layer 21 composed of an intrinsic amorphous silicon-based material on the back side of the silicon substrate 10; forming at least one front passivation layer 11 composed of an intrinsic amorphous silicon-based material on the front side of the silicon substrate 10; forming at least one front doped layer 12 on the at least one front passivation layer 11; forming at least one back intrinsic layer 22 on the at least one back passivation layer 21; forming at least one back doped layer 23 on the at least one back intrinsic layer 22. In the method described in this embodiment, the back passivation layer 21 is first formed on the back side of the silicon substrate 10, and then the front passivation layer 11 is formed on the front side of the silicon substrate 10. Therefore, it is more suitable for a solar cell having Figure 2 The manufacture of a heterojunction solar cell with a structure of the side edge shown. Based on the steps in the order shown in this embodiment, on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate 10, the order of the layers can be present from the inside to the outside in the following order: at least one back passivation layer 21, at least one front passivation layer 11, at least one front doped layer 12, at least one back intrinsic layer 22, at least one back doped layer 23. In the method for manufacturing a heterojunction solar cell described in this embodiment, the front passivation layer 11 and the front doped layer 12 can be deposited and formed in the same deposition chain, or they can be deposited and formed in different deposition chains. The back intrinsic layer 22 and the back doped layer 23 can be deposited and formed in the same deposition chain, or they can be deposited and formed in different deposition chains.
[0061] In another embodiment of the method for manufacturing a heterojunction solar cell, the heterojunction solar cell comprises: a silicon substrate 10 doped with a first conductive type, at least one front passivation layer 11, at least one front doped layer 12, at least one transparent front conductive layer 13 and at least one front electrode 14 located on the front side of the silicon substrate 10; at least one back passivation layer 21, at least one back intrinsic layer 22, at least one back doped layer 23, at least one transparent back conductive layer 24 and at least one back electrode 25 located on the back side of the silicon substrate 10; in the front doped layer 12 and the back doped layer 23, one doping type is the first conductive type, and the other doping type is the second conductive type opposite to the first conductive type. The structure of the heterojunction solar cell on the front and back sides of the silicon substrate 10 is not limited thereto, and also includes other more specific front structures and back structures in the preferred embodiments described above, as well as other front structures and back structures that are obviously obtained by those skilled in the art based on the contents of this patent document. In this embodiment, the method for manufacturing a heterojunction solar cell includes the following steps in order: providing a silicon substrate 10 with a first conductive type doping; forming at least one front passivation layer 11 composed of an intrinsic amorphous silicon-based material on the front side of the silicon substrate 10; forming at least one back passivation layer 21 composed of an intrinsic amorphous silicon-based material on the back side of the silicon substrate 10; forming at least one front doped layer 12 on the at least one front passivation layer 11; forming at least one back intrinsic layer 22 on the at least one back passivation layer 21; forming at least one back doped layer 23 on the at least one back intrinsic layer 22. In the method described in this embodiment, the front passivation layer 11 is first formed on the front side of the silicon substrate 10, and then the back passivation layer 21 is formed on the back side of the silicon substrate 10. Therefore, it is more suitable for a solar cell having Figure 3 The manufacturing of a heterojunction solar cell with a structure of the side edge shown. Based on the steps in the order shown in this embodiment, on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate 10, the order of layers is from the inside to the outside in the following order: at least one front passivation layer 11, at least one back passivation layer 21, at least one front doped layer 12, at least one back intrinsic layer 22, at least one back doped layer 23. In the method for manufacturing a heterojunction solar cell described in this embodiment, the back intrinsic layer 22 and the back doped layer 23 can be deposited and formed in the same deposition chain, or can be deposited and formed in different deposition chains.
[0062] For the different heterojunction solar cell manufacturing methods shown in the above embodiments, preferably, the back intrinsic layer 22 is composed of microcrystalline silicon-based materials or nanocrystalline silicon-based materials to form a microcrystalline silicon-based material layer or a nanocrystalline silicon-based material layer. The front doped layer 12 and the back doped layer 23 can both be composed of microcrystalline silicon-based materials.
[0063] The back passivation layer 21 is deposited by PECVD method, and the reaction gases include silane and hydrogen. The film thickness of the back passivation layer 21 is in the range of 1-20 nm, and the refractive index is in the range of 3.5-4.2.
[0064] The front passivation layer 11 is deposited by PECVD method, the reaction gases include silane and hydrogen, the film thickness of the front passivation layer 11 is in the range of 1-20 nm, and the refractive index is in the range of 3.5-4.2.
[0065] The front doping layer 12 composed of microcrystalline silicon-based materials is deposited by PECVD method very high frequency plasma chemical vapor deposition, and the reaction gas includes silane, hydrogen and phosphine and oxygen source, wherein phosphine is used as phosphorus source. Preferably, the reaction gas also includes an oxygen source, and the oxygen source is at least one of carbon dioxide, laughing gas, and oxygen. Laughing gas is preferably used, which is easier to decompose and is conducive to the crystallization of the microcrystalline layer. The film thickness of the front doping layer 12 composed of microcrystalline silicon-based materials is in the range of 12-28nm, preferably in the range of 16-25nm, and the refractive index is in the range of 2.1-3.3, preferably in the range of 2.5-3.0.
[0066] The back intrinsic layer 22 is made of microcrystalline silicon-based material or nanocrystalline silicon-based material, which is deposited by PECVD method, the reaction gas includes silane and hydrogen, and the process parameters are: power density is 50-250mW / cm 2 , the silane flow rate is 30-120sccm, the hydrogen flow rate is 3000-25000sccm, and the back intrinsic layer 22 formed can achieve the effect of isolating the back passivation layer 21 and the back doping layer 23, as well as isolating the front doping layer 12 and the back doping layer 23. Preferably, the reaction gas also includes an oxygen source, and the oxygen source is at least one of carbon dioxide, nitrous oxide, and oxygen. Preferably, nitrous oxide is used as the oxygen source, and the nitrous oxide flow rate is between 20 and 100sccm. The nitrous oxide is easier to decompose, which is conducive to the crystallization of the microcrystalline layer; the film thickness of the back intrinsic layer 22 composed of the microcrystalline silicon-based material is in the range of 3-15nm, preferably in the range of 5-12nm, and the refractive index is in the range of 2.4-3.7, preferably in the range of 2.8-3.5.
[0067] The back doping layer 23 composed of microcrystalline silicon-based materials is deposited by PECVD method, and the reaction gas includes silane, hydrogen, and borane, wherein borane is used as a boron source. Preferably, the reaction gas also includes an oxygen source, and the oxygen source is at least one of carbon dioxide, nitrous oxide, and oxygen. Preferably, nitrous oxide is used as the oxygen source, which is easier to decompose and is conducive to the crystallization of the microcrystalline layer; the film thickness of the back doping layer 23 composed of microcrystalline silicon-based materials is within the range of 18-36nm, preferably within the range of 24-35nm, and the refractive index is within the range of 2.6-3.7, preferably within the range of 3.0-3.6.
[0068] The transparent front conductive layer 13 and the transparent back conductive layer 24 are deposited by PVD equipment, and the film thickness of the transparent front conductive layer 13 and the transparent back conductive layer 24 is in the range of 70-100nm; the front electrode and the back electrode are formed by electroplating or screen printing.
[0069] It should be noted that, in the aforementioned embodiments, oxygen doping using nitrous oxide can increase the stress of the microcrystalline silicon film layer, which is helpful for the nucleation and rapid crystallization of microcrystalline silicon; at the same time, it can reduce the thickness of the incubation layer of P-type microcrystalline silicon and improve the selectivity of the hole contact of the heterojunction battery.
[0070] For the different heterojunction solar cell manufacturing methods shown in the above embodiments, preferably, the conductive layers and electrodes on the front and back sides of the silicon substrate 10 are formed according to the following steps, specifically: forming at least one transparent back conductive layer 24 on at least one back doped layer 23; forming at least one transparent front conductive layer 13 on at least one front doped layer 12; forming a back electrode 25 on at least one transparent back conductive layer 24; forming a front electrode 14 on at least one transparent front conductive layer 13. In the process of manufacturing solar cells, the carrier will absorb water vapor in the air, and water vapor will also provide oxygen in each deposition step. However, the incident light front side of the solar cell is sensitive to oxygen and has high oxygen control requirements. Therefore, the present invention first deposits the conductive layer on the back side of the silicon substrate 10, and then deposits the conductive layer on the front side. This is conducive to further control of water vapor during the deposition process on the front side of the solar cell.
[0071] The present invention also provides a device for manufacturing a heterojunction solar cell that is suitable for manufacturing the heterojunction solar cell structure or manufacturing method shown in the above embodiments.
[0072] In a first embodiment of an apparatus for manufacturing a heterojunction solar cell, the apparatus may be suitable for Figure 1 , Figure 2The heterojunction solar cell structure shown, and the method for manufacturing the back passivation layer 21 of the silicon substrate 10 by first depositing the back passivation layer 21, can be on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate 10, the order of layers is in the following order from inside to outside: at least one back passivation layer 21, at least one front passivation layer 11, at least one front doped layer 12, at least one back intrinsic layer 22, at least one back doped layer 23. Specifically, the device described in this embodiment is used to: deposit at least one back passivation layer 21 on the back of the silicon substrate 10, deposit at least one front passivation layer 11 on the front of the silicon substrate 10, deposit at least one front doped layer 12 on the at least one front passivation layer 21, deposit at least one back intrinsic layer 22 on the at least one back passivation layer 21, and deposit at least one back doped layer 23 on the at least one back intrinsic layer 22; in the front doped layer 12 and the back doped layer 23, one of the doping types is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type. The device shown in this embodiment has four layer deposition chains, wherein: the first layer deposition chain is used to deposit at least one back passivation layer 21 on the back of the silicon substrate 10; the second layer deposition chain is used to deposit at least one front passivation layer 11 on the front of the silicon substrate 10; the third layer deposition chain is used to deposit at least one front doping layer 12 on the front passivation layer 11; the fourth layer deposition chain is used to deposit at least one back intrinsic layer 22 on the back passivation layer 21; and at least one back doping layer 23 is deposited on at least one back intrinsic layer 22; and a flip mechanism is included between the first layer deposition chain and the second layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain. As a preferred method, when the device shown in this embodiment is used to manufacture heterojunction solar cells, the at least one front passivation layer 11 is composed of an intrinsic amorphous silicon-based material; the at least one back passivation layer 21 is composed of an intrinsic amorphous silicon-based material. The back intrinsic layer 22 is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material. The front doping layer 12 and the back doping layer 23 are both composed of a microcrystalline silicon-based material. Compared with amorphous silicon, microcrystalline silicon has a higher effective doping efficiency of elements, and its low light absorption coefficient corresponds to good light transmittance and better conductivity.
[0073] As a preferred mode, for the first embodiment of the device, the first layer deposition chain, the second layer deposition chain, and the third layer deposition chain each include at least one reaction chamber. The fourth deposition chain includes at least two reaction chambers, and the at least two reaction chambers respectively deposit a back intrinsic layer 22 composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material and a P-doped (such as boron-doped) back doped layer 23 composed of a microcrystalline silicon-based material. In this way, the influence of the boron element on the back intrinsic layer can be further avoided.
[0074] In the above embodiment, a vacuum breaking process can be performed between the second layer deposition chain and the third layer deposition chain, that is, a vacuum breaking chamber is provided after the second deposition chain (for example, an unloading chamber is used as a vacuum breaking chamber), and a vacuum pumping chamber is provided before the third layer deposition chain (for example, a loading chamber is used as a vacuum pumping chamber). This prevents the diffusion of doping gas between the adjacent front passivation layer 11 deposition chamber and the front doping layer 12 deposition chamber, that is, prevents the doping in the front doping layer 12 deposition chamber from diffusing into the front passivation layer 11 deposition chamber, thereby affecting the passivation effect of the front passivation layer 11.
[0075] As an optional method, an isolation chamber can also be set between the second layer deposition chain and the third layer deposition chain, that is, an isolation chamber is added between the deposited front passivation layer 11 and the front doping layer 12, so as to prevent the doping gas in the reaction chamber for depositing the front doping layer 12 from diffusing into the reaction chamber for depositing the front passivation layer 11, thereby affecting the passivation effect of the front passivation layer 11.
[0076] In a second embodiment of the apparatus for manufacturing a heterojunction solar cell, the apparatus may be suitable for Figure 1 , Figure 3The heterojunction solar cell structure shown, and the method for manufacturing the front passivation layer 11 of the silicon substrate 10 by first depositing the front passivation layer 11, can be on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate 10, the order of layers is from inside to outside in the following order: at least one front passivation layer 11, at least one back passivation layer 21, at least one front doped layer 12, at least one back intrinsic layer 22, at least one back doped layer 23. Specifically, the device described in this embodiment is used to: deposit at least one front passivation layer 11 on the front side of the silicon substrate 10, deposit at least one back passivation layer 21 on the back side of the silicon substrate 10, deposit at least one front doped layer 12 on the at least one front passivation layer 21, deposit at least one back intrinsic layer 22 on the at least one back passivation layer 21, and deposit at least one back doped layer 23 on the at least one back intrinsic layer 22; in the front doped layer 12 and the back doped layer 23, one of the doping types is a first conductivity type, and the other doping type is a second conductivity type opposite to the first conductivity type; the device has Four layer deposition chains, wherein: the first layer deposition chain is used to deposit at least one front passivation layer 11 on the front of the silicon substrate 10; the second layer deposition chain is used to deposit at least one back passivation layer 21 on the back of the silicon substrate 10; the third layer deposition chain is used to deposit at least one front doping layer 12 on the front passivation layer 11; the fourth layer deposition chain is used to deposit at least one back intrinsic layer 22 on the back passivation layer 21, and at least one back doping layer 23 on at least one back intrinsic layer 22; and a flip mechanism is included between the first layer deposition chain and the second layer deposition chain, between the second layer deposition chain and the third layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain. As a preferred method, in the manufacture of heterojunction solar cells using the device shown in this embodiment, the at least one front passivation layer 11 is composed of an intrinsic amorphous silicon-based material; the at least one back passivation layer 21 is composed of an intrinsic amorphous silicon-based material. The back intrinsic layer 22 is composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material. Alternatively, the front doped layer 12, the back doped layer 22 and the back intrinsic layer 22 are all made of microcrystalline silicon-based materials. Compared with amorphous silicon, microcrystalline silicon has a higher effective doping efficiency, a low light absorption coefficient, good light transmittance, and better conductivity.
[0077] As a preferred mode, for the second embodiment of the device, the first layer deposition chain, the second layer deposition chain, and the third layer deposition chain each include at least one reaction chamber. The fourth deposition chain includes at least two reaction chambers, and the at least two reaction chambers respectively deposit a back intrinsic layer 22 composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material and a P-doped (such as boron-doped) back doped layer 22 composed of a microcrystalline silicon-based material. In this way, the influence of the boron element on the back intrinsic microcrystalline silicon can be further avoided.
[0078] In a third embodiment of the apparatus for manufacturing a heterojunction solar cell, the apparatus may be suitable for Figure 1 , Figure 2The heterojunction solar cell structure shown, and the method for manufacturing the back passivation layer 21 of the silicon substrate 10 by first depositing the back passivation layer 21, can be on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate 10, the order of layers is in the following order from inside to outside: at least one back passivation layer 21, at least one front passivation layer 11, at least one front doped layer 12, at least one back intrinsic layer 22, at least one back doped layer 23. Specifically, the device described in this embodiment is used to: deposit at least one back passivation layer 21 on the back of the silicon substrate 10, deposit at least one front passivation layer 11 on the front of the silicon substrate 10, deposit at least one front doped layer 12 on the at least one front passivation layer 21, deposit at least one back intrinsic layer 22 on the at least one back passivation layer 21, and deposit at least one back doped layer 23 on the at least one back intrinsic layer 22; in the front doped layer 12 and the back doped layer 23, one of the doping types is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type. The device shown in this embodiment has four layer deposition chains, wherein: the first layer deposition chain is used to deposit at least one back passivation layer 21 on the back of the silicon substrate 10; the second layer deposition chain is used to deposit at least one front passivation layer 11 on the front of the silicon substrate 10, and deposit at least one front doping layer 12 on the front passivation layer 11; the third layer deposition chain is used to deposit at least one back intrinsic layer 22 on the back passivation layer 21; the fourth layer deposition chain is used to deposit at least one back doping layer 23 on at least one back intrinsic layer 22; and a flip mechanism is included between the first layer deposition chain and the second layer deposition chain, and between the second layer deposition chain and the third layer deposition chain. Among them, as a preferred method, when using the device shown in this embodiment to manufacture heterojunction solar cells, the at least one front passivation layer 11 is composed of intrinsic amorphous silicon-based materials; the at least one back passivation layer 21 is composed of intrinsic amorphous silicon-based materials. The back intrinsic layer 22 is composed of microcrystalline silicon-based materials or nanocrystalline silicon-based materials. The front doping layer 12 and the back doping layer 22 are both composed of microcrystalline silicon-based materials. In this embodiment, the first layer deposition chain, the third layer deposition chain, and the fourth layer deposition chain each include at least one reaction chamber. The second deposition chain includes at least two reaction chambers, and the at least two reaction chambers deposit a front passivation layer 11 and a front doped layer 12 composed of a microcrystalline silicon-based material, respectively. The difference between this embodiment and the first embodiment is that a back intrinsic layer 22 composed of a microcrystalline silicon-based material or a nanocrystalline silicon-based material and a P-doped (such as boron-doped) back doped layer 22 composed of a microcrystalline silicon-based material are deposited in the third layer deposition chain and the fourth layer deposition chain, respectively.For example, if the back intrinsic layer 22 and the back doped layer 23 are deposited in one deposition chain, the carrier carrying the silicon wafer is transferred between two process chambers. Since the back doped layer 23 is doped, such as boron doping, it will contaminate the carrier. After one deposition process is completed, the carrier that absorbs a small amount of doping gas will be placed on the silicon wafer in the reaction chamber to deposit the back intrinsic layer 22, which will affect the passivation effect of the back intrinsic layer 22. Therefore, the above deposition method is selected, so that only the back intrinsic layer 22 is deposited in a single deposition chain, and the carrier contamination can be eliminated.
[0079] In a fourth embodiment of the apparatus for manufacturing a heterojunction solar cell, the apparatus may be suitable for Figure 1 , Figure 2The heterojunction solar cell structure shown, and the method for manufacturing the back passivation layer 21 of the silicon substrate 10 by first depositing the back passivation layer 21, can be on the side edge of the heterojunction solar cell, on the edge region of the silicon substrate 10, the order of layers is in the following order from inside to outside: at least one back passivation layer 21, at least one front passivation layer 11, at least one front doped layer 12, at least one back intrinsic layer 22, at least one back doped layer 23. Specifically, the device described in this embodiment is used to: deposit at least one back passivation layer 21 on the back of the silicon substrate 10, deposit at least one front passivation layer 11 on the front of the silicon substrate 10, deposit at least one front doped layer 12 on the at least one front passivation layer 21, deposit at least one back intrinsic layer 22 on the at least one back passivation layer 21, and deposit at least one back doped layer 23 on the at least one back intrinsic layer 22; in the front doped layer 12 and the back doped layer 23, one of the doping types is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type. The device shown in this embodiment has five layer deposition chains, wherein: the first layer deposition chain is used to deposit at least one back passivation layer 21 on the back of the silicon substrate 10; the second layer deposition chain is used to deposit at least one front passivation layer 11 on the front of the silicon substrate 10; the third layer deposition chain is used to deposit at least one front doping layer 12 on the front passivation layer 11; the fourth layer deposition chain is used to deposit at least one back intrinsic layer 22 on the back passivation layer 21; the fifth layer deposition chain is used to deposit at least one back doping layer 23 on at least one back intrinsic layer 22; and a flip mechanism is included between the first layer deposition chain and the second layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain. As a preferred method, when the device shown in this embodiment is used to manufacture heterojunction solar cells, the at least one front passivation layer 11 is composed of intrinsic amorphous silicon-based materials; the at least one back passivation layer 21 is composed of intrinsic amorphous silicon-based materials. The back intrinsic layer 22 is composed of intrinsic microcrystalline silicon-based materials or nanocrystalline silicon-based materials. The front doping layer 12 and the back doping layer 22 are both composed of microcrystalline silicon-based materials. In this embodiment, the back passivation layer 21, the front passivation layer 11, the front doping layer 12, the back intrinsic layer 22, and the back doping layer 23 are all deposited using independent deposition chains, which can eliminate the contamination of the carrier to the greatest extent. In particular, the back intrinsic layer 22 composed of microcrystalline silicon-based materials or nanocrystalline silicon-based materials and the P-doped back doping layer 22 composed of microcrystalline silicon-based materials, such as boron-doped, are deposited in the fourth deposition chain and the fifth deposition chain, respectively. If the back intrinsic layer 22 and the back doping layer 23 are deposited in one deposition chain, the carrier carrying the silicon wafer is transferred in two process chambers. Since the back doping layer 23 is doped, such as boron doping, it will contaminate the carrier. After a deposition process is completed, the carrier that absorbs a small amount of doping gas will be installed on the silicon wafer in the reaction chamber to deposit the back intrinsic layer 22, which will affect the passivation effect of the back intrinsic layer 22.Therefore, the above deposition method is selected so that only the back intrinsic layer 22 is deposited in a single deposition chain, which can eliminate the contamination of the carrier.
[0080] For the different devices for manufacturing heterojunction solar cells shown in the above embodiments, preferably, the back intrinsic layer 22 is composed of microcrystalline silicon-based materials or nanocrystalline silicon-based materials to form a microcrystalline silicon-based material layer or a nanocrystalline silicon-based material layer. The front doped layer 12 and the back doped layer 23 can both be composed of microcrystalline silicon-based materials.
[0081] The front doping layer 12 composed of microcrystalline silicon-based materials is deposited by PECVD method, and the reaction gas includes silane, hydrogen, phosphine and oxygen source, wherein phosphine is used as phosphorus source. Preferably, the reaction gas also includes an oxygen source, and the oxygen source is at least one of carbon dioxide, laughing gas and oxygen. Laughing gas is preferably used, which is easier to decompose and is conducive to the crystallization of the microcrystalline layer. The film thickness of the front doping layer 12 composed of microcrystalline silicon-based materials is in the range of 12-28nm, preferably in the range of 16-25nm, and the refractive index is in the range of 2.1-3.3, preferably in the range of 2.5-3.0.
[0082] The back intrinsic layer 22 is made of microcrystalline silicon-based material or nanocrystalline silicon-based material, which is deposited by PECVD method, the reaction gas includes silane and hydrogen, and the process parameters are: power density is 50-250mW / cm 2 , the silane flow rate is 30-120sccm, the hydrogen flow rate is 3000-25000sccm, and the back intrinsic layer 22 formed can achieve the effect of isolating the back passivation layer 21 and the back doping layer 23, as well as isolating the front doping layer 12 and the back doping layer 23. Preferably, the reaction gas also includes an oxygen source, and the oxygen source is at least one of carbon dioxide, nitrous oxide, and oxygen. Preferably, nitrous oxide is used as the oxygen source, and the nitrous oxide flow rate is between 20 and 100sccm. The nitrous oxide is easier to decompose, which is conducive to the crystallization of the microcrystalline layer; the film thickness of the back intrinsic layer 22 composed of the microcrystalline silicon-based material is in the range of 3-15nm, preferably in the range of 5-12nm, and the refractive index is in the range of 2.4-3.7, preferably in the range of 2.8-3.5.
[0083] The back doping layer 23 composed of microcrystalline silicon-based materials is deposited by PECVD method, and the reaction gas includes silane, hydrogen, and borane, wherein borane is used as a boron source. Preferably, the reaction gas also includes an oxygen source, and the oxygen source is at least one of carbon dioxide, nitrous oxide, and oxygen. Preferably, nitrous oxide is used as the oxygen source, which is easier to decompose and is conducive to the crystallization of the microcrystalline layer; the film thickness of the back doping layer 23 composed of microcrystalline silicon-based materials is within the range of 18-36nm, preferably within the range of 24-35nm, and the refractive index is within the range of 2.6-3.7, preferably within the range of 3.0-3.6.
[0084] Figure 4It is a schematic diagram of a deposition chain including at least one reaction chamber (or process chamber\deposition chamber). The deposition chain includes a transport device and a carrier for placing a silicon substrate. Figure 4 From left to right, the first chamber is the loading chamber, the second chamber is the reaction chamber\process chamber\deposition chamber, and the third chamber is the unloading chamber. The component in the reaction chamber\process chamber\deposition chamber that is connected to the gas source and the RF power supply system is the cathode. Figure 4 The deposition chain shown can be applied to the above-mentioned embodiments. For example, it can be used as a deposition chain for depositing at least one back passivation layer; or, as a deposition chain for depositing at least one front passivation layer, or, as a deposition chain for depositing at least one front doping layer, or, as a deposition chain for depositing at least one back intrinsic layer, or, as a deposition chain for depositing at least one back doping layer 22.
[0085] Figure 5 It is a schematic diagram of a deposition chain including at least two reaction chambers (or process chambers\deposition chambers). The deposition chain includes a transport device and a carrier for placing a silicon substrate. Figure 5 From left to right, the first chamber is the loading chamber, the second chamber is the first process chamber\deposition chamber, the third chamber is the second process chamber\deposition chamber, and the fourth chamber is the unloading chamber. The component in the process chamber\deposition chamber that is connected to the gas source and the RF power system is the cathode.
[0086] Figure 5 The deposition chain shown includes at least two reaction chambers (or process chambers\deposition chambers) and can be used to deposit different types of material layers. For example, in the second embodiment of the apparatus for manufacturing heterojunction solar cells, the fourth layer deposition chain is used to deposit at least one back doping layer 23 on at least one back intrinsic layer 22. Alternatively, in the third embodiment, the second layer deposition chain, in this case, the second layer deposition chain can be used Figure 5 In the deposition chain shown, two reaction chambers (or process chambers\deposition chambers) respectively deposit the front passivation layer 11 and the front doping layer 12. In short, according to actual needs, there can be multiple reaction chambers, at least two or more reaction chambers, to deposit different types of material layers.
[0087] in addition, Figure 5 The deposition chain shown may also be used to deposit only one deposition chain for two layers of back passivation layer 21, one deposition chain for two layers of front passivation layer 11, one deposition chain for two layers of front doping layer 12, one deposition chain for two layers of back intrinsic layer 22, or one deposition chain for two layers of back doping layer 23, etc. In short, according to the production cycle and the requirements of deposition thickness, the reaction chamber may be multiple, at least two or more reaction chambers, to deposit the same type of material layer.
[0088] like Figure 6As shown, when depositing different types of material layers in at least two reaction chambers, an isolation chamber is provided between the front and rear deposition chains. Figure 6 From left to right, the first chamber is the loading chamber, the second chamber is the first reaction chamber, the third chamber is the isolation chamber, the fourth chamber is the second reaction chamber, and the fifth chamber is the unloading chamber. The component in the reaction chamber connected to the gas source and the RF power system is the cathode. Due to the existence of the isolation chamber, the diffusion of process gases between adjacent process chambers can be prevented, such as the diffusion of doping gases between the front passivation layer 11 deposition chamber and the front doping layer 12 deposition chamber, that is, the doping in the front doping layer 12 deposition chamber is prevented from diffusing into the front passivation layer 11 deposition chamber.
[0089] In addition, it should be noted that at least one buffer chamber (not shown in the figure) can be set between the loading chamber and the process chamber as needed. The buffer chamber is used to adjust the air pressure and atmosphere before thin film deposition, as well as temperature pretreatment, thereby improving the rhythm of the carrier plate transferred between the loading chamber and the process chamber and improving production efficiency. Similarly, at least one buffer chamber (not shown in the figure) can be set between the unloading chamber and the process chamber as needed. It is used to adjust the air pressure and atmosphere before thin film deposition, as well as temperature pretreatment, so that after the deposition process in the process chamber is completed, the carrier plate can be quickly transferred to the unloading chamber to perform subsequent processes.
[0090] Based on the contents recorded or taught in this invention, Figures 4 to 6 The deposition chain shown can be applied to the heterojunction solar cell and the manufacturing method thereof described in the above-mentioned various embodiments according to actual process steps or process requirements.
[0091] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by any technician familiar with the technical field within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.
[0092] It should be understood that in order to simplify the present invention and help those skilled in the art understand the various aspects of the present invention, in the above description of the exemplary embodiments of the present invention, the various features of the present invention are sometimes described in a single embodiment or described with reference to a single figure. However, the present invention should not be interpreted as the features included in the exemplary embodiments are all necessary technical features of the patent claims.
Claims
1. A method for manufacturing a heterojunction solar cell, It is characterized in that The method comprises the following steps in the following order: Providing a silicon substrate (10) doped with a first conductivity type; Forming at least one back passivation layer (21) composed of an intrinsic amorphous silicon-based material on the back side of the silicon substrate (10); Forming at least one front passivation layer (11) composed of an intrinsic amorphous silicon-based material on the front side of the silicon substrate (10); forming at least one front doping layer (12) on the at least one front passivation layer (11); forming at least one back intrinsic layer (22) on the at least one back passivation layer (21); At least one back doping layer (23) is formed on the at least one back intrinsic layer (22).
2. The method according to claim 1, It is characterized in that The heterojunction solar cell comprises: A silicon substrate (10) having a first conductivity type doping, At least one front passivation layer (11), at least one front doping layer (12), at least one transparent front conductive layer (13) and at least one front electrode (14) located on the front side of the silicon substrate (10); At least one back passivation layer (21), at least one back intrinsic layer (22), at least one back doping layer (23), at least one transparent back conductive layer (24) and at least one back electrode (25) are located on the back side of the silicon substrate (10); In the front doped layer (12) and the back doped layer (23), one doping type is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type.
3. The method according to claim 1, It is characterized in that The sequence of steps is such that: At the side edge of the heterojunction solar cell, at the edge region of the silicon substrate (10), the sequence of layers is present from the inside to the outside in the following order: at least one back side passivation layer (21), at least one front passivation layer (11) on the at least one back passivation layer (21), at least one front doping layer (12) on the at least one front passivation layer (11), at least one back intrinsic layer (22) on the at least one front doped layer, At least one back doped layer (23) is disposed on the at least one back intrinsic layer (22).
4. The method according to any one of claims 1 to 3, It is characterized in that The method further comprises the following steps in sequence: forming at least one transparent back conductive layer (24) on at least one back doping layer (23); forming at least one transparent front conductive layer (13) on at least one front doped layer (12); forming a back electrode (25) on at least one transparent back conductive layer (24); A front electrode (14) is formed on at least one transparent front conductive layer (13).
5. The method according to any one of claims 1 to 3, It is characterized in that The silicon substrate (10) is an N-type silicon wafer, the first conductivity type is N-type, the second conductivity type is P-type, or, The silicon substrate (10) is a P-type silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type.
6. The method according to any one of claims 1 to 3, It is characterized in that The back intrinsic layer (22) is made of microcrystalline silicon-based material or nanocrystalline silicon-based material.
7. The method according to claim 6, It is characterized in that The back intrinsic layer (22) is deposited by PECVD method, the reaction gas includes silane and hydrogen, and the power density is 50-250 mW / cm 2 The silane flow rate is 30-120 sccm, the hydrogen flow rate is 3000-25000 sccm, the film thickness of the back intrinsic layer (22) is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.
7.
8. The method according to claim 1, It is characterized in that The front doping layer (12) is made of a microcrystalline silicon-based material, the front doping layer (12) is deposited by a PECVD method, the reaction gas includes silane, hydrogen and phosphine, the film thickness of the front doping layer (12) is in the range of 12-28 nm, and the refractive index is in the range of 2.1-3.3; The back doping layer (23) is made of a microcrystalline silicon-based material. The back doping layer (23) is deposited by a PECVD method. The reaction gas includes silane, hydrogen and borane. The film thickness of the back doping layer (23) is in the range of 18-36 nm, and the refractive index is in the range of 2.6-3.
7.
9. The method according to claim 7 or 8, It is characterized in that The reaction gas also includes an oxygen source, and the oxygen source is at least one of carbon dioxide, nitrous oxide or oxygen.
10. A method for manufacturing a heterojunction solar cell, It is characterized in that The method comprises the following steps in order: Providing a silicon substrate (10) doped with a first conductivity type; Forming at least one front passivation layer (11) composed of an intrinsic amorphous silicon-based material on the front side of the silicon substrate (10); Forming at least one back passivation layer (21) composed of an intrinsic amorphous silicon-based material on the back side of the silicon substrate (10); forming at least one front doping layer (12) on the at least one front passivation layer (11); forming at least one back intrinsic layer (22) on the at least one back passivation layer (21); At least one back doping layer (23) is formed on the at least one back intrinsic layer (22).
11. The method according to claim 10, It is characterized in that The heterojunction solar cell comprises: A silicon substrate (10) having a first conductivity type doping, At least one front passivation layer (11), at least one front doping layer (12), at least one transparent front conductive layer (13) and at least one front electrode (14) located on the front side of the silicon substrate (10); At least one back passivation layer (21), at least one back intrinsic layer (22), at least one back doping layer (23), at least one transparent back conductive layer (24) and at least one back electrode (25) are located on the back side of the silicon substrate (10); In the front doped layer (12) and the back doped layer (23), one doping type is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type.
12. The method according to claim 10, It is characterized in that The sequence of steps is such that: At the side edge of the heterojunction solar cell, at the edge region of the silicon substrate (10), the sequence of layers is present from the inside to the outside in the following order: at least one front passivation layer (11), at least one back passivation layer (21) on the at least one front passivation layer (11), at least one front doped layer (12) on the at least one back passivation layer (21), at least one rear intrinsic layer (22) on the at least one front passivation layer (12), At least one back doped layer (23) is disposed on the at least one back intrinsic layer (22).
13. The method according to any one of claims 10 to 12, It is characterized in that The method further comprises the following steps in sequence: forming at least one transparent back conductive layer (24) on at least one back doping layer (23); forming at least one transparent front conductive layer (13) on at least one front doped layer (12); forming a back electrode (25) on at least one transparent back conductive layer (24); A front electrode (14) is formed on at least one transparent front conductive layer (13).
14. The method according to any one of claims 10 to 12, It is characterized in that The silicon substrate (10) is an N-type silicon wafer, the first conductivity type is N-type, the second conductivity type is P-type, or, The silicon substrate (10) is a P-type silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type.
15. The method according to any one of claims 10 to 12, It is characterized in that The back intrinsic layer (22) is made of microcrystalline silicon-based material or nanocrystalline silicon-based material.
16. The method according to claim 15, It is characterized in that The back intrinsic layer (22) is deposited by PECVD method, the reaction gas includes silane and hydrogen, and the power density is 50-250 mW / cm 2 The silane flow rate is 30-120 sccm, the hydrogen flow rate is 3000-25000 sccm, the film thickness of the back intrinsic layer (22) is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.
7.
17. The method according to claim 10, It is characterized in that The front doping layer (12) is made of a microcrystalline silicon-based material, the front doping layer (12) is deposited by a PECVD method, the reaction gas includes silane, hydrogen and phosphine, the film thickness of the front doping layer (12) is in the range of 12-28 nm, and the refractive index is in the range of 2.1-3.3; The back doping layer (23) is made of a microcrystalline silicon-based material. The back doping layer (23) is deposited by a PECVD method. The reaction gas includes silane, hydrogen and borane. The film thickness of the back doping layer (23) is in the range of 18-36 nm, and the refractive index is in the range of 2.6-3.
7.
18. The method according to claim 16 or 17, It is characterized in that The reaction gas also includes an oxygen source, and the oxygen source is at least one of carbon dioxide, nitrous oxide or oxygen.
19. A heterojunction solar cell, It is characterized in that The heterojunction solar cell structure comprises: A silicon substrate (10) doped with a first conductivity type; At least one front passivation layer (11) formed on the front side of the silicon substrate (10) and composed of an intrinsic amorphous silicon-based material; at least one front doping layer (12) formed on the at least one front passivation layer (11); At least one back passivation layer (21) formed on the back side of the silicon substrate (10) and composed of an intrinsic amorphous silicon-based material; at least one back intrinsic layer (22) formed on the at least one back passivation layer (21); at least one back doping layer (23) formed on the at least one back intrinsic layer (22); at least one transparent front conductive layer (13) formed on at least one front doped layer (12); at least one transparent back conductive layer (24) formed on at least one back doped layer (23); A front electrode (14) formed on at least one transparent front conductive layer (13); a back electrode (25) formed on at least one transparent back conductive layer (24); In the front doped layer (12) and the back doped layer (23), one doping type is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type.
20. The solar cell according to claim 19, It is characterized in that At the side edge of the heterojunction solar cell, at the edge region of the silicon substrate (10), the sequence of layers is present from the inside to the outside in the following order: at least one back side passivation layer (21), at least one front passivation layer (11) on the at least one back passivation layer (21), at least one front doping layer (12) on the at least one front passivation layer (11), at least one back intrinsic layer (22) on the at least one front doped layer, At least one back doped layer (23) is disposed on the at least one back intrinsic layer (22).
21. The solar cell according to claim 19, It is characterized in that At the side edge of the heterojunction solar cell, at the edge region of the silicon substrate (10), the sequence of layers is present from the inside to the outside in the following order: at least one front passivation layer (11), at least one back passivation layer (21) on the at least one front passivation layer (11), at least one front doped layer (12) on the at least one back passivation layer (21), at least one rear intrinsic layer (22) on the at least one front passivation layer (12), At least one back doped layer (23) is disposed on the at least one back intrinsic layer (22).
22. The solar cell according to any one of claims 19 to 21, It is characterized in that The silicon substrate (10) is an N-type silicon wafer, the first conductivity type is N-type, and the second conductivity type is P-type; or, The silicon substrate (10) is a P-type silicon wafer, the first conductivity type is P-type, and the second conductivity type is N-type.
23. The solar cell according to any one of claims 19 to 21, It is characterized in that The back intrinsic layer (22) is made of microcrystalline silicon-based material or nanocrystalline silicon-based material.
24. The solar cell according to any one of claims 19 to 21, It is characterized in that The front doping layer (12) is composed of a microcrystalline silicon-based material, and the back doping layer (23) is composed of a microcrystalline silicon-based material.
25. An apparatus for manufacturing a heterojunction solar cell, It is characterized in that The device is used for At least one front passivation layer (11) is deposited on the front side of the silicon substrate (10), Depositing at least one back passivation layer (21) on the back side of the silicon substrate (10), depositing at least one front doping layer (12) on the at least one front passivation layer (21), depositing at least one back intrinsic layer (22) on the at least one back passivation layer (21), Depositing at least one back doping layer (23) on the at least one back intrinsic layer (22); In the front doped layer (12) and the back doped layer (23), one doping type is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type; The apparatus has four layer deposition chains, where: A first layer deposition chain is used to deposit at least one front passivation layer (11) on the front side of the silicon substrate (10); The second layer deposition chain is used for depositing at least one back passivation layer (21) on the back side of the silicon substrate (10); The third layer deposition chain is used for depositing at least one front doping layer (12) on the front passivation layer (11); The fourth layer deposition chain is used to deposit at least one back intrinsic layer (22) on the back passivation layer (21); and to deposit at least one back doping layer (23) on the at least one back intrinsic layer (22); And a turning mechanism is included between the first layer deposition chain and the second layer deposition chain, between the second layer deposition chain and the third layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain.
26. The device according to claim 25, It is characterized in that The back intrinsic layer (22) is made of microcrystalline silicon-based material or nanocrystalline silicon-based material.
27. The device according to claim 26, It is characterized in that The back intrinsic layer (22) is deposited by PECVD method, the reaction gas includes silane and hydrogen, and the power density is 50-250 mW / cm 2 The silane flow rate is 30-120 sccm, the hydrogen flow rate is 3000-25000 sccm, the film thickness of the back intrinsic layer (22) is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.
7.
28. The apparatus according to claim 25, It is characterized in that The front doping layer (12) is made of a microcrystalline silicon-based material, the front doping layer (12) is deposited by a PECVD method, the reaction gas includes silane, hydrogen and phosphine, the film thickness of the front doping layer (12) is in the range of 12-28 nm, and the refractive index is in the range of 2.1-3.3; The back doping layer (23) is made of a microcrystalline silicon-based material. The back doping layer (23) is deposited by a PECVD method. The reaction gas includes silane, hydrogen and borane. The film thickness of the back doping layer (23) is in the range of 18-36 nm, and the refractive index is in the range of 2.6-3.
7.
29. The device according to claim 27 or 28, It is characterized in that The reaction gas also includes an oxygen source, and the oxygen source is at least one of carbon dioxide, nitrous oxide or oxygen.
30. An apparatus for manufacturing a heterojunction solar cell, It is characterized in that The device is used for Depositing at least one back passivation layer (21) on the back side of the silicon substrate (10), At least one front passivation layer (11) is deposited on the front side of the silicon substrate (10), depositing at least one front doping layer (12) on the at least one front passivation layer (21), depositing at least one back intrinsic layer (22) on the at least one back passivation layer (21), Depositing at least one back doping layer (23) on the at least one back intrinsic layer (22); In the front doped layer (12) and the back doped layer (23), one doping type is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type; The apparatus has four layer deposition chains, where: A first layer deposition chain is used to deposit at least one back passivation layer (21) on the back side of the silicon substrate (10); The second layer deposition chain is used for depositing at least one front passivation layer (11) on the front side of the silicon substrate (10); The third layer deposition chain is used for depositing at least one front doping layer (12) on the front passivation layer (11); The fourth layer deposition chain is used to deposit at least one back intrinsic layer (22) on the back passivation layer (21); and to deposit at least one back doping layer (23) on the at least one back intrinsic layer (22); And a turning mechanism is included between the first layer deposition chain and the second layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain.
31. The device according to claim 30, It is characterized in that The back intrinsic layer (22) is made of microcrystalline silicon-based material or nanocrystalline silicon-based material.
32. The apparatus according to claim 31, It is characterized in that The back intrinsic layer (22) is deposited by PECVD method, the reaction gas includes silane and hydrogen, and the power density is 50-250 mW / cm 2 The silane flow rate is 30-120 sccm, the hydrogen flow rate is 3000-25000 sccm, the film thickness of the back intrinsic layer (22) is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.
7.
33. The apparatus according to claim 30, It is characterized in that The front doping layer (12) is made of a microcrystalline silicon-based material, the front doping layer (12) is deposited by a PECVD method, the reaction gas includes silane, hydrogen and phosphine, the film thickness of the front doping layer (12) is in the range of 12-28 nm, and the refractive index is in the range of 2.1-3.3; The back doping layer (23) is made of a microcrystalline silicon-based material. The back doping layer (23) is deposited by a PECVD method. The reaction gas includes silane, hydrogen and borane. The film thickness of the back doping layer (23) is in the range of 18-36 nm, and the refractive index is in the range of 2.6-3.
7.
34. The device according to claim 32 or 33, It is characterized in that The reaction gas also includes an oxygen source, and the oxygen source is at least one of carbon dioxide, nitrous oxide or oxygen.
35. The apparatus according to claim 30, It is characterized in that An isolation chamber is provided between the second layer deposition chain and the third layer deposition chain; or, The battery structure in the process of being processed is subjected to a vacuum breaking process when being transferred between the second layer deposition chain and the third layer deposition chain.
36. An apparatus for manufacturing a heterojunction solar cell, It is characterized in that The device is used for Depositing at least one back passivation layer (21) on the back side of the silicon substrate (10), Depositing at least one front passivation layer (11) on the front side of a silicon substrate (10) and depositing at least one front doping layer (12) on the at least one front passivation layer (21), depositing at least one back intrinsic layer (22) on the at least one back passivation layer (21), Depositing at least one back doping layer (23) on the at least one back intrinsic layer (22); In the front doped layer (12) and the back doped layer (23), one doping type is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type; The apparatus has four layer deposition chains, where: A first layer deposition chain is used to deposit at least one back passivation layer (21) on the back side of the silicon substrate (10); The second layer deposition chain is used for depositing at least one front passivation layer (11) on the front side of the silicon substrate (10), and depositing at least one front doping layer (12) on the front passivation layer (11); The third layer deposition chain is used to deposit at least one back intrinsic layer (22) on the back passivation layer (21); The fourth layer deposition chain is used to deposit at least one back doping layer (23) on at least one back intrinsic layer (22); And a turning mechanism is included between the first layer deposition chain and the second layer deposition chain, and between the second layer deposition chain and the third layer deposition chain.
37. The apparatus according to claim 36, It is characterized in that The back intrinsic layer (22) is made of microcrystalline silicon-based material or nanocrystalline silicon-based material.
38. The apparatus according to claim 37, It is characterized in that The back intrinsic layer (22) is deposited by PECVD method, the reaction gas includes silane and hydrogen, and the power density is 50-250 mW / cm 2 The silane flow rate is 30-120 sccm, the hydrogen flow rate is 3000-25000 sccm, the film thickness of the back intrinsic layer (22) is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.
7.
39. The apparatus according to claim 36, It is characterized in that The front doping layer (12) is made of a microcrystalline silicon-based material, the front doping layer (12) is deposited by a PECVD method, the reaction gas includes silane, hydrogen and phosphine, the film thickness of the front doping layer (12) is in the range of 12-28 nm, and the refractive index is in the range of 2.1-3.3; The back doping layer (23) is made of a microcrystalline silicon-based material. The back doping layer (23) is deposited by a PECVD method. The reaction gas includes silane, hydrogen and borane. The film thickness of the back doping layer (23) is in the range of 18-36 nm, and the refractive index is in the range of 2.6-3.
7.
40. The apparatus according to claim 38 or 39, It is characterized in that The reaction gas also includes an oxygen source, and the oxygen source is at least one of carbon dioxide, nitrous oxide or oxygen.
41. An apparatus for manufacturing a heterojunction solar cell, It is characterized in that The device is used for Depositing at least one back passivation layer (21) on the back side of the silicon substrate (10), At least one front passivation layer (11) is deposited on the front side of the silicon substrate (10), depositing at least one front doping layer (12) on the at least one front passivation layer (21), depositing at least one back intrinsic layer (22) on the at least one back passivation layer (21), Depositing at least one back doping layer (23) on the at least one back intrinsic layer (22); In the front doped layer (12) and the back doped layer (23), one doping type is a first conductive type, and the other doping type is a second conductive type opposite to the first conductive type; The apparatus has five layer deposition chains, where: A first layer deposition chain is used to deposit at least one back passivation layer (21) on the back side of the silicon substrate (10); The second layer deposition chain is used for depositing at least one front passivation layer (11) on the front side of the silicon substrate (10); The third layer deposition chain is used for depositing at least one front doping layer (12) on the front passivation layer (11); The fourth layer deposition chain is used for depositing at least one back intrinsic layer (22) on the back passivation layer (21); A fifth layer deposition chain is used for depositing at least one back doping layer (23) on the at least one back intrinsic layer (22); And a turning mechanism is included between the first layer deposition chain and the second layer deposition chain, and between the third layer deposition chain and the fourth layer deposition chain.
42. The apparatus according to claim 41, It is characterized in that The back intrinsic layer (22) is made of microcrystalline silicon-based material or nanocrystalline silicon-based material.
43. The apparatus according to claim 42, It is characterized in that The back intrinsic layer (22) is deposited by PECVD method, the reaction gas includes silane and hydrogen, and the power density is 50-250 mW / cm 2 The silane flow rate is 30-120 sccm, the hydrogen flow rate is 3000-25000 sccm, the film thickness of the back intrinsic layer (22) is in the range of 3-15 nm, and the refractive index is in the range of 2.4-3.
7.
44. The apparatus according to claim 41, It is characterized in that The front doping layer (12) is made of a microcrystalline silicon-based material, the front doping layer (12) is deposited by a PECVD method, the reaction gas includes silane, hydrogen and phosphine, the film thickness of the front doping layer (12) is in the range of 12-28 nm, and the refractive index is in the range of 2.1-3.3; The back doping layer (23) is made of a microcrystalline silicon-based material. The back doping layer (23) is deposited by a PECVD method. The reaction gas includes silane, hydrogen and borane. The film thickness of the back doping layer (23) is in the range of 18-36 nm, and the refractive index is in the range of 2.6-3.
7.
45. Apparatus according to claim 43 or 44, It is characterized in that The reaction gas also includes an oxygen source, and the oxygen source is at least one of carbon dioxide, nitrous oxide or oxygen.
Citation Information
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Heterojunction solar cell and preparation method therefor, and photovoltaic module
WO2026149418A1
