Buck-boost chip, control method, screen module and electronic equipment

Abstract

The invention relates to a boost-buck chip, a control method, a screen module and electronic equipment, and relates to the technical field of chips. The chip comprises a first voltage port, a second voltage port, a first transistor, a second transistor and a control circuit. The first end of the first transistor and the first end of the second transistor are coupled with a first voltage port, and the second end of the first transistor is coupled with a second voltage port; the second end of the second transistor is grounded; the control end of the first transistor is coupled with the first output end of the control circuit. The control end of the second transistor is coupled with the second output end of the control circuit. When the chip is in a boost mode, the first voltage port is used for being coupled to a power supply through an inductor, and the second voltage port is used for being coupled to a load. And when the chip is in a buck mode, the first voltage port is used for being coupled to a load through an inductor, and the second voltage port is used for being coupled to a power supply. Therefore, the problem that there is no normalized solution for the power supply chip in the industry can be solved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of chip technology, and in particular to a buck-boost chip, a control method, a screen module and an electronic device. Background Art

[0002] The organic light-emitting diode (OLED) display device of the terminal equipment usually requires a power chip to provide power for it. In large-size, high-brightness display devices, the power of the power chip accounts for a very large proportion, and the efficiency of the power chip affects the power efficiency of the entire display device. Currently, many terminal devices (such as mobile phones, tablets, notebooks and desktops, etc.) have a demand for high-brightness, large-size display devices, so high-power, high-efficiency power chips are very important. Since the battery architectures of different terminal devices (such as mobile phones, tablets, notebooks and desktops, etc.) are different, the solution form architecture of the power chip varies. For power chips, there is no standardized solution in the industry. Summary of the invention

[0003] The present application provides a buck-boost chip, a control method, a screen module and an electronic device, which solves the problem in the prior art that there is no standardized solution for power chips in the industry.

[0004] In order to achieve the above objectives, this application adopts the following technical solutions:

[0005] In a first aspect, a buck-boost chip is provided, the chip comprising a first voltage port, a second voltage port, a first transistor, a second transistor and a control circuit. The first end of the first transistor and the first end of the second transistor are both coupled to the first voltage port, and the second end of the first transistor is coupled to the second voltage port; the second end of the second transistor is grounded; the control end of the first transistor is coupled to the first output end of the control circuit, and the control end of the second transistor is coupled to the second output end of the control circuit. When the chip is in a boost mode, the first voltage port is used to couple to a power supply through an inductor, and the second voltage port is used to couple to a load; and when the chip is in a buck mode, the first voltage port is used to couple to a load through an inductor, and the second voltage port is used to couple to a power supply.

[0006] In the above technical solution, the buck-boost chip uses two transistors, and by changing the connection method of the external circuit of the buck-boost chip, the same buck-boost chip can support both the boost mode and the buck mode. Therefore, the buck-boost chip can be used for both electronic devices that support a single string of batteries and electronic devices that support multiple strings of batteries, and has a wide range of application scenarios. When the chip is in boost mode or buck mode, the first transistor and the second transistor can be reused. The chip circuit is relatively simple, the wafer area and cost are small, the conduction loss caused by the additional switch tube is avoided, and the power efficiency is improved.

[0007] In a possible implementation of the first aspect, the chip also includes a mode port, and the mode port includes a first state and a second state; the first state and the second state are different. If the mode port is in the first state, the chip is used to switch to the buck mode; if the mode port is in the second state, the chip is also used to switch to the boost mode. In the above possible implementations, the boost mode and buck mode of the chip are switched in a hardware-fixed manner of the mode port. With respect to some scenarios where the load can be used as both a power source and a load, these scenarios cannot use a hardware-fixed method such as a mode port to switch the boost mode and buck mode of the chip, and can only use automatic switching or software switching. These scenarios have high requirements for digital computing capabilities, and the chip digital control circuit is more complex, larger in scale, and more expensive. Compared with the software switching and automatic switching methods, the control method of this implementation is simpler and more reliable.

[0008] In a possible implementation of the first aspect, the control circuit includes a common control circuit, a buck control circuit, a boost control circuit, and a selection switch. The first output end of the common control circuit is coupled to the first output end of the control circuit, the second output end of the common control circuit is coupled to the second output end of the control circuit, the switching end of the common control circuit is coupled to the first end of the selection switch, the second end of the selection switch is coupled to the buck control circuit, and the third end of the selection switch is coupled to the boost control circuit. In the above possible implementation, since two transistors are used, the boost mode and the buck mode of the chip can be supported, so there are two driving circuits for driving the transistor in the control circuit, and part of the circuit in the control circuit can be reused. The control circuit of the first transistor and the second transistor is divided into two parts, one part is a common control circuit that can be reused in the boost mode and the buck mode of the chip, and the other part is a boost control circuit and a buck control circuit that cannot be reused in the boost mode and the buck mode of the chip. The common control circuit is switched to form a loop with the boost control circuit or the buck control circuit in different modes by the selection switch, thereby supporting the control of the boost mode or the buck mode of the chip. Since a common control circuit is reused, there is no need to set up two independent controllers for the chip's boost mode and buck mode. The chip circuit is simpler, and the wafer area and cost are smaller.

[0009] In a possible implementation of the first aspect, when the first end of the selection switch is connected to the second end of the selection switch, the common control circuit and the buck control circuit are used to control the first transistor to be turned on and the second transistor to be turned off in the first time period of the preset buck cycle, and to control the first transistor to be turned off and the second transistor to be turned on in the second time period of the preset buck cycle; and the control chip inputs voltage through the second voltage port and outputs voltage through the first voltage port. When the first end of the selection switch is connected to the third end of the selection switch, the common control circuit and the boost control circuit are used to control the first transistor to be turned off and the second transistor to be turned on in the first time period of the preset boost cycle, and to control the first transistor to be turned on and the second transistor to be turned off in the second time period of the preset boost cycle; and the control chip inputs voltage through the first voltage port and outputs voltage through the second voltage port. In the above possible implementation, the common control circuit is switched in different modes to form a loop with the boost control circuit or the buck control circuit, thereby supporting the control of the boost mode or buck mode of the chip. In this way, the reuse of the common control circuit can be achieved, saving circuit area and cost.

[0010] In a possible implementation of the first aspect, the control circuit also includes a mode selection circuit, and the chip also includes a mode port; the selection end of the selection switch is coupled to the first end of the mode selection circuit, and the second end of the mode selection circuit is coupled to the mode port. The mode port includes a first state and a second state. The first state and the second state are different. If the mode port is in the first state, the mode selection circuit is used to control the first end of the selection switch to be turned on with the second end of the selection switch; or, if the mode port is in the second state, the mode selection circuit is also used to control the first end of the selection switch to be turned on with the third end of the selection switch. In the above possible implementations, different states of the mode port indicate that the mode selection circuit controls the selection switch to switch to the corresponding state. In this way, the switching of the boost mode and the buck mode of the chip can be supported, and it is compatible with the scenarios of single-string batteries and multiple-string batteries, and has strong adaptability.

[0011] In a possible implementation of the first aspect, the chip further includes a feedback port; the common control circuit includes an output voltage sampling circuit, an error amplifier, a pulse width modulation (PWM) comparator, a trigger, a frequency controller, a dead zone control circuit, a first drive circuit, and a second drive circuit. The input end of the common control circuit is coupled to the feedback port, and the feedback port is used to couple the load. The first end of the output voltage sampling circuit is coupled to the input end of the common control circuit, the second end of the output voltage sampling circuit is grounded, and the third end of the output voltage sampling circuit is coupled to the first input end of the error amplifier; the second input end of the error amplifier is used to input a reference voltage; the output end of the error amplifier is coupled to the first input end of the PWM comparator; the output end of the PWM comparator is coupled to the first input end of the trigger; the second input end of the trigger is coupled to the frequency controller; the output end of the trigger is coupled to the first input end of the dead zone control circuit; the second input end of the dead zone control circuit is used to input the dead zone time; the output end of the dead zone control circuit is coupled to the input end of the first drive circuit and the input end of the second drive circuit; the output end of the first drive circuit is coupled to the first output end of the common control circuit, and the output end of the second drive circuit is coupled to the second output end of the common control circuit. In the above possible implementation methods, circuits such as the output voltage sampling circuit, the error amplifier, the PWM comparator, the trigger, the frequency controller, the dead zone control circuit, the first drive circuit and the second drive circuit can be reused, thereby reusing most of the control loops of the control circuit, which can save a lot of chip area and optimize the chip cost to a great extent.

[0012] In a possible implementation of the first aspect, the chip also includes a negative voltage circuit and a third voltage port; the common control circuit also includes an input voltage feedforward amplifier. The third voltage port is used to couple the power supply. The input end of the negative voltage circuit and the input end of the input voltage feedforward amplifier are both coupled to the third voltage port, and the output end of the input voltage feedforward amplifier is coupled to the second input end of the PWM comparator. In the above possible implementation, adding an input voltage feedforward amplifier to the common control circuit can improve the dynamic performance of the buck-boost chip. And the input end of the input voltage feedforward amplifier reuses the input end of the third negative voltage circuit, and the input voltage is shared, so that no additional ports are added, saving chip costs.

[0013] In a possible implementation of the first aspect, the control circuit also includes a current sampling circuit. The first end of the current sampling circuit is coupled to the first end of the second transistor, the second end of the current sampling circuit is coupled to the second end of the second transistor, and the third end of the current sampling circuit is coupled to the third input end of the PWM comparator. When the chip is in the buck mode, the frequency controller is used to control the first transistor to turn off during the constant off time, or to control the second transistor to turn on during the constant on time. When the chip is in the boost mode, the frequency controller is also used to control the second transistor to turn off during the constant off time, or to control the first transistor to turn on during the constant on time. In the above possible implementation, when the chip is in the constant on time peak current control mode or the constant off time valley current control mode, the boost current sampling circuit is used to further reuse the boost current sampling circuit, and multiple control modes can be supported.

[0014] In a possible implementation of the first aspect, the buck control circuit includes a buck loop compensation circuit, and the boost control circuit includes a boost loop compensation circuit. In the above possible implementation, the boost loop compensation circuit and the buck loop compensation circuit cannot be reused, so the control loop is connected by selecting a switch. In this way, the switching of the chip's boost mode and buck mode can be supported, and it is compatible with single-string battery and multi-string battery scenarios, with strong adaptability.

[0015] In a possible implementation of the first aspect, when the chip is in boost mode, the first voltage port is specifically used to couple the higher voltage end of the first end and the second end of the inductor, and the voltage of the load is higher than the voltage of the power supply; and when the chip is in buck mode, the first voltage port is specifically used to couple the higher voltage end of the first end and the second end of the inductor, and the voltage of the power supply is higher than the voltage of the load. In the above possible implementation, the switching of the chip's boost mode and buck mode is achieved by fixing the first voltage port and the second voltage port at a higher voltage. Thus, the chip's boost mode and buck mode can be compatible, and the scenarios of single-string batteries and multiple-string batteries can be compatible, with strong adaptability and a relatively simple circuit access method.

[0016] In a possible implementation of the first aspect, the first transistor is an N-type transistor, the third transistor is a P-type transistor, the second voltage port is specifically used to couple to the load through the third transistor, and the third output terminal of the control circuit is used to couple the control terminal of the third transistor. In the above possible implementation, a P-type transistor is set outside the buck-boost chip to prevent current leakage, so that the first transistor and the second transistor inside the buck-boost chip can be implemented using N-type transistors. Since N-type transistors of similar specifications have smaller area and cost and higher efficiency, the buck-boost chip has smaller area and cost and higher efficiency. In addition, this implementation can prevent current leakage and achieve short-circuit protection.

[0017] In a possible implementation of the first aspect, when the chip is in boost mode, the control circuit is used to control the first transistor to be turned off and the second transistor to be turned on in a first time period of a preset boost cycle, and to control the first transistor to be turned on and the second transistor to be turned off in a second time period of the preset boost cycle; the control circuit is also used to increase the preset boost cycle when the ratio of the voltage of the feedback port to the voltage of the first voltage port is less than or equal to the first preset value, or when the ratio of the voltage of the feedback port to the voltage provided by the power supply is less than or equal to the second preset value. In the above possible implementation, in an application scenario where the input and output are close to a very small duty cycle, the on-time of the second transistor is very small and may be lower than the minimum on-time of the second transistor, which may make the output voltage unstable. By increasing the preset boost cycle, the switching frequency of the chip in the boost mode is reduced, and the actual on-time of the second transistor in the application scenario is increased to avoid the actual on-time of the second transistor being less than the minimum on-time. In this way, it can be ensured that when the input voltage of the first voltage port pin1 is close to the output voltage of the second voltage port pin2, the voltage can be output stably.

[0018] In a possible implementation of the first aspect, the chip further includes a chip power supply circuit, a power supply selection circuit, a voltage regulator and a fourth voltage port. The fourth voltage port is used to couple the power supply. The first end of the voltage regulator is coupled to the fourth voltage port; the second end of the voltage regulator is coupled to the first end of the power supply selection circuit. The second end of the power supply selection circuit is coupled to the chip power supply circuit; the third end of the power supply selection circuit is coupled to the second voltage port. In the above possible implementations, the chip power supply circuit can be coupled to the voltage regulator or the second voltage port through the power supply selection circuit, the voltage regulator is coupled to the power supply through the fourth voltage port, and the chip power supply circuit can select one of the voltage of the power supply and the voltage at the second voltage port as the power supply source. In this way, the chip power supply circuit can obtain sufficient voltage to drive the power transistor device. This embodiment can support higher power buck-boost chips.

[0019] In a possible implementation of the first aspect, the power supply selection circuit is used to control the first end of the power supply selection circuit and the second end of the power supply selection circuit to be turned on when the chip is in boost mode and the voltage of the fourth voltage port is higher than the specified voltage. Alternatively, when the voltage of the fourth voltage port is lower than the specified voltage, the third end of the power supply selection circuit and the second end of the power supply selection circuit are controlled to be turned on. In the above possible implementations, when the voltage of the fourth voltage port is higher, the voltage of the fourth voltage port can be used as the power supply voltage of the chip power supply circuit, and when the voltage of the fourth voltage port is lower, the voltage of the second voltage port can be used as the power supply voltage of the chip power supply circuit. In this way, a higher voltage can be provided for the chip power supply circuit, so that the chip power supply circuit is sufficient to drive the power transistor. In addition, the power output power capability of the power supply can be improved without increasing the chip area.

[0020] In a possible implementation of the first aspect, the specified voltage is the voltage of the second voltage port. In the above possible implementation, the chip power circuit is automatically switched to a high voltage source using the existing output voltage without increasing the internal power supply area of ​​the chip, thereby improving the chip power output performance.

[0021] In a second aspect, a control method for a buck-boost chip is provided, the chip comprising a first voltage port, a second voltage port, a first transistor, a second transistor and a control circuit; the first end of the first transistor and the first end of the second transistor are both coupled to the first voltage port; the second end of the first transistor is coupled to the second voltage port; the second end of the second transistor is grounded; the control end of the first transistor is coupled to the first output end of the control circuit; and the control end of the second transistor is coupled to the second output end of the control circuit. The method includes: if it is determined that the chip is in a buck mode, the control circuit controls the first transistor to be turned on and the second transistor to be turned off in a first time period of a preset buck cycle, and controls the first transistor to be turned off and the second transistor to be turned on in a second time period of the preset buck cycle; and controls the chip to input a voltage through a second voltage port and output a voltage through a first voltage port; wherein the first voltage port is coupled to a power supply through an inductor, and the second voltage port is used to couple to a load; or, if it is determined that the chip is in a boost mode, the control circuit controls the first transistor to be turned off and the second transistor to be turned on in a first time period of a preset boost cycle, and controls the first transistor to be turned on and the second transistor to be turned off in a second time period of the preset boost cycle; and controls the chip to input a voltage through the first voltage port and output a voltage through the second voltage port; wherein the first voltage port is coupled to a load through an inductor, and the second voltage port is used to couple to a power supply.

[0022] In a possible implementation of the second aspect, the chip further includes a mode port. The mode port includes a first state and a second state; the first state and the second state are different. The method further includes: detecting the state of the mode port; if the mode port is in the first state, determining that the chip is in a buck mode; if the mode port is in the second state, determining that the chip is in a boost mode.

[0023] In a possible implementation manner of the second aspect, the method further includes: when the chip is in the buck mode, the control circuit controls the first transistor to be turned off during the constant off time, or controls the second transistor to be turned on during the constant on time. When the chip is in the boost mode, the control circuit controls the second transistor to be turned off during the constant off time, or controls the first transistor to be turned on during the constant on time.

[0024] In a possible implementation of the second aspect, the method further includes: when the chip is in a boost mode, the control circuit increases the preset boost period when the ratio of the voltage at the feedback port to the voltage at the first voltage port is less than or equal to a first preset value, or when the ratio of the voltage at the feedback port to the voltage provided by the power supply is less than or equal to a second preset value.

[0025] In a possible implementation of the second aspect, the chip further includes a chip power supply circuit, a power supply selection circuit, and a fourth voltage port. The fourth voltage port is used to couple the power supply. The method further includes: when the chip is in a boost mode, the power supply selection circuit controls the chip power supply circuit to receive the voltage at the fourth voltage port when the voltage at the fourth voltage port is higher than a specified voltage; or, when the voltage at the fourth voltage port is lower than the specified voltage, controls the chip power supply circuit to receive the voltage at the second voltage port.

[0026] In a possible implementation manner of the second aspect, the designated voltage is a voltage of the second voltage port.

[0027] In a third aspect, a screen module is provided, the screen module comprising a screen and a buck-boost chip provided by the first aspect or any possible implementation of the first aspect, wherein the load is the screen.

[0028] In a fourth aspect, an electronic device is provided, the electronic device comprising a power supply and a buck-boost chip provided by the first aspect or any possible implementation of the first aspect.

[0029] It can be understood that the control method, screen module and electronic device of any of the above-mentioned buck-boost chips are all applied to the corresponding buck-boost chips provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding chips provided above and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0031] Figure 2 A schematic diagram of the structure of a power chip provided in an embodiment of the present application;

[0032] Figure 3 A schematic diagram of the structure of a first power chip provided in an embodiment of the present application;

[0033] Figure 4 A schematic diagram of the structure of a second power chip provided in an embodiment of the present application;

[0034] Figure 5 A schematic diagram of a buck-boost circuit provided in an embodiment of the present application;

[0035] Figure 6 A schematic diagram of a buck-boost chip provided in an embodiment of the present application Figure 1 ;

[0036] Figure 7 A schematic diagram of a buck-boost chip provided in an embodiment of the present application Figure 2 ;

[0037] Figure 8 A schematic diagram of a buck-boost chip provided in an embodiment of the present application Figure 3 ;

[0038] Fig. 9 A schematic diagram of a buck-boost chip provided in an embodiment of the present application Figure 4 ;

[0039] Fig.10 A schematic diagram of a partial structure of a control circuit provided in an embodiment of the present application;

[0040] Fig.11 A schematic diagram of a buck-boost chip provided in an embodiment of the present application Figure 5 ;

[0041] Fig.12 A schematic diagram of a buck-boost chip provided in an embodiment of the present application Figure 6 ;

[0042] Fig.13 A schematic diagram of a buck-boost chip provided in an embodiment of the present application Figure 7 ;

[0043] Fig.14 A schematic diagram of a buck-boost chip provided in an embodiment of the present application Figure 8 ;

[0044] Fig.15A schematic diagram of a coupling method of a chip power circuit provided in an embodiment of the present application Figure 1 ;

[0045] Fig.16 A schematic diagram of a coupling method of a chip power circuit provided in an embodiment of the present application Figure 2 ;

[0046] Fig.17 A schematic diagram of a control method for a buck-boost chip provided in an embodiment of the present application Figure 1 ;

[0047] Fig.18 A schematic diagram of a control method for a buck-boost chip provided in an embodiment of the present application Figure 2 ;

[0048] Fig.19 A schematic diagram of a control method for a buck-boost chip provided in an embodiment of the present application Figure 3 . DETAILED DESCRIPTION

[0049] It should be noted that the terms "first", "second", etc. involved in the embodiments of the present application are only used to distinguish features of the same type and cannot be understood as indicating relative importance, quantity, order, etc.

[0050] The terms "exemplary" or "for example" and the like in the embodiments of the present application are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of the terms "exemplary" or "for example" is intended to present the related concepts in a specific way.

[0051] The terms "coupling" and "connection" involved in the embodiments of the present application should be understood in a broad sense. For example, they may refer to a direct physical connection, or an indirect connection achieved through electronic devices, such as a connection achieved through resistors, inductors, capacitors or other electronic devices.

[0052] First, some basic concepts involved in this application are explained:

[0053] A display device refers to a device for presenting information or images. Display devices are widely used in various occasions, such as electronic devices such as tablets, computers, televisions, mobile phones, and projectors. With the evolution of materials and technologies, various display devices with small weight and small volume have been gradually developed. The types of display devices include at least liquid crystal displays (LCD), field emission displays, plasma display panels (PDP), and organic light-emitting diode (OLED) displays. Compared with liquid crystal display devices in traditional technologies, organic light-emitting diode (OLED) display devices have the characteristics of fast response speed, excellent color purity and brightness, high contrast, and wide viewing angle. Generally, OLED display devices can be divided into passive matrix OLED (PMOLED) display devices and active matrix OLED (AMOLED) display devices according to the driving mode. AMOLED is driven by a thin film transistor (TFT) including a storage capacitor, so it can realize a large-size and high-resolution display device. AMOLED display devices can be made much larger than PMOLED display devices and are not limited by size and resolution. Therefore, AMOLED display devices are considered to be the development direction of future display device technology. AMOLED display devices have pixels arranged in a matrix state, each pixel including an organic light-emitting (electro-luminescence, EL) element. AMOLED display devices are also provided with corresponding driving thin film transistors for controlling light emission.

[0054] EL power supply refers to a power supply used to provide a positive voltage ELVDD and a negative voltage ELVSS for each EL element. The power supply that provides ELVDD can be called a positive voltage power supply circuit, and the power supply that provides ELVSS can be called a negative voltage power supply circuit. The higher the brightness and the larger the size of the AMOLED, the higher the power and the greater the number of the corresponding organic light-emitting EL elements, and the higher the power demand for the EL power supply. The power supply system of the AMOLED display device consists of multiple types of power supplies, such as power supplies for EL elements and power supplies for calculations, as well as power supplies for logic power supply and power supply for the system. Among them, the power supply for the EL element has the largest power, and is suitable for tablets, notebooks and other devices with large-size AMOLED screens that require EL power supply chips with higher power. Since the EL power supply accounts for the largest proportion of power in large-size, high-brightness AMOLED display devices, the efficiency of the EL power supply chip almost determines the power efficiency of the entire AMOLED display device. Currently, electronic devices such as mobile phones, tablets, notebooks, and desktops have a large demand for high-brightness, large-size AMOLED display devices, so there is a strong demand for high-power, high-efficiency EL power supply chips. At the same time, due to the different battery architectures of different electronic devices such as mobile phones, tablets, and laptops, the EL power chip solutions and architectures vary, and there is no standardized high-efficiency solution in the industry.

[0055] The present application embodiment provides an electronic device, which may be a mobile phone, a tablet computer, a laptop computer, a desktop display, a car display, etc. Figure 1 As shown, the electronic device 1000 includes a processor 100, a power supply device 200 and a display module 300. The display module 300 includes a power chip 310 and a display device 320. The power chip 310 can be arranged on a printed circuit board (PCB). Exemplarily, the display module 300 can be a screen module, and the display device 320 can be a screen. Optionally, the power chip 310 may not be arranged in the display module 300. The processor 100 is coupled to the display device 320, and the power supply device 200 and the display device 320 are both coupled to the power chip 310. The processor 100 is used to transmit data with the display device 320, and instruct the display device 320 to display information or images. The power chip 310 can be a chip that provides ELVDD and ELVSS for the display device 320. The power supply device 200 is used to supply power to the power chip 310, and the power chip 310 is used to convert the voltage provided by the power supply device 200 and send the converted voltage to the display device 320. Figure 2 Shows Figure 1A possible example of a display module 300 in. The power chip 310 may include a positive voltage power supply circuit 311 and a negative voltage power supply circuit 312. The positive voltage power supply circuit 311 and the negative voltage power supply circuit 312 are coupled to transistors and inductors outside the power chip 310. The display device 320 includes pixels arranged in a matrix state, and each pixel is coupled with ELVDD (shaded part) and ELVSS (non-shaded part). The positive voltage power supply circuit 311 is used to provide ELVDD for the display device 320, and the negative voltage power supply circuit 312 is used to provide ELVSS for the display device 320. Each pixel may include two transistors, a capacitor and an EL element. The specific coupling method of the electronic devices of the screen module can be referred to Figure 2 .

[0056] In some possible implementations, Figure 2 The positive voltage power supply circuit 311 in the power supply chip 310 may be a boost circuit. The positive voltage power supply circuit 311 is used to boost the power provided by the power supply device 200 and send it to the display device 320.

[0057] In some examples, such as Figure 3 As shown, the display module 300 may further include an inductor, and the first power chip 310A may include a first positive voltage circuit 311A ​​and a first negative voltage circuit 312A. The power supply device 200 may be a single-string battery power supply 200A, which may be a power supply composed of a single battery or a plurality of batteries connected in parallel. Figure 3 The display device 320 is not shown. Figure 2 The display device 320 and its coupling method. The first positive voltage circuit 311A ​​includes two transistors and a boost controller 400A. For the specific coupling method of these electronic devices, please refer to Figure 3 The boost controller 400A is used to control the two transistors to be turned on or off. For example, the boost controller 400A controls the upper transistor to be turned off and controls the lower transistor to be turned on, so that the single-string battery power supply 200A can charge the inductor. For another example, the boost controller 400A controls the upper transistor to be turned on and controls the lower transistor to be turned off, so that the single-string battery power supply 200A and the inductor can be discharged together, thereby sending the boosted ELVDD voltage.

[0058] In this embodiment, the first power chip 310A can generally be applied to small-sized electronic devices with small display devices (such as screens), such as tablets, mobile phones and other electronic devices. The voltage provided by the single-string battery power supply 200A is usually less than 4.6V, and the first power chip 310A boosts the lower voltage to power small-sized electronic devices. However, the first power chip 310A has the following problems: First, since the first positive voltage circuit 311A ​​is a boost circuit, the input voltage of the first positive voltage circuit 311A ​​needs to be lower than the output voltage. The first power chip 310A needs to couple a single-string battery power supply 200A with a lower voltage, so the electronic device is a device adapted to the single-string battery power supply 200A, and the application scenario is limited. This embodiment cannot take into account the input voltage of the single-string battery power supply 200A and the multi-string battery power supply (the multi-string battery power supply can be a power supply composed of two or more batteries in series). Second, the voltage provided by the single-string battery power supply 200A to the first power chip 310A is low, which is not enough to drive the power transistor device of the first negative voltage circuit 312A. Therefore, this embodiment cannot support power chips with higher power. Third, the two transistors inside the first positive voltage circuit 311A ​​cannot both be N-type metal oxide semiconductors (NMOS). For example, the upper transistor is a P-type metal oxide semiconductor (PMOS). If the upper transistor and the lower transistor are both NMOS, short-circuit protection cannot be achieved. But PMOS has a larger area and lower efficiency. Therefore, the first power chip 310A has a large wafer area and low power efficiency. Fourth, when the input voltage of the first positive voltage circuit 311A ​​is close to the output voltage, the output cannot be stable, and there is a risk of water ripples.

[0059] In some other possible implementations, Figure 2 The positive voltage power supply circuit 311 in the power supply chip 310 may be a buck circuit. The positive voltage power supply circuit 311 is used to step down the power provided by the power supply device 200 and then send it to the display device 320.

[0060] In some examples, such as Figure 4 As shown, the display module 300 may also include an inductor, and the second power chip 310B may include a second positive voltage circuit 311B and a second negative voltage circuit 312B. The power supply device 200 may be a multi-string battery power supply 200B, which may be a power supply composed of two or more battery strings connected in series. Figure 3 The display device 320 is not shown. Figure 2 The display device 320 and its coupling method. The second positive voltage circuit 311B includes two transistors and a buck controller 400B. For the specific coupling method of these electronic devices, please refer to Figure 3 The buck controller 400B is used to control the two transistors to be turned on or off. For example, the buck controller 400B controls the upper transistor to be turned on and controls the lower transistor to be turned off, so that the multi-string battery power supply 200B can charge the inductor and provide the stepped-down ELVDD voltage to the display device 320. For another example, the buck controller 400B controls the upper transistor to be turned off and controls the lower transistor to be turned on, so that the inductor is discharged.

[0061] In this embodiment, the second power chip 310B can generally be applied to large-sized electronic devices with larger display devices (such as screens), such as electronic devices such as laptops. The voltage provided by the multi-string battery power supply 200B is generally greater than 5V, and the second power chip 310B steps down the lower voltage to power small-sized electronic devices. However, the second power chip 310B has the following problems: Since the second positive voltage circuit 311B is a step-down circuit, the input voltage of the second positive voltage circuit 311B needs to be higher than the output voltage. The second power chip 310B needs to couple the multi-string battery power supply 200B with a higher voltage, so the electronic device is a device adapted to the multi-string battery power supply 200B, and the application scenario is limited.

[0062] In some other possible implementations, Figure 2 The positive voltage power supply circuit 311 in the power supply chip 310 may be a buck-boost circuit. The buck-boost circuit may be a circuit that can both boost and buck. The positive voltage power supply circuit 311 is used to boost or buck the power provided by the power supply device 200 and send it to the display device 320 according to the needs of the display device 320.

[0063] In some examples, Figure 5 A possible example of a buck-boost circuit is shown. The buck-boost circuit includes four transistors (transistor Q1, transistor Q2, transistor Q3 and transistor Q4), an inductor L1, and an input power supply, which is used to provide an input voltage Vin. The specific coupling method of each device can be referred to Figure 5. The buck-boost circuit needs to be configured with two sets of controllers, such as a boost controller and a buck controller. The controller controls the four transistors to turn on or off, thereby switching the circuit to a boost mode or a buck mode. For example, when the circuit is in the buck mode, the control transistor Q4 is kept on and the control transistor Q3 is kept off. In the first time period when the circuit is in the buck mode, the control transistor Q1 is turned on, the control transistor Q2 is turned off, the input power supply charges the inductor L1, and the output voltage Vout after the step-down is output. In the second time period when the circuit is in the buck mode, the control transistor Q2 is turned on, the control transistor Q1 is turned off, and the inductor L1 is discharged. For another example, when the circuit is in the boost mode, the control transistor Q1 is kept on and the control transistor Q2 is kept off. In the first time period when the circuit is in the boost mode, the control transistor Q3 is turned on, the control transistor Q4 is turned off, and the input power supply charges the inductor L1. In the second time period when the circuit is in the boost mode, the transistor Q3 is controlled to be turned off, the transistor Q4 is controlled to be turned on, and the input power supply and the inductor L1 together output the boosted output voltage Vout.

[0064] In this embodiment, the buck-boost circuit requires four transistors, and each transistor has high requirements for current conduction and voltage resistance, which results in a larger chip wafer area and higher cost. In addition, the buck-boost circuit only requires two switch tubes to participate in boosting and bucking, but at this time the current will pass through an additional switch tube, resulting in additional conduction loss and low power efficiency. Furthermore, since four transistors need to be set, the chip requires two separate controllers to control the circuit in different modes, and the chip circuit is complex and has a large area.

[0065] In some further possible implementations, Figure 2 The positive voltage power supply circuit 311 in the power chip 310 can be a circuit that supports voltage boost or voltage reduction. By changing the coupling mode between the power chip 310 port and the power supply device 200 and the display device 320, the power chip 310 can realize the voltage boost function or the voltage reduction function.

[0066] In some examples, such as Figure 6 Figure (a) and Figure 6 As shown in FIG. 1( b ), the buck-boost chip 310C may be applied to an electronic device 1000 including a display device 320. For example, the buck-boost chip 310C may be Figure 2The power chip 310 in the embodiment of the present invention, the buck-boost chip 310C can also be applied to chargers, double data rate synchronous dynamic random access memory (DDR), central processing unit (CPU) and related power supply fields. Figure 2The power chip 310 in the embodiment is introduced as an example. The chip includes a first voltage port pin1, a second voltage port pin2, a first transistor T1, a second transistor T2 and a control circuit 400C. Exemplarily, the first voltage port pin1, the second voltage port pin2, the first transistor T1, the second transistor T2 and the control circuit 400C are located in the third positive voltage circuit 311C, and the chip also includes a third negative voltage circuit 312C and a third voltage port pin3, and the third voltage port pin3 is used to couple the power supply 200C. The control circuit 400C is used to control the first transistor T1 and the second transistor T2 to be turned on or off. The control circuit 400C includes a boost control loop, so that the boost-boost chip 310C can be supported in a boost mode; the control circuit 400C also includes a buck control loop, so that the boost-boost chip 310C can be supported in a buck mode. The chip is externally coupled with an inductor L2. The port in this embodiment may refer to a pin of the chip. The transistor in this embodiment is used as a switch tube, which refers to a power device for controlling the opening and closing of a current path in a direct current-direct current (DC-DC) converter circuit, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET). The first transistor T1 and the second transistor T2 can form a switch half-bridge (or power half-bridge), which refers to a power circuit unit in a DC-DC circuit composed of two switch tubes, which is controlled to periodically switch to support the buck-boost chip 310C in boost mode and buck mode. The first transistor T1 can be called a half-bridge upper tube (highside, HS), and the second transistor T2 can be called a half-bridge lower tube (low side, LS). The first transistor T1, the second transistor T2 and the inductor L2 can form a power phase (the circuit composed of which can be called a power circuit). The power phase is the power part in the DC-DC circuit of a direct current converter, usually composed of an inductor and two or more switch tubes, and is used to convert and transmit electrical energy under the control of a control circuit 400C. The first end of the first transistor T1 and the first end of the second transistor T2 are coupled to the switching node pin (SW PIN) of the switching half bridge. SW PIN is a node between the upper and lower switch tubes of the switching half bridge in the DC-DC circuit, and is usually connected to the external inductor L2 through the chip pin. SW PIN is coupled to the first voltage port pin1. The second end of the first transistor T1 is coupled to the second voltage port pin2. The second end of the second transistor T2 is grounded. The control end of the first transistor T1 is coupled to the first output end of the control circuit 400C, and the control end of the second transistor T2 is coupled to the second output end of the control circuit 400C.The third negative voltage circuit 312C is coupled to the third voltage port pin3.

[0067] For example, Figure 6 As shown in Figure (a), when the buck-boost chip 310C is in the boost mode, the first voltage port pin1 is used to couple to the power supply 200C (the power supply 200C can be the aforementioned power supply device 200) through the inductor L2, and the second voltage port pin2 is used to couple to the load 320C (the load 320C can be the aforementioned display device 320, or other devices that need power supply). When the buck-boost chip 310C is in the boost mode, the power supply 200C can be a single string of batteries. Exemplarily, in the first time period when the buck-boost chip 310C is in the boost mode, the control circuit 400C controls the first transistor T1 to turn off and the second transistor T2 to turn on, and the power supply 200C charges the inductor L2. In the second time period when the buck-boost chip 310C is in the boost mode, the control circuit 400C controls the first transistor T1 to turn on and the second transistor T2 to turn off, the inductor L2 discharges, and the power supply 200C and the inductor L2 together supply power to the load 320C, so that the second voltage port pin2 sends the boosted voltage. And, as Figure 6 As shown in Figure (b), when the buck-boost chip 310C is in the buck mode, the first voltage port pin1 is used to couple to the load 320C through the inductor L2, and the second voltage port pin2 is used to couple to the power supply 200C. When the buck-boost chip 310C is in the buck mode, the power supply 200C can be a plurality of battery strings. Exemplarily, in the first time period when the buck-boost chip 310C is in the buck mode, the control circuit 400C controls the first transistor T1 to turn on and the second transistor T2 to turn off, and the power supply 200C charges the inductor L2 and supplies power to the load 320C, thereby sending the stepped-down voltage to the load 320C through the inductor L2. In the second time period when the buck-boost chip 310C is in the buck mode, the control circuit 400C controls the first transistor T1 to turn off and the second transistor T2 to turn on, and the inductor L2 discharges.

[0068] In this embodiment, the buck-boost chip 310C uses two transistors, and by changing the connection method of the external circuit of the buck-boost chip 310C, it can support the boost mode or the buck mode. Therefore, the buck-boost chip 310C can be applied to electronic devices that support a single string of batteries, and can also be applied to electronic devices that support multiple strings of batteries, and has a wide range of application scenarios. In both the boost mode and the buck mode, the buck-boost chip 310C can reuse the first transistor T1 and the second transistor T2, without the need to set four transistors, the chip circuit is relatively simple, the wafer area and cost are small, the conduction loss caused by the additional switch tube is avoided, and the power supply efficiency is improved.

[0069] In some possible implementations, the first voltage port pin1 is coupled to the end with a higher voltage between the first end and the second end of the inductor L2 , and the second voltage port pin2 is coupled to the end with a higher voltage between the load 320C and the power source 200C.

[0070] In some examples, when the buck-boost chip 310C is in the boost mode, the first voltage port pin1 is specifically used to couple the higher voltage end of the first end and the second end of the inductor L2, and for the second voltage port pin2, the voltage of the load 320C is higher than the voltage of the power supply 200C. And, when the buck-boost chip 310C is in the buck mode, the first voltage port pin1 is specifically used to couple the higher voltage end of the first end and the second end of the inductor L2, and for the second voltage port pin2, the voltage of the power supply 200C is higher than the voltage of the load 320C.

[0071] For example, Figure 6 As shown in Figure (a), when the buck-boost chip 310C is in the boost mode, in the loop from the power supply 200C to the power circuit and then to the load 320C, the voltage on the right side of the inductor L2 is greater than the voltage on the left side of the inductor L2, and the voltage received by the load 320C is greater than the voltage provided by the power supply 200C. Figure 6 As shown in Figure (b), when the buck-boost chip 310C is in the buck mode, in the loop from the power supply 200C to the power circuit and then to the load 320C, the voltage on the right side of the inductor L2 is greater than the voltage on the left side of the inductor L2, and the voltage provided by the power supply 200C is greater than the voltage received by the load 320C.

[0072] In this embodiment, the switching between the boost mode and the buck mode of the buck-boost chip 310C is realized by fixing the first voltage port pin1 and the second voltage port pin2 to be connected to a higher voltage. Thus, the buck-boost chip 310C can be compatible with the boost mode and the buck mode. This embodiment can be compatible with the scenarios of single-string batteries and multiple-string batteries, has strong adaptability, and the circuit access method is relatively simple.

[0073] In some possible implementations, such as Figure 7 Figure (a) and Figure 7 As shown in FIG. (b), the buck-boost chip 310C further includes a mode port mode pin. The mode port mode pin includes a first state and a second state. The first state and the second state are different. If the mode port mode pin is in the first state, the buck-boost chip 310C is used to switch to the buck mode; if the mode port mode pin is in the second state, the buck-boost chip 310C is also used to switch to the boost mode.

[0074] Exemplarily, the first state is used to indicate that the buck-boost chip 310C switches to the buck mode, and the second state is used to indicate that the buck-boost chip 310C switches to the boost mode. For example, the first state may be a state where the mode pin of the mode port is suspended, and the second state may be a state where the mode pin of the mode port is grounded. In some scenarios, for example, a computer is charged with a charger, and the computer is charging a mobile phone at the same time. In this case, the buck-boost circuit in the computer can be as follows: Figure 5 As shown. The computer battery is used as both a power source for charging the mobile phone and a load for charging the computer. In this scenario, the computer switches between boost mode and buck mode through software switching or automatic switching inside the buck-boost circuit. This scenario cannot be switched through the fixed mode port mode pin.

[0075] In this embodiment, in the above-mentioned computer charging scenario, the computer battery can be used as both a power source and a load, so the mode port mode pin, which is a hardware-fixed method, cannot be used to switch the boost mode and buck mode of the computer. This scenario requires high digital computing capabilities, and the chip digital control circuit is more complex, larger in scale, and more expensive. The embodiment of the present application switches the boost mode and buck mode of the buck-boost chip 310C by means of a hardware-fixed mode port mode pin. Compared with software switching and automatic switching, the control method of the embodiment of the present application is simpler and more reliable.

[0076] In some possible implementations, part of the circuits in the control circuit 400C can be reused in the boost mode and the buck mode of the buck-boost chip 310C. Figure 5 As in the embodiment shown, a separate boost controller is provided for the boost mode, and a separate buck controller is provided for the buck mode.

[0077] In some examples, such as Figure 7 Figure (a) and Figure 7 As shown in FIG. 4( b ), the control circuit 400C includes a common control circuit 410C, a boost control circuit 420C, a buck control circuit 430C, and a selection switch 440C. A first output terminal of the common control circuit 410C is coupled to a first output terminal of the control circuit 400C, a second output terminal of the common control circuit 410C is coupled to a second output terminal of the control circuit 400C, a switching terminal of the common control circuit 410C is coupled to a first terminal of the selection switch 440C, a second terminal of the selection switch 440C is coupled to the buck control circuit 430C, and a third terminal of the selection switch 440C is coupled to the boost control circuit 420C.

[0078] Exemplarily, the common control circuit 410C and the boost control circuit 420C are used to jointly perform the function of controlling the buck-boost chip 310C to be in the boost mode, and the common control circuit 410C and the buck control circuit 430C are used to jointly perform the function of controlling the buck-boost chip 310C to be in the buck mode. The selection switch 440C is used to conduct the loop between the common control circuit 410C and the boost control circuit 420C, or the selection switch 440C is used to conduct the loop between the common control circuit 410C and the buck control circuit 430C.

[0079] In this embodiment, since two transistors are used to support the buck-boost chip 310C in the boost mode and the buck mode, there are two driving circuits for driving the transistors in the control circuit 400C, and some circuits in the control circuit 400C can be reused. The control circuit 400C of the first transistor T1 and the second transistor T2 is divided into two parts, one part is the common control circuit 410C that can be reused in the boost mode and the buck mode of the buck-boost chip 310C, and the other part is the boost control circuit 420C and the buck control circuit 430C that cannot be reused in the boost mode and the buck mode of the buck-boost chip 310C. The common control circuit 410C is switched to form a loop with the boost control circuit 420C or the buck control circuit 430C in different modes by selecting the switch 440C, so as to support the control of the buck-boost chip 310C in the boost mode or the buck mode. Since the common control circuit 410C is reused, there is no need to set two independent controllers for the boost mode and the buck mode of the buck-boost chip 310C, the chip circuit is relatively simple, and the wafer area and cost are small.

[0080] In some examples, such as Figure 7 As shown in (a) of FIG. 1 , when the first end of the selection switch 440C and the third end of the selection switch 440C are turned on, the common control circuit 410C and the boost control circuit 420C are used to control the first transistor T1 to be turned off and the second transistor T2 to be turned on in the first time period of the preset boost cycle, and to control the first transistor T1 to be turned on and the second transistor T2 to be turned off in the second time period of the preset boost cycle; and to control the boost-boost chip 310C to input voltage through the first voltage port pin1 and output voltage through the second voltage port pin2. Figure 7As shown in Figure (b), when the first end of the selection switch 440C and the second end of the selection switch 440C are turned on, the common control circuit 410C and the step-down control circuit 430C are used to control the first transistor T1 to be turned on and the second transistor T2 to be turned off during the first time period of the preset step-down cycle, and to control the first transistor T1 to be turned off and the second transistor T2 to be turned on during the second time period of the preset step-down cycle; and to control the step-up and step-down chip 310C to input voltage through the second voltage port pin2 and output voltage through the first voltage port pin1.

[0081] In this embodiment, the common control circuit 410C is switched in different modes to form a loop with the boost control circuit 420C or the buck control circuit 430C, thereby supporting the control of the buck-boost chip 310C in the boost mode or the buck mode. In this way, the common control circuit 410C can be reused, saving circuit area and cost.

[0082] In some examples, such as Figure 7 Figure (a) and Figure 7 As shown in FIG. (b), the control circuit 400C further includes a mode selection circuit 450C. The selection end of the selection switch 440C is coupled to the first end of the mode selection circuit 450C, and the second end of the mode selection circuit 450C is coupled to the mode port mode pin. If the mode selection circuit 450C is in the first state, the mode selection circuit 450C is used to control the first end of the selection switch 440C to be connected to the second end of the selection switch 440C; or, if the mode selection circuit 450C is in the second state, the mode selection circuit 450C is used to control the first end of the selection switch 440C to be connected to the third end of the selection switch 440C.

[0083] Exemplarily, the mode selection circuit 450C may include a level detection circuit 451C, which may generate a corresponding level according to the state of the mode port mode pin (e.g., suspended, grounded, connected to a high level, or connected to a low level). For example, the level detection circuit 451C is used to output a high level when the mode port mode pin is in a first state, and the high level is used to control the first end of the selection switch 440C to be connected to the second end of the selection switch 440C. The level detection circuit 451C is also used to output a low level when the mode port mode pin is in a second state, and the low level is used to control the first end of the selection switch 440C to be connected to the third end of the selection switch 440C.

[0084] In this embodiment, the mode pin of the mode port is in the first state or the second state, which can instruct the mode selection circuit 450C to control the selection switch 440C to switch to the corresponding state. In this way, the switching between the boost mode and the buck mode of the buck-boost chip 310C can be supported, and the scenarios of single-string batteries and multiple-string batteries can be compatible, with strong adaptability.

[0085] In some examples, such as Figure 8 and Fig. 9 As shown, the chip also includes a feedback port fb pin (also referred to as an output feedback pin (feedback PIN, FB PIN)). The common control circuit 410C includes an output voltage sampling circuit 411C, an error amplifier 412C, a pulse width modulation (PWM) comparator 413C, a trigger 414C, a frequency controller 415C, a dead zone control circuit 416C, a first drive circuit 417C, and a second drive circuit 418C. The input end of the common control circuit 410C is coupled to the feedback port fb pin, and the feedback port fb pin is used to couple the load 320C. A first terminal of the output voltage sampling circuit 411C is coupled to an input terminal of the common control circuit 410C, a second terminal of the output voltage sampling circuit 411C is grounded, and a third terminal of the output voltage sampling circuit 411C is coupled to a first input terminal of an error amplifier 412C; a second input terminal of the error amplifier 412C is used to input a reference voltage Vref; an output terminal of the error amplifier 412C is coupled to a first input terminal of a PWM comparator 413C; an output terminal of the PWM comparator 413C is coupled to a first input terminal of a trigger 414C; a second input terminal of the trigger 414C is coupled to a frequency controller 415C; an output terminal of the trigger 414C is coupled to a first input terminal of a dead zone control circuit 416C; a second input terminal of the dead zone control circuit 416C is used to input a dead time; an output terminal of the dead zone control circuit 416C is coupled to an input terminal of a first drive circuit 417C and an input terminal of a second drive circuit 418C; an output terminal of the first drive circuit 417C is coupled to a first output terminal of the common control circuit 410C, and an output terminal of the second drive circuit 418C is coupled to a second output terminal of the common control circuit 410C.

[0086] For example, when the second voltage port pin2 or the first voltage port pin1 is coupled to the load 320C as a voltage output terminal, it is used to output voltage feedback information, and the feedback port fb pin is used to couple the output voltage signal and transmit the output voltage feedback information to the output voltage sampling circuit 411C. Fig.10In Figure (a), the output voltage sampling circuit 411C may include a resistor Rfb1 and a resistor Rfb2. The first end of the resistor Rfb1 is coupled to the feedback port fb pin, the second end of the resistor Rfb1 and the first end of the resistor Rfb2 are both coupled to the error amplifier 412C, and the second end of the resistor Rfb2 is grounded. The error amplifier 412C can be used for DC-DC circuit voltage control, wherein the sampled output voltage of the controlled circuit is fed back and compared with a stable reference voltage Vref. The PWM comparator 413C can be used for DC-DC circuit loop control, and the main principle of the PWM wave with adjustable duty cycle is that the DC wave and the triangular wave are compared by the comparator, so that the comparator outputs a PWM wave to drive the switch tube. The trigger 414C can be an RS trigger 414C, or a reset / set trigger 414C, which can be used for DC-DC circuit loop control and is used to flip the drive signal of the switch tube. The frequency controller 415C can be used to generate a fixed / variable frequency circuit based on the internal clock signal of the chip and other time information. The dead zone control circuit 416C can be used for DC-DC circuit loop control, and is used to control the time interval between the on and off of the switch. The drive circuit can be the drive part of the switch in the DC-DC circuit, and is used to generate a circuit to control the on or off of the power phase switch.

[0087] In this embodiment, the output voltage sampling circuit 411C, the error amplifier 412C, the PWM comparator 413C, the trigger 414C, the frequency controller 415C, the dead zone control circuit 416C, the first drive circuit 417C and the second drive circuit 418C and other circuits can be reused, thereby multiplexing most of the control loops of the control circuit 400C, which can save a lot of chip area and optimize the chip cost to a great extent.

[0088] In some examples, such as Figure 8 and Fig. 9 As shown, the common control circuit 410C further includes an input voltage feedforward amplifier 419C. The third voltage port pin3 is used to couple the power supply 200C. The input end of the third negative voltage circuit 312C and the input end of the input voltage feedforward amplifier 419C are both coupled to the third voltage port pin3, and the output end of the input voltage feedforward amplifier 419C is coupled to the second input end of the PWM comparator 413C.

[0089] Exemplarily, due to the isolation of the inductor L2, an additional port is required to sample the input voltage information, and the input voltage information of the third negative voltage circuit 312C is used as a feed-forward voltage to participate in the loop, which can enhance the dynamic performance of the third positive voltage circuit 311C. For example, when the buck-boost chip 310C is in the boost mode, the input voltage information of the third voltage port pin3 can be used as the control of the third positive voltage circuit 311C; when the buck-boost chip 310C is in the buck mode, the input voltage information of the second voltage port pin2 or the third voltage port pin3 can be used as the control of the third positive voltage circuit 311C.

[0090] In this embodiment, adding an input voltage feedforward amplifier 419C to the common control circuit 410C can improve the dynamic performance of the buck-boost chip 310C. The input end of the input voltage feedforward amplifier 419C reuses the input end of the third negative voltage circuit 312C to share the input voltage, so that no additional ports are added, saving chip costs.

[0091] In some examples, such as Figure 8 and Fig. 9 As shown, the selection switch 440C may include a first switch 441C, the boost control circuit 420C may include a boost loop compensation circuit 421C, and the buck control circuit 430C may include a buck loop compensation circuit 431C. The first switching terminal of the common control circuit 410C (e.g., the output terminal of the error amplifier 412C) is coupled to the first terminal of the first switch 441C, the second terminal of the first switch 441C is coupled to the buck loop compensation circuit 431C, and the third terminal of the first switch 441C is coupled to the boost loop compensation circuit 421C. The selection terminal of the first switch 441C is coupled to the first terminal of the mode selection circuit 450C.

[0092] In some examples, such as Figure 8 and Fig. 9As shown, in the current mode control loop, the buck-boost chip 310C may further include an adder 460C. The selection switch 440C may further include a second switch 442C and a third switch 443C. The boost control circuit 420C may further include a boost current sampling circuit 422C and a boost slope compensation circuit 423C, and the buck control circuit 430C may further include a buck current sampling circuit 432C and a buck slope compensation circuit 433C. The first end of the adder 460C is coupled to the third input end of the PWM comparator 413C, the second end of the adder 460C is coupled to the second switching end of the common control circuit 410C, and the third end of the adder 460C is coupled to the third switching end of the common control circuit 410C. The second switching end of the common control circuit 410C is coupled to the first end of the second switch 442C, and the third switching end of the common control circuit 410C is coupled to the first end of the third switch 443C. The second end of the second switch 442C is coupled to the buck current sampling circuit 432C, and the third end of the second switch 442C is coupled to the boost current sampling circuit 422C. The selection end of the second switch 442C is coupled to the first end of the mode selection circuit 450C. The second end of the third switch 443C is coupled to the buck slope compensation circuit 433C, and the third end of the third switch 443C is coupled to the boost slope compensation circuit 423C. The selection end of the third switch 443C is coupled to the first end of the mode selection circuit 450C.

[0093] Exemplarily, for different modes (such as boost mode and buck mode), different compensation parameters are set to achieve corresponding functions. The loop compensation circuit can be the control part in the DC-DC circuit, usually composed of a sampling circuit, an error amplifier, a comparator, a resistor and a capacitor, and is used to generate a control signal to determine the opening and closing of the switch tube in the power phase. The loop compensation circuit can be a type II compensator, which can be used for DC-DC circuit loop control, and is a loop compensation network composed of two capacitors and a resistor. Please refer to Fig.10 In (b), the buck loop compensation circuit 431C includes a resistor Rcomp1, a capacitor Ccomp1 and a capacitor connected in parallel with the resistor Rcomp1. The first end of the resistor Rcomp1 is coupled to the first switch 441C, the second end of the resistor Rcomp1 is coupled to the capacitor Ccomp1, and the capacitor Ccomp1 is grounded. Fig.10In the figure (c), the boost loop compensation circuit 421C includes a resistor Rcomp2, a capacitor Ccomp2 and a capacitor connected in parallel with the resistor Rcomp2, the first end of the resistor Rcomp2 is coupled to the first switch 441C, the second end of the resistor Rcomp2 is coupled to the capacitor Ccomp2, and the capacitor Ccomp2 is grounded. The mode selection circuit 450C can select different compensation parameters of the loop compensation circuit by switching the two ends of the first switch 441C, corresponding to the resistance value and the capacitance value of the compensation circuit required by the buck and boost transfer functions respectively. The mode selection circuit 450C can select the peak current information of the input loop by switching the two ends of the second switch 442C, and convert the voltage drop of the second transistor T2 in the buck mode and the voltage drop of the first transistor T1 in the boost mode into the peak current information required by the loop. The mode selection circuit 450C can select the slope compensation information of the input loop by switching the two ends of the third switch 443C, corresponding to the different slope compensation values ​​required by the buck mode and the boost mode respectively.

[0094] For example, the calculation method of the loop compensation resistor Rcomp (such as the resistors Rcomp1 and Rcomp2) may refer to:

[0095]

[0096] Wherein, fcomp_p is the compensation circuit pole frequency, fcomp_z is the compensation circuit zero frequency, gm1 is the gain of the error amplifier 412C, and fBW is the compensation circuit bandwidth.

[0097] The calculation method of the loop compensation capacitor Ccomp (such as capacitors Ccomp1 and Ccomp2) can refer to:

[0098]

[0099] When the buck-boost chip 310C is in buck mode, the range of slope compensation amount slope comp (amperes per second) is:

[0100]

[0101] Where D is the duty cycle of the transistor and L is the inductor value in microhenries.

[0102] When the buck-boost chip 310C is in the boost mode, the range of the slope compensation amount slope comp (amperes per second) is:

[0103]

[0104] Wherein, V is the voltage output to the load 320C.

[0105] In this embodiment, the boost loop compensation circuit 421C and the buck loop compensation circuit 431C, the boost current sampling circuit 422C and the buck current sampling circuit 432C, the boost slope compensation circuit 423C and the buck slope compensation circuit 433C cannot be reused, so they are connected to the control loop through the selection switch 440C. In this way, the switching between the boost mode and the buck mode of the boost-boost chip 310C can be supported, and the scenes of single-string batteries and multiple-string batteries can be compatible, with strong adaptability.

[0106] In some examples, in some scenarios, such as Fig.11 As shown, when the buck-boost chip 310C operates in the boost mode, a constant on-time peak current control mode can be adopted; Fig.12 As shown, when the buck-boost chip 310C operates in the buck mode, a constant off-time valley current control mode can be adopted. Since the peak and valley currents can be obtained by collecting the voltage information of the second transistor T2, the buck-boost chip 310C does not need to set the second switch 442C, or the second switch 442C can keep the first end and the third end turned on. In this way, the first end of the boost current sampling circuit 422C is coupled to the first end of the second transistor T2, the second end of the current sampling circuit is coupled to the second end of the second transistor T2, and the third end of the current sampling circuit is coupled to the third input end of the PWM comparator 413C through the adder 460C. The selection switch 440C also includes a fourth switch 444C, the frequency controller 415C is coupled to the first end of the fourth switch 444C, the second end of the fourth switch 444C is used to input the constant off time Toff, and the third end of the fourth switch 444C is used to output the constant on time Ton. The fourth switch 444C is used to select the off and on time of the access loop. When the buck-boost chip 310C is in the buck mode, the frequency controller 415C is used to control the first transistor T1 to be turned off during the constant off time Toff, or to control the second transistor T2 to be turned on during the constant on time Ton. When the buck-boost chip 310C is in the boost mode, the frequency controller 415C is also used to control the second transistor T2 to be turned off during the constant off time Toff, or to control the first transistor T1 to be turned on during the constant on time Ton.

[0107] In this embodiment, when the chip is in a constant on-time peak current control mode or a constant off-time valley current control mode, the boost current sampling circuit 422C is used, and the boost current sampling circuit 422C is further multiplexed to support multiple control modes.

[0108] In some possible implementations, when the buck-boost chip 310C is in boost mode, usually to avoid current leakage, the first transistor T1 and the second transistor T2 may be one NMOS and one PMOS, or the second transistor T2 may use an NMOS with a controllable body diode direction. However, the wafer area of ​​these two methods is large, and the control circuit 400C is relatively complex. Therefore, a PMOS may be coupled to the outside of the buck-boost chip 310C to avoid current leakage, so that both transistors inside the buck-boost chip 310C can use an NMOS without a controllable body diode direction.

[0109] In some examples, such as Fig.13 As shown, the first transistor T1 is an N-type transistor, the second voltage port pin2 is specifically used to couple to the load 320C through the third transistor T3, the third output end of the control circuit 400C is used to couple to the control end of the third transistor T3, and the third transistor T3 is a P-type transistor.

[0110] Exemplarily, the control circuit 400C further includes a shutoff drive circuit 470C, which is used to couple the control terminal of the third transistor T3. The shutoff drive circuit 470C can be used to receive the boost control loop instruction of the buck-boost chip 310C, control the third transistor T3 to be turned on when the gate voltage of the third transistor T3 is low, and control the third transistor T3 to be turned off when the gate voltage of the third transistor T3 is high.

[0111] Exemplarily, the buck-boost chip 310C is adapted to work with a single string of batteries. When the buck-boost chip 310C is in boost mode, the internal switch tube half-bridge of the buck-boost chip 310C is composed of two NMOS transistors, the first transistor T1 and the second transistor T2. Due to the presence of the body diode of the first transistor T1, even if the channel of the first transistor T1 is closed, it is still possible to form a path between the power supply 200C and the load 320C, causing leakage or short circuit. Therefore, a PMOS is connected in series on the external output path of the buck-boost chip 310C to cut off the path between the power supply 200C and the load 320C. The gate of the third transistor T3 is connected to the shutdown drive circuit 470C inside the chip, and the shutdown drive circuit 470C can control the on and off state of the third transistor T3, thereby playing a role in short-circuit protection.

[0112] In this embodiment, a PMOS is provided outside the buck-boost chip 310C to prevent current leakage, so that the first transistor T1 and the second transistor T2 inside the buck-boost chip 310C can be implemented using NMOS. Since the NMOS of similar specifications has a smaller area and cost and higher efficiency, the buck-boost chip 310C has a smaller area and cost and higher efficiency. In addition, this embodiment can prevent current leakage and achieve short-circuit protection.

[0113] In some examples, when the buck-boost chip 310C is in the boost mode, the difference between the input voltage of the first voltage port pin1 and the output voltage of the second voltage port pin2 is usually large, for example, a voltage difference of 100 to 300mV is required to work stably. Alternatively, the circuit can work stably when the input voltage of the first voltage port pin1 is close to the output voltage of the second voltage port pin2 by introducing a down mode control method, but this method requires that the first transistor T1 and the second transistor T2 are both low-voltage devices, and the first transistor T1 needs to be PMOS, which is not suitable for the solution where the first transistor T1 and the second transistor T2 are both NMOS. Therefore, the problem that the circuit cannot work stably when the input voltage is close to the output voltage can be avoided by reducing the boost mode frequency of the buck-boost chip 310C.

[0114] Exemplarily, the control circuit 400C is used to control the first transistor T1 to be turned off and the second transistor T2 to be turned on in a first time period of the preset boost cycle, and to control the first transistor T1 to be turned on and the second transistor T2 to be turned off in a second time period of the preset boost cycle. The control circuit 400C is also used to increase the preset boost cycle when the ratio of the voltage of the feedback port fb pin to the voltage of the first voltage port pin1 is less than or equal to a first preset value, or when the ratio of the voltage of the feedback port fb pin to the voltage provided by the power supply is less than or equal to a second preset value.

[0115] Exemplarily, the control circuit 400C also includes a frequency reduction control circuit and a minimum on-time circuit 480C. Optionally, the frequency reduction control circuit and the frequency controller 415C may be the same entity. The minimum on-time circuit 480C may be used to pre-set the minimum on-time of the first transistor T1 and the second transistor T2 according to the dynamic parameters of the internal switch tube half-bridge, and the information may be retained and provided to the frequency reduction control circuit. The frequency reduction control circuit may be used to automatically calculate and control the switching frequency of the switch tube half-bridge according to the output voltage and the minimum on-time of the second transistor T2. When the buck-boost chip 310C is in the boost mode, when the input voltage and the output voltage are close, the on-time of the second transistor T2 accounts for a small proportion of the preset boost cycle. If the preset boost cycle is short, the on-time of the second transistor T2 is very short. If the on-time of the second transistor T2 is lower than the minimum on-time of the second transistor T2, the output voltage may be unstable. To improve this problem, when the output voltage is close to the input voltage, the frequency reduction control circuit controls the switching frequency to be reduced according to the input voltage, the output voltage and the minimum on-time of the second transistor T2. In this way, the preset boost cycle can be increased, so that the on-time of the second transistor T2 is greater than or equal to the minimum on-time, thereby ensuring stable output.

[0116] In this embodiment, in the application scenario where the input and output are close to a very small duty cycle, the on-time of the second transistor T2 is very small and may be lower than the minimum on-time of the second transistor T2, which may make the output voltage unstable. By increasing the preset boost cycle, the switching frequency of the boost mode of the boost-boost chip 310C is reduced, and the actual on-time of the second transistor T2 in this application scenario is increased to avoid the actual on-time of the second transistor T2 being less than the minimum on-time. In this way, it can be ensured that when the input voltage of the first voltage port pin1 is close to the output voltage of the second voltage port pin2, the voltage can be output stably.

[0117] In some possible implementations, when the buck-boost chip 310C is in the boost mode, the chip power circuit 510C may select one of the power supply voltage and the output voltage of the second voltage port pin2 as a power source.

[0118] In some examples, such as Fig.14 As shown, the buck-boost chip 310C also includes a chip power supply circuit 510C, a power supply selection circuit 520C and a voltage regulator 530C (low dropout regulator, LDO). The first end of the voltage regulator 530C is coupled to the fourth voltage port; the second end of the voltage regulator 530C is coupled to the first end of the power supply selection circuit 520C; the second end of the power supply selection circuit 520C is coupled to the chip power supply circuit 510C; the third end of the power supply selection circuit 520C is coupled to the second voltage port pin2. The voltage regulator 530C can be a linear regulator. The fourth voltage port can be the same port as the third voltage port pin3, or it can be a different port from the third voltage port pin3.

[0119] Exemplarily, the chip power supply circuit 510C may be a power supply for supplying power to the chip's internal driving circuit. The voltage regulator 530C is used to maintain the stability of the voltage provided by the power supply 200C. Fig.15 FIG. 3 shows some components in the third negative voltage circuit 312C. The third negative voltage circuit 312C may include a level shifter 500C (level shift), three transistors and a capacitor Cbst. The coupling method of each component is shown in FIG. Fig.15, wherein the fourth transistor T4 and the fifth transistor T5 can be power transistors of the third negative voltage circuit 312C. The level converter 500C can be used to convert a voltage signal into an input power signal. The chip power supply circuit 510C is used to power the level converter 500C. When the voltage of the level converter 500C is too low, the switching speed of the fourth transistor T4 and the fifth transistor T5 slows down, and the on-resistance increases, which affects the power supply efficiency of the buck-boost chip 310C. In the embodiment of the present application, a higher voltage chip power supply circuit 510C is required to drive the power transistor. The power supply selection circuit 520C can select one of the voltage of the power supply 200C and the output voltage of the second voltage port pin2 as a power supply source for the chip power supply circuit 510C. For example, Fig.16 As shown, the power supply selection circuit 520C may include two diodes, which may form a diode pair. The diode pair is used to select a higher voltage between the power supply voltage and the output voltage of the second voltage port pin2, so that the higher voltage powers the chip power supply circuit 510C.

[0120] In this embodiment, the chip power circuit 510C can be coupled to the voltage regulator 530C or the second voltage port pin2 through the power supply selection circuit 520C, the voltage regulator 530C is coupled to the power supply 200C, and the chip power circuit 510C can select one of the voltage of the power supply 200C and the voltage at the second voltage port pin2 as the power supply source. In this way, the chip power circuit 510C can obtain sufficient voltage to drive the power transistor device. This embodiment can support a relatively high power buck-boost chip 310C.

[0121] In some examples, when the buck-boost chip 310C is in the boost mode, the power supply selection circuit 520C is used to control the first terminal of the power supply selection circuit 520C and the second terminal of the power supply selection circuit 520C to be turned on when the voltage of the fourth voltage port is higher than the specified voltage. Alternatively, when the voltage of the fourth voltage port is lower than the specified voltage, the third terminal of the power supply selection circuit 520C and the second terminal of the power supply selection circuit 520C are controlled to be turned on.

[0122] Exemplarily, when the buck-boost chip 310C is in the boost mode, the first end of the power supply selection circuit 520C and the second end of the power supply selection circuit 520C can be turned on first, so that the power supply 200C supplies power to the chip power supply circuit 510C through the regulator 530C. Since the battery power of the power supply 200C may be less and less (for example, less than 3V), the voltage at the fourth voltage port gradually decreases. Since the buck-boost chip 310C is in the boost mode, the voltage of the second voltage port pin2 (for example, higher than 4.6V) is higher than the voltage of the fourth voltage port. When the voltage provided by the power supply 200C is lower than the specified voltage, it is switched to make the output voltage of the second voltage port pin2 supply power to the chip power supply circuit 510C.

[0123] In this embodiment, when the voltage of the fourth voltage port is high, the voltage of the fourth voltage port can be used as the power supply voltage of the chip power supply circuit 510C, and when the voltage of the fourth voltage port is low, the voltage of the second voltage port pin2 can be used as the power supply voltage of the chip power supply circuit 510C. In this way, a higher voltage can be provided to the chip power supply circuit 510C, so that the chip power supply circuit 510C is sufficient to drive the power transistor. In addition, the power output capacity of the power supply can be improved without increasing the chip area.

[0124] In some examples, the designated voltage is the voltage of the second voltage port pin2. Exemplarily, when the voltage at the fourth voltage port is lower than the voltage at the second voltage port pin2, the output voltage of the second voltage port pin2 is switched to power the chip power circuit 510C.

[0125] In this implementation, without increasing the power supply area inside the chip, the chip power supply circuit 510C is automatically switched to a high voltage source by utilizing the existing output voltage, thereby improving the power output performance of the chip.

[0126] Next, combine Figure 6 to Figure 16 , the possible working modes of the buck-boost chip 310C are illustrated.

[0127] In some examples, the buck-boost chip 310C needs to implement a boost function. The first voltage port pin1 of the buck-boost chip 310C is coupled to the power supply 200C through the inductor L2. The second voltage port pin2 of the buck-boost chip 310C is coupled to the load 320C. The third voltage port pin3 of the buck-boost chip 310C is coupled to the power supply 200C. The mode port mode pin is in the second state, and the mode selection circuit 450C controls each switch to connect the boost control circuit 420C to the loop of the common control circuit 410C according to the state of the mode port mode pin. In the initial state, the first transistor T1 is turned off, the second transistor T2 is turned off, and the voltage at the feedback port fb pin is 0. The output voltage sampling circuit 411C outputs the corresponding voltage signal to the error amplifier 412C, and the error amplifier 412C compares the voltage signal with the reference voltage Vref and outputs the comparison result. The comparison result and the signal of the boost loop compensation circuit 421C are used as the input signal of the first input terminal of the PWM comparator 413C. The input voltage feed-forward amplifier 419C inputs a voltage signal from the third voltage port pin3, and the signal output by the input voltage feed-forward amplifier 419C is used as the input signal of the second input terminal of the PWM comparator 413C. The signal output by the PWM comparator 413C and the signal of the frequency controller 415C pass through the trigger 414C, the dead zone control circuit 416C and other circuits. The signal output by the dead zone control circuit 416C instructs the first drive circuit 417C to control the first transistor T1 to turn on. At this time, the power supply 200C charges the inductor L2 and supplies power to the load 320C through the first transistor T1. The boost current sampling circuit 422C collects the current at both ends of the second transistor T2. When the current difference between the two ends reaches the threshold, the signal output by the boost current sampling circuit 422C and the signal of the boost slope compensation circuit 423C pass through the adder 460C, the PWM comparator 413C, the trigger 414C and the dead zone control circuit 416C. The signal output by the dead zone control circuit 416C instructs the first drive circuit 417C to control the first transistor T1 to turn off, and instructs the second drive circuit 418C to control the second transistor T2 to turn on. At this time, the inductor L2 is charged. Then the signal at the feedback port fb pin will instruct the first transistor T1 to turn on, and the power supply 200C and the inductor L2 will discharge together to provide the boosted voltage to the load 320C. In this way, the buck-boost chip 310C realizes the boost mode under the preset boost cycle.

[0128] Exemplarily, in this process, when the first transistor T1 is turned off, the third transistor T3 is turned off under the control of the turn-off drive circuit 470C; when the first transistor T1 is turned on, the third transistor T3 is turned on under the control of the turn-off drive circuit 470C. The minimum on-time circuit 480C determines the minimum on-time of the first transistor T1 and the second transistor T2, and outputs the minimum on-time to the frequency controller 415C. The frequency controller 415C increases the preset boost cycle when the ratio of the voltage of the feedback port fb pin to the voltage of the first voltage port pin1 is less than or equal to the first preset value, or when the ratio of the voltage of the feedback port fb pin to the voltage provided by the power supply 200C is less than or equal to the second preset value (that is, when the input voltage and the output voltage are close).

[0129] Exemplarily, in this process, when the voltage at the fourth voltage port is higher than the specified voltage, the power supply selection circuit 520C controls the first terminal and the second terminal of the power supply selection circuit 520C to be turned on. Thus, the voltage regulator 530C is coupled with the chip power supply circuit 510C, and the power supply 200C supplies power to the chip power supply circuit 510C. When the power of the power supply 200C is gradually consumed, the voltage at the fourth voltage port is lower than the specified voltage. At this time, the power supply selection circuit 520C controls the third terminal and the second terminal of the power supply selection circuit 520C to be turned on. Thus, the second voltage port pin2 is coupled with the chip power supply circuit 510C, and the output voltage at the second voltage port pin2 supplies power to the chip power supply circuit 510C.

[0130] In other examples, the buck-boost chip 310C needs to implement a buck function. The first voltage port pin1 of the buck-boost chip 310C is coupled to the load 320C through the inductor L2. The second voltage port pin2 of the buck-boost chip 310C is coupled to the power supply 200C. The third voltage port pin3 of the buck-boost chip 310C is coupled to the power supply 200C. The mode port mode pin is in a first state, and the mode selection circuit 450C controls each switch to connect the buck control circuit 430C to the loop of the common control circuit 410C according to the state of the mode port mode pin. In the initial state, the first transistor T1 is turned off, the second transistor T2 is turned off, and the voltage at the feedback port fb pin is 0. The output voltage sampling circuit 411C outputs the corresponding voltage signal to the error amplifier 412C, and the error amplifier 412C compares the voltage signal with the reference voltage Vref and outputs the comparison result. The comparison result and the signal of the buck loop compensation circuit 431C are used as the input signal of the first input terminal of the PWM comparator 413C. The input voltage feedforward amplifier 419C inputs a voltage signal from the third voltage port pin3, and the signal output by the input voltage feedforward amplifier 419C is used as the input signal of the second input terminal of the PWM comparator 413C. The signal output by the PWM comparator 413C and the signal of the frequency controller 415C pass through the trigger 414C, the dead zone control circuit 416C and other circuits. The signal output by the dead zone control circuit 416C instructs the first drive circuit 417C to control the first transistor T1 to turn on. At this time, the power supply 200C charges the inductor L2 and provides the stepped-down voltage to the load 320C through the first transistor T1. The buck current sampling circuit 432C collects the current at both ends of the first transistor T1. When the current difference between the two ends reaches the threshold, the signal output by the buck current sampling circuit 432C and the signal of the buck slope compensation circuit 433C pass through the adder 460C, the PWM comparator 413C, the trigger 414C and the dead zone control circuit 416C. The signal output by the dead zone control circuit 416C instructs the first drive circuit 417C to control the first transistor T1 to turn off, and instructs the second drive circuit 418C to control the second transistor T2 to turn on. At this time, the inductor L2 is discharged. Then the signal at the feedback port fb pin will instruct the first transistor T1 to turn on, and the power supply 200C will charge the inductor L2, and the voltage provided by the first transistor to the load 320C after the voltage is stepped down will be discharged together, and the voltage after the voltage is stepped up will be provided to the load 320C. In this way, the buck-boost chip 310C realizes the buck mode under the preset buck cycle.

[0131] based on Figures 6 to 16 The buck-boost chip 310C provided in this application embodiment also provides a control method for the buck-boost chip 310C. The structure of the buck-boost chip 310C can refer to the chip structure in the above chip embodiment, and the embodiments of this application will not be repeated here. Fig.17 As shown, the method comprises at least the following steps:

[0132] S100: If it is determined that the buck-boost chip 310C is in the buck mode, the control circuit 400C controls the first transistor T1 to be turned on and the second transistor T2 to be turned off in the first time period of the preset buck cycle, and controls the first transistor T1 to be turned off and the second transistor T2 to be turned on in the second time period of the preset buck cycle; and controls the buck-boost chip 310C to input voltage through the second voltage port pin2 and output voltage through the first voltage port pin1; wherein the first voltage port pin1 is coupled to the power supply 200C through inductance, and the second voltage port pin2 is used to couple to the load 320C; or,

[0133] S200: If it is determined that the buck-boost chip 310C is in the boost mode, the control circuit 400C controls the first transistor T1 to be turned off and the second transistor T2 to be turned on in the first time period of the preset boost cycle, and controls the first transistor T1 to be turned on and the second transistor T2 to be turned off in the second time period of the preset boost cycle; and controls the buck-boost chip 310C to input voltage through the first voltage port pin1 and output voltage through the second voltage port pin2; wherein the first voltage port pin1 is coupled to the load 320C through an inductor, and the second voltage port pin2 is used to couple to the power supply 200C.

[0134] In a possible implementation, the buck-boost chip 310C can switch between the boost mode and the buck mode through different states of the mode port mode pin. In some examples, the method may further include: detecting the state of the mode port mode pin. If the mode port mode pin is in a first state, the control circuit 400C determines that the buck-boost chip 310C is in the buck mode. If the mode port mode pin is in a second state, the control circuit 400C determines that the buck-boost chip 310C is in the boost mode.

[0135] In a possible implementation, the mode port mode pin is coupled to the selection circuit through the mode selection circuit 450C. The mode selection circuit 450C controls the conduction between the two ends of the selection switch 440C according to the different states of the mode port mode pin, thereby controlling the buck control circuit 430C or the boost control circuit 420C to access the loop of the control circuit 400C, thereby enabling the buck-boost chip 310C to switch to the buck mode or the boost mode. In some examples, the method may further include: if the mode port mode pin is in the first state, the mode selection circuit 450C controls the first end of the selection switch 440C to be conducted with the second end of the selection switch 440C. If the mode port mode pin is in the second state, the mode selection circuit 450C controls the first end of the selection switch 440C to be conducted with the third end of the selection switch 440C. S200 may include: when the first end of the selection switch 440C is connected to the third end of the selection switch 440C, the common control circuit 410C and the boost control circuit 420C control the buck-boost chip 310C to be in the boost mode, and control the buck-boost chip 310C to input voltage through the first voltage port pin1 and output voltage through the second voltage port pin2. S100 may include: when the first end of the selection switch 440C is connected to the second end of the selection switch 440C, the common control circuit 410C and the buck control circuit 430C control the buck-boost chip 310C to be in the buck mode, and control the buck-boost chip 310C to input voltage through the second voltage port pin2 and output voltage through the first voltage port pin1. In a possible implementation, the buck-boost chip 310C may adopt a constant on-time peak current control mode, or a constant off-time valley current control mode. In some examples, when the buck-boost chip 310C is in the buck mode, the frequency controller 415C controls the first transistor T1 to be turned off during the constant off time, or controls the second transistor T2 to be turned on during the constant on time. When the buck-boost chip 310C is in the boost mode, the frequency controller 415C controls the second transistor T2 to be turned off during the constant off time, or controls the first transistor T1 to be turned on during the constant on time.

[0136] In one possible implementation, when the buck-boost chip 310C is in the boost mode, when the input voltage of the first voltage port pin1 is close to the output voltage of the second voltage port pin2, the conduction time of the second transistor T2 is short within the preset boost cycle. If the actual conduction time of the second transistor T2 is less than the minimum conduction time, the output voltage may be unstable. Therefore, the conduction time of the second transistor T2 within each preset boost cycle can be increased by reducing the frequency. In some examples, when the buck-boost chip 310C is in the boost mode, the method may further include: the control circuit 400C increases the preset boost cycle when the ratio of the voltage of the feedback port fb pin to the voltage of the first voltage port pin1 is less than or equal to the first preset value, or when the ratio of the voltage of the feedback port fb pin to the voltage provided by the power supply is less than or equal to the second preset value.

[0137] For example, Fig.18 A possible process of reducing the frequency is shown. The control circuit 400C determines whether the buck-boost chip 310C is in the boost mode. If not in the boost mode, the control circuit 400C controls the buck-boost chip 310C to work normally at the original frequency. If in the boost mode, the control circuit 400C determines whether the output voltage drops when the input voltage gradually approaches the output voltage. Exemplarily, the output voltage drop means that the required on-time of the second transistor T2 corresponding to the output voltage is less than the minimum on-time of the second transistor T2. If the output voltage does not drop, the control circuit 400C controls the buck-boost chip 310C to work normally at the original frequency. If the output voltage drops, the control circuit 400C increases the preset boost cycle.

[0138] In one possible implementation, when the buck-boost chip 310C is in the boost mode, the chip power circuit 510C therein requires a higher voltage to drive the power transistor device of the third negative voltage circuit 312C. Typically, the chip power circuit 510C is powered by the voltage of the fourth voltage port. As the power supply 200C consumes power, the voltage of the fourth voltage port may not be enough. Therefore, a path can be provided between the chip power circuit 510C and the second voltage port pin2 through the power supply selection circuit 520C, and the chip power circuit 510C is powered by the output voltage of the second voltage port pin2. In some examples, the method further includes: when the buck-boost chip 310C is in the boost mode, the power supply selection circuit 520C controls the chip power circuit 510C to receive the voltage at the fourth voltage port when the voltage at the fourth voltage port is higher than the specified voltage; or, when the voltage at the fourth voltage port is lower than the specified voltage, controls the chip power circuit 510C to receive the voltage at the second voltage port. Exemplarily, the specified voltage is the voltage of the second voltage port pin2.

[0139] For example, Fig.19 A possible process of the power supply mode of the chip power supply circuit 510C is shown. The first end of the power supply selection circuit 520C and the second end of the power supply selection circuit 520C are turned on, and the buck-boost chip 310C supplies power to the chip power supply circuit 510C through the voltage received from the fourth voltage port by the voltage regulator 530C. The buck-boost chip 310C determines whether it is in the boost mode. If it is not in the boost mode, the power supply selection circuit 520C keeps the first end of the power supply selection circuit 520C and the second end of the power supply selection circuit 520C turned on. If it is in the boost mode, it is determined whether the voltage of the second voltage port pin2 is greater than the voltage sent by the voltage regulator 530C. If the voltage of the second voltage port pin2 is not greater than the voltage sent by the voltage regulator 530C, the power supply selection circuit 520C keeps the first end of the power supply selection circuit 520C and the second end of the power supply selection circuit 520C turned on. If the voltage of the second voltage port pin2 is greater than the voltage sent by the voltage regulator 530C, the power supply selection circuit 520C controls the third terminal of the power supply selection circuit 520C and the second terminal of the power supply selection circuit 520C to be turned on.

[0140] It can be understood that the control method of the buck-boost chip 310C can be applied to the aforementioned chip embodiments. Since the effects of various structures and functions have been described in detail in the aforementioned chip embodiments, they will not be repeated here.

[0141] It can be understood that in various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0142] Those of ordinary skill in the art will appreciate that the modules and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0143] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and modules described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0144] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0145] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical modules, that is, they may be located in one device or distributed on multiple devices. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment.

[0146] In addition, each functional module in each embodiment of the present application may be integrated into one device, or each module may exist physically separately, or two or more modules may be integrated into one device.

[0147] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A buck-boost chip, It is characterized in that The chip includes a first voltage port, a second voltage port, a first transistor, a second transistor and a control circuit; The first end of the first transistor and the first end of the second transistor are both coupled to the first voltage port, and the second end of the first transistor is coupled to the second voltage port; the second end of the second transistor is grounded; the control end of the first transistor is coupled to the first output end of the control circuit, and the control end of the second transistor is coupled to the second output end of the control circuit; Wherein, when the chip is in boost mode, the first voltage port is used to couple to a power source through an inductor, and the second voltage port is used to couple to a load; and, When the chip is in a step-down mode, the first voltage port is used to be coupled to the load through the inductor, and the second voltage port is used to be coupled to the power source.

2. The chip according to claim 1, It is characterized in that The chip further includes a mode port, the mode port including a first state and a second state; the first state and the second state are different; If the mode port is in the first state, the chip is used to switch to the buck mode; If the mode port is in the second state, the chip is further configured to switch to the boost mode.

3. The chip according to claim 1 or 2, It is characterized in that The control circuit includes a common control circuit, a step-down control circuit, a step-up control circuit and a selection switch; The first output end of the common control circuit is coupled to the first output end of the control circuit, the second output end of the common control circuit is coupled to the second output end of the control circuit, the switching end of the common control circuit is coupled to the first end of the selection switch, the second end of the selection switch is coupled to the step-down control circuit, and the third end of the selection switch is coupled to the step-up control circuit.

4. The chip according to claim 3, It is characterized in that When the first end of the selection switch and the second end of the selection switch are turned on, the common control circuit and the step-down control circuit are used to control the first transistor to be turned on and the second transistor to be turned off in a first time period of a preset step-down cycle, and to control the first transistor to be turned off and the second transistor to be turned on in a second time period of the preset step-down cycle; and to control the chip to input a voltage through the second voltage port and output a voltage through the first voltage port; When the first end of the selection switch and the third end of the selection switch are connected, the common control circuit and the boost control circuit are used to control the first transistor to be turned off and the second transistor to be turned on in a first time period of a preset boost cycle, and to control the first transistor to be turned on and the second transistor to be turned off in a second time period of the preset boost cycle; And controlling the chip to input voltage through the first voltage port and output voltage through the second voltage port.

5. The chip according to claim 4, It is characterized in that The control circuit further includes a mode selection circuit, and the chip further includes a mode port; the selection end of the selection switch is coupled to the first end of the mode selection circuit, and the second end of the mode selection circuit is coupled to the mode port; the mode port includes a first state and a second state; the first state and the second state are different; If the mode port is in the first state, the mode selection circuit is used to control the first end of the selection switch to be conductive with the second end of the selection switch; Alternatively, if the mode port is in the second state, the mode selection circuit is further configured to control the first end of the selection switch to be conductive with the third end of the selection switch.

6. The chip according to any one of claims 3 to 5, It is characterized in that The chip also includes a feedback port; the common control circuit includes an output voltage sampling circuit, an error amplifier, a pulse width modulation (PWM) comparator, a trigger, a frequency controller, a dead zone control circuit, a first drive circuit and a second drive circuit; The input end of the common control circuit is coupled to the feedback port, and the feedback port is used to couple to the load; The first end of the output voltage sampling circuit is coupled to the input end of the common control circuit, the second end of the output voltage sampling circuit is grounded, and the third end of the output voltage sampling circuit is coupled to the first input end of the error amplifier; the second input end of the error amplifier is used to input a reference voltage; the output end of the error amplifier is coupled to the first input end of the PWM comparator; the output end of the PWM comparator is coupled to the first input end of the trigger; the second input end of the trigger is coupled to the frequency controller; the output end of the trigger is coupled to the first input end of the dead zone control circuit; The second input terminal of the dead zone control circuit is used to input the dead zone time; The output end of the dead zone control circuit is coupled to the input end of the first driving circuit and the input end of the second driving circuit; An output terminal of the first driving circuit is coupled to a first output terminal of the common control circuit, and an output terminal of the second driving circuit is coupled to a second output terminal of the common control circuit.

7. The chip according to claim 6, It is characterized in that The chip further includes a negative voltage circuit and a third voltage port; the common control circuit further includes an input voltage feedforward amplifier; The third voltage port is used to couple the power supply; The input end of the negative voltage circuit and the input end of the input voltage feed-forward amplifier are both coupled to the third voltage port, and the output end of the input voltage feed-forward amplifier is coupled to the second input end of the PWM comparator.

8. The chip according to claim 6 or 7, It is characterized in that The control circuit also includes a current sampling circuit; The first end of the current sampling circuit is coupled to the first end of the second transistor, the second end of the current sampling circuit is coupled to the second end of the second transistor, and the third end of the current sampling circuit is coupled to the third input end of the PWM comparator; When the chip is in the buck mode, the frequency controller is used to control the first transistor to be turned off during a constant off time, or to control the second transistor to be turned on during a constant on time; When the chip is in the boost mode, the frequency controller is further used to control the second transistor to be turned off during a constant off time, or to control the first transistor to be turned on during a constant on time.

9. The chip according to any one of claims 1 to 8, It is characterized in that When the chip is in the boost mode, the first voltage port is specifically used to couple the end with a higher voltage between the first end and the second end of the inductor, and the voltage of the load is higher than the voltage of the power supply; and When the chip is in the buck mode, the first voltage port is specifically used to couple the end with a higher voltage between the first end and the second end of the inductor, and the voltage of the power supply is higher than the voltage of the load.

10. The chip according to any one of claims 6 to 9, It is characterized in that The first transistor is an N-type transistor, the third transistor is a P-type transistor, the second voltage port is specifically used to be coupled to the load through the third transistor, and the third output end of the control circuit is used to be coupled to the control end of the third transistor.

11. The chip according to claim 10, It is characterized in that When the chip is in the boost mode, The control circuit is used to control the first transistor to be turned off and the second transistor to be turned on in a first time period of a preset boost cycle, and to control the first transistor to be turned on and the second transistor to be turned off in a second time period of the preset boost cycle; The control circuit is also used to increase the preset boost period when the ratio of the voltage at the feedback port to the voltage at the first voltage port is less than or equal to a first preset value, or when the ratio of the voltage at the feedback port to the voltage provided by the power supply is less than or equal to a second preset value.

12. The chip according to any one of claims 1 to 11, It is characterized in that The chip also includes a chip power supply circuit, a power supply selection circuit, a voltage regulator and a fourth voltage port; The fourth voltage port is used to couple the power supply; The first end of the voltage regulator is coupled to the fourth voltage port; the second end of the voltage regulator is coupled to the first end of the power supply selection circuit; The second terminal of the power supply selection circuit is coupled to the chip power supply circuit; and the third terminal of the power supply selection circuit is coupled to the second voltage port.

13. The chip according to claim 12, It is characterized in that When the chip is in the boost mode, the power supply selection circuit is used to control the first end of the power supply selection circuit and the second end of the power supply selection circuit to be turned on when the voltage of the fourth voltage port is higher than the specified voltage; or to control the third end of the power supply selection circuit and the second end of the power supply selection circuit to be turned on when the voltage of the fourth voltage port is lower than the specified voltage.

14. The chip according to claim 13, It is characterized in that The specified voltage is the voltage of the second voltage port.

15. A control method for a buck-boost chip, It is characterized in that The chip comprises a first voltage port, a second voltage port, a first transistor, a second transistor and a control circuit; a first end of the first transistor and a first end of the second transistor are both coupled to the first voltage port; a second end of the first transistor is coupled to the second voltage port; and a second end of the second transistor is grounded; The control terminal of the first transistor is coupled to the first output terminal of the control circuit; the control terminal of the second transistor is coupled to the second output terminal of the control circuit; the method further includes: If it is determined that the chip is in the buck mode, the control circuit controls the first transistor to be turned on and the second transistor to be turned off in a first time period of a preset buck cycle, and controls the first transistor to be turned off and the second transistor to be turned on in a second time period of the preset buck cycle; and controls the chip to input a voltage through the second voltage port and output a voltage through the first voltage port; wherein the first voltage port is coupled to a power supply through an inductor, and the second voltage port is used to couple to a load; or, If it is determined that the chip is in boost mode, the control circuit controls the first transistor to be turned off and the second transistor to be turned on in a first time period of a preset boost cycle, and controls the first transistor to be turned on and the second transistor to be turned off in a second time period of the preset boost cycle; and controls the chip to input voltage through the first voltage port and output voltage through the second voltage port; wherein the first voltage port is coupled to the load through the inductor, and the second voltage port is used to couple to the power supply.

16. The method according to claim 15, It is characterized in that The chip further includes a mode port, the mode port includes a first state and a second state; the first state and the second state are different; the method further includes: Detecting the state of the mode port; If the mode port is in the first state, determining that the chip is in the buck mode; If the mode port is in the second state, it is determined that the chip is in the boost mode.

17. The method according to claim 15 or 16, It is characterized in that The method further comprises: When the chip is in the step-down mode, the control circuit controls the first transistor to be turned off during a constant off-time, or controls the second transistor to be turned on during a constant on-time; When the chip is in the boost mode, the control circuit controls the second transistor to be turned off during a constant off-time, or controls the first transistor to be turned on during a constant on-time.

18. The method according to any one of claims 15 to 17, It is characterized in that The chip also includes a feedback port; The feedback port is used to couple the load; the method further includes: When the chip is in the boost mode, the control circuit increases the preset boost period when the ratio of the voltage at the feedback port to the voltage at the first voltage port is less than or equal to a first preset value, or when the ratio of the voltage at the feedback port to the voltage provided by the power supply is less than or equal to a second preset value.

19. The method according to any one of claims 15 to 18, It is characterized in that The chip further includes a chip power supply circuit, a power supply selection circuit and a fourth voltage port; the fourth voltage port is used to couple the power supply; the method further includes: When the chip is in the boost mode, the power supply selection circuit controls the chip power circuit to receive the voltage at the fourth voltage port when the voltage at the fourth voltage port is higher than the specified voltage; or, when the voltage at the fourth voltage port is lower than the specified voltage, controls the chip power circuit to receive the voltage at the second voltage port.

20. The method according to claim 19, It is characterized in that The specified voltage is the voltage of the second voltage port.

21. A screen module, It is characterized in that The screen module includes a screen and a buck-boost chip as described in any one of claims 1 to 14, and the load is the screen.

22. An electronic device, It is characterized in that The electronic device comprises a power supply and a buck-boost chip as described in any one of claims 1 to 14.

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