Bias enhanced optical signal logic circuit and optical transmission logic system

Abstract

The invention relates to the technical field of semiconductors, and discloses a bias enhanced optical signal logic circuit and an optical transmission logic system.The bias enhanced optical signal logic circuit comprises N input optical waveguides, a logic circuit and an output optical waveguide, the calculation rule of the logic circuit performs logic operation on N electric signals input by the N input optical waveguides to obtain corresponding logic operation result signals; and outputting a corresponding output optical signal according to the logic operation result signal, so as to bias the driving voltage of the output optical signal according to a preset bias rule, so that the intensity of the output optical signal output to the output optical waveguide is higher than or equal to that of each input optical signal. And light signal propagation attenuation leads to difficult detection.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor technology, and in particular to a bias-enhanced optical signal logic circuit and an optical transmission logic system. Background Art

[0002] Optical signals have the advantages of fast propagation speed and no heat generation during the propagation process. If optical signals can be used instead of electrical signals for logical operations, they will have the characteristics of low heat generation, high reliability, and high theoretical operation speed. The use of homogeneous integrated optoelectronic chips is a reliable way to realize optical signal logical operations, with advantages such as fast information transmission and strong confidentiality.

[0003] The feasible methods to replace electrical signals with optical signals include using Mach-Zehnder interferometers, microring resonators, microdisk resonators, etc. However, the above methods cannot be applied to large-scale integrated chip applications because light will continue to attenuate during propagation until it is difficult to detect. Summary of the invention

[0004] In view of the above problems, the present invention provides a bias-enhanced optical signal logic circuit for solving the technical problem that when optoelectronic devices are used as signal propagation units, optical signal propagation attenuation leads to difficulty in detection.

[0005] According to one aspect of an embodiment of the present invention, a bias-enhanced optical signal logic circuit is provided, and the bias-enhanced optical signal logic circuit includes:

[0006] N input optical waveguides, each of which is used to obtain an input optical signal, and N is a natural number greater than or equal to 1;

[0007] A logic circuit having N input terminals, wherein the N input terminals of the logic circuits are connected one-to-one to the N input optical waveguides, and are used to respectively receive the N input optical signals from the N input optical waveguides, convert the N input optical signals into a corresponding number of N electrical signals, and then perform a logic operation on the input N electrical signals according to a calculation rule of the logic circuit to obtain a corresponding logic operation result signal; and output a corresponding output optical signal according to the logic operation result signal, so as to bias the driving voltage of the output optical signal according to a preset bias rule so that the intensity of the output optical signal is higher than or equal to each of the input optical signals;

[0008] The output optical waveguide is used to output the output optical signal.

[0009] In an optional manner, the logic circuit includes N light detection devices, a bias circuit and a biased light emitting device;

[0010] The N optical detection devices are used to convert the input optical signal transmitted by the input optical waveguide into an electrical signal, and perform logic calculation on the N electrical signals according to the logic calculation rule of the circuit composed of the N optical detection devices to obtain the logic operation result signal;

[0011] The biased light emitting device is used to output a corresponding output light signal according to the logic operation result signal, and bias the driving voltage of the output light signal according to the bias rule of the bias circuit so that the intensity of the output light signal is higher than or equal to the input light signal.

[0012] In an optional manner, when the logic circuit is an AND gate, N is 2, the N input optical waveguides are respectively a first input optical waveguide and a second input optical waveguide, the N input ends of the logic circuit are respectively a first input end and a second input end, the N optical detection devices are respectively a first optical detection device and a second optical detection device, the biased light emitting device is a first output LED, the bias circuit includes a first series resistor and a first bias resistor; the first optical detection device and the second optical detection device are connected in series on the bias circuit; the input optical signal includes a first input optical signal and a second input optical signal;

[0013] The first input optical waveguide is optically connected to the detection end of the first optical detection device, the second input optical waveguide is optically connected to the detection end of the second optical detection device, the positive electrode input end of the first optical detection device is connected to the positive power supply end through the first series resistor, the output end of the first optical detection device is connected to the input end of the second optical detection device; the output end of the second optical detection device is respectively connected to the input end of the first output LED and the first end of the first bias resistor; the second end of the first bias resistor is connected to the positive power supply end; the input end of the second output LED is connected to the positive power supply end through the second bias resistor, and the output end of the first output LED is connected to the ground; the optical signal generated by the first output LED will be coupled into the corresponding output optical waveguide;

[0014] The first input optical waveguide is used to acquire and propagate the first input optical signal;

[0015] The second input optical waveguide is used to acquire and propagate the second input optical signal;

[0016] The first optical detection device is used to detect whether the first input optical waveguide receives the first input optical signal;

[0017] The second optical detection device is used to detect whether the second input optical waveguide receives a second input optical signal;

[0018] A first output LED, configured to generate a corresponding output optical signal and couple into a corresponding output optical waveguide for output when the first input optical waveguide receives a first input optical signal and the second input optical waveguide receives a second input optical signal;

[0019] Alternatively, when the first input optical waveguide does not receive the first input optical signal or the second input optical waveguide does not receive the second input optical signal, the first output LED does not light up and no optical signal is output.

[0020] In an optional manner, when the logic circuit is an OR gate, N is 2, the input optical signal includes a third input optical signal and a fourth input optical signal; the N input optical waveguides are respectively a third input optical waveguide and a fourth input optical waveguide, the logic circuit has a first input end and a second input end, the N optical detection devices are respectively a third optical detection device and a fourth optical detection device, the biased light emitting device is a second output LED, and the bias circuit includes a second series resistor and a second bias resistor;

[0021] The third input optical waveguide is optically connected to the detection end of the third optical detection device, the fourth input optical waveguide is optically connected to the detection end of the fourth optical detection device, the positive electrode input end of the third optical detection device is connected to the positive power supply end through the second series resistor, and the output end of the third optical detection device is respectively connected to the input end of the second output LED and the second bias resistor; the positive electrode input end of the fourth optical detection device is connected to the positive power supply end through the second series resistor, and the output end of the fourth optical detection device is respectively connected to the input end of the second output LED and the first end of the second bias resistor; the input end of the second output LED is connected to the positive power supply end through the second bias resistor, and the output end of the second output LED is connected to the ground;

[0022] The optical signal generated by the second output LED will be coupled into the corresponding output optical waveguide;

[0023] The third input optical waveguide is used to acquire and propagate the third input optical signal;

[0024] The fourth input optical waveguide is used to acquire and propagate the fourth input optical signal;

[0025] The third optical detection device is used to detect whether the third input optical waveguide receives a third input optical signal;

[0026] The fourth optical detection device is used to detect whether the fourth input optical waveguide receives a fourth input optical signal;

[0027] The second output LED is used to generate a corresponding output optical signal and couple it into the corresponding output optical waveguide for output when the third input optical waveguide receives the third input optical signal or the fourth input optical waveguide receives the fourth input optical signal;

[0028] Alternatively, when the third input optical waveguide does not receive the third input optical signal and the fourth input optical waveguide does not receive the fourth input optical signal, the first output LED does not light up and no optical signal is output.

[0029] In an optional manner, when the logic circuit is a NOT gate, N is 1, the N input optical waveguides are fifth input optical waveguides, the input optical signal includes a fifth input optical signal, the logic circuit has a first input terminal, the N optical detection devices are fifth optical detection devices; the biased light emitting device is a third output LED; and the bias circuit includes a third bias resistor;

[0030] The fifth input optical waveguide is optically connected to the detection end of the fifth optical detection device, the electrode input end of the fifth optical detection device is electrically connected to the electrode input end of the fifth input optical waveguide, and is connected to the forward power supply end through the third bias resistor; the electrode output end of the fifth optical detection device is connected to the ground; the input end of the third output LED is connected to the forward power supply end through the third bias resistor, and is also connected to the input end of the fifth optical detector; the output end of the third output LED is connected to the ground;

[0031] The fifth input optical waveguide is used to obtain and propagate the fifth input optical signal;

[0032] The fifth optical detection device is used to detect whether the fifth input optical waveguide receives a fifth input optical signal;

[0033] The third output LED is configured to not light up when the fifth input optical waveguide receives the fifth input optical signal;

[0034] Alternatively, when the fifth input optical waveguide does not receive the fifth input optical signal, the first output LED lights up to generate an optical signal output.

[0035] In an optional manner, the type of the optical detection device is any one of a photoconductive type, a Schottky type, an MSM type, a PIN type, a HEMT type, and a triode type, and the optical detection device includes a circuit input end, a circuit output end, and a photoconductive region, and one end of the photoconductive region is configured as a hollow region with a notch; the hollow region can partially cover the corresponding input optical waveguide structure, so that the detector efficiently receives the optical signal and prevents the optical signal from leaking;

[0036] When there is no optical signal in the optical waveguide area covered by the hollow area of ​​the optical detection device, the circuit input end and the circuit output end of the optical detection device are disconnected; when there is an optical signal in the optical waveguide area covered by the hollow area, the circuit input end and the circuit output end of the optical detection device are connected.

[0037] In an optional manner, each of the optical waveguide, the light emitting device and the light detecting device has the same homogeneous integrated nitride epitaxial structure and belongs to a homogeneous integrated chip.

[0038] In an optional manner, the bias rule is determined by a specific gate circuit structure recorded in the bias-enhanced optical signal logic circuit;

[0039] When the logic circuit is an AND gate, the input voltage of the first output LED is V out1 , a bias (current limiting) resistor R is connected in series with the bias power supply Vcc LED2 ; The voltage drop of the first detector and the voltage drop of the second detector are Vx -1 and Vx -2 , and the detector bias resistor R PD1 The first detector and the second detector are connected in series, and the voltage drop across them is Vx -RPD1 ; The critical voltage (conduction voltage drop) of LED is recorded as V th , the conduction current is recorded as 2mA; when there is no light signal input, since the detector resistance is very high, Vx approaches infinity, which is close to a short circuit; and due to the bias (current limiting) resistor R LED2 >(Vcc-Vth) / 2mA exists, V out1 <V th , causing the first output LED to be unable to turn on; when there is an optical signal input, the detector resistance decreases as the input optical signal increases, and the detector voltage drop Vx also decreases accordingly, then V out1 It will increase with the increase of light signal intensity. At this time, V out1 =Vcc-(Vx -RPD1 +Vx -1 +Vx -2 ), with Vx -1 and Vx -2 Lower, V out1 It will increase to be greater than Vth, and the first output LED will turn on;

[0040] When the logic circuit is an OR gate, the input voltage of the second output LED is V out2 , a bias (current limiting) resistor R is connected in series with the bias power supply Vcc LED4 ; The voltage drops of the third detector and the fourth detector are Vx -3 and Vx -4However, since the third detector and the fourth detector are connected in parallel, Vx -3 =Vx -4 ; Detector bias resistor R PD2 Connected in series with the third detector and the fourth detector respectively, the voltage drop across them is Vx -RPD2 , let the critical voltage (conduction voltage drop) of LED turn on be V th , the conduction current is 2mA; when there is no light signal input, the corresponding detector resistance is very high, the corresponding Vx approaches infinity, and is approximately open circuit; when there is a light signal input, the corresponding Vx decreases accordingly. Therefore, when there is no light signal input to the OR gate, due to the bias (current limiting) resistor R LED4 >(Vcc-Vth) / 2mA exists, V out2 <V th , the second output LED cannot be turned on; when the third or fourth detector receives a light signal, or when both detectors receive a light signal, Vx -3 or Vx -4 As the light signal intensity increases, it decreases. At this time, V out2 =Vcc-(Vx -RPD2 +Vx -4 ), with Vx -3 or Vx -4 Lower, V out2 It will increase to be greater than Vth, so the second output LED turns on;

[0041] When the logic circuit is a NOT gate, the output voltage of the third output LED is V out3 , and the third output LED is connected in parallel with the fifth detector, and the third output LED and the fifth detector are connected with the bias (current limiting) resistor R PD3 Connect in series, and set the critical voltage (conduction voltage drop) of LED to be V th , the conduction current is 2mA; when there is no light signal in the NOT gate, the resistance of the fifth detector is extremely high, which is approximately an open circuit, because the bias (current limiting) resistor R PD3 <(Vcc-Vth) / 2mA, resulting in V out3 >V th , the third output LED is turned on and lights up; when there is a light signal input in the NOT gate, the fifth detector decreases as the light signal increases. Since the detector and the output LED are in parallel, V out3 The current at the node increases, R PD3 Voltage drop Vx -RPD3 As a result, V out3 =Vcc-Vx -RPD3 , follow Vx -RPD3 Increase, V out3 Lower, when V out3When <Vth, the third output LED cannot light up.

[0042] According to a second aspect of an embodiment of the present invention, there is provided an optical transmission logic system, the optical transmission logic system comprising an electro-optical conversion circuit and at least one bias-enhanced optical signal logic circuit as described above, the electro-optical conversion circuit comprising at least one input LED circuit, the input optical waveguide of the bias-enhanced optical signal logic circuit being arranged one-to-one with the input LED circuit and being optically connected;

[0043] The electro-optical conversion circuit is used to convert the original electrical signal into an optical signal as the input optical signal of the bias-enhanced optical signal logic circuit, and output the optical signal after performing logic calculation through the bias-enhanced optical signal logic circuit.

[0044] In an optional manner, the optical transmission logic system further includes a photoelectric conversion circuit and a multi-stage cascaded logic operation branch, each stage of the logic operation branch includes at least one bias-enhanced optical signal logic circuit as described in any one of claims 1 to 8; the output optical waveguide of the bias-enhanced optical signal logic circuit of the logic operation branch of the N+1th stage is connected one-to-one with the input optical waveguide of the bias-enhanced optical signal logic circuit of the logic operation branch of the N+2th stage;

[0045] The electro-optical conversion circuit includes a multi-channel input LED circuit; the photoelectric conversion circuit includes a multi-channel output LED circuit;

[0046] The input optical waveguide of the first-stage logic operation branch is connected one-to-one with the input LED circuit, and the output optical waveguide of the last-stage logic operation branch is connected one-to-one with the output LED circuit;

[0047] The electro-optical conversion circuit is used to convert the initial electrical signal into an optical signal as the input optical signal of the first-stage logic operation branch, and transmit it through the optical waveguide into the multi-stage cascaded logic operation branch of the subsequent stage to perform logic calculation to obtain a result signal;

[0048] The photoelectric conversion circuit is used to convert the result signal into an optical signal for output.

[0049] The embodiment of the present invention comprises N input optical waveguides, a logic circuit and an output optical waveguide through the bias-enhanced optical signal logic circuit, wherein the calculation rule of the logic circuit performs a logic operation on the N electrical signals input by the N input optical waveguides to obtain corresponding logic operation result signals; and outputs a corresponding output optical signal according to the logic operation result signal, so as to bias the driving voltage of the output optical signal according to a preset bias rule, so that the intensity of the output optical signal output to the output optical waveguide is higher than or equal to each input optical signal, thereby solving the technical problem of difficulty in detection caused by optical signal propagation attenuation when the optoelectronic device is used as a signal propagation unit while performing logic calculation.

[0050] The above description is only an overview of the technical solution of the embodiment of the present invention. In order to more clearly understand the technical means of the embodiment of the present invention, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the embodiment of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] The accompanying drawings are only used to illustrate the embodiments and are not to be considered as limiting the present invention. In addition, the same reference symbols are used to represent the same components throughout the accompanying drawings. In the accompanying drawings:

[0052] Figure 1 A module schematic diagram of a bias-enhanced optical signal logic circuit provided by the present invention is shown;

[0053] Figure 2 A circuit diagram of a first embodiment of a bias-enhanced optical signal logic circuit provided by the present invention is shown;

[0054] Figure 3 A circuit diagram of a second embodiment of a bias-enhanced optical signal logic circuit provided by the present invention is shown;

[0055] Figure 4 A circuit diagram of a second embodiment of a bias-enhanced optical signal logic circuit provided by the present invention is shown;

[0056] Figure 5 The circuit diagram of the optical transmission logic system provided by the present invention is shown. DETAILED DESCRIPTION

[0057] Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the drawings, it should be understood that the present invention can be implemented in various forms and should not be limited to the embodiments set forth herein.

[0058] The following further describes the current status of optical signal transmission in the prior art:

[0059] Among optical signals, ultraviolet light has a high frequency, is not affected by visible light, and is easy to conceal. Therefore, the use of ultraviolet optoelectronic devices as signal transmission units (homogeneous integrated optical chips) has broad application prospects and greatly reduces the requirements for chip packaging.

[0060] However, ultraviolet light, due to its high photon energy, is more easily absorbed and scattered by materials, which means it is more likely to experience propagation attenuation, making it difficult to detect.

[0061] The present application provides a bias-enhanced optical signal logic circuit, which is used to solve the technical problem that when an optoelectronic device is used as a signal propagation unit, the optical signal propagation attenuation leads to difficulty in detection.

[0062] Figure 1 The module diagram of the first embodiment of the bias-enhanced optical signal logic circuit of the present invention is shown. The bias-enhanced optical signal logic circuit includes N input optical waveguides 10, a logic circuit 20 and an output optical waveguide 30, where N is a natural number greater than or equal to 1.

[0063] Each input optical waveguide is used to obtain an input optical signal, and the input end of the logic circuit 20 is used to receive N input optical signals from N input optical waveguides 10 respectively, convert the N input optical signals into corresponding N electrical signals, and then perform logical operations on the input N electrical signals according to the calculation rules of the logic circuit 20 to obtain corresponding logical operation result signals; and output the corresponding output optical signal according to the logical operation result signal, so as to bias the driving voltage of the output optical signal according to the preset bias rule so that the intensity of the output optical signal is higher than or equal to each input optical signal. The output optical waveguide 30 outputs the output optical signal.

[0064] In the above scheme, multiple input optical signals are converted into electrical signals for logical operations in a bias-enhanced optical signal logic circuit, and then the driving voltage of the output optical signal is biased according to a preset bias rule, so that the intensity of the output optical signal is higher than or equal to each input optical signal. Therefore, while realizing the logical operation of the optical signal, the attenuation of the optical signal during the propagation process can be avoided, that is, the negative impact of the optical attenuation caused by the long-distance transmission of the optical signal on the logical calculation effect can be avoided.

[0065] It should be noted that the preset bias rule is generally implemented by setting a bias circuit in circuit design.

[0066] In the above embodiment, the following circuit connection scheme can be used to realize signal transmission:

[0067] The logic circuit 20 has a signal output terminal and N signal input terminals. The signal input terminals of the logic circuit 20 are connected one-to-one to the N input optical waveguides 10 , and the signal output terminal of the logic circuit 20 is connected to the output optical waveguide 30 .

[0068] In an optional embodiment, the logic circuit 20 includes N photodetection devices, a bias circuit, and a biased light-emitting device; the input LED device and the photodetection device are arranged one to one.

[0069] Among them, the N photodetectors convert the input optical signal transmitted by the input optical waveguide 10 into an electrical signal, and perform logic calculation on the N electrical signals according to the logic calculation rules of the circuit composed of the N photodetectors to obtain a logic operation result signal, and the input LED device lights up when the corresponding photodetector device receives the input optical signal. The biased light-emitting device outputs the corresponding output optical signal according to the logic operation result signal, and biases the driving voltage of the output optical signal according to the bias rule of the bias circuit so that the intensity of the output optical signal is higher than or equal to the input optical signal.

[0070] In the above embodiment, the following circuit connection scheme can be used to realize signal transmission:

[0071] The input end of each photodetector is a signal input end of the logic circuit 20, and the output end of the biased light emitting device is a signal output end of the logic circuit 20. The biased light emitting device is connected to the output end of at least one photodetector. It should be noted that the connection relationship between the biased light emitting device and the photodetector is modified accordingly according to the logic calculation rule implemented by the circuit composed of N photodetectors, and the biased light emitting device is set at the signal output end of the corresponding logic operation result signal for the purpose of implementing the logic calculation rule.

[0072] In an alternative embodiment, referring to Figure 2 As shown, when the logic circuit 20 is an AND gate, N is 2, the N input optical waveguides 10 are respectively the first input optical waveguide 1.3 and the second input optical waveguide, the logic circuit 20 has a first input end and a second input end, the N optical detection devices are respectively the first optical detection device and the second optical detection device, and the biased light-emitting device is the first output LED; the bias circuit includes a first series resistor RPD1 and a first bias resistor RLED2; the first optical detection device includes a detection end, a positive electrode input end and an output end, and the second optical detection device includes a detection end, a positive electrode input end and an output end; the first optical detection device and the second optical detection device are connected in series on the bias circuit; the input optical signal includes a first input optical signal and a second input optical signal.

[0073] The first input optical waveguide 1.3 is optically connected to the detection end of the first optical detection device, and the second input optical waveguide is optically connected to the detection end of the second optical detection device; the positive electrode input end of the first optical detection device is connected to the positive power supply end through the first series resistor RPD1, and the output end of the first optical detection device is connected to the input end of the second optical detection device; the output end of the second optical detection device is respectively connected to the input end of the first output LED and the first end of the first bias resistor RLED2; the second end of the first bias resistor RLED2 is connected to the positive power supply end; the input end of the second output LED is connected to the positive power supply end through the second bias resistor, and the output end of the first output LED is connected to the ground; the optical signal generated by the first output LED will be coupled into the corresponding output optical waveguide 30.

[0074] Among them, the first input optical waveguide 1.3 and the second input optical waveguide are used to obtain the first input optical signal, and the second input optical waveguide is used to obtain the second input optical signal. The first optical detection device is used to detect whether the first input optical waveguide 1.3 receives the first input optical signal; the second optical detection device detects whether the second input optical waveguide receives the second input optical signal. When the first input optical waveguide 1.3 receives the first input optical signal and the second input optical waveguide receives the second input optical signal, the first output LED generates a corresponding output optical signal and couples into the corresponding output optical waveguide 30 for output; or, when the first input optical waveguide 1.3 does not receive the first input optical signal or the second input optical waveguide does not receive the second input optical signal, the first output LED does not light up and no optical signal is output. That is, when there are optical signals in both input optical waveguides 10, the first output LED will light up and there will be an output optical signal output; in other cases, the first output LED cannot light up and no output optical signal is output.

[0075] In the above solution, the first photodetector and the second photodetector are in series connection. The input end of the first output LED is connected to the forward power supply end through the first bias resistor RLED2 and is also connected to the output end of the second detector.

[0076] In actual use, a complex logic operation is generally realized by combining and cascading multiple bias-enhanced optical signal logic circuits. At this time, the AND gate may be set in the first stage or the subsequent stage. When set in the first stage, it is necessary to set a first input LED and a second input LED before the first stage gate circuit to convert the two electrical signals to be operated into the first input optical signal and the second input optical signal, that is, the first input optical signal generated by the first input electrical signal Vin1 and the second input optical signal generated by the second input electrical signal Vin2. At this time, the optical signal generated by the first output LED of the previous stage will be coupled into the corresponding output optical waveguide 30 as the input optical signal of the next stage logic operation.

[0077] The following is an analysis based on the output of the first-stage gate circuit, that is, there is a resistor RLED1 for the first input LED and a resistor RLED2 for the second input LED:

[0078] When the first input optical signal and / or the second input optical signal does not exist in the first input optical waveguide 1.3 and the second input optical waveguide, that is, the first optical detection device and the second optical detection device do not detect the optical signal and generate an electrical signal, that is, when there is no voltage signal input, the corresponding first input LED and the second input LED are under the action of the first bias power supply Vcc and the configured first input LED resistor RLED1 and the second input LED resistor RLED2, and V1 and V2 are in a state slightly smaller than the turn-on voltage (defined as Vth) of the first input LED and the second input LED; similarly, the voltage Vout1 received by the first output LED is also slightly smaller than Vth. At this time, the first input LED, the second input LED, and the first output LED are not lit.

[0079] When the first input optical waveguide 1.3 and the second input optical waveguide have the first input optical signal and the second input optical signal, the first optical detector detects the first input optical signal and generates a corresponding electrical signal V1, the second optical detector detects the second input optical signal and generates a corresponding electrical signal V2, the first input LED and the second input LED are lit, and the corresponding first optical detector and the second optical detector are in a conducting state, so that the bias voltage of the first bias power supply can be applied to the resistor RPD1 of the first output LED to be lit, Vout is greater than Vth, and the first output LED is lit; when the input optical signal at any input end of the first input optical waveguide 1.3 and the second input optical waveguide is 0, the bias voltage of the first bias power supply will not be applied to the first output LED, Vout is less than Vth, and the first output LED is not lit. Thus, the above circuit realizes the AND gate function of optical input and optical output. In addition, the output first output LED corresponding to Vout will be introduced into the next-level logic circuit 20 by the output optical waveguide 30, and continue to participate in the logic calculation as an input optical signal.

[0080] In an alternative embodiment, referring to Figure 2 Taking the first input LED as an example, it includes a first light-emitting P-type region 1.1 (positive electrode of the LED) and a first light-emitting N-type region 1.4 (negative electrode of the LED); the first light-detecting device and the second light-detecting device are PIN-type light detectors, taking the first light-detecting device as an example, it includes a first detection P-type region 1.5 (negative electrode of the detector) and a first detection N-type region 1.2 (positive electrode of the detector); a first photoconductive region 1.3, one end of the first photoconductive region 1.3 is embedded in the hollow region of the first photodetector with a notch.

[0081] The first detection P-type region 1.5 and the first detection N-type region 1.2 cover the first photoconductive region 1.3, thereby covering the light transmission position and effectively preventing light signal crosstalk.

[0082] In the above scheme, since the voltage of the n-type region of the first photodetector device and the second photodetector device is greater than the voltage of the p-type region, when no optical waveguide light signal is received, it is equivalent to the diode being reverse biased and in an open circuit state; when the detector is irradiated with light, photogenerated carriers are generated in the detector, the detector resistance is greatly reduced, and photogenerated current is generated, which is close to the on state.

[0083] In an alternative embodiment, referring to Figure 3 As shown, when the logic circuit 20 is an OR gate, N is 2, and the input optical signal includes a third input optical signal and a fourth input optical signal; the N input optical waveguides 10 are respectively the third input optical waveguide 2.3 and the fourth input optical waveguide, the logic circuit 20 has a first input terminal and a second input terminal, the N optical detection devices are respectively the third optical detection device and the fourth optical detection device, the biased light-emitting device is the second output LED, and the bias circuit includes a second series resistor and a second bias resistor; the third optical detection device includes a detection terminal, an input terminal, a first output terminal, a second output terminal and a third output terminal, and the fourth optical detection device includes a detection terminal, a positive electrode input terminal and an output terminal.

[0084] The third input optical waveguide 2.3 is optically connected to the detection end of the third photodetector device, the fourth input optical waveguide is optically connected to the detection end of the fourth photodetector device, the positive electrode input end of the third photodetector device is connected to the positive power supply end through the second series resistor, and the output end of the third photodetector device is respectively connected to the input end of the second output LED and the second bias resistor; the positive electrode input end of the fourth photodetector device is connected to the positive power supply end through the second series resistor, and the output end of the fourth photodetector device is respectively connected to the input end of the second output LED and the first end of the second bias resistor; the input end of the second output LED is connected to the positive power supply end through the second bias resistor, and the output end of the second output LED is connected to the ground.

[0085] The third input optical waveguide 2.3 acquires and propagates the third input optical signal, the fourth input optical waveguide acquires and propagates the fourth input optical signal, and the third optical detector detects whether the third input optical waveguide 2.3 receives the third input optical signal. The fourth optical detector detects whether the fourth input optical waveguide receives the fourth input optical signal. The second output LED is used to generate a corresponding output optical signal and couple it into the corresponding output optical waveguide 30 for output when the third input optical waveguide 2.3 receives the third input optical signal or the fourth input optical waveguide receives the fourth input optical signal; or when the third input optical waveguide 2.3 does not receive the third input optical signal and the fourth input optical waveguide does not receive the fourth input optical signal, the first output LED is not lit, and no optical signal is output from the third input optical waveguide 2.3 or the fourth input optical waveguide.

[0086] In the above solution, the third photodetector and the fourth photodetector are in parallel.

[0087] In actual use, a plurality of bias-enhanced optical signal logic circuits are generally combined and cascaded to realize complex logic operations. In this case, the OR gate may be set in the first stage or the subsequent stage. When set in the first stage, a third input LED and a fourth input LED need to be set before the first stage gate circuit to convert the two electrical signals to be operated into the third input optical signal and the fourth input optical signal, that is, the third input optical signal generated by the third input electrical signal Vin3 and the fourth input optical signal generated by the fourth input electrical signal Vin4. At this time, the optical signal generated by the first output LED of the previous stage will be coupled into the corresponding output optical waveguide 30 as the input optical signal of the next stage logic operation.

[0088] The following is an analysis based on the output of the first-stage gate circuit, that is, there is a resistor RLED3 of the third input LED and a resistor RLED4 of the fourth input LED:

[0089] When the third input optical waveguide 2.3 and the fourth input optical waveguide do not have the third input optical signal and the fourth input optical signal, that is, the third optical detection device and the fourth optical detection device do not detect the optical signal and generate an electrical signal, that is, when there is no voltage signal input, the corresponding third input LED and the fourth input LED are under the action of the second bias power supply Vcc2 and the configured third input LED resistor RLED3 and the fourth input LED resistor RLED4, V3 and V4 are in a state slightly smaller than the turn-on voltage (defined as Vth) of the third input LED and the third input LED; similarly, the voltage Vout2 received by the second output LED is also slightly smaller than Vth. At this time, the third input LED, the fourth input LED and the second output LED are not lit.

[0090] When there is a third input optical signal in the third input optical waveguide 2.3 and / or a fourth input optical signal in the fourth input optical waveguide, the third optical detector detects the third input optical signal and generates a corresponding electrical signal V3 and / or the fourth optical detector detects the fourth input optical signal and generates a corresponding electrical signal V4. Since the third optical detector and the fourth optical detector are in parallel, as long as there is at least one input optical signal in the third input optical waveguide 2.3 or the fourth input optical waveguide, the parallel branch where the corresponding optical detector is located is in a conducting state, so that the bias voltage of the second bias power supply Vcc2 can be applied to the resistor RPD4 of the second output LED to be lit, Vout2 is greater than Vth, and the second output LED is lit; when the input optical signal at the input end of the third input optical waveguide 2.3 and the fourth input optical waveguide is 0, the bias voltage of the second bias power supply will not be applied to the second output LED, Vout2 is less than Vth, and the second output LED is not lit. Thus, the above circuit realizes the OR gate function of optical input and optical output. In addition, the light emitted by the output second output LED corresponding to Vout2 will be introduced into the next-level logic circuit 20 by the output optical waveguide 30 and continue to participate in logic calculation as an input optical signal.

[0091] In an alternative embodiment, referring to Figure 3 As shown, taking the third input LED as an example, it includes a third light-emitting P-type region 2.1 (anode of the LED) and a third light-emitting N-type region 2.4 (cathode of the LED); the third light-detecting device and the fourth light-detecting device are PIN-type light detectors, taking the third light-detecting device as an example, it includes a third detection P-type region 2.5 (cathode of the detector) and a third detection N-type region 2.2 (anode of the detector). One end of the third photoconductive region 2.3 is embedded in the hollow region of the third light detector with a notch.

[0092] The third photoconductive region 2.3 is covered by the third detection P-type region 2.5 and the third detection N-type region 2.2, so that the light transmission position can be covered, thereby effectively preventing optical signal crosstalk.

[0093] Optionally, the third photodetecting device and the fourth photodetecting device may adopt an MSM type or a PIN type detector structure.

[0094] In the above scheme, since the voltage of the n-type region of the third photodetector device and the fourth photodetector device is greater than the voltage of the p-type region, when no optical waveguide light signal is received, it is equivalent to the diode being reverse biased and in an open circuit state; when the detector is irradiated with light, photogenerated carriers are generated in the detector, the detector resistance is greatly reduced, and photogenerated current is generated, which is close to the on state.

[0095] In an alternative embodiment, referring to Figure 4As shown, when the logic circuit 20 is a NOT gate, N is 1, the N input optical waveguides 10 are the fifth input optical waveguide 3.3, the input optical signal includes the fifth input optical signal, the logic circuit 20 has a first input end, the N optical detection devices are the fifth optical detection devices, and the biased light-emitting device is the third output LED; the fifth optical detection device includes a detection end, a positive electrode input end and an output end; and the bias circuit includes a third bias resistor.

[0096] The fifth input optical waveguide 3.3 is optically connected to the detection end of the fifth photodetector device, the positive electrode input end of the fifth photodetector device is electrically connected to the fifth input optical waveguide 3.3, and is connected to the forward power supply end through the third bias resistor; the electrode output end of the fifth photodetector device is connected to the ground; the input end of the third output LED is connected to the forward power supply end through the third bias resistor, and is also connected to the input end of the fifth photodetector; the output end of the third output LED is connected to the ground.

[0097] Among them, the fifth input optical waveguide 3.3 acquires and transmits the fifth input optical signal, the fifth optical detection device detects whether the fifth input optical waveguide 3.3 receives the fifth input optical signal, and the third output LED does not light up when the fifth input optical waveguide 3.3 receives the fifth input optical signal; or when the fifth input optical waveguide 3.3 does not receive the fifth input optical signal, the first output LED lights up to generate an optical signal to output the fifth input optical waveguide 3.3.

[0098] In the above scheme, the fifth photodetector is connected in parallel with the third output LED, and the resistance of the fifth input LED is adjusted so that when the fifth photodetector is not turned on, the voltage loaded across the third output LED is greater than V th , thereby lighting up the third output LED, that is, when the fifth input optical waveguide 3.3 does not have the fifth input optical signal Vin5, the fifth optical detection device does not detect the optical signal and generate an electrical signal, that is, when there is no voltage signal input to V5, the corresponding third output LED is under the action of the third bias power supply Vcc3 and the configured fifth input LED resistor RLED5, and Vout3 is in a state greater than the turn-on voltage (defined as Vth) of the fifth input LED.

[0099] When the fifth input optical signal is present in the fifth input optical waveguide 3.3, the fifth optical detector detects the optical signal and generates an electrical signal, that is, when there is a voltage signal input, the resistance of the fifth optical detector decreases. Since the third output LED is connected in parallel with the fifth optical detector, according to the parallel resistance formula, the voltage borne by the resistor RPD3 of the third output LED will also decrease accordingly, making Vout3 less than Vth, and the third output LED goes out. Thus, the above circuit realizes the NOT gate function of optical input and optical output. In addition, the light emitted by the output third output LED corresponding to Vout will be introduced into the next-level logic circuit 20 by the output optical waveguide 30, and continue to participate in the logic calculation as an input optical signal.

[0100] In an alternative embodiment, referring to Figure 4 As shown, taking the fifth input LED as an example, it includes a fifth light-emitting P-type region 3.1 (anode of the LED) and a fifth light-emitting N-type region 3.4 (cathode of the LED); the fifth light-detecting device includes a fifth detection P-type region 3.5 (cathode of the detector) and a fifth detection N-type region 3.2 (anode of the detector). One end of the fifth photoconductive region 3.3 is embedded in the hollow region of the fifth light detector with a notch.

[0101] The fifth photoconductive region 3.3 is covered by the fifth detection P-type region 3.5 and the fifth detection N-type region 3.2, so that the light transmission position can be covered, and the optical signal crosstalk can be effectively prevented.

[0102] Among them, by using the above-mentioned covering setting, the light transmission position is covered, which can effectively prevent optical signal crosstalk.

[0103] In the above scheme, since the voltage of the n-type region of the fifth photodetector is greater than the voltage of the p-type region, it is equivalent to the reverse bias of the diode when no optical waveguide light signal is received, and is in an open circuit state; when the detector is irradiated with light, photogenerated carriers are generated in the detector, the detector resistance is greatly reduced, and photogenerated current is generated, which is close to the on state.

[0104] Optionally, the N-type region is an N-type doped region, which is an impurity semiconductor whose free electron concentration is much greater than the hole concentration; the P-type region is a P-type doped region, which is an impurity semiconductor whose hole concentration is greater than the free electron concentration.

[0105] In an optional embodiment, each optical waveguide, light emitting device and light detecting device has the same homogeneous integrated nitride epitaxial structure and belongs to a homogeneous integrated chip.

[0106] Optionally, the fifth photodetecting device and the sixth photodetecting device may adopt an MSM type or a PIN type detector structure.

[0107] Optionally, the type of the optical detection device can also be any one of a photoconductive type, a Schottky type, an MSM type, a PIN type, a HEMT type, and a triode type. The optical detection device includes a circuit input end, a circuit output end, and a photoconductive region, one end of the photoconductive region is configured as a hollow region with a notch; the hollow region can partially cover the input optical waveguide 10 structure corresponding thereto, so that the detector efficiently receives the optical signal and prevents the optical signal from leaking.

[0108] When there is no optical signal in the optical waveguide area covered by the hollow area of ​​the optical detection device, the circuit input end and the circuit output end of the optical detection device are disconnected; when there is an optical signal in the optical waveguide area covered by the hollow area, the circuit input end and the circuit output end of the optical detection device are connected.

[0109] Optionally, the bias rule is determined by the specific gate circuit structure recorded in the above bias enhanced optical signal logic circuit, and the specific reference is as follows:

[0110] When the logic circuit is an AND gate, the input voltage of the first output LED is V out1 , a bias (current limiting) resistor R is connected in series with the bias power supply Vcc LED2 ; The voltage drop of the first detector and the voltage drop of the second detector are Vx -1 and Vx -2 , and the detector bias resistor R PD1 The first detector and the second detector are connected in series, and the voltage drop across them is Vx -RPD1 ; The critical voltage (conduction voltage drop) of LED is recorded as V th , the conduction current is recorded as 2mA; when there is no light signal input, since the detector resistance is very high, Vx approaches infinity, which is close to a short circuit; and due to the bias (current limiting) resistor R LED2 >(Vcc-Vth) / 2mA exists, V out1 <V th , causing the first output LED to be unable to turn on; when there is an optical signal input, the detector resistance decreases as the input optical signal increases, and the detector voltage drop Vx also decreases accordingly, then V out1 It will increase with the increase of light signal intensity. At this time, V out1 =Vcc-(Vx -RPD1 +Vx -1 +Vx -2 ), with Vx -1 and Vx -2 Lower, V out1 It will increase to be greater than Vth, and the first output LED will turn on and light up.

[0111] When the logic circuit is an OR gate, the input voltage of the second output LED is V out2 , a bias (current limiting) resistor R is connected in series with the bias power supply VccLED4 ; The voltage drops of the third detector and the fourth detector are Vx -3 and Vx -4 However, since the third detector and the fourth detector are connected in parallel, Vx -3 =Vx -4 ; Detector bias resistor R PD2 Connected in series with the third detector and the fourth detector respectively, the voltage drop across them is Vx -RPD2 , let the critical voltage (conduction voltage drop) of LED turn on be V th , the conduction current is 2mA; when there is no light signal input, the corresponding detector resistance is very high, the corresponding Vx approaches infinity, and is approximately open circuit; when there is a light signal input, the corresponding Vx decreases accordingly. Therefore, when there is no light signal input to the OR gate, due to the bias (current limiting) resistor R LED4 >(Vcc-Vth) / 2mA exists, V out2 <V th , the second output LED cannot be turned on; when the third or fourth detector receives a light signal, or when both detectors receive a light signal, Vx -3 or Vx -4 As the light signal intensity increases, it decreases. At this time, V out2 =Vcc-(Vx -RPD2 +Vx -4 ), with Vx -3 or Vx -4 Lower, V out2 will increase to be greater than Vth, so the second output LED is turned on.

[0112] When the logic circuit is a NOT gate, the output voltage of the third output LED is V out3 , and the third output LED is connected in parallel with the fifth detector, and the third output LED and the fifth detector are connected with the bias (current limiting) resistor R PD3 Connect in series, and set the critical voltage (conduction voltage drop) of LED to be V th , the conduction current is 2mA; when there is no light signal in the NOT gate, the resistance of the fifth detector is extremely high, which is approximately an open circuit, because the bias (current limiting) resistor R PD3 <(Vcc-Vth) / 2mA, resulting in V out3 >V th , the third output LED is turned on and lights up; when there is a light signal input in the NOT gate, the fifth detector decreases as the light signal increases. Since the detector and the output LED are in parallel, V out3 The current at the node increases, R PD3 Voltage drop Vx -RPD3 As a result, V out3 =Vcc-Vx -RPD3 , follow Vx-RPD3 Increase, V out3 Lower, when V out3 When <Vth, the third output LED cannot light up.

[0113] The present application also proposes an optical transmission logic system, referring to Figure 5 As shown, the optical transmission logic system includes an electro-optical conversion circuit and at least one bias-enhanced optical signal logic circuit as above, the electro-optical conversion circuit includes at least one input LED circuit, the input optical waveguide 10 of the bias-enhanced optical signal logic circuit is arranged one-to-one with the input LED circuit, and is optically connected.

[0114] The electro-optical conversion circuit converts the original electrical signal into an optical signal as the input optical signal of the bias-enhanced optical signal logic circuit, and outputs the optical signal after performing logic calculations through the bias-enhanced optical signal logic circuit.

[0115] It should be noted that, since the optical transmission logic system of the present application can implement all embodiments of the bias-enhanced optical signal logic circuit, the optical transmission logic system of the present application has all the beneficial effects of the bias-enhanced optical signal logic circuit, which will not be repeated here.

[0116] Optionally, the optical transmission logic system further includes an optoelectronic conversion circuit and a multi-stage cascaded logic operation branch, each stage of the logic operation branch includes at least one bias-enhanced optical signal logic circuit as described above; the output optical waveguide 30 of the bias-enhanced optical signal logic circuit of the N+1-stage logic operation branch is connected one-to-one with the input optical waveguide 10 of the bias-enhanced optical signal logic circuit of the N+2-stage logic operation branch. The electro-optical conversion circuit includes a multi-channel input LED circuit; the optoelectronic conversion circuit includes a multi-channel output LED circuit. The input optical waveguide 10 of the first-stage logic operation branch is connected to the input LED circuit V in1 -V inx One-to-one connection: the output optical waveguide 30 of the final-stage logic operation branch is connected one-to-one with the output LED circuit.

[0117] The electro-optical conversion circuit is used to convert the initial electrical signal into an optical signal as the input optical signal of the first-stage logic operation branch, and transmit it through the optical waveguide into the multi-stage cascaded logic operation branch of the subsequent stage for logical calculation to obtain the result signal. The photoelectric conversion circuit converts the result signal into an electrical signal for output.

[0118] The optical signal carried by the output photoconductor of the optical signal logic operation circuit (as shown in 5.1) is detected by the sixth detector (composed of the sixth detector N-type region 5.2 and the sixth detector P-type region 5.3). When there is no optical signal in 5.1, the resistance of the sixth detector is infinite in theory and is in an open circuit state. The corresponding output voltage ( Figure 5Medium V out1 ) is 0; when there is a light signal in 5.1, the sixth detector is in the on state (assuming its on resistance is R p6 ), then V out1 The voltage is V cc R out1 / (R p6 +R out1 ). Based on this, the optical signal in the optical signal logic operation circuit can be converted into an electrical signal. In addition, each output LED circuit can also be provided with an output resistor, such as R out1- R outx .

[0119] The algorithms or displays provided herein are not inherently related to any particular computer, virtual system or other device. In addition, the embodiments of the present invention are not directed to any particular programming language.

[0120] In the description provided herein, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. Similarly, in order to simplify the present invention and help understand one or more of the various inventive aspects, in the above description of exemplary embodiments of the present invention, the various features of the embodiments of the present invention are sometimes grouped together into a single embodiment, figure, or description thereof. Wherein, the claims that follow the specific embodiment are hereby expressly incorporated into the specific embodiment, wherein each claim itself is a separate embodiment of the present invention.

[0121] Those skilled in the art will appreciate that the modules in the devices in the embodiments may be adaptively changed and arranged in one or more devices different from the embodiments. The modules or units or components in the embodiments may be combined into one module or unit or component, and further may be divided into a plurality of submodules or subunits or subcomponents. Except that at least some of such features and / or processes or units are mutually exclusive.

[0122] It should be noted that the above embodiments illustrate the present invention rather than limit it, and that those skilled in the art may design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference symbol between brackets shall not be construed as a limitation on the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "one" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present invention may be implemented by means of hardware comprising a number of different elements and by means of a suitably programmed computer. In a unit claim enumerating a number of devices, several of these devices may be embodied by the same hardware item. The use of the words first, second, and third, etc. does not indicate any order. These words may be interpreted as names. The steps in the above embodiments, unless otherwise specified, should not be understood as limitations on the order of execution.

Claims

1. A bias-enhanced optical signal logic circuit, It is characterized in that The bias enhanced optical signal logic circuit comprises: N input optical waveguides, each of which is used to obtain an input optical signal, and N is a natural number greater than or equal to 1; A logic circuit having N input terminals, wherein the N input terminals of the logic circuits are connected one-to-one to the N input optical waveguides, and are used to respectively receive the N input optical signals from the N input optical waveguides, convert the N input optical signals into a corresponding number of N electrical signals, and then perform a logic operation on the input N electrical signals according to a calculation rule of the logic circuit to obtain a corresponding logic operation result signal; and output a corresponding output optical signal according to the logic operation result signal, so as to bias the driving voltage of the output optical signal according to a preset bias rule so that the intensity of the output optical signal is higher than or equal to each of the input optical signals; The output optical waveguide is used to output the output optical signal.

2. The bias-enhanced optical signal logic circuit according to claim 1, It is characterized in that The logic circuit includes N light detection devices, a bias circuit and a biased light emitting device; The N optical detection devices are used to convert the input optical signal transmitted by the input optical waveguide into an electrical signal, and perform logic calculation on the N electrical signals according to the logic calculation rule of the circuit composed of the N optical detection devices to obtain the logic operation result signal; The biased light emitting device is used to output a corresponding output light signal according to the logic operation result signal, and bias the driving voltage of the output light signal according to the bias rule of the bias circuit so that the intensity of the output light signal is higher than or equal to the input light signal.

3. The bias-enhanced optical signal logic circuit according to claim 2, It is characterized in that When the logic circuit is an AND gate, N is 2, the N input optical waveguides are respectively a first input optical waveguide and a second input optical waveguide, the N input terminals of the logic circuit are respectively a first input terminal and a second input terminal, the N optical detection devices are respectively a first optical detection device and a second optical detection device, the biased light emitting device is a first output LED, and the bias circuit includes a first series resistor and a first bias resistor; The first optical detection device includes a detection end, a positive electrode input end and an output end, and the second optical detection device includes a detection end, a positive electrode input end and an output end; the first optical detection device and the second optical detection device are connected in series on the bias circuit; the input optical signal includes a first input optical signal and a second input optical signal; The first input optical waveguide is optically connected to the detection end of the first optical detection device, the second input optical waveguide is optically connected to the detection end of the second optical detection device, the positive electrode input end of the first optical detection device is connected to the positive power supply end through the first series resistor, the output end of the first optical detection device is connected to the input end of the second optical detection device; the output end of the second optical detection device is respectively connected to the input end of the first output LED and the first end of the first bias resistor; the second end of the first bias resistor is connected to the positive power supply end; the input end of the second output LED is connected to the positive power supply end through the second bias resistor, and the output end of the first output LED is connected to the ground; the optical signal generated by the first output LED will be coupled into the corresponding output optical waveguide; The first input optical waveguide is used to acquire and propagate the first input optical signal; The second input optical waveguide is used to acquire and propagate the second input optical signal; The first optical detection device is used to detect whether the first input optical waveguide receives the first input optical signal; The second optical detection device is used to detect whether the second input optical waveguide receives a second input optical signal; A first output LED, configured to generate a corresponding output optical signal and couple into a corresponding output optical waveguide for output when the first input optical waveguide receives a first input optical signal and the second input optical waveguide receives a second input optical signal; Alternatively, when the first input optical waveguide does not receive the first input optical signal or the second input optical waveguide does not receive the second input optical signal, the first output LED does not light up and no optical signal is output.

4. The bias-enhanced optical signal logic circuit according to claim 2, It is characterized in that When the logic circuit is an OR gate, N is 2, the input optical signal includes a third input optical signal and a fourth input optical signal; the N input optical waveguides are respectively the third input optical waveguide and the fourth input optical waveguide, the logic circuit has a first input end and a second input end, the N optical detection devices are respectively the third optical detection device and the fourth optical detection device, the biased light emitting device is a second output LED, and the bias circuit includes a second series resistor and a second bias resistor; The third input optical waveguide is optically connected to the detection end of the third optical detection device, the fourth input optical waveguide is optically connected to the detection end of the fourth optical detection device, the positive electrode input end of the third optical detection device is connected to the positive power supply end through the second series resistor, and the output end of the third optical detection device is respectively connected to the input end of the second output LED and the second bias resistor; the positive electrode input end of the fourth optical detection device is connected to the positive power supply end through the second series resistor, and the output end of the fourth optical detection device is respectively connected to the input end of the second output LED and the first end of the second bias resistor; the input end of the second output LED is connected to the positive power supply end through the second bias resistor, and the output end of the second output LED is connected to the ground; The optical signal generated by the second output LED will be coupled into the corresponding output optical waveguide; The third input optical waveguide is used to acquire and propagate the third input optical signal; The fourth input optical waveguide is used to obtain and propagate the fourth input optical signal; The third optical detection device is used to detect whether the third input optical waveguide receives a third input optical signal; The fourth optical detection device is used to detect whether the fourth input optical waveguide receives a fourth input optical signal; The second output LED is used to generate a corresponding output optical signal and couple it into the corresponding output optical waveguide for output when the third input optical waveguide receives the third input optical signal or the fourth input optical waveguide receives the fourth input optical signal; Alternatively, when the third input optical waveguide does not receive the third input optical signal and the fourth input optical waveguide does not receive the fourth input optical signal, the first output LED does not light up and no optical signal is output.

5. The bias-enhanced optical signal logic circuit according to claim 2, It is characterized in that When the logic circuit is a NOT gate, N is 1, the N input optical waveguides are fifth input optical waveguides, the input optical signal includes a fifth input optical signal, the logic circuit has a first input terminal, the N optical detection devices are fifth optical detection devices; the biased light emitting device is a third output LED; the bias circuit includes a third bias resistor; The fifth input optical waveguide is optically connected to the detection end of the fifth photodetector, the positive electrode input end of the fifth photodetector is electrically connected to the fifth input optical waveguide, and is connected to the positive power supply end through the third bias resistor; the electrode output end of the fifth photodetector is connected to the ground; the input end of the third output LED is connected to the positive power supply end through the third bias resistor, and is also connected to the input end of the fifth photodetector; the output end of the third output LED is connected to the ground; The fifth input optical waveguide is used to obtain and propagate the fifth input optical signal; The fifth optical detection device is used to detect whether the fifth input optical waveguide receives a fifth input optical signal; The third output LED is configured to not light up when the fifth input optical waveguide receives the fifth input optical signal; Alternatively, when the fifth input optical waveguide does not receive the fifth input optical signal, the first output LED lights up to generate an optical signal output.

6. The bias-enhanced optical signal logic circuit according to any one of claims 3 to 5, It is characterized in that The type of the optical detection device is any one of a photoconductive type, a Schottky type, an MSM type, a PIN type, a HEMT type, and a triode type. The optical detection device comprises a circuit input end, a circuit output end, and a photoconductive region. One end of the photoconductive region is configured as a hollow region with a notch; the hollow region can partially cover the corresponding input optical waveguide structure, so that the detector efficiently receives the optical signal and prevents the optical signal from leaking. When there is no optical signal in the optical waveguide area covered by the hollow area of ​​the optical detection device, the circuit input end and the circuit output end of the optical detection device are disconnected; when there is an optical signal in the optical waveguide area covered by the hollow area, the circuit input end and the circuit output end of the optical detection device are connected.

7. The bias-enhanced optical signal logic circuit according to claim 2, It is characterized in that Each of the optical waveguide, the light emitting device and the light detecting device has the same homogeneous integrated nitride epitaxial structure and belongs to a homogeneous integrated chip.

8. The bias-enhanced optical signal logic circuit optical transmission logic system as claimed in claim 6, It is characterized in that The bias rule is determined by the specific gate circuit structure recorded in the bias-enhanced optical signal logic circuit according to any one of claims 3 to 5; When the logic circuit is an AND gate, the input voltage of the first output LED is V out1 , a bias (current limiting) resistor R is connected in series with the bias power supply Vcc LED2 ; The voltage drop of the first detector and the voltage drop of the second detector are Vx -1 and Vx -2 , and the detector bias resistor R PD1 The first detector and the second detector are connected in series, and the voltage drop across them is Vx -RPD1 ; The critical voltage (conduction voltage drop) of LED is recorded as V th , the conduction current is recorded as 2mA; when there is no light signal input, since the detector resistance is very high, Vx approaches infinity, which is close to a short circuit; and due to the bias (current limiting) resistor R LED2 >(Vcc-Vth) / 2mA exists, V out1 <V th , causing the first output LED to be unable to turn on; when there is an optical signal input, the detector resistance decreases as the input optical signal increases, and the detector voltage drop Vx also decreases accordingly, then V out1 It will increase with the increase of light signal intensity. At this time, V out1 =Vcc-(Vx -RPD1 +Vx -1 +Vx -2 ), with Vx -1 and Vx -2 Lower, V out1 It will increase to be greater than Vth, and the first output LED will turn on; When the logic circuit is an OR gate, the input voltage of the second output LED is V out2 , a bias (current limiting) resistor R is connected in series with the bias power supply Vcc LED4 ; The voltage drops of the third detector and the fourth detector are Vx -3 and Vx -4 However, since the third detector and the fourth detector are connected in parallel, Vx -3 =Vx -4 ; Detector bias resistor R PD2 Connected in series with the third detector and the fourth detector respectively, the voltage drop across them is Vx -RPD2 , let the critical voltage (conduction voltage drop) of LED turn on be V th , the conduction current is 2mA; when there is no light signal input, the corresponding detector resistance is very high, the corresponding Vx approaches infinity, and is approximately open circuit; when there is a light signal input, the corresponding Vx decreases accordingly. Therefore, when there is no light signal input to the OR gate, due to the bias (current limiting) resistor R LED4 >(Vcc-Vth) / 2mA exists, V out2 <V th , the second output LED cannot be turned on; when the third or fourth detector receives a light signal, or when both detectors receive a light signal, Vx -3 or Vx -4 As the light signal intensity increases, it decreases. At this time, V out2 =Vcc-(Vx -RPD2 +Vx -4 ), with Vx -3 or Vx -4 Lower, V out2 It will increase to be greater than Vth, so the second output LED turns on; When the logic circuit is a NOT gate, the output voltage of the third output LED is V out3 , and the third output LED is connected in parallel with the fifth detector, and the third output LED and the fifth detector are connected with the bias (current limiting) resistor R PD3 Connect in series, and set the critical voltage (conduction voltage drop) of LED to be V th , the conduction current is 2mA; when there is no light signal in the NOT gate, the resistance of the fifth detector is extremely high, almost open circuit, due to the bias (current limiting) resistor R PD3 <(Vcc-Vth) / 2mA, resulting in V out3 >V th , the third output LED is turned on and lights up; when there is a light signal input in the NOT gate, the fifth detector decreases as the light signal increases. Since the detector and the output LED are in parallel, V out3 The current at the node increases, R PD3 Voltage drop Vx -RPD3 As a result, V out3 =Vcc-Vx -RPD3 , follow Vx -RPD3 Increase, V out3 Lower, when V out3 When <Vth, the third output LED cannot light up.

9. An optical transmission logic system, It is characterized in that The optical transmission logic system comprises an electro-optical conversion circuit and at least one bias-enhanced optical signal logic circuit as claimed in any one of claims 1 to 8, wherein the electro-optical conversion circuit comprises at least one input LED circuit, and the input optical waveguide of the bias-enhanced optical signal logic circuit is arranged one-to-one with the input LED circuit and is optically connected; The electro-optical conversion circuit is used to convert the original electrical signal into an optical signal as the input optical signal of the bias-enhanced optical signal logic circuit, and output the optical signal after performing logic calculation through the bias-enhanced optical signal logic circuit.

10. The optical transmission logic system as claimed in claim 9, It is characterized in that The optical transmission logic system further comprises a photoelectric conversion circuit and a multi-stage cascaded logic operation branch, each stage of the logic operation branch comprises at least one bias-enhanced optical signal logic circuit as claimed in any one of claims 1 to 8; the output optical waveguide of the bias-enhanced optical signal logic circuit of the logic operation branch of the N+1 stage is connected one-to-one with the input optical waveguide of the bias-enhanced optical signal logic circuit of the logic operation branch of the N+2 stage; The electro-optical conversion circuit includes a multi-channel input LED circuit; The photoelectric conversion circuit includes a multi-channel output LED circuit; The input optical waveguide of the first-stage logic operation branch is connected one-to-one with the input LED circuit, and the output optical waveguide of the last-stage logic operation branch is connected one-to-one with the output LED circuit; The electro-optical conversion circuit is used to convert the initial electrical signal into an optical signal as the input optical signal of the first-stage logic operation branch, and transmit it through the optical waveguide into the multi-stage cascaded logic operation branch of the subsequent stage to perform logic calculation to obtain a result signal; The photoelectric conversion circuit is used to convert the result signal into an optical signal for output.

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