Driver chip based on GaAs technology

Abstract

The invention discloses a driver chip based on a GaAs process, which comprises a level conversion unit, a first phase inverter unit, a second phase inverter unit, a third phase inverter unit, a fourth phase inverter unit, a fifth phase inverter unit, a signal input port, a first output port and a second output port, after passing through the level conversion unit, the first inverter unit and the second inverter unit in sequence, the signal is divided into two paths, and one path passes through the third inverter unit and is output from the first output port; and the other path passes through the fourth inverter unit and the fifth inverter unit and is output from the second output port. According to the circuit system, an input + 5V / 0V or + 3.3 V / 0V level signal can be converted into two 0V / -5V level signals which are opposite to each other to be output, and the problems that in an existing circuit system, level conversion is not universal, and precision and efficiency are low are solved.

Description

Technical Field

[0001] The present invention relates to the field of level conversion drivers, and more particularly to a driver chip based on GaAs technology. Background Art

[0002] The level driver is an important component in the electronic system. Its main function is to convert the input level signal into a level signal suitable for the circuit. This conversion is widely used in many fields such as digital circuits, computer hardware control, and electronic system control. In particular, the level control in the electronic system is complex, with different control modes such as +5V / 0V (+5V high level and 0V low level), +3.3V / 0V (+3.3V high level and 0V low level) control, but the current GaAs process switch tubes are mostly D tubes, which require 0V / -5V (0V high level and -5V low level) for control. Therefore, a universal, high-precision and high-efficiency level driver is needed to provide the circuit with the required specific level signal in order to realize the logic function of the circuit. Summary of the invention

[0003] The purpose of the present invention is to provide a driver chip based on GaAs technology, which can solve the problems of non-universal level conversion, low precision and efficiency in existing circuit systems.

[0004] To solve at least one of the above problems, one aspect of the present invention provides a driver chip based on GaAs process, comprising a level conversion unit, a first inverter unit, a second inverter unit, a third inverter unit, a fourth inverter unit, a fifth inverter unit, a signal input port, a first output port, and a second output port.

[0005] The input level signal is input from the input port, and after passing through the level conversion unit, the first inverter unit, and the second inverter unit in sequence, it is divided into two paths, one of which passes through the third inverter unit and is output from the first output port; the other passes through the fourth inverter unit and the fifth inverter unit and is output from the second output port;

[0006] The level conversion unit is used to convert the input level signal into a level signal that can be recognized by the first inverter unit;

[0007] The first inverter unit is used to identify the level signal output by the level conversion unit and convert it into a first standard level signal;

[0008] The second inverter unit is used to identify the level signal output by the first inverter unit and convert it into a second standard level signal;

[0009] The third inverter unit is used to invert the level signal output by the second inverter unit and output it from the first output port, and can isolate the interference of the level signal of the first output port on the second output port;

[0010] The fourth inverter unit and the fifth inverter unit are used to output the level signal output by the second inverter unit from the second output port in phase, and can isolate the interference of the level signal of the second output port on the first output port.

[0011] Preferably, the input level signal is a +5V / 0V or +3.3V / 0V level signal, the first standard level signal is a relatively standard 0V / -5V level signal, and the second standard level signal is a standard 0V / -5V level signal.

[0012] Preferably, the level conversion unit includes a first resistor, a second resistor, a first Schottky diode, a second Schottky diode, a third Schottky diode, a fourth Schottky diode, a fifth Schottky diode, a sixth Schottky diode, and a seventh Schottky diode.

[0013] Among them, the first port of the first resistor serves as the signal input port of the level conversion unit; the second port of the first resistor is connected to the first port of the first Schottky diode; the second port of the first Schottky diode is connected to the first port of the second Schottky diode; the second port of the second Schottky diode is connected to the first port of the third Schottky diode; the second port of the third Schottky diode is connected to the first port of the fourth Schottky diode; the second port of the fourth Schottky diode is connected to the first port of the fifth Schottky diode; the second port of the fifth Schottky diode is connected to the first port of the sixth Schottky diode; the second port of the sixth Schottky diode is connected to the first port of the seventh Schottky diode; the second port of the seventh Schottky diode is connected to the first port of the eighth Schottky diode; the second port of the eighth Schottky diode is connected to the first port of the second resistor and serves as the signal output port of the level conversion unit; the second port of the second resistor is connected to the first voltage.

[0014] Preferably, the first inverter unit, the second inverter unit, the third inverter unit, the fourth inverter unit, and the fifth inverter unit have the same structure, and all include a first transistor, a second transistor, and a third resistor.

[0015] The drain of the first transistor is connected to the second voltage; the source of the first transistor is connected to the first port of the third resistor; the gate of the first transistor is connected to the second port of the third resistor and the drain of the second transistor and serves as a signal output port of each inverter unit; the source of the second transistor is connected to the first voltage; the gate of the second transistor serves as a signal input port of each inverter unit.

[0016] The GaAs driver chip according to the above aspect of the present invention can realize universal level control based on GaAs process chips in a circuit system, while improving the accuracy and efficiency of level control. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a schematic structural diagram of a driver chip based on GaAs process according to an embodiment of the present invention;

[0018] Figure 2 is a circuit topology diagram of a level conversion unit of a driver chip according to an embodiment of the present invention;

[0019] Figure 3 It is a circuit topology diagram of an inverter unit of a driver chip according to an embodiment of the present invention. DETAILED DESCRIPTION

[0020] In order to more clearly illustrate the present invention, the present invention is further described below in conjunction with preferred embodiments and accompanying drawings. Similar components in the accompanying drawings are represented by the same reference numerals. It should be understood by those skilled in the art that the content specifically described below is illustrative rather than restrictive, and should not be used to limit the scope of protection of the present invention.

[0021] The embodiment of the present invention provides a driver chip based on GaAs process. Figure 1 FIG. 1 is a structural diagram of a driver chip based on GaAs process according to an embodiment of the present invention. Figure 1 As shown, a driver chip based on GaAs process according to an embodiment of the present invention includes a level conversion unit, a first inverter unit, a second inverter unit, a third inverter unit, a fourth inverter unit, a fifth inverter unit, a signal input port IN, a first output port OUT1, and a second output port OUT2. The first to fifth inverter units have the same structure and are collectively referred to as inverter units hereinafter.

[0022] The input signal is input from the input port IN, and after passing through the level conversion unit, the first inverter unit, and the second inverter unit in sequence, the signal is divided into two paths. One path passes through the third inverter unit and is output from the first output port OUT1; the other path passes through the fourth inverter unit and the fifth inverter unit and is output from the second output port OUT2.

[0023] The level conversion unit can convert the input +5V / 0V or +3.3V / 0V level signal (input level signal) into a level signal that can be recognized by the inverter unit;

[0024] The first inverter unit can identify the level signal output by the level conversion unit and convert it into a relatively standard 0V / -5V level signal (first standard level signal);

[0025] The second inverter unit can identify the level signal output by the first inverter unit and convert it into a standard 0V / -5V level signal (a second standard level signal);

[0026] The third inverter unit can invert the level signal output by the second inverter unit and output it from the first output port OUT1, and can also isolate the interference of the level signal of the first output port OUT1 on the second output port OUT2;

[0027] The fourth inverter unit and the fifth inverter unit can output the level signal output by the second inverter unit from the second output port OUT2 in phase, and can also isolate the interference of the level signal of the second output port OUT2 on the first output port OUT1.

[0028] According to the driver chip based on GaAs process of the above embodiment of the present invention, the level conversion unit can convert multiple defined level signals into level signals that can be recognized by the inverter unit, realizing the universalization of level control based on GaAs process chip in the electronic system. At the same time, the first inverter unit and the second inverter unit are added to increase the accuracy of level control; the third inverter unit, the fourth inverter unit, and the fifth inverter unit are added to isolate the mutual crosstalk of the output level, thereby increasing the level output capability.

[0029] The level conversion unit and the inverter unit are described in detail below.

[0030] Level Shifter

[0031] The level conversion unit is used to convert input level signals of different definitions into level signals that can be accurately recognized by the inverter unit. Figure 2 FIG. 1 is a circuit topology diagram of a level conversion unit of a driver chip according to an embodiment of the present invention. Figure 2 As shown, the level conversion unit includes a first resistor R1, a second resistor R2, a first Schottky diode D1, a second Schottky diode D2, a third Schottky diode D3, a fourth Schottky diode D4, a fifth Schottky diode D5, a sixth Schottky diode D6, and a seventh Schottky diode D7.

[0032] Among them, the first port of the first resistor R1 serves as the signal input port of the level conversion unit; the second port of the first resistor R1 is connected to the first port of the first Schottky diode D1; the second port of the first Schottky diode D1 is connected to the first port of the second Schottky diode D2; the second port of the second Schottky diode D2 is connected to the first port of the third Schottky diode D3; the second port of the third Schottky diode D3 is connected to the first port of the fourth Schottky diode D4; the second port of the fourth Schottky diode D4 is connected to the first port of the fifth Schottky diode D5; the second port of the fifth Schottky diode D5 is connected to the first port of the sixth Schottky diode D6; the second port of the sixth Schottky diode D6 is connected to the first port of the seventh Schottky diode D7; the second port of the seventh Schottky diode D7 is connected to the first port of the eighth Schottky diode D8; the second port of the eighth Schottky diode D8 is connected to the first port of the second resistor R2 and serves as the signal output port of the level conversion unit; the second port of the second resistor is connected to the first voltage DVSS.

[0033] Inverter Unit

[0034] The first inverter unit, the second inverter unit, the third inverter unit, the fourth inverter unit, and the fifth inverter unit have the same structure. The first inverter unit and the second inverter unit increase the accuracy of level control; the third inverter unit, the fourth inverter unit, and the fifth inverter unit isolate the mutual crosstalk of the output level and increase the level output capability. Figure 3 is a circuit topology diagram of an inverter unit of a driver chip according to an embodiment of the present invention, such as Figure 3 As shown, the inverter unit includes a first transistor, a second transistor, and a third resistor.

[0035] The drain of the first transistor S1 is connected to the second voltage DVDD; the source of the first transistor is connected to the first port of the third resistor; the gate of the first transistor is connected to the second port of the third resistor and the drain of the second transistor and serves as the signal output port of the inverter unit; the source of the second transistor is connected to the first voltage DVSS; the gate of the second transistor serves as the signal input port of the inverter unit.

[0036] In summary, the driver chip based on GaAs process in the embodiment of the present invention can solve the general level control problem of GaAs process chip in the circuit system, and can greatly improve the accuracy and efficiency of level control.

[0037] Specifically, according to the driver chip based on GaAs process of the above embodiment of the present invention, the level conversion unit can convert multiple defined level signals into level signals that can be recognized by the inverter, and convert the input +5V / 0V or +3.3V / 0V level signal into two mutually inverted 0V / -5V level signal outputs, thereby realizing the universalization of GaAs process chip level control in the electronic system. At the same time, the first inverter unit and the second inverter unit are added to increase the accuracy of the level control; the third inverter unit, the fourth inverter unit, and the fifth inverter unit are added to isolate the mutual crosstalk of the output level, thereby increasing the level output capability.

[0038] In addition, according to the driver chip based on GaAs process in the above-mentioned embodiment of the present invention, the chip circuit topology is simple and the design and debugging difficulty is relatively low; at the same time, the circuit size is smaller than similar products and the cost is lower than similar products, which is conducive to system miniaturization and integration.

[0039] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not limitations on the implementation methods of the present invention. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present invention are still within the protection scope of the present invention.

Claims

1. A driver chip based on GaAs process, characterized in that: The invention comprises a level conversion unit, a first inverter unit, a second inverter unit, a third inverter unit, a fourth inverter unit, a fifth inverter unit, a signal input port, a first output port, and a second output port. The input level signal is input from the input port, and after passing through the level conversion unit, the first inverter unit, and the second inverter unit in sequence, it is divided into two paths, one of which passes through the third inverter unit and is output from the first output port; Another path passes through the fourth inverter unit and the fifth inverter unit and is output from the second output port; The level conversion unit is used to convert the input level signal into a level signal that can be recognized by the first inverter unit; The first inverter unit is used to identify the level signal output by the level conversion unit and convert it into a first standard level signal; The second inverter unit is used to identify the level signal output by the first inverter unit and convert it into a second standard level signal; The third inverter unit is used to invert the level signal output by the second inverter unit and output it from the first output port, and can isolate the interference of the level signal of the first output port on the second output port; The fourth inverter unit and the fifth inverter unit are used to output the level signal output by the second inverter unit from the second output port in phase, and can isolate the interference of the level signal of the second output port on the first output port.

2. The driver chip according to claim 1, characterized in that: The input level signal is a level signal of +5V / 0V or +3.3V / 0V, the first standard level signal is a relatively standard level signal of 0V / -5V, and the second standard level signal is a standard level signal of 0V / -5V.

3. The driver chip according to claim 1 or 2, characterized in that: The level conversion unit includes a first resistor, a second resistor, a first Schottky diode, a second Schottky diode, a third Schottky diode, a fourth Schottky diode, a fifth Schottky diode, a sixth Schottky diode, and a seventh Schottky diode. Among them, the first port of the first resistor serves as the signal input port of the level conversion unit; the second port of the first resistor is connected to the first port of the first Schottky diode; the second port of the first Schottky diode is connected to the first port of the second Schottky diode; the second port of the second Schottky diode is connected to the first port of the third Schottky diode; the second port of the third Schottky diode is connected to the first port of the fourth Schottky diode; the second port of the fourth Schottky diode is connected to the first port of the fifth Schottky diode; the second port of the fifth Schottky diode is connected to the first port of the sixth Schottky diode; the second port of the sixth Schottky diode is connected to the first port of the seventh Schottky diode; the second port of the seventh Schottky diode is connected to the first port of the eighth Schottky diode; the second port of the eighth Schottky diode is connected to the first port of the second resistor and serves as the signal output port of the level conversion unit; the second port of the second resistor is connected to the first voltage.

4. The driver chip according to any one of claims 1 to 3, characterized in that: The first inverter unit, the second inverter unit, the third inverter unit, the fourth inverter unit, and the fifth inverter unit have the same structure, and all include a first transistor, a second transistor, and a third resistor. The drain of the first transistor is connected to the second voltage; the source of the first transistor is connected to the first port of the third resistor; the gate of the first transistor is connected to the second port of the third resistor and the drain of the second transistor and serves as a signal output port of each inverter unit; the source of the second transistor is connected to the first voltage; the gate of the second transistor serves as a signal input port of each inverter unit.

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