Voltage level determination method and device for charging control signal
By performing voltage measurement before the falling edge of the PWM signal in the electric vehicle charging system, combining multiple measurement values and analog filter optimization, the inaccurate problem of voltage level measurement of the charging control signal is solved, and accurate measurement and resources are achieved Efficient use.
Patent Information
- Application Number
- CN202410643673.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-06-21
- Filing Date
- 2024-05-23
- Publication Date
- 2024-12-24
AI Technical Summary
In the existing electric vehicle charging systems, the voltage level of the charging control signal is difficult to accurately measure, and is greatly affected by parasitic impedance and external interference, resulting in inaccurate measurement.
By performing voltage measurements before the falling edge of the PWM signal, using the maximum stable state of the signal, multiple measurement values are collected and voltage levels are determined in the measurement window before the falling edge, reducing the impact of the signal transient process, and using analog filtering The memory and buffer memory optimizes the storage and processing of measured values.
It realizes precise measurement of the voltage level of the charging control signal while reducing parasitic impedance interference, and improves measurement accuracy and resource utilization efficiency.
Smart Images
Figure CN119178917A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a method and a device for determining a voltage level of a charging control signal, especially for an electric vehicle charging system. The present invention also relates to an optimized voltage measurement for a charging control signal. Background Art
[0002] Pulse width modulation (PWM) charging control signals for charging systems according to Type 1 / CCS1, Type 2 / CCS2 and Megawatt Charging (MCS) must be accurately evaluated for the charging process. In particular, the magnitude of the positive voltage signal level must be determined. However, due to parasitic impedances, i.e. capacitance and inductance in the signal path and external interference, the signal is usually very noisy and cannot be measured safely and accurately.
[0003] Known solutions to this problem include, for example, strong filtering of the PWM signal, continuous sampling and subsequent averaging by software, and acquisition of a plurality of measured values after the rising edge has been identified. However, these solutions require a great deal of processor computing time to achieve a satisfactory measurement accuracy. In addition, the memory requirements in the case of continuous sampling are not negligible. Summary of the invention
[0004] It is therefore an object of the present invention to provide an improved voltage level determination of a charging control signal which allows accurate measurement of the voltage level while mitigating the effects of parasitic impedance interference.
[0005] This object is achieved by the subject matter of the independent claims. Advantageous developments of the invention are described in the dependent claims, the description and the drawings.
[0006] The invention described below allows accurate measurement of voltage levels while mitigating the disturbing effects of parasitic impedances.
[0007] The solution of the present invention is based on the following idea: instead of measuring the voltage in the initial region of the high level, that is, after the rising edge, the voltage is deliberately measured shortly before the falling edge. This is achieved by continuous sampling of the voltage signal and by evaluating the voltage command by the falling edge of the PWM signal.
[0008] The invention described below combines the possibility of precise voltage measurement with a PWM signal for charge control by continuous rapid sampling with optimized evaluation and efficiency by means of a memory for a limited number of measured values at a certain triggering instant. By placing the measurement window at the end of the voltage plateau, the maximum stable state of the PWM signal can be utilized, thus allowing the greatest possible immunity to signal transient processes.
[0009] According to a first aspect, the task is accomplished by a method for determining a voltage level of a charging control signal for an electric vehicle charging system, wherein the charging control signal is a pulse width modulated (PWM) signal with an adjustable pulse width, wherein the method comprises: acquiring a plurality of measurement values of the charging control signal within a time range predetermined by a measurement window; identifying a falling edge of the charging control signal and a corresponding moment of the falling edge based on the charging control signal and a predetermined threshold; and determining the voltage level of the charging control signal based on at least a first portion of the measurement values of the charging control signal acquired within the measurement window when the falling edge of the charging control signal is identified, the measurement values being measured before the moment of the falling edge of the charging control signal.
[0010] This approach results in an improved determination of the voltage level of the charging control signal, whereby an accurate measurement of the voltage level is achieved while mitigating the effects of parasitic impedance interference.
[0011] By placing the measuring window in front of the falling edge of the PWM signal, the maximum stable state of the PWM signal can be utilized, thus allowing the signal to be as unaffected as possible by transient processes. The measuring window is optimally adapted to the stable state of the PWM signal, so that the storage of the measured values can be carried out in a resource-saving manner, because only the measured values in the stable state are taken into account for determining the voltage level.
[0012] According to an embodiment of the method, the identification of a falling edge of the charging control signal is performed on the basis of comparing the charging control signal or a signal derived from the charging control signal with a predetermined threshold value.
[0013] The technical advantage of this method is that the falling edge can be easily identified based on the threshold value. For example, a simple comparator can be used for this purpose and a predetermined threshold value can be provided to it.
[0014] According to an embodiment of the method, the measurement window is adjusted so that a plurality of measurement values can be acquired within a portion of the pulse width of the PWM signal.
[0015] The technical advantage of this method is that the voltage level can be determined more accurately with the aid of more measured values than when only a single measured value or a small number of measured values is used. Therefore, averaging a plurality of measured values is more accurate than evaluating only one or a few measured values for this purpose.
[0016] According to one embodiment of the method, the measurement window is adjusted such that a plurality of measurement values can be acquired within a fraction of a minimum pulse width exhibited by the PWM signal in accordance with the IEC 61851-1 standard.
[0017] The technical advantage of this method is that all current intensities of the charging current signaled by the pulse width of the PWM signal can be reliably detected.
[0018] According to one embodiment of the method, the voltage level is determined without a second portion of measured values acquired in the measurement window, which measured values are detected immediately before the time at which the falling edge occurs.
[0019] The technical advantage of this method is that the measured values already acquired at the falling edge instant are not also included in the determination of the voltage level, which would otherwise distort the voltage level determination. A very high accuracy of the voltage level determination can therefore be ensured. The falling edge instant is a measured instant, which is measured in particular by a comparator by means of a threshold comparison. The actual physical instant at which the fall of the charge control signal begins may differ from this.
[0020] A threshold value can be used for the threshold comparison that is sufficiently distant from the actual positive voltage level of the charge control signal for a fault-tolerant detection. A delay can thus occur, i.e. the moment at which the falling edge occurs is detected later than the actual drop in the voltage level of the charge control signal. By omitting the second part of the measured values detected in the measurement window, measured values that do not belong to the positive voltage level (which have been stored due to this delay) can be ignored when calculating the voltage level value of the charge control signal.
[0021] The determination of the length of the second part may be based on simulation or empirical values. The length of the second part may include the number of dynamically adjusted stored measurement values or a predetermined fixed number of stored measurement values, such as the latest measurement value before the falling edge moment or other number of measurement values before the falling edge moment will be discarded, that is, these discarded measurement values are never considered when determining the voltage level of the charging control signal.
[0022] Likewise conceivable are dynamic test phases, in particular when the charging system is put into operation, in which different second portion lengths are tested successively, wherein after the test phase the length of the second portion is set to a value which during the test phase yields the highest voltage level and / or has the smallest variance in the voltage levels.
[0023] According to one embodiment of the method, the determination of the voltage level is performed based on an averaging of at least a first part of the measured values acquired in a measurement window.
[0024] The technical advantage of this method is that only the measured values shortly before the falling edge occurs are taken into account for the averaging, which are measured in the stable state of the PWM signal. Therefore, no outliers are used for the averaging, which would distort the result. The measurement accuracy of the voltage level determination is therefore extremely high.
[0025] According to an embodiment of the method, the method comprises filtering the charging control signal before acquiring the measured values, wherein the filtering is performed using an analog filter which is designed to suppress signal superpositions in the charging control signal caused by interfering signals, for example originating from power line signals. The analog filter can be, for example, a low-pass filter.
[0026] A technical advantage of this approach is that high frequency vibrations due to power line communication affecting the charging control signal are pre-filtered and therefore do not distort the determination of the voltage level.
[0027] According to one embodiment of the method, the method includes sampling the filtered charging control signal with an analog-to-digital converter to obtain a measurement value of the charging control signal; and storing the sampled measurement value in a buffer memory, wherein the size of the buffer memory corresponds to a time range predetermined by the measurement window.
[0028] The technical advantage of this method is that such a buffer memory is effectively adapted to the measurement window and can therefore store the measured values in a particularly resource-efficient manner. The buffer memory can overwrite previously acquired measured values with new measured values in each case, so that at the time of the falling edge only the measured values measured in the stable state of the PWM signal are present in the memory. The time at which the falling edge begins and the time at which the falling edge is measured can generally differ from one another, so that measured values acquired during the falling edge are already in the buffer memory. However, these small measured values can be effectively detected and excluded from the voltage level determination.
[0029] According to an embodiment of the method, the identification of the falling edge is performed based on a comparison of the filtered charging control signal with a predetermined threshold; wherein the predetermined threshold corresponds to a signal level between a positive voltage level and a negative voltage level of the charging control signal.
[0030] The technical advantage of this method is that the threshold value can be effectively adjusted when the positive voltage level and the negative voltage level are known. For example, the threshold value can be set at the midpoint between the positive voltage level and the negative voltage level.
[0031] According to a second aspect, the above task is accomplished by a device for determining a voltage level of a charging control signal for an electric vehicle charging system, wherein the charging control signal is a pulse width modulated (PWM) signal with an adjustable pulse width, wherein the device comprises: an analog-to-digital converter for acquiring a measured value of the charging control signal; a buffer memory for storing measured values measured within a predetermined time range; a comparator for identifying a falling edge of the charging control signal based on the charging control signal and a predetermined threshold; and a processor, which is designed to determine the voltage level of the charging control signal based on at least a first part of the measured value stored in the buffer memory when a falling edge of the charging control signal is identified, wherein the measured value is measured before the falling edge of the charging control signal.
[0032] A technical advantage of such an arrangement is that the voltage level of the charging control signal can be determined in an improved manner, wherein an accurate measurement of the voltage level can be achieved while mitigating the effects of parasitic impedance interference.
[0033] As has been described above with respect to the corresponding method according to the first aspect, by placing the measurement window before the falling edge of the PWM signal, the maximum stable state of the PWM signal is utilized and thus allows to be as unaffected as possible by transient processes of the signal. The measurement window is optimally adapted to the stable state of the PWM signal, so that the measured value storage can be performed in a resource-saving manner, because only the measured values in the stable state are taken into account for determining the voltage level.
[0034] According to a third aspect, the above task is achieved by a computer program product, which comprises instructions for causing a computer to execute the method according to the first aspect when the computer runs the program.
[0035] According to a fourth aspect, the above task is accomplished by a computer-readable storage medium, which comprises instructions that, when executed by a computer, cause the computer to execute the method according to the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] The present invention will be described in more detail below based on embodiments and figures, wherein:
[0037] Figure 1a An exemplary diagram showing a control pilot (CP) signal 110 having a parasitic signal portion, the control pilot signal being a charging control signal for a charging system;
[0038] Figure 1b Shown after filtering with an analog filter Figure 1a An exemplary illustration of a CP signal 110;
[0039] Figure 2a A schematic diagram showing a method 100 for determining a voltage level of a charging control signal according to the present invention;
[0040] Figure 2b Show Figure 1a and 1b Used in Figure 2a An exemplary illustration of a CP signal 110 in the method 100 of the present invention;
[0041] Figure 3 A schematic diagram showing a method 200 for determining a voltage level of a charging control signal according to an embodiment of the present invention;
[0042] Figure 4 Shown as Figure 3 A schematic diagram of a buffer memory 203 used in the method 200 is shown; and
[0043] Figure 5 FIG. 1 is a schematic diagram showing a voltage level determination device 300 for a charging control signal according to the present invention.
[0044] These figures are only schematic diagrams and serve only to explain the invention. Identical or identically acting components are always provided with the same reference numerals. DETAILED DESCRIPTION
[0045] In the following detailed description, reference is made to the accompanying drawings, which form a part of the description and in which specific embodiments that can be used to implement the present invention are shown by way of illustration. Obviously, other embodiments may be adopted without departing from the concept of the present invention and structural or logical changes may be made. Therefore, the following detailed description should not be understood in a limiting sense. It is also obvious that, unless otherwise specifically stated, the features of the various embodiments described herein may be combined with each other.
[0046] These aspects and embodiments are described with reference to the drawings, wherein the same reference numerals generally refer to the same parts. In the following description, many specific details are listed for illustration to facilitate a thorough understanding of one or more aspects of the present invention. However, it may be apparent to a technician that one or more aspects or embodiments may be performed with fewer specific details. In other cases, known structures and parts are shown in schematic form to facilitate description of one or more aspects or embodiments. Obviously, other embodiments may be used and structural changes or logical changes may be made without departing from the concept of the present invention.
[0047] Figure 1a An exemplary diagram of a control pilot (CP) signal 110 having a parasitic signal portion is shown, representing a charging control signal for a charging system.
[0048] The control pilot signal or charging control signal 110 indicates, for example, the available AC charging current, ie, the current intensity that can be provided, for example, by an AC wall box.
[0049] Furthermore, the digital communication request is initially encoded with the help of the duty cycle (i.e. pulse width 120) of the PWM signal 110, which is necessary for all DC charging processes in type 1, type 2 and MCS charging systems. For this purpose, a PWM signal with +12V / -12V and a frequency of 1kHz is generated. In order to evaluate the signal, the signal shape needs to be transmitted as accurately as possible, but this is made difficult by parasitic effects in the signal path, such as Figure 1a shown.
[0050] Parasitic impedances, i.e., capacitances or inductances, cannot be completely avoided in any electrical signal path, but they are particularly significant in charging systems with long charging cables. For example, a long cable causes, for example, a superimposed sinusoidal portion 117 on the initially rectangular PWM signal 110, such as Figure 1a These sinusoidal parts are particularly evident when the new voltage level is applied, ie after a rising edge 116 or a falling edge 111 of the original signal.
[0051] These sinusoidal components 117 appear as damped vibrations superimposed on the rectangular signal. In the first time range after the voltage edge 116 , 111 , the measurement of the load voltage level is only extremely inaccurate if the vibrations 117 are not specifically filtered out.
[0052] Figure 1b After filtering with an analog filter Figure 1a FIG. 1 is an exemplary illustration of a CP signal 110 .
[0053] However, excessive signal filtering or a very large parasitic capacitance portion causes the edge 116 at the beginning of the voltage plateau to be significantly distorted, such as Figure 1b Here too, the original signal level measurement is severely affected.
[0054] In order to obtain the most accurate measurement result, it is necessary to wait until the signal is in a stable state. Therefore, the best measurement window 130 (the dotted line area in the figure) is located shortly before the signal changes again, that is, shortly before the falling edge 111 of the PWM signal 110 .
[0055] A common solution is to use the rising edge 116 of the signal to start an ADC measurement with one or more measurement points. However, since the exact time when the falling edge 111 starts is unknown without knowing the duty cycle 120, it is difficult to find the exact time (about the rising edge 116).
[0056] There are therefore two approaches: to set a fixed delay time between rising edge 116 and the start of the measurement, or to measure continuously and then determine the optimum measuring moment for the voltage evaluation.
[0057] In the first case, the challenge is to maintain a sufficient distance from interfering signals immediately after rising edge 116 while at the same time not measuring erroneously beyond the time of falling edge 111 .
[0058] In the second case, the memory requirement for the measuring points to be detected is high. Since the signal shape only repeats after 1 ms, it is advisable to save all measured values in the buffer memory during this time and then select and evaluate the appropriate measuring window via software.
[0059] The sampling rate is an important factor for the quality of the measurement. The faster and more frequently the signal is sampled, the lower the impact of interfering or noisy signal components, since these components can be filtered out by averaging. However, fast sampling is accompanied by large memory requirements, since many data points must be recorded and temporarily stored.
[0060] The memory requirement can be reduced by keeping only limited time windows 130 in the buffer memory and evaluating these measurement points at the appropriate time. The best possible time is marked by a falling edge 111 of the PWM signal 110 to be measured.
[0061] In the following, a method 100 according to the invention will be described which uses such a limited time window 130 to acquire measured values.
[0062] Figure 2a A schematic diagram showing a method 100 for determining a voltage level of a charging control signal according to the present invention is shown. Figure 2b Show Figure 1a and 1b An exemplary illustration of a CP signal 110 having a Figure 2a The characterizing characteristic parameters in the method 100 of the present invention.
[0063] The charging control signal 110 is, for example, a pulse width modulated signal, ie, a PWM signal, with an adjustable pulse width 120 used in an electric vehicle charging system (eg, according to IEC 61851-1 or other common standards).
[0064] The method 100 comprises the following steps:
[0065] Acquiring 101 a measurement value of a charging control signal 110 within a time range predetermined by a measurement window 130;
[0066] identifying 102 a falling edge 111 of the charging control signal 110 and a corresponding time 112 of the falling edge 111 based on the charging control signal 110 and a predetermined threshold 140 ; and
[0067] When falling edge 111 of charging control signal 110 is identified: voltage level 113 of charging control signal 110 is determined based on at least first part 115 of measurement values of charging control signal 110 acquired in measurement window 130 , which are measured before time 112 of falling edge 111 of charging control signal 110 .
[0068] Identification 102 of falling edge 111 of charging control signal 110 may be performed, for example, based on a comparison of charging control signal 110 or a signal derived from charging control signal 110 , such as a time average of a measured value of the charging control signal, with a predetermined threshold value 140 .
[0069] The measuring window 130 may advantageously be set in such a way that a plurality of measured values may be detected within a portion of the pulse width 120 of the PWM signal 110 .
[0070] For example, measurement window 130 can be adjusted in such a way that a plurality of measured values can be detected within a fraction of minimum pulse width 120 of PWM signal 110 in accordance with standard IEC 61851-1.
[0071] For example, the voltage level 113 can be determined without taking into account the second part 114 of the measured values detected in the measurement window 130, which were detected immediately before the time 112 at which the falling edge 111 occurred. Figure 2b As shown, the second portion 114 is the measured value which is detected at the beginning of the falling edge 111 , but before the threshold comparison with the threshold 140 has started.
[0072] The voltage level 113 can be determined, for example, based on averaging at least a first part 115 of the measured values detected in the measurement window 130. The first part 115 is the rectified measured values, which are detected with the beginning of the falling edge 111, excluding the second part 114.
[0073] The method 100 may further include filtering the charging control signal 110 before collecting 101 the measured values, wherein the filtering is performed using an analog filter, which is designed to suppress signal superposition in the charging control signal 110 caused, for example, by interference signals such as power line signals or other high-frequency interference signals. For example, the analog filter may be a low-pass filter, which is adjusted so that high frequencies of the PWM signal 110 can still pass, but high frequencies of the power line signal are no longer allowed to pass.
[0074] The method 100 may further include the following steps:
[0075] Sampling the filtered charging control signal using an analog-to-digital converter to obtain a measured value of the charging control signal 110; and
[0076] The sampled measured values are stored in a buffer memory. The size of the buffer memory may correspond to the time range predetermined by the measurement window 130, such as Figure 2b shown.
[0077] The identification 102 of the falling edge 111 may be performed based on a comparison of the filtered charging control signal with a predetermined threshold 140 .
[0078] For example, the predetermined threshold 140 may correspond to a signal level between the positive voltage level 110a and the negative voltage level 110b of the charging control signal 110, such as Figure 2b shown.
[0079] Figure 3 FIG. 2 is a schematic diagram showing a method 200 for determining a voltage level of a charging control signal according to an embodiment of the present invention.
[0080] Method 200 has two paths, namely a first path with blocks 201 , 202 and 203 and a second path with blocks 211 , 212 , 213 , 214 and 215 , wherein the second path is influenced by the first path.
[0081] The first path begins with the Figures 1a to 2b The PWM signal 110 or the PWM signal of the charging control signal 110 is sampled 201 .
[0082] The sampled value is subsequently written 202 to the buffer memory and at the next sampling instant another sampled value of the PWM signal is sampled 201 and written 202 to the buffer memory again.
[0083] After a certain repetition of sampling 201 and writing 202 , the buffer memory finally has n+x locations or sample values of the PWM signal.
[0084] The second path begins with a check 211 for a falling edge in the PWM signal. If a falling edge is detected in step 212, an evaluation of a buffer memory, for example the buffer memory present in step 203, is triggered 213. Otherwise, a check 211 is performed again for a falling edge in the PWM signal.
[0085] During the evaluation of the buffer, the last x buffer values are discarded in step 214. This means that the length of second part 114 of buffer values corresponds to the number of x discarded buffer values.
[0086] In a subsequent step 215, an averaging operation is performed from the remaining n measured values. After the averaging operation 215, the voltage level of the PWM signal is present.
[0087] Then check again whether the 211PWM signal has a falling edge.
[0088] Method 200 is the above Figure 2a and 2b A specific embodiment of the method 100 is described.
[0089] The acquisition 101 of measured values of charging control signal 110 within a time range predetermined by measurement window 130 corresponds to steps 201 , 202 and 203 , wherein these acquired measured values are present in a buffer memory in step 203 .
[0090] The identification 102 of the falling edge 111 of the charging control signal 110 and the corresponding time 112 of the falling edge 111 corresponds to steps 211 and 212 .
[0091] The determination 103 of the voltage level 113 of the charging control signal 110 corresponds to steps 213 , 214 and 215 .
[0092] Figure 4 Shown in Figure 3 A schematic diagram of the buffer memory 203 in the method 200 is shown.
[0093] 2 , a buffer memory 203 is used. After each sampling 201 of the PWM signal 110, there is a measured value or a sampled value of the PWM signal 110, which is written into the buffer memory 203. The writing direction 226 of the buffer 203 is, for example, in a clockwise direction, such as Figure 4 The next sampling value for the next sampling is written into the buffer memory 203 one bit lower in the clockwise direction.
[0094] In step 203 according to FIG. 2 , n+x sample values are written as memory values into the buffer memory 203, of which n sample values 115 are relevant, i.e. sample values that were written into the buffer memory before the start of the falling edge 111, and x sample values are irrelevant and are to be discarded, corresponding to the second part 114, i.e. sample values that were also written into the buffer memory during or after the start of the falling edge 111. The last relevant memory value 224 corresponds to the last sample value of the n sample values 115, and the last written memory value 225 corresponds to the last sample value of the x sample values in the second part 114.
[0095] Therefore, the above Figure 2a and 2b The depicted measurement window 130 includes all n+x sample values passed into the buffer memory 203. Figure 2a and 2bThe first part 115 of the measured values measured in the measurement window 130 comprises n related sample values 115, and according to Figure 2a The second part 114 of the measured values measured in the measurement window 130 of 2b comprises x sample values 114 to be discarded, which are still stored in the buffer memory 203, ie the length of the second part 114 is x.
[0096] Figure 5 FIG. 1 is a schematic diagram showing a device 300 for determining a voltage level of a charging control signal according to the present invention.
[0097] The apparatus 300 is similar to the above Figure 2a and 2b The method 100 is described.
[0098] The device 300 is used for determining a voltage level of a charging control signal 110 of an electric vehicle charging system, wherein the charging control signal 110 is a pulse width modulated (PWM) signal with an adjustable pulse width 120 .
[0099] The device 300 comprises an analog-to-digital converter 303 for detecting 101 a measured value 304 of the charging control signal 110, for example as described above with respect to Figure 2a , 2b As described in 3.
[0100] The device 300 comprises a buffer memory 203 for storing measured values measured within a predetermined time range, for example as described above with respect to Figure 3 and 4 As described in detail.
[0101] The device 300 comprises a comparator 305 for identifying 102 a falling edge 111 of the charging control signal 110 based on the charging control signal 110 and a predetermined threshold 140, for example as described above with respect to Figure 2a , 2b , 3 and 4 as described.
[0102] The device 300 comprises a processor 307 which is designed to determine the voltage level 113 of the charge control signal 110 when identifying the falling edge 111 of the charge control signal 110 based on at least a first part 115 of the measured values 304 stored in the buffer memory 203, said measured values being measured before the falling edge 111 of the charge control signal 110, for example as described above with respect to Figure 2a , 2b , 3 and 4 as described.
[0103] Optionally, the device 300 may include an analog filter 301 designed to filter the PWM signal and then supply it as a filtered signal 302 to an AD converter 303 and a comparator 305 .
[0104] The filter 301 may be designed to filter the charging control signal 110 before the measurement value is detected 101. The analog filter 301 may be designed to pass signal overlaps in the charging control signal 110 caused by, for example, interfering signals caused by power line signals.
[0105] The analog-to-digital converter 303 may be designed to sample the filtered charging control signal 302 to obtain a measured value of the charging control signal 110 .
[0106] The buffer memory 203 can be designed to store sampled measured values. The size of the buffer memory 203 can correspond to the time range predetermined by the measurement window 130 .
[0107] An implementation of the apparatus 300 will be described in more detail below.
[0108] An advantageous technical solution is that the microcontroller performs continuous high-frequency sampling of the PWM signal 110, wherein these sampled values 304 are written directly into the buffer memory 203. The predetermined memory area with n+x locations is smaller than the memory area required for acquiring a complete period (approximately 1 ms) of the PWM signal 110. The time range covered by the buffer memory 203 is, for example, t buffer Mark.
[0109] If the end of the predetermined memory area is reached, the oldest measured value should be discarded and replaced by a new sampled value (FIFO memory or ring memory). In order to find out when the best signal part is located in the buffer memory 203, at the time t interrupt 112 (see Figure 2b ) an interrupt is generated in the microcontroller through the falling edge 111 of the PWM signal 110, and the content of the buffer memory 203 is processed.
[0110] It may be advantageous to discard the x most recent measured values 114 (e.g. Figure 4 ), since the beginning of the falling edge 111 may be measured but should not be included in the evaluation. The relevant time portion of the signal to be evaluated is t rel to indicate and include n measured values 115 (such as Figure 4 The n measured values 115 are averaged and the positive voltage level 110a of the PWM signal 110 is calculated therefrom.
[0111] The signal flow can effectively be split into two paths:
[0112] - The analog signal flows through the ADC 303 into the buffer memory 203;
[0113] The digital signal stream is passed directly into the processor 307 via the comparator 305 as a trigger condition.
[0114] It is advantageous to use a microcontroller with DMA functionality for writing the ADC measured values 304 directly into the buffer memory 203. The processor load for acquiring and storing these measurement points 304 is thus kept as low as possible.
[0115] The optimum size of the measurement window 130 can be derived from the minimum duty cycle 120 to be detected of the PWM signal 110. In accordance with common standards (e.g. IEC 61851-1), a minimum duty cycle of 3% should still be reliably detectable at a maximum frequency of 1020 Hz. This results in a positive pulse width of exactly 29 μs. Taking into account the maximum permissible settling time or transition time of 3 μs (i.e. the time required to reach 95% of the signal level), there is a minimum pulse width of about 26 μs in an undisturbed system. If an additional 10 μs is taken into account for transient processes of the signal that are disturbed by parasitic impedances, a minimum suitable measurement window of 16 μs is obtained. At a sampling rate of 1 MHz, this corresponds to 16 measured values within the measurement window.
[0116] In order to exclude the possibility that the falling edge 111 of the signal 110 has also been measured, for example the last two measured values can be discarded, which corresponds to a maximum permissible decay or fall time of 2 μs. The voltage level can then be determined by averaging the remaining 14 measured values.
[0117] The times listed above should be considered as examples only. By faster or slower sampling and different assumptions for the optimal measurement window 130, different values for the measurement window size and the value to be measured can be obtained.
[0118] Reference numerals list
[0119] 100 Voltage level determination method
[0120] 101 First Method Step: Detection
[0121] 102 Second method step: Identification
[0122] 103Third Method Step: Determine
[0123] 110 Charging control signal, PWM signal
[0124] 110a Positive signal level of PWM signal
[0125] 110b Negative signal level of PWM signal
[0126] 111 Falling edge of PWM signal
[0127] 112 falling edge time t interrupt
[0128] 113 Voltage level of charging control signal to be determined
[0129] 114 Part 2
[0130] 115 Part 1
[0131] 116 Rising edge of PWM signal
[0132] 117 Sinusoidal interference signal part
[0133] 120PWM signal pulse width and duty cycle
[0134] 130 measurement window
[0135] 140Threshold, threshold voltage level
[0136] 200 Voltage Level Determination Method
[0137] 201 The first box in the first path: sampling
[0138] 202 Second box in first path: Write
[0139] 203 Third box in first path: buffer memory with n+x locations
[0140] 211 First box in the second path: Check
[0141] 212 Second box in the second path: Identification
[0142] 213 The third box in the second path: Evaluation
[0143] 214 The fourth box in the second path: discard
[0144] 215 The fifth box in the second path: Find the average
[0145] 224 Last relevant memory value
[0146] 225 Last memory value written
[0147] 226 Buffer memory write direction
[0148] 300 Voltage level determination device
[0149] 301 (analog) filter
[0150] 302 PWM signal after filtering
[0151] 303 Analog-to-digital converter
[0152] 304 individual measurements
[0153] 305 Comparator
[0154] 307 processor
Claims
1. A method for determining a voltage level of a charging control signal for an electric vehicle charging system, wherein: The charging control signal is a pulse width modulation (PWM) signal with an adjustable pulse width, wherein the method comprises: detecting a plurality of measurement values of the charging control signal within a time range predetermined by a measurement window; identifying a falling edge of the charging control signal and a corresponding time of the falling edge based on the charging control signal and a predetermined threshold; and Upon identifying a falling edge of the charge control signal, a voltage level of the charge control signal is determined based on at least a first portion of measured values of the charge control signal detected within the measurement window, the measured values being detected before the moment of the falling edge of the charge control signal.
2. The method according to claim 1, wherein: The identification of the falling edge of the charging control signal is realized based on a comparison of the charging control signal or a signal derived from the charging control signal with the predetermined threshold value.
3. The method according to claim 1 or 2, wherein: The measurement window is adjusted to be able to detect a plurality of measurement values within a portion of the pulse width of the PWM signal.
4. The method according to one of the preceding claims, wherein: The measurement window is set to be able to detect a plurality of measurement values within a fraction of the minimum pulse width of the PWM signal according to the IEC 61851-1 standard.
5. The method according to one of the preceding claims, wherein: The voltage level is determined in the absence of a second portion of measurement values detected in the measurement window, the measurement values being detected immediately before the moment the falling edge occurs.
6. The method according to one of the preceding claims, wherein: The voltage level is determined based on averaging at least a first portion of the measured values detected in the measurement window.
7. The method according to one of the preceding claims, comprising: The charging control signal is filtered before the measured value is detected, wherein the filtering is performed by an analog filter which is designed to suppress signal superpositions in the charging control signal caused by interfering signals, in particular power line signals.
8. The method according to claim 7, comprising: Sampling the filtered charging control signal with an analog-to-digital converter to obtain a measured value of the charging control signal; and The sampled measured values are stored in a buffer memory, wherein the size of the buffer memory corresponds to the time range predetermined by the measurement window.
9. The method according to claim 7 or 8, in, The identification of the falling edge is achieved based on the comparison of the filtered charging control signal with the predetermined threshold; The predetermined threshold corresponds to a signal level between a positive voltage level and a negative voltage level of the charging control signal.
10. A device for determining a voltage level of a charging control signal for an electric vehicle charging system, wherein: The charging control signal is a pulse width modulation (PWM) signal with an adjustable pulse width, wherein the device comprises: an analog-to-digital converter for detecting a measurement value of the charging control signal; a buffer memory for storing detected measured values within a predetermined time range; a comparator for identifying a falling edge of the charge control signal based on the charge control signal and a predetermined threshold; and A processor is configured to, upon identifying a falling edge of the charge control signal, determine a voltage level of the charge control signal based on at least a first portion of the measurement values stored in the buffer memory, the measurement values being detected before the falling edge of the charge control signal.