Nationwide high-reliability multi-channel storage device control system
The hot-swap function of storage devices is realized through CPU, control unit and PCIE switching chip, which solves the problems of cost and debugging risks in the prior art, improves the reliability and domestic production rate of the system, and realizes efficient storage device management.
Patent Information
- Application Number
- CN202411078911.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-07
- Publication Date
- 2024-12-24
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The existing bridge-based storage device hot-swap solution requires the addition of I/O expansion chips, resulting in increased costs, increased debugging risks and board space occupation problems. The lack of nationally produced devices, limiting the promotion and application of domestic reinforcement.
The CPU, control unit and PCIE switching chip are used to realize the hot-swap function of PCIE storage devices, and the logic control of the CPU and control unit is used to quickly perform hot-swap removal, reduce the complexity of peripheral circuits, and use nationally produced devices to build a system to expand multi-channel hanging Carry PCIE storage device.
It effectively reduces the complexity of the system hardware, improves the reliability and domestic production rate of storage devices, reduces material costs and debugging risks, and improves hot-swap efficiency.
Smart Images
Figure CN119179666A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to storage device control, and in particular relates to a nationally produced high-reliability multi-channel storage device control system. Background Art
[0002] In the application scenarios of servers or storage terminals with large-capacity data, data will be stored in the form of storage disk arrays for flexible use of massive data. Users can manually plug and unplug storage disks to expand or reduce the storage capacity of the system as needed, or replace and repair faulty disks in real time without affecting the normal operation of the system, effectively improving the system's scalability, flexibility and timely recovery capabilities.
[0003] The existing solution for hot-swappable storage disks based on bridge chips (i.e. PCIE switching chips) requires hardware support such as IO expansion chips. In view of the requirements of high system integration and large capacity, the number of I / O expansion chips will be increased accordingly at the product hardware board level to support more storage, which will increase the cost of components and bring certain debugging risks, extend the debugging development cycle, and reduce reliability in the reinforcement field. At the same time, it will also occupy the space of the board, bringing great challenges to the PCB routing of high-density board design. Moreover, there are no domestically produced devices, which cannot be promoted and applied in some domestic reinforcement fields, and there are certain risks. Summary of the invention
[0004] The purpose of the present invention is to solve the problems raised in the background technology and to provide a nationally produced high-reliability multi-channel storage device control system.
[0005] To achieve the above object, the technical solution adopted by the present invention is: The present invention proposes a domestically produced high-reliability multi-channel storage device control system, comprising a CPU, a control unit, a PCIE switching chip and a preset number of PCIE storage devices, wherein: A preset number of the PCIE storage devices are mounted on a PCIE switching chip, and the PCIE switching chip connects each mounted PCIE storage device to a CPU; When a hot-plug command is triggered to the control unit, the control unit notifies the CPU of the hot-plug command, and the CPU simultaneously notifies the PCIE switch chip of the hot-plug command, and the PCIE switch chip reclaims the resources of the corresponding PCIE storage device; Then the CPU unloads the corresponding PCIE storage device from the PCIE switch chip; After the unloading is successful, the CPU turns off the power supply voltage of the corresponding PCIE storage device through the control unit; When the corresponding PCIE storage device is unplugged, the control unit forwards the status of the PCIE storage device to the CPU to complete the hot plug operation; When a hot-plug command is triggered to the control unit, the control unit notifies the CPU of the hot-plug command, and the CPU simultaneously notifies the PCIE switch chip of the hot-plug command, and the PCIE switch chip allocates resources of the corresponding PCIE storage device; Then the CPU turns on the power supply voltage of the corresponding PCIE storage device through the control unit; When the corresponding PCIE storage device is inserted, the control unit forwards the state of the PCIE storage device to the CPU, and the CPU loads and initializes the PCIE storage device to complete the hot plug operation.
[0006] Preferably, the CPU is connected to the PCIE switching chip via a PCIE bus.
[0007] Preferably, each of the PCIE storage devices is connected to a PCIE switching chip via a PCIE bus.
[0008] Preferably, each of the PCIE storage devices includes a CLKEN clock enable signal, a PERST slot reset signal, a PWREN slot power enable signal and a PRSNT device presence signal, and the control unit is connected to each signal on each PCIE storage device.
[0009] Preferably, the CPU is provided with a communication interface, and the CPU is connected to the control unit via the communication interface.
[0010] Compared with the prior art, the present invention has the following beneficial effects: 1. The domestically produced high-reliability multi-channel storage device control system realizes the hot-swap function of PCIE storage devices through CPU, control unit and PCIE switching chip, effectively reduces peripheral circuits, reduces the complexity of system hardware and improves the reliability of storage devices; by expanding the PCIE switching chip to multiple mounted PCIE storage devices and control units, it solves the problems of increased material costs and increased debugging risks in the existing technical solution of increasing the storage limit by adding IO expansion chips.
[0011] 2. Through the logical control of the CPU and the control unit, the PCIE storage device can be quickly hot-swapped to improve efficiency; this system can be implemented using domestically produced devices, which can effectively improve the overall localization rate. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] Figure 1 This is a module block diagram of the domestically produced high-reliability multi-channel storage device control system of the present invention; Figure 2 It is a schematic diagram of the process of hot pulling of the present invention; Figure 3 It is a schematic diagram of the hot plug process of the present invention. DETAILED DESCRIPTION
[0013] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0014] It should be noted that when a component is referred to as being "connected" to another component, it may be directly connected to the other component or there may be an intermediate component. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.
[0015] like Figure 1-Figure 3 As shown, a nationally produced high-reliability multi-channel storage device control system includes: The domestically produced high-reliability multi-channel storage device control system includes a CPU, a control unit, a PCIE switching chip and a preset number of PCIE storage devices, wherein: the entire system can be built with domestically produced devices, the CPU can be Feiteng, Loongson and other CPUs, the specific models are Feiteng S5000C, D3000 / 8, D2000 / 8, FT2000 / 4, Loongson has 3A5000, 3A6000, 3C6000, etc.; the control unit can use domestic FPGA or CPLD, including Anlu, Gaoyun, Fudan Micro and other manufacturers; PCIE switching chips can choose Zhongke Tenglong's 62064 and Guowei's SM8748, etc.; PCIE storage devices can use Yixin Technology's S12001T14-T1U28T-C1; A preset number of PCIE storage devices are mounted on the PCIE switch chip (in this implementation, 1 to 12 PCIe storage devices, i.e., the PCIE storage disks in the attached figure, can be mounted), and the PCIE switch chip connects each mounted PCIE storage device to the CPU (the PCIE storage device is connected to the CPU through the PCIE switch chip, and the PCIE switch chip acts as a bridge between the CPU and the PCIE storage device. Here, the extensibility of the PCIE switch chip is mainly utilized, and the number of PCIe storage devices connected thereto can be expanded through the PCIE switch chip); The CPU is electrically connected to the control unit; The control unit is electrically connected to each PCIE storage device, and each PCIE storage device includes a CLKEN clock enable signal, a PERST slot reset signal, a PWREN slot power enable signal, and a PRSNT device presence signal. The control unit is connected to each signal on each PCIE storage device (the downstream interface of the control unit is connected to the control signal of each PCIE storage device, and the control signal is the CLKEN clock enable signal, the PERST slot reset signal, the PWREN slot power enable signal, and the PRSNT device presence signal).
[0016] Hot pull process: When a hot-plug command is triggered to the control unit (specifically, when one of the PCIE storage devices is hot-plugged, the PCIE storage device notifies the control unit or the operator clicks the remote software to notify the control unit), the control unit triggers an interrupt to notify the CPU of the hot-plug command. At the same time, the CPU synchronously notifies the PCIE switch chip of the hot-plug command, and the PCIE switch chip reclaims the resources of the corresponding PCIE storage device (if the PCIE storage device is unplugged and the corresponding PCIE storage device does not occupy the interface, the PCIE switch chip reclaims the PCIE resources); Then the CPU unloads the corresponding PCIE storage device from the PCIE switch chip (the CPU system level actively stops the information transmission with the corresponding PCIE storage device, and removes the corresponding PCIE storage device from the PCIE switch chip (unloads the driver)); After the unloading is successful, the CPU turns off the power supply voltage of the corresponding PCIE storage device through the control unit (specifically, the control unit pulls down the PWREN slot power enable signal on the corresponding PCIE storage device to turn off the power supply voltage), and then the CPU pulls down the PERST slot reset signal and the CLKEN clock enable signal through the control unit, that is, the reset is pulled low and the clock enable is pulled low; When the corresponding PCIE storage device is unplugged, the control unit forwards the status of the PCIE storage device to the CPU (the control unit continuously detects the presence signal of the PCIE storage device, and when it detects that the corresponding PCIE storage device is not in place, it notifies the CPU that it is not in place), completing the hot plug operation.
[0017] Hot plug process: When the PCIE storage device is inserted into the target slot, the control unit detects that it is in place and reports the status (specifically, the control unit pulls down the PRSNT device in place signal of the corresponding PCIE storage device to indicate that it is in place, and then notifies the control unit of the change in position); When a hot-plug command is triggered to the control unit (specifically, when one of the PCIE storage devices is hot-plugged, the PCIE storage device notifies the control unit or the operator clicks the remote software to notify the control unit), the control unit triggers an interrupt and notifies the CPU of the hot-plug command. At the same time, the CPU synchronously notifies the PCIE switching chip of the hot-plug command, and the PCIE switching chip allocates resources of the corresponding PCIE storage device (if a PCIE storage device is plugged in, the corresponding PCIE storage device starts to occupy the PCIE interface, then the PCIE switching chip will allocate PCIE resources to the PCIE storage device accordingly); Then the CPU turns on the power supply voltage of the corresponding PCIE storage device through the control unit (specifically, the control unit turns on the voltage by setting the PWREN signal of the corresponding PCIE storage device to 1, and at the same time pulls the PERST slot reset signal high and the CLKEN clock enable signal high); When the corresponding PCIE storage device is inserted, the control unit forwards the state of the PCIE storage device to the CPU, and the CPU loads and initializes the PCIE storage device to complete the hot plug operation.
[0018] In one embodiment, the CPU is connected to the PCIE switch chip via a PCIE bus, specifically a PCIE 3.0 bus; Each PCIE storage device is connected to the PCIE switching chip via a PCIE bus, specifically a PCIE3.0 bus. The PCIE switching chip connects each mounted PCIE storage device to the CPU via the PCIE3.0 bus.
[0019] In one embodiment, a communication interface is provided on the CPU, and the CPU is connected to the control unit via the communication interface, and the communication interface is an I2C or UART communication interface.
[0020] The domestically produced high-reliability multi-channel storage device control system realizes the hot-swap function of the PCIE storage device through the CPU, the control unit and the PCIE switching chip, effectively reduces the peripheral circuit, reduces the complexity of the system hardware and improves the reliability of the storage device; by expanding the PCIE switching chip to multiple mounted PCIE storage devices and control units, the problems of increased material cost and increased debugging risk in the existing technical solution of realizing the storage upper limit by adding IO expansion chips are solved; through the logical control of the CPU and the control unit, the hot-swap of the PCIE storage device is quickly performed to improve the efficiency; the system can be implemented with domestically produced devices, which can effectively improve the overall localization rate.
[0021] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0022] The above-described embodiments only express the more specific and detailed embodiments described in this application, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of this application, which all belong to the protection scope of this application. Therefore, the protection scope of the patent application shall be based on the attached claims.
Claims
1. A nationally produced high-reliability multi-channel storage device control system, characterized by: The domestically produced high-reliability multi-channel storage device control system includes a CPU, a control unit, a PCIE switching chip and a preset number of PCIE storage devices, wherein: A preset number of the PCIE storage devices are mounted on a PCIE switching chip, and the PCIE switching chip connects each mounted PCIE storage device to a CPU; When a hot-plug command is triggered to the control unit, the control unit notifies the CPU of the hot-plug command, and the CPU simultaneously notifies the PCIE switch chip of the hot-plug command, and the PCIE switch chip reclaims the resources of the corresponding PCIE storage device; Then the CPU unloads the corresponding PCIE storage device from the PCIE switch chip; After the unloading is successful, the CPU turns off the power supply voltage of the corresponding PCIE storage device through the control unit; When the corresponding PCIE storage device is unplugged, the control unit forwards the status of the PCIE storage device to the CPU to complete the hot plug operation; When a hot-plug command is triggered to the control unit, the control unit notifies the CPU of the hot-plug command, and the CPU simultaneously notifies the PCIE switch chip of the hot-plug command, and the PCIE switch chip allocates resources of the corresponding PCIE storage device; Then the CPU turns on the power supply voltage of the corresponding PCIE storage device through the control unit; When the corresponding PCIE storage device is inserted, the control unit forwards the state of the PCIE storage device to the CPU, and the CPU loads and initializes the PCIE storage device to complete the hot plug operation.
2. The nationally produced high-reliability multi-channel storage device control system as claimed in claim 1, characterized in that: The CPU is connected to the PCIE switching chip via a PCIE bus.
3. The nationally produced high-reliability multi-channel storage device control system as claimed in claim 1, characterized in that: Each of the PCIE storage devices is connected to the PCIE switching chip via a PCIE bus.
4. The nationally produced high-reliability multi-channel storage device control system as claimed in claim 1, characterized in that: Each of the PCIE storage devices includes a CLKEN clock enable signal, a PERST slot reset signal, a PWREN slot power enable signal and a PRSNT device in place signal, and the control unit is connected to each signal on each PCIE storage device.
5. The nationally produced high-reliability multi-channel storage device control system as claimed in claim 1, characterized in that: The CPU is provided with a communication interface, and the CPU is connected to the control unit via the communication interface.