Simulation method for thermal transport performance of interface between two-dimensional Van der Waals semiconductor material and device

Through first-principle calculation and experimental verification, precise modeling and optimization of the interface thermal conductivity of two-dimensional van der Waals semiconductor materials has been solved, and the problem of insufficient interface thermal conductivity in micro-nano electronic devices is achieved, and efficient thermal management and high reliability are achieved device development.

CN119181449APending Publication Date: 2024-12-24GUIZHOU NORMAL UNIVERSITY

Patent Information

Application Number
CN202411255009.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-09
Publication Date
2024-12-24

AI Technical Summary

Technical Problem

In micro-nano electronic devices, insufficient thermal conductivity of the interface leads to heat accumulation, affecting the electrical performance and service life of the device. The theoretical predictions are difficult to match with experimental results, and there is a lack of effective thermal resistance optimization strategies for interfaces.

Method used

Through first-principle calculation combined with experimental verification, the interface thermal conductivity of two-dimensional van der Waals semiconductor materials is accurately modeled and optimized, and the interface thermal conductivity is used to control the anti-bond chemical bond and interface structure to develop high-precision calculation models to achieve accurate prediction of interface thermal conductivity and optimization.

Benefits of technology

It significantly reduces the interface thermal resistance, improves the heat transfer efficiency, achieves a high consistency between theory and experimental results, and promotes the development of high-performance and high-reliability micro-nano electronic devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a method for simulating thermal transport performance of a two-dimensional Van der Waals semiconductor material and device interface, which comprises the following steps of: 1, accurately modeling interface thermal conductivity and optimizing theoretical calculation so as to realize an accurate prediction and reduction strategy of the interface thermal conductivity; 2, experimental verification and performance optimization of an interface heat transport mechanism are carried out, so that deep combination of theories and experiments and establishment of a verification system are achieved; and step 3, the thermal management performance of the micro-nano electronic device is remarkably improved and the thermal reliability is enhanced through the steps. The method has the advantages that 1, the thermal transport characteristics of the two-dimensional Van der Waals semiconductor interface are accurately simulated; and 2, the innovative development of a multi-scale interface thermal management strategy enriches the technical means of interface thermal management, and provides a brand new design thought for efficient heat dissipation and thermal stability of micro-nano electronic devices.
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Description

Technical Field

[0001] The invention belongs to the field of information technology, and in particular relates to a method for simulating thermal transport performance at the interface of a two-dimensional van der Waals semiconductor material and a device. Background Art

[0002] As the cornerstone of the information technology revolution, micro-nanoelectronic devices have been widely used in the fields of communications, computing, sensing and storage, which have had a profound impact on modern society. However, with the rapid development of device miniaturization and functional integration, the accumulation of heat in micro-nanoelectronic devices under high-intensity working conditions is inevitable. Especially in high-frequency and high-current density operating environments, the heat energy in local areas cannot be effectively dissipated in time, forming so-called "hot spots". These hot spots not only slow down the electron migration rate and affect the electrical properties of the device, but also cause changes in the physical and chemical properties of the material, such as lattice expansion, material phase change, and even structural damage, which seriously shortens the service life of electronic devices. In addition, thermal runaway may also trigger the failure of adjacent components, triggering a chain reaction at the system level, affecting the safety and stability of the entire system.

[0003] Interfacial thermal conductivity is one of the most difficult problems in electronic devices. In heterogeneous structures, the interface between different materials becomes a "bottleneck" of heat transfer due to factors such as discontinuous atomic arrangement and complex phonon scattering mechanism, which significantly hinders the effective transfer of thermal energy from the heat source to the heat dissipation medium. This not only requires the material itself to have good thermal conductivity, but also emphasizes the optimization of interfacial thermal conductivity. It is particularly noteworthy that the study of interfacial thermal conductivity reveals the complexity of heat transfer at the interface of heterogeneous structures, and interface engineering has become the key to improving thermal management efficiency. By precisely controlling the chemical properties, morphology and interactions of the interface, the thermal resistance can be significantly reduced and the ability of heat flow through the interface can be improved. At the same time, an in-depth understanding of the heat transfer mechanism, such as the study of phonon bridges, interfacial phonon scattering and other effects, provides a theoretical basis for designing more efficient thermal management solutions.

[0004] Two-dimensional van der Waals (vdW) semiconductor materials, such as graphene, molybdenum disulfide (MoS2), and boron nitride (hBN), provide a new perspective for solving the problem of interfacial heat accumulation due to their unique layered structures and excellent physical properties [1,2,4,6]. The interlayer interactions of these materials mainly rely on weak vdW forces, which not only makes them easy to form heterostructures with other materials, but also provides the possibility of regulating heat transport properties. In particular, by precisely controlling the interlayer spacing, orientation, and interface quality of these two-dimensional materials, the transport efficiency of hot carriers (mainly phonons) can be significantly affected, thereby optimizing thermal management performance.

[0005] First-principles calculations have shown significant advantages in the study of interfacial thermal conductivity. Starting from a microscopic perspective, based on the underlying theory of quantum mechanics, it can accurately simulate the electronic structure and phonon dynamics of materials without relying on experimental parameters, and directly reveal the microscopic mechanism of interfacial heat transport. This method can not only analyze the scattering pattern, frequency distribution and group velocity of phonons in detail, providing an atomic-level perspective for understanding thermal conductivity, but also deeply explore the regulatory effect of interfacial chemical bonds on thermal transport properties. Through theoretical calculations, researchers can design and optimize material structures in a virtual environment, predict thermoelectric properties, and guide the synthesis and performance improvement of experimental materials, greatly improving the efficiency and accuracy of research. In addition, combined with the precise calculation of anharmonic vibration effects, first-principles calculations can fully capture the complexity of interfacial heat transport, providing powerful theoretical tools and design strategies for solving key problems in thermal management, such as reducing interfacial thermal resistance and regulating thermal conductivity, and effectively promoting the development and application of high-performance thermal management materials.

[0006] In the research on optimizing the thermal transport performance of interfaces in two-dimensional van der Waals semiconductor devices, two key challenges have emerged: First, it is extremely difficult to accurately simulate thermal transport at complex interfaces, and it is necessary to overcome the complexity of thermal resistance prediction caused by factors such as phonon scattering, chemical bond characteristics, and interface roughness. Therefore, it has become an urgent task to develop more sophisticated computational models that take into account microscopic details in order to design heterojunction structures with low interface thermal resistance. Secondly, the problem of matching theoretical predictions with experimental results has become prominent. Complex situations such as material defects, strains, and interface imperfections in practical applications require a combination of more advanced computational methods and high-precision experimental techniques to ensure the accuracy of model verification and the effectiveness of thermal management strategies. Establishing a reliable theoretical-experimental verification system is crucial to guiding actual material design and optimization of thermal management strategies. Summary of the invention

[0007] A method for simulating the thermal transport performance of the interface between two-dimensional van der Waals semiconductor materials and devices. Through in-depth exploration of surface atomic bond relaxation, heterojunction interface effects and one-dimensional core-shell nanowire thermal resistance regulation, as well as subsequent research on the thermal transport properties of two-dimensional materials such as layered van der Waals MoW3X8 thin films, silicene hydrogenation effects and Janus tungsten selenium sulfur double-layer thin films, the present invention aims to accurately analyze the thermal transport mechanism of the interface of two-dimensional van der Waals semiconductor devices through first-principles calculation methods (1) and accurately model the interface thermal conductivity. This method aims to address the current problems of the lack of accurate modeling and optimization strategies for interface thermal resistance, as well as the gap between theoretical calculations and experimental verifications. The goal is to develop a high-precision calculation model to accurately predict and optimize the interface thermal conductivity. (2) Through the close combination of theory and experiment, the model parameters are verified and adjusted to ensure a high degree of consistency between the calculation results and experimental observations. The research will focus on exploring fine-tuning strategies for interface structures to achieve ultra-low interface thermal resistance, thereby providing theoretical support and design guidance for the thermal management of micro-nanoelectronic devices and promoting the development of high-performance and high-reliability electronic devices.

[0008] The following steps are involved:

[0009] Step 1: Accurate modeling and theoretical calculation optimization of interface thermal conductivity to achieve accurate prediction and reduction strategy of interface thermal conductivity

[0010] 1) Simulate the impact of multiple factors on device interfaces: By accurately calculating the phonon dispersion relation, including frequency and group velocity, we gain a deep understanding of the impact mechanism of antibonding chemical bonds on phonon propagation. In addition, the first-principles method also allows us to perform accurate simulations of anharmonic vibration characteristics, revealing the intrinsic connection between device interfaces and heat dissipation. For microstructure design, we can use the calculation results to optimize chemical bonds and predict thermoelectric performance.

[0011] Simulating the thermal transport behavior of electronic devices, by combining first principles with thermodynamic models, helps to evaluate the stability and reliability of material performance in actual application environments.

[0012] 2) Optimize the interface model and improve the device interface thermal conductivity: The continuous expansion of first-principles calculation methods, such as the introduction of machine learning and high-performance computing, will improve the accuracy and efficiency of research and provide a new research path for exploring ultra-low thermal conductivity materials.

[0013] Step 2: Experimental verification and performance optimization of the interface heat transport mechanism, so as to achieve a deep integration of theory and experiment and establish a verification system

[0014] 1) Combining experimental measurements, experimental and theoretical comparison and verification: First, relying on mature theoretical calculation methods, such as density functional theory (DFT), we accurately analyzed the heat transport mechanism of two-dimensional van der Waals semiconductor interfaces at the atomic level. This theory-first strategy laid a solid foundation for subsequent research. Then, by introducing molecular dynamics simulation and machine learning-assisted calculation, we planned a rigorous material preparation and performance testing process at the experimental level, using advanced preparation technologies such as chemical vapor deposition (CVD) and atomic layer deposition (ALD) to ensure that the theoretically designed materials can be accurately realized and tested, and continuously optimize the model and strategy through the mutual feedback between theoretical predictions and experimental results.

[0015] 2) Search and predict new two-dimensional van der Waals heterojunction devices

[0016] Step 3: Through the above steps, the thermal management performance and thermal reliability of micro-nanoelectronic devices are significantly improved. It is found that the antibonding chemical bonds have a significant impact on the mechanical and thermodynamic properties. The interface thermal conductivity between black phosphorus and silicon dioxide insulators shows an obvious size effect. The interface thermal conductivity G can be obtained according to the following formula:

[0017]

[0018] Where ΔJ is the net heat flow difference between interfaces, ω is the phonon vibration frequency, Ξ is the phonon transmission coefficient between interfaces related to the structural size, D is the phonon state density, and N is the phonon number density. It can be seen from the formula that the interfacial thermal conductivity of the structure can be regulated by the structural size effect, that is, the size of the interface effect between black phosphorus and silicon dioxide can be adjusted by nanoscale, thereby accurately regulating the interfacial thermal conductivity between the two. Regulating the interface effect of the two-dimensional semiconductor heterojunction at the nanoscale can regulate the interface phonon transmittance of the heterojunction, thereby achieving the purpose of accurately controlling the interface thermal transport properties of the two-dimensional semiconductor heterojunction. As the thickness of the black phosphorus film changes from bulk to monolayer, the interfacial thermal conductivity of the black phosphorus / silicon dioxide heterojunction increases from 55MWm-2K-1 to 70MWm-2K-1, achieving an increase of 27%. The efficient and controllable interfacial thermal transport properties exhibited by the black phosphorus heterojunction can be used to manufacture black phosphorus-based nanomaterials with high-speed thermal conductivity, which can be stacked in devices to solve the problem of device instability caused by heat accumulation in new nanoelectronic devices.

[0019] In summary, the present invention has the following beneficial effects: 1. It closely combines cutting-edge theoretical calculation methods, especially first-principles calculations, with experimental techniques, and innovatively constructs a full-chain research system from microscopic mechanism analysis to practical application verification. By accurately simulating the thermal transport characteristics of two-dimensional van der Waals semiconductor interfaces, we can not only deeply understand the regulation mechanism of thermal conductivity by microstructural factors such as antibonding chemical bonds, but also design and optimize the interface structure, directly guide the synthesis and performance testing of experimental materials, and achieve seamless connection from theoretical prediction to experimental verification, greatly improving the accuracy and practicality of the research. 2. Innovative development of multi-scale interface thermal management strategies. In response to the core challenge of interface thermal resistance in the field of thermal management, the present invention innovatively proposes a multi-dimensional interface optimization strategy, aiming to significantly reduce the interface thermal resistance and optimize the heat transfer efficiency by precisely controlling the microstructure and chemical properties of two-dimensional materials. The proposal of this strategy not only enriches the technical means of interface thermal management, but also provides a new design idea for efficient heat dissipation and thermal stability of micro-nanoelectronic devices, which has great theoretical significance and application value. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is the technical roadmap of the present invention;

[0021] Figure 2 Schematic diagram of black phosphorus / silicon dioxide heterostructure;

[0022] Figure 3 is the size-dependent thermal conductivity of the black phosphorus / silicon dioxide heterojunction interface;

[0023] Figure 4 Schematic diagram of (a) single cell and (b) multi-cell structure of two-dimensional Eu2ZnSb2 monolayer in Example 1;

[0024] Figure 5 (a) 3D local electron density map and (b) phonon spectrum map of the 2D Eu2ZnSb2 monolayer in Example 1;

[0025] Figure 6 COHP bonding analysis of the two-dimensional Eu2ZnSb2 monolayer in Example 1;

[0026] Figure 7 are the size-dependent black phosphorus / silicon dioxide heterojunction interface interaction energy, van der Waals energy and strain energy in Example 2;

[0027] Figure 8 is the size-dependent heterojunction interface adhesion energy in Example 2;

[0028] Fig. 9 is the size-dependent thermal conductivity of the black phosphorus / silicon dioxide heterojunction interface in Example 2;

[0029] Fig.10 is the temperature-dependent thermal conductivity of the black phosphorus / silicon dioxide heterojunction interface in Example 2;

[0030] Fig.11 The variation trend of thermal conductivity of silicon germanium core-shell nanowires with silicon core ratio in Example 3;

[0031] Fig.12 This is the variation trend of the interface thermal resistance of silicon germanium core-shell nanowires with the silicon core ratio in Example 3. DETAILED DESCRIPTION

[0032] The present invention is further described in detail below in conjunction with the accompanying drawings and embodiments:

[0033] Example 1

[0034] Recently, we have 2 ZnSb 2 Single layer (such as Figure 4 It was found that it has stable thermodynamic and kinetic properties, proving the stability of its structure (as shown in Figure 5 As shown). Through COHP chemical bonding analysis, it was found that (as shown Figure 6 The interaction between the zinc phase elements and the surrounding atoms has a large number of antibonded states near the Fermi level, which confirms the existence of antibonding chemical bonds and indicates that it may have low thermal transport properties. This provides important clues for understanding the ultra-low thermal transport properties of two-dimensional zinc phase compounds. Next, through more in-depth calculations and experimental studies, we will further explore the mechanism of ultra-low thermal transport properties caused by antibonding chemical bonds in two-dimensional zinc phase compounds, laying the foundation for in-depth understanding and application in this field.

[0035] Example 2

[0036] Black phosphorus / silicon dioxide heterojunction surface / interface effects on the performance regulation of heterojunction interface thermal conductivity (J.Phys.D:Appl.Phys.2018,52,025302).

[0037] (i) The reduction of black phosphorus film thickness leads to a decrease in the heterojunction interface interaction energy, which can lead to an increase in the interface adhesion energy and interface coupling strength;

[0038] (ii) The interfacial adhesion strength can effectively regulate the probability of phonon transmission from the high-temperature side to the low-temperature side, ultimately leading to an increase in the interfacial thermal conductivity in the black phosphorus / silicon dioxide heterojunction;

[0039] (iii) At the same time, the increase in temperature can excite more phonons carrying heat to participate in heat flow transport, resulting in an interfacial thermal conductivity that is positively correlated with the temperature change. Figure 7Size-dependent black phosphorus / silicon dioxide heterojunction interface interaction energy, van der Waals energy, and strain energy. The inset shows the interfacial spacing at the heterojunction interface in the equilibrium state. Figure 8 Size-dependent heterojunction interface adhesion energy. The inset shows the size-dependent interface coupling force constant. Fig. 9 Size-dependent thermal conductance of black phosphorus / silicon dioxide heterojunction interfaces. Fig.10 Temperature-dependent thermal conductivity of black phosphorus / silicon dioxide heterojunction interfaces.

[0040] Example 3

[0041] (i) The interface mismatch in the Ge epilayer of one-dimensional Si / Ge core-shell nanowires causes a change in the system energy and leads to a change in the system's thermal transport properties;

[0042] (ii) Phonons are scattered at the interface, forming interfacial thermal resistance, which reduces the phonon transmittance between the silicon core and the germanium shell;

[0043] (iii) We found that adding a germanium shell can change the interfacial thermal resistance between the silicon core and the germanium shell. The thicker the germanium shell, the smaller the phonon transmittance from the silicon core to the germanium shell, and the greater the barrier effect of the interface on the phonon heat flow, resulting in an increase in the interfacial thermal resistance of the one-dimensional silicon / germanium core-shell nanowires;

[0044] (iiii) Due to the strong scattering effect between phonons and the interface, the interfacial thermal resistance at the nanowire interface will hinder the transmission of phonons from the high temperature region to the low temperature region, making the thermal conductivity of silicon / germanium core-shell nanowires much lower than that of the corresponding silicon nanowires or germanium nanowires. Fig.11 Variation trend of thermal conductivity of SiGe core-shell nanowires with Si-core ratio. Fig.12 Variation trend of interfacial thermal resistance of SiGe core-shell nanowires with Si-core ratio.

[0045] This specific embodiment is merely an explanation of the present invention and is not a limitation of the present invention. After reading this specification, those skilled in the art may make non-creative modifications to the present embodiment as needed. However, as long as they are within the scope of the claims of the present invention, they are protected by the patent law.

Claims

1. A method for simulating the thermal transport performance of a two-dimensional van der Waals semiconductor material and a device interface, characterized in that: The following steps are involved: Step 1: Accurate modeling and theoretical calculation optimization of interface thermal conductivity, so as to achieve accurate prediction and reduction strategy of interface thermal conductivity; 1) Simulate the impact of multiple factors on device interfaces: accurately calculate phonon dispersion relations, including frequency and group velocity, and understand the impact mechanism of antibonding chemical bonds on phonon propagation. In addition, use first-principles methods to accurately simulate anharmonic vibration characteristics, revealing the intrinsic connection between device interfaces and heat dissipation. For microstructure design, use calculation results to optimize chemical bonds and predict thermoelectric performance; simulate the heat transport behavior of electronic devices by combining first-principles with thermodynamic models; 2) Optimize the interface model and improve the device interface thermal conductivity: Continuously expand the first-principles calculation method, introduce machine learning and high-performance computing, and improve the accuracy and efficiency of research; Step 2: Experimental verification and performance optimization of the interface heat transport mechanism, to achieve a deep integration of theory and experiment and to establish a verification system; 1) Combine experimental measurement and experimental and theoretical comparison and verification: First, relying on mature theoretical calculation methods, accurately analyze the heat transport mechanism of two-dimensional van der Waals semiconductor interfaces at the atomic level. Then, by introducing molecular dynamics simulation and machine learning-assisted calculation, plan a rigorous material preparation and performance testing process at the experimental level, and use advanced preparation technology to ensure that the theoretically designed materials can be accurately realized and tested. Through the feedback between theoretical predictions and experimental results, continuously optimize the model and strategy; 2) Search and predict new two-dimensional van der Waals heterojunction devices Step 3: Through the above steps, the thermal management performance and thermal reliability of micro-nanoelectronic devices are significantly improved. It is found that the antibonding chemical bonds have a significant impact on the mechanical and thermodynamic properties. The interface thermal conductivity between black phosphorus and silicon dioxide insulators shows an obvious size effect. The interface thermal conductivity G can be obtained according to the following formula: Where ΔJ is the net heat flow difference between interfaces, ω is the phonon vibration frequency, Ξ is the phonon transmission coefficient between interfaces related to the structure size, D is the phonon state density, and N is the phonon number density. From this formula, it can be seen that the interfacial thermal conductivity of the structure can be regulated by the structural size effect, that is, the size of the interface effect between black phosphorus and silicon dioxide can be adjusted at the nanoscale, thereby accurately regulating the interfacial thermal conductivity between the two. Regulating the interface effect of the two-dimensional semiconductor heterojunction at the nanoscale can regulate the interfacial phonon transmittance of the heterojunction, thereby achieving the purpose of accurately controlling the thermal transport properties of the interface of the two-dimensional semiconductor heterojunction. As the thickness of the black phosphorus film changes from bulk to monolayer, the interfacial thermal conductivity of the black phosphorus / silicon dioxide heterojunction increases from 55MWm-2K-1 to 70MWm-2K-1, achieving an increase of 27%.

2. The method for simulating the thermal transport performance of the interface between a two-dimensional van der Waals semiconductor material and a device according to claim 1, characterized in that: The theoretical calculation method in step 2 is density functional theory (DFT).

3. The method for simulating the thermal transport performance of the interface between a two-dimensional van der Waals semiconductor material and a device according to claim 1, characterized in that: The advanced preparation technology in step 2 is, for example, chemical vapor deposition (CVD) and / or atomic layer deposition (ALD).

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