Phase difference control circuit, phase difference control method and power converter

Abstract

The invention provides a phase difference control circuit, a phase difference control method and a power converter, and the phase difference control circuit comprises a sampling module which is configured to collect the operation parameters of an electric energy conversion circuit; the pulse width modulation generation module comprises at least two groups of pulse width modulation units, and each group of pulse width modulation units corresponds to one direct current to direct current circuit and is configured to output a switch control signal to the direct current to direct current circuit; the pulse width modulation unit comprises a time reference counting circuit for performing periodic counting from zero to a counting peak value according to a progressive increase and progressive decrease mode, and a comparison circuit for generating a corresponding switch control signal based on a comparison result of a counting value of the time reference counting circuit and a counting reference value; and the control module is configured to determine an actual counting peak value related to the waveform period of the switch control signal according to the operation parameter, and update the counting peak value and the counting reference value of each pulse width modulation unit based on the actual counting peak value. According to the invention, the synchronism of each DC-to-DC circuit can be improved.

Description

Technical Field

[0001] The present application relates to the technical field of battery energy conversion, and in particular to a phase difference control circuit, a phase difference control method and a power converter. Background Art

[0002] In the bidirectional inverter of low-voltage battery, an efficient DC-to-DC converter (hereinafter referred to as DCDC converter) is usually required to realize the exchange of alternating current energy. However, due to the large power of the inverter, a single output cannot meet its power requirements. Therefore, under actual working conditions, two parallel DCDC converters are selected and the output signal of each DCDC converter is independently controlled to interleave two phases, thereby providing higher output power for the inverter.

[0003] At present, the enhanced pulse width modulator (EPWM module) of the digital signal processing chip deployed in the inverter is mainly used to control the waveform output by the dual parallel DCDC converter. However, due to the poor phase synchronization of the EPWM module, it is easy to cause errors in the output drive waveform under actual working conditions.

[0004] The preceding description is intended to provide general background information and does not necessarily constitute prior art. Summary of the invention

[0005] In order to solve the above-mentioned problems, a phase difference control circuit, a phase difference control method and a power converter are provided in the embodiments of the present application, which can use the actual counting peak value of the electric energy conversion circuit to uniformly update the counting peak value and counting reference value of each pulse width modulation unit, thereby changing the switching control signal received by each DC-to-DC circuit to improve the synchronization of each DC-to-DC circuit.

[0006] To this end, one aspect of the present application provides a phase difference control circuit for controlling the phase difference in an electric energy conversion circuit, wherein the electric energy conversion circuit comprises at least two parallel DC-to-DC circuits, each of which comprises a push-pull circuit on the primary side and a half-bridge circuit on the secondary side, and the phase difference control circuit comprises:

[0007] a sampling module configured to collect operating parameters of the power conversion circuit, wherein the operating parameters include an output voltage of the power conversion circuit and an actual current in each of the DC-to-DC circuits;

[0008] A pulse width modulation generation module, comprising at least two groups of pulse width modulation units, each group of the pulse width modulation units corresponds to one of the DC-DC converters, and is configured to output a switch control signal to the corresponding DC-DC converter, wherein the pulse width modulation unit comprises a time reference counting circuit and a comparison circuit, wherein the time reference counting circuit is configured to perform periodic counting from zero to a count peak value in an increasing and decreasing mode, and the comparison circuit is configured to generate a switch control signal of the corresponding DC-DC converter based on a comparison result of a count value of the time reference counting circuit and a count reference value;

[0009] The control module is configured to determine an actual count peak value related to the waveform period of the switch control signal according to the operating parameters, and update the count peak value of each pulse width modulation unit and the count reference value of each pulse width modulation unit based on the actual count peak value.

[0010] Optionally, in combination with any of the above aspects, in another implementation of the present aspect, at least two parallel DC-DC converters include a first circuit and a second circuit.

[0011] The phase difference between the switch control signals of the push-pull circuit on the primary side of the first circuit and the push-pull circuit on the primary side of the second circuit is 90 degrees, and / or the phase difference between the switch control signals of the half-bridge circuit on the secondary side of the first circuit and the half-bridge circuit on the secondary side of the second circuit is 90 degrees.

[0012] Optionally, in combination with any of the above aspects, in another implementation of this aspect, the control module includes:

[0013] a processing unit, wherein the processing unit is configured to generate a corresponding voltage error signal according to the output voltage and a preset given voltage value, and to generate a corresponding given current value according to the voltage error signal,

[0014] At least one control unit is provided in one-to-one correspondence with the DC-to-DC circuits, and the control unit is configured to calculate an actual count peak value corresponding to each DC-to-DC circuit based on the given current value and the actual current in each DC-to-DC circuit.

[0015] Optionally, in combination with any of the above aspects, the processing unit includes a voltage sampling feedback circuit and a voltage loop control circuit, the voltage sampling feedback circuit is configured to generate a corresponding voltage error signal according to the output voltage and a preset given voltage value, and the voltage loop control circuit is configured to generate a corresponding given current value according to the voltage error signal output by the voltage sampling feedback circuit;

[0016] The control unit includes a current sampling feedback circuit and a current loop control circuit. The current sampling feedback circuit is arranged in a one-to-one correspondence with the DC-to-DC circuit. The current sampling feedback circuit is configured to calculate a current error signal based on the given current value and the actual current in each DC-to-DC circuit. The current loop control circuit is configured to generate a corresponding actual count peak value based on the current error signal.

[0017] Optionally, in combination with any of the above aspects, the sampling module includes an analog-to-digital conversion module, which is configured to receive an analog signal of the output voltage of the power conversion circuit, convert the analog signal into a digital signal corresponding to the output voltage, and input the digital signal corresponding to the output voltage into the control module.

[0018] Another aspect of the present application provides a phase difference control method, which is applied to the phase difference control circuit in any of the above aspects, and the method includes:

[0019] Collecting operating parameters of the power conversion circuit, wherein the operating parameters include an output voltage of the power conversion circuit and an actual current in each DC-to-DC circuit in the power conversion circuit;

[0020] determining an actual count peak value associated with a waveform period of a switch control signal according to the operating parameter;

[0021] The count peak value of each pulse width modulation unit and the count reference value of each pulse width modulation unit are updated based on the actual count peak value.

[0022] Optionally, in combination with any of the above aspects, updating the count peak value of each pulse width modulation unit and the count reference value of each pulse width modulation unit based on the actual count peak value includes:

[0023] Based on the actual count peak value, updating the count peak value of each of the pulse width modulation units to the actual count peak value;

[0024] According to the actual count peak value and the original count reference value of each pulse width modulation unit, an updated count reference value corresponding to each pulse width modulation unit is obtained.

[0025] Optionally, in combination with any of the above aspects, obtaining an updated count reference value corresponding to each of the pulse width modulation units according to the actual count peak value and the original count reference value of each of the pulse width modulation units includes:

[0026] In a discharge scenario, obtaining an updated count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the primary side according to the actual count peak value and the original count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the primary side;

[0027] The updated count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the primary side is internalized to obtain the updated count reference value of the pulse width modulation unit corresponding to the half-bridge circuit on the secondary side.

[0028] Optionally, in combination with any of the above aspects, obtaining an updated count reference value corresponding to each of the pulse width modulation units according to the actual count peak value and the original count reference value of each of the pulse width modulation units includes:

[0029] In a charging scenario, an updated counting reference value of the pulse width modulation unit corresponding to the half-bridge circuit on the secondary side is obtained according to the actual counting peak value and the original counting reference value of the pulse width modulation unit corresponding to the half-bridge circuit on the secondary side;

[0030] The updated count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the secondary side is subjected to indentation processing to obtain the updated count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the primary side.

[0031] Optionally, in combination with any of the above aspects, in another implementation of the present aspect, a power converter is provided, including:

[0032] An electric energy conversion circuit, comprising at least two parallel DC-to-DC circuits, each of which comprises a push-pull circuit on a primary side and a half-bridge circuit on a secondary side;

[0033] A phase difference control circuit as described in any one of the above aspects.

[0034] As described above, the phase difference control circuit, phase difference control method and power converter of the present application. In the above manner, the actual counting peak value related to the waveform period of the switch control signal is calculated using the actual operating parameters of the power conversion circuit, and the counting peak value of the time base counting circuit of the corresponding pulse width modulation unit and the counting reference value of the comparison circuit are updated based on the actual counting peak value, so that each group of pulse width modulation units after the update can generate a switch control signal with higher synchronization with a unified counting peak value and respective counting reference values, thereby improving the synchronization of each DC-DC circuit.

[0035] The above summary is provided to introduce some concepts in a simplified form, which will be further described in detail in the following detailed description. The above summary is neither intended to identify the key features or essential features of the claimed subject matter nor to be used to help determine the scope of the claimed subject matter. The claimed subject matter of the application is not limited to implementations that solve any or all of the disadvantages pointed out in the background technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present application, and together with the specification, are used to explain the principles of the present application. In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can also be obtained based on these drawings without paying creative labor. These drawings and text descriptions are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application for those skilled in the art by referring to specific embodiments.

[0037] Figure 1 A schematic diagram of the hardware structure of a phase difference control circuit 100 and an electric energy conversion circuit 200 for implementing each embodiment of the present application;

[0038] Figure 2 Schematic diagram of the hardware structure of the power conversion circuit 200 provided in an embodiment of the present application;

[0039] Figure 3 2 is a schematic diagram of the hardware structure of a first circuit 220X provided in an embodiment of the present application;

[0040] Figure 4 Schematic diagram of the hardware structure of the second circuit 220Y provided in an embodiment of the present application;

[0041] Figure 5 A schematic diagram of a switch control signal and a count value of a time reference counting circuit 1422 provided in an embodiment of the present application;

[0042] Fig. 6A A schematic diagram of a waveform of a switch control signal corresponding to each DC-DC converter provided in an embodiment of the present application;

[0043] Figure 6B A schematic diagram of the phase difference of each switch control signal provided in an embodiment of the present application;

[0044] Figure 7 1 is a schematic diagram of the hardware structure of a control module 160 provided in an embodiment of the present application;

[0045] Figure 8 A schematic diagram of a flow chart of a phase difference control method provided in an embodiment of the present application;

[0046] Fig. 9 A waveform diagram of a retracted switch control signal provided in an embodiment of the present application;

[0047] Fig.10 Schematic diagram of the hardware structure of a power converter 1000 provided in an embodiment of the present application. DETAILED DESCRIPTION

[0048] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0049] It should be noted that, in this article, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context of the specific embodiment.

[0050] It should be understood that, although the terms first, second, third, etc. may be used to describe various information in this article, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of this article, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein can be interpreted as "at the time of" or "when" or "in response to determination". Furthermore, as used in this article, the singular forms "one", "one" and "the" are intended to also include plural forms, unless there is an opposite indication in the context. It should be further understood that the terms "comprising" and "including" indicate that there are the described features, steps, operations, elements, components, projects, kinds, and / or groups, but do not exclude the existence, occurrence or addition of one or more other features, steps, operations, elements, components, projects, kinds, and / or groups. The terms "or", "and / or", "including at least one of the following" etc. used in this application can be interpreted as inclusive, or mean any one or any combination. An exception to this definition will occur only when a combination of elements, functions, steps or operations are inherently mutually exclusive in some manner.

[0051] It should be understood that, although the various steps in the flowchart in the embodiment of the present application are displayed in sequence according to the indication of the arrows, these steps are not necessarily performed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and it can be performed in other orders. Moreover, at least a portion of the steps in the figure may include a plurality of sub-steps or a plurality of stages, and these sub-steps or stages are not necessarily performed at the same time, but can be performed at different times, and their execution order is not necessarily performed in sequence, but can be performed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0052] As used herein, the words "if" and "if" may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.

[0053] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0054] See also Figure 1 ( Figure 1The number of module units shown in the figure is only for example and does not constitute a limitation to the present application). A hardware structure diagram of a phase difference control circuit 100 and a power conversion circuit 200 is provided. The phase difference control circuit 100 may include a sampling module 120, a pulse width modulation generation module 140 and a control module 160. The power conversion circuit 200 may include at least two DC-to-DC circuits 220 connected in parallel.

[0055] Among them, the power conversion circuit 200 can be used to convert the input DC voltage into the DC voltage required in the circuit; or, convert the input AC voltage into the DC voltage required in the circuit; or, convert the input AC voltage into the AC voltage required in the circuit; or, convert the input DC voltage into the AC voltage required in the circuit.

[0056] The power conversion circuit 200 may include, but is not limited to, any one or more of a variety of circuits such as a DC to DC circuit (also called a DCDC circuit), an AC to DC circuit (also called an ACDC circuit), an AC to AC circuit (also called an ACAC circuit), and a DC to AC circuit (also called a DCAC circuit). Figure 1 Only the case where the power conversion circuit 200 includes two parallel DC-to-DC circuits 220 is shown, but the corresponding circuits and the number of circuits can be set as required according to user needs without changing the inventive concept of the present application.

[0057] Each DC-DC converter 220 may include a push-pull circuit 222 on the primary side and a half-bridge circuit 224 on the secondary side. The push-pull circuit 222 on the primary side may be used to represent a push-pull circuit connected to the power supply side of the DC-DC converter 220. The half-bridge circuit 224 on the secondary side may be used to represent a half-bridge circuit connected to a capacitor in the DC-DC converter 220.

[0058] The push-pull circuit 222 may be used to represent a circuit having a push-pull (a common power converter topology) structure. The push-pull circuit 222 may include two switching devices ( Figure 1 ). The push-pull circuit 222 can increase the overall circuit output power and reduce the loss of a single switch by controlling the two switching devices to work alternately, thereby helping to improve the conversion efficiency. In some application scenarios, the voltage gain of the push-pull circuit 222 can be twice that of other circuits, which is suitable for application scenarios that require high voltage output. At the same time, since the control strategy of the push-pull circuit 222 is relatively simple, it can achieve full range adjustment from zero to the maximum voltage value, making it easier to design and implement. In addition, due to the working mode of the push-pull circuit 222, its electromagnetic interference is small, which can make the output voltage stable and respond quickly to load changes.

[0059] The half-bridge circuit 224 may be used to represent a circuit structure commonly used for AC / DC conversion. The half-bridge circuit 224 may include two switching devices ( Figure 1 The half-bridge circuit 224 in the DC-to-DC circuit 220 of the present application can play a role of synchronous rectification.

[0060] The phase difference control circuit 100 can be used to control the phase difference in the power conversion circuit 200. The phase difference can be used to indicate the difference in phase between the waveforms of the plurality of switch control signals output by the phase difference control circuit 100 to the power conversion circuit 200.

[0061] The sampling module 120 may be used to represent a circuit module that calculates a corresponding voltage / current digital signal according to an input analog signal.

[0062] The pulse width modulation generation module 140 can be implemented by a pulse width modulation (PWM) generator. The pulse width modulation generation module 140 can include at least two groups of pulse width modulation units 142. Each group of pulse width modulation units 142 corresponds to a DC to DC circuit 220. The pulse width modulation unit 142 can be implemented by an enhanced pulse width modulation (EPWM) module. Figure 1 In the figure, only a circuit structure of a group of pulse width modulation units 142 is shown using two pulse width modulation units 142. It can be understood that the corresponding circuit and the number of circuits can be set as required according to user needs without changing the inventive concept of the present application.

[0063] The pulse width modulation unit 142 may be configured to output a switch control signal to the corresponding DC-DC converter 220. The pulse width modulation unit 142 may include a time reference counting circuit 1422 and a comparison circuit 1424. The time reference counting circuit 1422 may be used to determine the period / frequency of the switch control signal and manage the phase of the switch control signal. The comparison circuit 1424 may be used to compare the count value of the time reference counting circuit 1422 with a preset count reference value, and output a corresponding high level or low level according to the comparison result, thereby forming a corresponding switch control signal.

[0064] The control module 160 may be used to represent a circuit functional module that executes data processing logic.

[0065] Exemplarily, the sampling module 120 may be configured to collect operating parameters of the power conversion circuit 200 , wherein the operating parameters may include the output voltage of the power conversion circuit 200 and the actual current in each DC-DC converter 220 .

[0066] The time reference counting circuit 1422 may be configured to periodically count from zero to a count peak value in an increasing and decreasing mode, that is, in one cycle of the switch control signal, the count value of the time reference counting circuit 1422 increases from zero to a count peak value, and then decreases from the count peak value to zero. The comparison circuit 1424 may be configured to generate a corresponding switch control signal for the push-pull circuit 222 based on a comparison result between the count value of the time reference counting circuit 1422 and a pre-configured count reference value.

[0067] The control module 160 can be configured to determine the actual count peak value related to the waveform period of the switch control signal according to the operating parameters of the power conversion circuit 200, and update the count peak value of each pulse width modulation unit 142 and the count reference value of each pulse width modulation unit 142 based on the actual count peak value.

[0068] In this embodiment, the actual counting peak value related to the waveform period of the DC-to-DC circuit switch control signal is calculated by using the actual operating parameters of the electric energy conversion circuit, and the counting peak value of the time base counting circuit of the corresponding pulse width modulation unit and the counting reference value of the comparison circuit are updated based on the actual counting peak value, so that each group of pulse width modulation units after the update can generate a switch control signal with a higher synchronization with a unified counting peak value and their own counting reference value, thereby improving the synchronization of each DC-to-DC circuit.

[0069] In an exemplary embodiment, see Figure 2 , the at least two parallel DC-DC converters 220 in the power conversion circuit 200 may include a first circuit 220X and a second circuit 220Y. Those skilled in the art will appreciate that although Figure 2 Only an electric energy conversion circuit 200 consisting of a first circuit 220X and a second circuit 220Y is shown, but in actual application scenarios, based on the inventive concept provided in this application, the number of the first circuit 220X and the second circuit 220Y can be set to one or more as needed according to user needs.

[0070] The first circuit 220X may represent a DC-to-DC circuit composed of a push-pull circuit 222X on the primary side and a half-bridge circuit 224X on the secondary side.

[0071] The second circuit 220Y may represent a DC-to-DC circuit composed of a push-pull circuit 222Y on the primary side and a half-bridge circuit 224Y on the secondary side.

[0072] The first circuit 220X and the second circuit 220Y may be connected in parallel.

[0073] Exemplarily, the phase difference between the switch control signals of the push-pull circuit 222X on the primary side of the first circuit 220X and the push-pull circuit 222Y on the primary side of the second circuit 220Y is 90 degrees. And / or, the phase difference between the switch control signals of the half-bridge circuit 224X on the secondary side of the first circuit 220X and the half-bridge circuit 224Y on the secondary side of the second circuit 220Y is 90 degrees.

[0074] In the present embodiment, after using the control module to update the count peak value and the count reference value of each pulse width modulation unit based on the unified actual count peak value, each group of pulse width modulation units is used to output a switch control signal based on the updated count peak value and the count reference value to the corresponding DC-DC circuit, so that the push-pull circuit on the primary side in different circuits and / or the half-bridge circuit on the secondary side in different circuits receive the switch control signal with a phase difference of 90 degrees, which can ensure that the switch control signals of the first circuit and the second circuit are stably staggered by 90 degrees, balance the charge load borne by the first circuit and the second circuit, and help the power conversion circuit to provide higher output power, especially in application scenarios requiring high power output.

[0075] In an exemplary embodiment, Figure 3 As shown, a schematic diagram of the interaction between the pulse width modulation unit 142 and the first circuit 220X is provided. Among them, the push-pull circuit 222X located on the primary side of the first circuit 220X includes a switch device S1 and a switch device S2. The half-bridge circuit 224X located on the secondary side of the first circuit 220X includes a switch device S3 and a switch device S4. A group of pulse width modulation units 142 corresponding to the first circuit 220X may include two pulse width modulation units 142.

[0076] Each pulse width modulation unit 142 may be configured to independently output two switch control signals, and each switch control signal is used to control a corresponding switch device.

[0077] Exemplarily, the comparison circuit 1424 of the pulse width modulation unit 142 corresponding to the push-pull circuit 222X on the primary side of the first circuit 220X can be configured in the following manner:

[0078] When the count value of the time reference counting circuit 1422 is equal to the first count reference value and the time reference counting circuit 1422 is counting up, a high-level switch control signal is generated; when the count value of the time reference counting circuit 1422 is equal to the second count reference value and the time reference counting circuit 1422 is counting up, a low-level switch control signal is generated, thereby forming a switch control signal V corresponding to the switch device S1. gS1 .

[0079] When the count value of the time reference counting circuit 1422 is equal to the second count reference value and the time reference counting circuit 1422 is counting down, a high-level switch control signal is generated; when the count value of the time reference counting circuit 1422 is equal to the first count reference value and the time reference counting circuit 1422 is counting down, a low-level switch control signal is generated, thereby forming a switch control signal V corresponding to the switch device S2. gS2 .

[0080] The comparison circuit 1424 of the pulse width modulation unit 142 corresponding to the half-bridge circuit 224X on the secondary side of the first circuit 220X can be configured in the following manner:

[0081] When the count value of the time reference counting circuit 1422 is equal to the first count reference value and the time reference counting circuit 1422 is counting up, a high-level switch control signal is generated; when the count value of the time reference counting circuit 1422 is equal to the second count reference value and the time reference counting circuit 1422 is counting up, a low-level switch control signal is generated, thereby forming a switch control signal V corresponding to the switch device S3. gS3 .

[0082] When the count value of the time reference counting circuit 1422 is equal to the second count reference value and the time reference counting circuit 1422 is counting down, a high-level switch control signal is generated; when the count value of the time reference counting circuit 1422 is equal to the first count reference value and the time reference counting circuit 1422 is counting down, a low-level switch control signal is generated, thereby forming a switch control signal V corresponding to the switch device S4. gS4 .

[0083] Optionally, in some implementations, the CXU bit can be configured as the XQ_SET value and the CYU bit can be configured as the XQ_CLEXR value on the pulse width modulation unit 142, so as to generate the switch control signal V gS1 and V gS3 In some other embodiments, the CYD bit can be configured as the XQ_SET value and the CXD bit can be configured as the XQ_CLEXR value on the pulse width modulation unit 142 to generate the switch control signal V gS2 and V gS4 .

[0084] In this embodiment, by configuring the comparison circuit of the pulse width modulation unit corresponding to the first circuit in the above manner, the phase difference of the switching control signals of the switching devices in the push-pull circuit on the primary side can be 180 degrees to present a symmetrical wave shape, and the switching control signal of the switching device S1 in the push-pull circuit on the primary side is in phase with the switching control signal of the switching device S3 in the half-bridge circuit on the secondary side, and the switching control signal of the switching device S2 in the push-pull circuit on the primary side is in phase with the switching control signal of the switching device S4 in the half-bridge circuit on the secondary side.

[0085] In an exemplary embodiment, Figure 4 As shown, a schematic diagram of the interaction between the pulse width modulation unit 142 and the second circuit 220Y is provided. Among them, the push-pull circuit 222Y located on the primary side of the second circuit 220Y includes a switch device S5 and a switch device S6. The half-bridge circuit 224Y located on the secondary side of the second circuit 220Y includes a switch device S7 and a switch device S8.

[0086] Each pulse width modulation unit 142 may be configured to independently output two switch control signals, and each switch control signal is used to control a corresponding switch device.

[0087] Exemplarily, the comparison circuit 1424 of the pulse width modulation unit 142 corresponding to the push-pull circuit 222Y on the primary side of the second circuit 220Y may be configured in the following manner:

[0088] When the count value of the time reference counting circuit 1422 is equal to the second count reference value and the time reference counting circuit 1422 is counting up, a high-level switch control signal is generated; when the count value of the time reference counting circuit 1422 is equal to the second count reference value and the time reference counting circuit 1422 is counting down, a low-level switch control signal is generated, thereby forming a switch control signal V corresponding to the switch device S5. gS5 .

[0089] When the count value of the time reference counting circuit 1422 is equal to the first count reference value and the time reference counting circuit 1422 is counting down, a high-level switch control signal is generated; when the count value of the time reference counting circuit 1422 is equal to the first count reference value and the time reference counting circuit 1422 is counting up, a low-level switch control signal is generated, thereby forming a switch control signal V corresponding to the switch device S6. gS6 .

[0090] The comparison circuit 1424 of the pulse width modulation unit 142 corresponding to the half-bridge circuit 224Y on the secondary side of the second circuit 220Y can be configured as follows:

[0091] When the count value of the time reference counting circuit 1422 is equal to the second count reference value and the time reference counting circuit 1422 is counting up, a high-level switch control signal is generated; when the count value of the time reference counting circuit 1422 is equal to the second count reference value and the time reference counting circuit 1422 is counting down, a low-level switch control signal is generated, thereby forming a switch control signal V corresponding to the switch device S7. gS7 .

[0092] When the count value of the time reference counting circuit 1422 is equal to the first count reference value and the time reference counting circuit 1422 is counting down, a high-level switch control signal is generated; when the count value of the time reference counting circuit 1422 is equal to the first count reference value and the time reference counting circuit 1422 is counting up, a low-level switch control signal is generated, thereby forming a switch control signal V corresponding to the switch device S8. gS8 .

[0093] In this embodiment, by configuring the comparison circuit of the pulse width modulation unit corresponding to the second circuit in the above manner, the phase difference of the switch control signals of each switch device in the push-pull circuit on the primary side can be 180 degrees to present a symmetrical wave shape, and the switch control signal of the switch device S5 in the push-pull circuit on the primary side is in phase with the switch control signal of the switch device S7 in the half-bridge circuit on the secondary side, and the switch control signal of the switch device S6 in the push-pull circuit on the primary side is in phase with the switch control signal of the switch device S8 in the half-bridge circuit on the secondary side.

[0094] See also Figure 5 , shows a schematic diagram of the waveform of the switch control signal corresponding to each switch device and the change of the count value of the corresponding time reference counting circuit generated by the method provided in the above embodiment. Figure 5 The count value displayed in the figure increases from zero to the peak count value ( Figure 5 CMPA represents the first counting reference value, CMPB represents the second counting reference value), and then decreases from the counting peak value to zero as one cycle of the switch control signal.

[0095] from Figure 5 It can be seen that the switch control signals of switch devices S1 and S3 are in phase, and both are symmetrically waved around the moment when the count value is one-quarter of the cycle. The switch control signals of switch devices S2 and S4 are in phase, and both are symmetrically waved around the moment when the count value is three-quarters of the cycle. The switch control signals of switch devices S5 and S7 are in phase, and both are symmetrically waved around the moment when the count value is the count peak. The switch control signals of switch devices S6 and S8 are in phase, and both are symmetrically waved around the moment when the count value is zero.

[0096] See also Fig. 6A The switch control signal of the switch device S1 / S3 is symmetrical with the switch control signal of the switch device S2 / S4, and the phase difference is 180 degrees. The switch control signal of the switch device S5 / S7 is symmetrical with the switch control signal of the switch device S6 / S8, and the phase difference is 180 degrees.

[0097] like Figure 6B As shown, the switching control signal of the switching device S1 / S3 is staggered in phase with the switching control signal of the switching device S5 / S7, the switching control signal of the switching device S5 / S7 is staggered in phase with the switching control signal of the switching device S2 / S4, and the switching control signal of the switching device S2 / S4 is staggered in phase with the switching control signal of the switching device S6 / S8.

[0098] Therefore, the four-way switch control signals formed by adopting the solution provided in the above embodiment of the present application can be stably staggered by 90 degrees, so that the power conversion circuit can achieve a higher output power.

[0099] In an exemplary embodiment, the control module 160 may further include a processing unit and at least one control unit.

[0100] In which, the processing unit can be configured to generate a corresponding voltage error signal based on the output voltage of the power conversion circuit 200 and a given voltage value preset in the processing unit (that is, the user's expected value of the output voltage of the power conversion circuit in the current scenario), and generate a corresponding given current value based on the voltage error signal.

[0101] The control unit may be set in one-to-one correspondence with the DC-to-DC circuit 220. The control unit may be configured to calculate the actual count peak value corresponding to the corresponding DC-to-DC circuit 220 according to the given current value input by the processing unit (that is, the expected current value corresponding to the actual output voltage of the current power conversion circuit) and the actual current in the DC-to-DC circuit 220 corresponding to the control unit, thereby obtaining the actual count peak value corresponding to each DC-to-DC circuit 220.

[0102] In this embodiment, a processing unit is used to determine the corresponding given current value based on the error between the current actual output voltage and the given voltage value, and a control unit is used to determine the actual counting peak value based on the given current value and the current actual current. Based on the difference between the actual operating parameters and the preset given values, the waveform period of the switch control signal actually received by the current power conversion circuit can be determined more accurately, thereby improving the accuracy of the actual counting peak value.

[0103] In an exemplary embodiment, Figure 7As shown, the processing unit 162 in the control module 160 may further include a voltage sampling feedback circuit 1622 and a voltage loop control circuit 1624 , and the control unit 164 in the control module 160 may further include a current sampling feedback circuit 1642 and a current loop control circuit 1644 .

[0104] The voltage sampling feedback circuit 1622 may be configured to receive the output voltage of the power conversion circuit 200 input by the sampling module 120 , and generate a corresponding voltage error signal according to the output voltage of the power conversion circuit 200 and a given voltage value preset by the processing unit 162 .

[0105] The voltage loop control circuit 1624 may be configured to receive the voltage error signal output by the voltage sampling feedback circuit 1622. Furthermore, according to the voltage error signal generated by the voltage sampling feedback circuit 1622 and a preset voltage modulation ratio (e.g., proportional gain, integral time constant, etc. of a proportional integral PI algorithm), a given current value corresponding to the voltage error signal is generated.

[0106] The current sampling feedback circuit 1642 can be configured to receive the actual current of the corresponding DC-to-DC converter 220 input by the sampling module 120 and the given current value input by the voltage loop control circuit 1624. And, a current error signal is calculated based on the actual current of the DC-to-DC converter 220 and the given current value.

[0107] The current loop control circuit 1644 can be configured to receive the current error signal output by the current sampling feedback circuit 1642, and determine the given duty cycle corresponding to the switch control signal of the DC-DC converter 220 according to the current error signal and the preset current modulation ratio (e.g., the proportional gain of the proportional integral PI algorithm, the integral time constant, etc.). The actual count peak value corresponding to the current error signal is generated by using the given duty cycle (i.e., the expected ratio of the count reference value and the count peak value corresponding to the actual operating parameters in the current scenario) and the count peak value and the count reference value used by the current pulse width modulation unit 142 to generate the switch control signal. The actual count peak value is input to the pulse width modulation generation module 140 to update the count peak value of the time base counting circuit 1422 of each pulse width modulation unit 142 to the actual count peak value. According to the wave generation logic of the comparison circuit 1424 in each pulse width modulation unit 142 (such as the logic of symmetrical wave generation around the moment when the count value is one quarter of the cycle) and the actual count peak value currently generated, the count reference value of the comparison circuit 1424 in each pulse width modulation unit 142 is updated so that the comparison circuit 1424 in each pulse width modulation unit 142 can still implement the corresponding wave generation logic using the updated count reference value.

[0108] Optionally, in some implementations, the voltage loop control circuit 1624 and the current sampling feedback circuit 1642 may be implemented using a proportional-integral controller.

[0109] In this embodiment, the actual count peak value of the switch control signal in the current power conversion circuit is obtained by calculating the error between the operating parameter obtained by actual sampling and the given value, and the actual count peak value is used to update the count peak value and the count reference value of each pulse width modulation unit. The calculation logic of the actual count peak value can be simplified by feedback control, thereby improving the update efficiency of the count peak value and the count reference value.

[0110] In an exemplary embodiment, the sampling module 120 may include an analog-to-digital conversion module. The analog-to-digital conversion module, also known as an Analog-to-digital converter, referred to as an ADC conversion module, may be configured to receive an analog signal of an output voltage of the power conversion circuit 200, convert the analog signal of the output voltage into a digital signal corresponding to the output voltage, and input the digital signal corresponding to the output voltage into the control module 160.

[0111] In this embodiment, by using an analog-to-digital conversion module to determine the digital signal of the output voltage, the difficulty of subsequent calculation of the output voltage can be simplified, which helps to improve data processing efficiency.

[0112] Based on the same inventive concept, in an exemplary embodiment, Figure 8 As shown, a phase difference control method applied to the above embodiments is provided, including the following steps S802 to S806. Among them:

[0113] Step S802 , collecting operating parameters of the power conversion circuit, the operating parameters including the output voltage of the power conversion circuit and the actual current in each DC-to-DC circuit in the power conversion circuit.

[0114] Each DC-to-DC circuit includes a push-pull circuit on the primary side and a half-bridge circuit on the secondary side.

[0115] For example, the sampling module 120 of the phase difference control circuit 100 can be connected to the power conversion circuit 200, and the sampling module 120 can be used to collect the overall output voltage of the power conversion circuit 200 and the actual current in each DC-to-DC circuit 220 in the power conversion circuit 200.

[0116] Step S804, determining an actual count peak value related to the waveform period of the switch control signal according to the operating parameters.

[0117] Optionally, in some embodiments, the control module 160 in the phase difference control circuit 100 may be implemented using a voltage-current loop PI controller (a controller trained by a proportional-integral feedback control algorithm). The voltage-current loop PI controller may include a voltage sampling feedback circuit, a voltage loop control circuit, a current sampling feedback circuit, and a current loop control circuit.

[0118] Exemplarily, the operating parameters of the power conversion circuit 200 can be input into the control module 160, and a voltage error signal between the output voltage of the power conversion circuit 200 and a preset given voltage value is generated through the voltage sampling feedback circuit 1622. A given current value corresponding to the voltage error signal is generated according to a preset voltage modulation ratio through the voltage loop control circuit 1624. A current error signal between the given current value and the actual current in each DC-to-DC circuit is generated through the current sampling feedback circuit 1642. A corresponding given duty cycle is generated according to the current error signal and the preset current modulation ratio through the current loop control circuit 1644, and the actual count peak value is determined according to the count threshold used by the current pulse width modulation unit 142 to generate the switch control signal, the count reference value and the currently generated given duty cycle.

[0119] Step S806: updating the count peak value of each pulse width modulation unit and the count reference value of each pulse width modulation unit based on the actual count peak value.

[0120] Wherein, each group of pulse width modulation units corresponds to a DC-to-DC circuit, and the pulse width modulation unit is configured to output a switch control signal to the corresponding DC-to-DC circuit, and the switch control signal is generated based on the comparison result of the count value and the count reference value of the time reference counting circuit of the pulse width modulation unit, and the time reference counting circuit is configured to perform periodic counting from zero to a count peak value in an increasing and decreasing mode.

[0121] In an exemplary embodiment, step S806 may include:

[0122] The count peak value of each pulse width modulation unit is updated to the actual count peak value based on the actual count peak value; and the updated count reference value corresponding to each pulse width modulation unit is obtained according to the actual count peak value and the original count reference value of each pulse width modulation unit.

[0123] For example, the control module 160 may be used to update the count peak value of the time reference counting circuit 1422 of each pulse width modulation unit 142 to the actual count peak value based on the actual count peak value calculated in step S804. The updated count reference value corresponding to each pulse width modulation unit 142 may be determined by using the given duty cycle determined in step S804, the actual count peak value updated by the time reference counting circuit 1422 of each pulse width modulation unit 142, and the original count reference value currently used by the comparison circuit 1424 of the pulse width modulation unit 142 to generate the switch control signal.

[0124] For example, when the duty cycle is given as q and the actual count peak value is x, the expected pulse width corresponding to the actual count reference value can be calculated as the product of xq. According to the proportional integral of the pulse width corresponding to the original count reference value and the expected pulse width, the original count reference value can be feedback-adjusted to obtain an updated count reference value.

[0125] In this embodiment, the actual counting peak value related to the waveform period of the switch control signal of the push-pull circuit is calculated by using the actual operating parameters of the electric energy conversion circuit, and the counting peak value of the time base counting circuit of the pulse width modulation unit corresponding to the push-pull circuit and the counting reference value of the comparison circuit are updated based on the actual counting peak value, so that each group of pulse width modulation units after the update can generate a switch control signal with a higher synchronization with a uniform counting peak value and respective counting reference values, thereby improving the synchronization of each DC-DC conversion circuit.

[0126] In actual application scenarios, due to the different turns ratios of the transformer, the gain of the push-pull circuit on the primary side is different from the gain of the half-bridge circuit on the secondary side.

[0127] During the operation of the power conversion circuit, if the power conversion circuit is discharged (i.e., the current flows from the push-pull circuit on the primary side to the half-bridge circuit on the secondary side), the gain of the push-pull circuit on the high-voltage side is greater than the gain of the half-bridge circuit on the low-voltage side, and the switch devices on the high and low voltage sides are turned on and off at the same time (i.e., when receiving switch control signals with the same phase), the energy flow mode in the power conversion circuit is not the desired discharge mode, but becomes a charging state. Therefore, in an exemplary embodiment, the duty cycle of the other side, i.e., the high-voltage side, can be reduced to reduce the gain of the high-voltage side, so that the power conversion circuit is discharged in the desired manner.

[0128] Exemplarily, the step of updating the count reference value may further include the following operations:

[0129] In the discharge scenario, an updated count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the primary side is obtained based on the actual count peak value and the original count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the primary side; the updated count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the primary side is indented to obtain an updated count reference value of the pulse width modulation unit corresponding to the half-bridge circuit on the secondary side.

[0130] See also Fig. 9 , shows a schematic diagram of the switch control signal of the retracted switch device S1 / S2 / S3 / S4. Fig. 9 It can be seen that when the pulse width modulation units corresponding to the switch devices S3 and S4 use the reduced count reference value to generate the switch control signals corresponding to the switch devices S3 and S4, the gain of the switch devices S3 and S4 can be smaller than that of the switch devices S1 / S2.

[0131] Optionally, in some implementations, the shrinking process may be implemented by multiplying the count reference value corresponding to the push-pull circuit on the primary side by a fixed coefficient less than one or by subtracting a fixed value.

[0132] In this embodiment, by shrinking the counting reference value corresponding to the primary side to obtain the counting reference value corresponding to the secondary side under the discharge condition, it is possible to reduce the gain of the push-pull circuit on the high-voltage side, reduce the voltage difference between the two sides of the push-pull circuit on the high-voltage side, and reduce power loss when the electric energy conversion circuit is discharged.

[0133] During the operation of the power conversion circuit, if the power conversion circuit is charged (i.e., the current flows from the half-bridge circuit on the secondary side to the push-pull circuit on the primary side), it is also easy to deviate from the desired charging mode due to the different gains of the switch devices on the high and low voltage sides and the same opening and closing. Therefore, in an exemplary embodiment, the above-mentioned step of updating the count reference value may also include the following operations:

[0134] In the charging scenario, an updated count reference value of the pulse width modulation unit corresponding to the half-bridge circuit on the secondary side is obtained based on the actual count peak value and the original count reference value of the pulse width modulation unit corresponding to the half-bridge circuit on the secondary side; the updated count reference value of the pulse width modulation unit corresponding to the half-bridge circuit on the secondary side is indented to obtain an updated count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the primary side.

[0135] Similarly, the shrinking process can be implemented by multiplying the count reference value corresponding to the half-bridge circuit on the secondary side by a fixed coefficient less than one or by subtracting a fixed value.

[0136] In this embodiment, by shrinking the counting reference value corresponding to the secondary side to obtain the counting reference value corresponding to the primary side under charging conditions, it is possible to reduce the gain of the half-bridge circuit on the high-voltage side, reduce the voltage difference between the two sides of the half-bridge circuit on the high-voltage side, and reduce power loss when the electric energy conversion circuit is charging.

[0137] Based on the same inventive concept, the present application also provides a power converter. The power converter may include an electric energy conversion circuit and a phase difference control circuit as described in the above embodiments. The electric energy conversion circuit may include at least two parallel DC-to-DC circuits, and each DC-to-DC circuit may include a push-pull circuit on the primary side and a half-bridge circuit on the secondary side.

[0138] See also Fig.10 , shows a circuit schematic diagram of a power converter 1000.

[0139] The power conversion circuit 200 includes two parallel DC-to-DC circuits: a first circuit 220X and a second circuit 220Y. The first circuit 220X includes a push-pull circuit composed of switch devices S1 and S2 on the primary side (the side connected to the DC power port), and a half-bridge circuit composed of switch devices S3 and S4 on the secondary side (the side connected to the capacitor). The second circuit 220Y includes a push-pull circuit composed of switch devices S5 and S6 on the primary side, and a half-bridge circuit composed of switch devices S7 and S8 on the secondary side.

[0140] The phase difference control circuit 100 includes a sampling module 120, a control module 160 and a pulse width modulation generation module 140. The sampling module 120 can be configured to collect the output voltage of the power conversion circuit 200 and the actual current of each DC conversion circuit 220. The control module 160 can use a voltage loop, a current loop and a PI controller to implement the data processing logic of the phase difference control method in any of the above embodiments. The pulse width modulation generation module 140 can include a group of enhanced pulse width modulation units EPWM1 / EPWM2 corresponding to the first circuit 220X, and another group of enhanced pulse width modulation units EPWM3 / EPWM4 corresponding to the second circuit 220Y.

[0141] Each enhanced pulse width modulation unit is configured to independently output two switch control signals to independently control the corresponding switch device. For example, the enhanced pulse width modulation unit EPWM1 ​​can generate a switch control signal V gS1 Control switch device S1 to generate switch control signal V gS2 Control switch device S2. The enhanced pulse width modulation unit EPWM2 can generate a switch control signal V gS3 Control switch device S3 to generate switch control signal VgS4 Control switch device S4. The enhanced pulse width modulation unit EPWM1 ​​and the enhanced pulse width modulation unit EPWM2 have the same parameter configuration, so that the switch control signal V gS1 With the switch control signal V gS3 In phase, the switch control signal V gS2 With the switch control signal V gS4 In phase.

[0142] Similarly, the enhanced pulse width modulation unit EPWM3 can generate a switch control signal V gS5 Control switch device S5 to generate switch control signal V gS6 Control switch device S6. The enhanced pulse width modulation unit EPWM4 can generate a switch control signal V gS7 Control switch device S7 to generate switch control signal V gS8 Control switch device S8. The enhanced pulse width modulation unit EPWM3 and the enhanced pulse width modulation unit EPWM4 have the same parameter configuration, so that the switch control signal V gS5 With the switch control signal V gS7 In phase, the switch control signal V gS6 With the switch control signal V gS8 Same phase.

[0143] The switch control signals generated by the enhanced pulse width modulation unit EPWM1 ​​and the enhanced pulse width modulation unit EPWM3 have a phase difference of 90 degrees, so that the switch control signal V gS1 With the switch control signal V gS5 The phase difference is 90 degrees.

[0144] When the power converter 1000 uses the power conversion circuit 200 for discharge, it can turn on the corresponding switching devices at a high level, or stop turning on the corresponding switching devices at a low level through four stable switching control signals that are staggered by 90 degrees, thereby realizing push-pull control of each switching device and improving the discharge power.

[0145] When the power converter 1000 is charged using the power conversion circuit 200, an LLC (L indicates inductance, C indicates capacitance) resonant circuit can be formed. The LLC resonant circuit can switch under zero voltage or zero current state, reduce the switching loss of the switching device, and improve the conversion efficiency of the power conversion circuit 200. At the same time, the LLC resonant circuit can effectively filter out voltage ripple, achieve low output ripple, and maintain a stable output voltage under a wide range of load changes. In addition, the control strategy of the LLC resonant circuit is relatively simple, and its design and implementation are relatively simple, which can reduce the switch control cost in the charging mode.

[0146] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.

[0147] In the present application, the same or similar terminology concepts, technical solutions and / or application scenario descriptions are generally described in detail only the first time they appear. When they appear again later, they are generally not repeated for the sake of brevity. When understanding the technical solutions and other contents of the present application, for the same or similar terminology concepts, technical solutions and / or application scenario descriptions that are not described in detail later, reference can be made to the previous related detailed descriptions.

[0148] In the present application, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, please refer to the relevant description of other embodiments.

[0149] The various technical features of the technical solution of the present application can be arbitrarily combined. In order to make the description concise, not all possible combinations of the various technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of the present application.

[0150] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, disk, CD) as above, and includes a number of instructions for a terminal device (which can be an electrical device or a network device, etc.) to execute the method of each embodiment of the present application.

[0151] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A phase difference control circuit, characterized in that: Used to control the phase difference in an electric energy conversion circuit, the electric energy conversion circuit includes at least two parallel DC-to-DC circuits, each of the DC-to-DC circuits includes a push-pull circuit on the primary side and a half-bridge circuit on the secondary side, and the phase difference control circuit includes: a sampling module configured to collect operating parameters of the power conversion circuit, wherein the operating parameters include an output voltage of the power conversion circuit and an actual current in each of the DC-to-DC circuits; A pulse width modulation generation module, comprising at least two groups of pulse width modulation units, each group of the pulse width modulation units corresponds to one of the DC-DC converters, and is configured to output a switch control signal to the corresponding DC-DC converter, wherein the pulse width modulation unit comprises a time reference counting circuit and a comparison circuit, wherein the time reference counting circuit is configured to perform periodic counting from zero to a count peak value in an increasing and decreasing mode, and the comparison circuit is configured to generate a switch control signal of the corresponding DC-DC converter based on a comparison result of a count value of the time reference counting circuit and a count reference value; The control module is configured to determine an actual count peak value related to the waveform period of the switch control signal according to the operating parameters, and update the count peak value of each pulse width modulation unit and the count reference value of each pulse width modulation unit based on the actual count peak value.

2. The phase difference control circuit according to claim 1, characterized in that: The at least two parallel DC-DC converters include a first circuit and a second circuit. The phase difference between the switch control signals of the push-pull circuit on the primary side of the first circuit and the push-pull circuit on the primary side of the second circuit is 90 degrees, and / or the phase difference between the switch control signals of the half-bridge circuit on the secondary side of the first circuit and the half-bridge circuit on the secondary side of the second circuit is 90 degrees.

3. The phase difference control circuit according to claim 1, characterized in that: The control module comprises: a processing unit, wherein the processing unit is configured to generate a corresponding voltage error signal according to the output voltage and a preset given voltage value, and to generate a corresponding given current value according to the voltage error signal, At least one control unit is provided in one-to-one correspondence with the DC-to-DC circuits, and the control unit is configured to calculate an actual count peak value corresponding to each DC-to-DC circuit based on the given current value and the actual current in each DC-to-DC circuit.

4. The phase difference control circuit according to claim 3, characterized in that: The processing unit includes a voltage sampling feedback circuit and a voltage loop control circuit, wherein the voltage sampling feedback circuit is configured to generate a corresponding voltage error signal according to the output voltage and a preset given voltage value, and the voltage loop control circuit is configured to generate a corresponding given current value according to the voltage error signal output by the voltage sampling feedback circuit; The control unit includes a current sampling feedback circuit and a current loop control circuit. The current sampling feedback circuit is arranged in a one-to-one correspondence with the DC-to-DC circuit. The current sampling feedback circuit is configured to calculate a current error signal based on the given current value and the actual current in each DC-to-DC circuit. The current loop control circuit is configured to determine a corresponding given duty cycle based on the current error signal, generate a corresponding actual count peak value based on the given duty cycle, and update the count peak value of each pulse width modulation unit and the count reference value of each pulse width modulation unit based on the actual count peak value.

5. The phase difference control circuit according to claim 1, characterized in that: The sampling module includes an analog-to-digital conversion module, which is configured to receive an analog signal of the output voltage of the power conversion circuit, convert the analog signal into a digital signal corresponding to the output voltage, and input the digital signal corresponding to the output voltage into the control module.

6. A phase difference control method, characterized in that: Applied to the phase difference control circuit according to any one of claims 1 to 5, the method comprises: Collecting operating parameters of the power conversion circuit, wherein the operating parameters include an output voltage of the power conversion circuit and an actual current in each DC-to-DC circuit in the power conversion circuit; determining an actual count peak value associated with a waveform period of a switch control signal according to the operating parameter; The count peak value of each pulse width modulation unit and the count reference value of each pulse width modulation unit are updated based on the actual count peak value.

7. The phase difference control method according to claim 6, characterized in that: The updating of the count peak value of each pulse width modulation unit and the count reference value of each pulse width modulation unit based on the actual count peak value comprises: Based on the actual count peak value, updating the count peak value of each of the pulse width modulation units to the actual count peak value; According to the actual count peak value and the original count reference value of each pulse width modulation unit, an updated count reference value corresponding to each pulse width modulation unit is obtained.

8. The phase difference control method according to claim 7, characterized in that: The step of obtaining an updated counting reference value corresponding to each of the pulse width modulation units according to the actual counting peak value and the original counting reference value of each of the pulse width modulation units comprises: In a discharge scenario, an updated count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the primary side is obtained according to the actual count peak value and the original count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the primary side; The updated count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the primary side is internalized to obtain the updated count reference value of the pulse width modulation unit corresponding to the half-bridge circuit on the secondary side.

9. The phase difference control method according to claim 7, characterized in that: The step of obtaining an updated counting reference value corresponding to each of the pulse width modulation units according to the actual counting peak value and the original counting reference value of each of the pulse width modulation units comprises: In a charging scenario, an updated counting reference value of the pulse width modulation unit corresponding to the half-bridge circuit on the secondary side is obtained according to the actual counting peak value and the original counting reference value of the pulse width modulation unit corresponding to the half-bridge circuit on the secondary side; The updated count reference value of the pulse width modulation unit corresponding to the half-bridge circuit on the secondary side is subjected to indentation processing to obtain the updated count reference value of the pulse width modulation unit corresponding to the push-pull circuit on the primary side.

10. A power converter, characterized in that: include: An electric energy conversion circuit, comprising at least two parallel DC-to-DC circuits, each of which comprises a push-pull circuit on a primary side and a half-bridge circuit on a secondary side; The phase difference control circuit according to any one of claims 1 to 5.

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