Structure for realizing high-voltage bootstrap
By adopting a dual-type die structure in the high-voltage driver chip, high-voltage bootstrap is achieved using internal parasitic high-voltage diodes, which solves the cost and area increase problems caused by external bootstrap circuits, reduces bootstrap resistance and avoids latch risk , the use of bulk silicon process reduces cost and heat dissipation.
Patent Information
- Application Number
- CN202411100878.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-12
- Publication Date
- 2024-12-24
AI Technical Summary
Existing high-voltage driver chips require external bootstrap circuits, resulting in increased costs, increased system board area and complex system wiring, and traditional processes are costly and poor heat dissipation.
Using a dual-type grain structure, which includes low voltage zones and high voltage zones, high voltage bootstrap is achieved through an isolation ring between the high voltage zone and the low voltage zone. The internal parasitic high voltage diode is used to avoid external bootstrap diodes and current limiting resistances. Use of
The internal integration of high-voltage bootstrap is realized, which reduces bootstrap resistance, avoids cost increase and latch risks, and uses the bulk silicon process to solve the problems of high SOI process costs and poor heat dissipation.
Smart Images
Figure CN119182391A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of integrated circuits. More specifically, but not limitedly, the present invention relates to a structure for implementing high voltage bootstrapping. Background Art
[0002] Figure 1 shows the application diagrams of two existing high-voltage driver chips, where FAD6263 is a typical single-phase high-voltage driver chip and FAN73892M is a typical three-phase high-voltage driver chip. As can be seen from the application diagram, for the application of a single-phase high-voltage driver chip, see Figure 1(a), an external bootstrap circuit is required, including an external high-voltage diode (D boot ) and a current limiting protection resistor (R boot ); For the three-phase high-voltage driver chip, see Figure 1(b), three external bootstrap circuits are required, including three external high-voltage diodes (D1 / D2 / D3) and three current-limiting protection resistors (R1 / R2 / R3). The above-mentioned external bootstrap circuit method will increase the cost, increase the system board area, and complicate the system routing.
[0003] FIG2(a) shows the internal circuit structure of another existing high-voltage driver chip L6387E, whose internal integrated Bootstrap DRIVER (bootstrap circuit) can be implemented by the method in the reference patent (CN106712473B). However, in this implementation method, as shown in FIG2(b), the bootstrap circuit is complex, and the bootstrap current is controlled by the LDMOS device (LD1), resulting in a large bootstrap resistance, usually in the hundreds of ohms level. If the bootstrap resistance is deliberately reduced, the size of the LDMOS device needs to be increased, which will lead to a sharp increase in cost.
[0004] Figure 3 The internal circuit structure diagram of another high-voltage driver chip 2ED2106S06F is shown. The internal integrated bootstrap diode (BS diode) is realized by SOI (silicon-on-insulator) process. Due to its good isolation characteristics, SOI process can directly integrate high-voltage diode devices internally. Compared with the above-mentioned method using LDMOS devices, high-voltage diodes are bipolar devices with stronger conduction capability. Therefore, this method can ensure lower bootstrap resistance and no risk of latch-up. However, compared with traditional bulk silicon process, SOI process has increased cost and poor heat dissipation. Summary of the invention
[0005] The present invention proposes a structure for realizing high-voltage bootstrap, which contains at least two types of grains, namely first-type grains and second-type grains, wherein the first-type grains contain a low-voltage area, one or more high-voltage areas, and an isolation ring between the high-voltage area and the low-voltage area, and the signal of the low-voltage area is transmitted to the high-voltage area through a high-voltage level shifting circuit; the second-type grains also contain a low-voltage area, one or more high-voltage areas, and an isolation ring between the high-voltage area and the low-voltage area, and a parasitic high-voltage diode is provided between the high-voltage area and the low-voltage area.
[0006] The low voltage region of the first type of die includes at least one power pad and one ground pad, and the high voltage region includes at least one high side reference power pad, one high side reference ground pad and one high side output pad.
[0007] The low-voltage area of the second type of grain includes at least one ground pad, and the high-voltage area includes at least one high-side reference power pad, a high-side reference ground pad, a high-side input pad and a high-side output pad; in addition, a parasitic high-voltage diode can be formed between the high-voltage area and the low-voltage area, and the anode of the parasitic high-voltage diode is connected to the reference ground pad of the low-voltage area, and the cathode is connected to the high-side reference power pad of the high-voltage area.
[0008] The ground pad of the second type of die low voltage area and the power pad of the first type of die low voltage area can be directly or indirectly connected through package bonding; wherein, indirect connection means that there can be a resistor or a transistor circuit acting as a switch between the ground pad of the second type of die low voltage area and the power pad of the first type of die low voltage area.
[0009] The high side reference power pad, high side reference ground pad and high side output pad of the high voltage area of the first type of die are respectively connected one by one with the high side reference power pad, high side reference ground pad and high side input pad of the high voltage area of the second type of die through package bonding wires.
[0010] The power pads and ground pads in the low-voltage area of the first type of grains can be used as the power supply and ground of the final high-voltage driver chip, and the high-side reference power pads, high-side reference ground pads and high-side output pads in the high-voltage area of the second type of grains can be used as the high-side power supply, high-side ground and high-side output of the final high-voltage driver chip.
[0011] The present invention uses dual-type crystal grains to realize high-voltage bootstrapping, which has the following advantages compared with the existing structure: (1) High-voltage bootstrap integration can be realized inside the chip, solving the problems of increased cost, increased system board area, and complex system routing caused by traditional external bootstrap diodes and current-limiting resistors; (2) The high-voltage bootstrap is implemented using an internal high-voltage parasitic diode, which does not increase the process cost. Compared with traditional multi-sub devices, such as LDMOS and JFET devices, the bootstrap resistance is significantly reduced and there is no latch-up risk. (3) The invention can use bulk silicon technology, solving the problems of high cost and high thermal resistance of SOI technology. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] Figure 1a A typical single-phase high-voltage driver chip FAD6263 application diagram; Figure 1b A typical application diagram of three-phase high-voltage driver chip FAN73892M; Figure 2a Internal circuit diagram of high-voltage driver chip L6387E; Figure 2b Reference patent CN106712473B to realize the method of high voltage bootstrap (BOOTSTRAP DRIVER); Figure 3 Internal circuit structure diagram of high voltage driver chip 2ED2106S06F; Figure 4 The dual-type die architecture diagram of the present invention; Figure 5 An exemplary cross-sectional structure diagram of an implementation method based on the dual-type die architecture of the present invention; Figure 6 An exemplary diagram of wire bonding based on an implementation of the dual-type die architecture of the present invention. DETAILED DESCRIPTION
[0013] Figure 4 This is a diagram of the dual-type grain architecture of the present invention. The chip contains two types of grains, namely the first type grain 501 and the second type grain 502, which are placed on the same substrate 500 in the chip. The first type grain 501 includes a low-pressure area 503, a high-pressure area 504A, and an isolation ring 507 between the high-pressure area and the low-pressure area. It is particularly noted that there can be multiple high-pressure areas. The first type grain 502 also includes a low-pressure area 505, a high-pressure area 506A, and an isolation ring 508 between the high-pressure area and the low-pressure area. It is particularly noted that there can be multiple high-pressure areas.
[0014] The low voltage region 503 in the first type of grain 501 includes at least one "power" pad 509 and one "ground" pad 510, and the high voltage region 504A includes at least one "high side reference power" pad 512, one "high side reference ground" pad 514 and one "high side output" pad 513.
[0015] The low voltage region 505 in the second type of die 502 includes at least one "ground" pad 511, and the high voltage region 506A includes at least one "high side reference power supply" pad 515, one "high side reference ground" pad 517, one "high side output" pad 516, and one "high side input" pad 518. In addition, a parasitic high voltage diode may be formed between the high voltage region 506A and the low voltage region 505, the anode of the parasitic high voltage diode being connected to the "ground" pad 511 of the low voltage region, and the cathode being connected to the "high side reference power supply" pad 515 of the high voltage region.
[0016] The "ground" pad 511 of the low voltage region 505 of the second type die 502 and the "power" pad 509 of the low voltage region 503 of the first type die 501 can be directly or indirectly connected through package bonding wires. Indirect connection means that there can be a resistor or a transistor circuit that acts as a switch between the "ground" pad 511 of the low voltage region 505 of the second type die 502 and the "power" pad 509 of the low voltage region 503 of the first type die 501.
[0017] The "high side reference power supply" pad 512, "high side reference ground" pad 514, and "high side output" pad 513 of the high voltage region 504A of the first type of die 501 are respectively connected one by one with the "high side reference power supply" pad 515, "high side reference ground" pad 517, and "high side input" pad 518 of the high voltage region 506A of the second type of die 502 through package bonding wires.
[0018] The "power supply" pad 509 and the "ground" pad 510 of the low voltage region 503 of the first type of die 501 can be used as the power supply and ground of the final high voltage driver chip. The "high side reference power supply" pad 515, the "high side reference ground" pad 517 and the "high side output" pad 516 of the high voltage region 506A of the second type of die 502 can be used as the high side power supply, high side ground and high side output of the final high voltage driver chip.
[0019] Figure 5 The cross-sectional structure of a dual-type die is shown in FIG. 5 . In this example, the first-type die 501 and the second-type die 502 are both made of P-type semiconductor material. The two die are placed on the same packaging substrate 602 through an insulating adhesive 601 .
[0020] A parasitic high-voltage diode can be formed between the high-voltage region 506A and the low-voltage region 505, the anode of the parasitic high-voltage diode is connected to the "ground" pad 511 of the low-voltage region, and the cathode is connected to the "high-side reference power supply" pad 515 of the high-voltage region. The "power supply" pad 509 of the low-voltage region 503 of the first-type crystal grain 501 is connected to the N-type semiconductor well (N-well), and its "ground" pad 510 is connected to the P-type semiconductor well (P-well). The "high-side reference power supply" pad 512 of the high-voltage region 504A is connected to the N-type semiconductor well (N-well), and the "high-side reference ground" pad 514 is connected to the P-type semiconductor well (P-well). The isolation ring 507 between the high-voltage region and the low-voltage region is a N-type semiconductor well (N-drift) with a lighter concentration.
[0021] The "ground" pad 511 of the low voltage region 505 of the second type crystal grain 502 is connected to the P-type semiconductor well (P-well), and the "high side reference power supply" pad 515 of the high voltage region 506A is connected to the N-type semiconductor well (N-well), and the "high side reference ground" pad 517 is connected to the P-type semiconductor well (P-well). The isolation ring 508 between the high voltage region and the low voltage region is a N-type semiconductor well (N-drift) with a lighter concentration. It is worth noting that the second type crystal grain 502 has a parasitic high voltage diode D1 inside, whose anode is connected to the "ground" pad 511 of the low voltage region, and the cathode is connected to the "high side reference power supply" pad 515 of the high voltage region. In addition, the "ground" pad 511 can be connected to the P-type semiconductor well (P-well) to form an ohmic contact through the P+ shown in the figure, or a Schottky contact with a fast recovery function can be used.
[0022] Figure 6 Based on the wire bonding example diagram of an embodiment of the dual-type grain architecture of the present invention, the "high side reference power supply" pad 512, "high side reference ground" pad 514, and "high side output" pad 513 of the high voltage area 504A of the first type grain 501 are respectively connected one by one with the "high side reference power supply" pad 515, "high side reference ground" pad 517, and "high side input" pad 518 of the high voltage area 506A of the second type grain 502 through package bonding.
[0023] The "power" pad 509 of the low voltage region 503 of the first type of die 501 is connected to the power pin (VDD) 701 of the final chip, and the "ground" pad 510 is connected to the ground pin (COM) 702 of the final chip. The "high side reference power" pad 515, "high side reference ground" pad 517 and "high side output" pad 516 of the high voltage region 506A of the second type of die 502 are respectively connected to the high side power pin (VB) 703, the high side reference ground pin (VS) 705 and the high side output pin (HO) 704 of the final chip.
[0024] Those skilled in the art will appreciate that many variations and / or modifications may be made to the invention as shown in the specific embodiments without departing from the spirit or scope of the invention as broadly described. For example, there may be multiple pads of the same type, etc.
Claims
1. A structure for realizing high voltage bootstrap, characterized in that: The structure contains at least two types of grains, namely first type grains and second type grains, wherein the first type grains include a low voltage area, one or more high voltage areas, and an isolation ring between the high voltage area and the low voltage area, and the signal in the low voltage area is transmitted to the high voltage area through a high voltage level shifting circuit; the second type grains also include a low voltage area, one or more high voltage areas, and an isolation ring between the high voltage area and the low voltage area, and a parasitic high voltage diode is provided between the high voltage area and the low voltage area.
2. The structure for realizing high voltage bootstrap according to claim 1, characterized in that: The low voltage region of the first type of die includes at least one power pad and one ground pad, and the high voltage region includes at least one high side reference power pad, one high side reference ground pad and one high side output pad.
3. The structure for realizing high voltage bootstrap according to claim 1, characterized in that: The low-voltage area of the second type of grain includes at least one ground pad, and the high-voltage area includes at least one high-side reference power pad, a high-side reference ground pad, a high-side input pad and a high-side output pad; in addition, a parasitic high-voltage diode can be formed between the high-voltage area and the low-voltage area, and the anode of the parasitic high-voltage diode is connected to the reference ground pad of the low-voltage area, and the cathode is connected to the high-side reference power pad of the high-voltage area.
4. The structure for realizing high voltage bootstrap according to claim 1, characterized in that: The ground pad of the second type of die low voltage area and the power pad of the first type of die low voltage area can be directly or indirectly connected through package bonding; wherein, indirect connection means that there can be a resistor or a transistor circuit acting as a switch between the ground pad of the second type of die low voltage area and the power pad of the first type of die low voltage area.
5. The structure for realizing high voltage bootstrap according to claim 1, characterized in that: The high side reference power pad, high side reference ground pad and high side output pad of the high voltage area of the first type of die are respectively connected one by one with the high side reference power pad, high side reference ground pad and high side input pad of the high voltage area of the second type of die through package bonding wires.
6. The structure for realizing high voltage bootstrap according to claim 1, characterized in that: The power pads and ground pads in the low-voltage area of the first type of grains can be used as the power supply and ground of the final high-voltage driver chip, and the high-side reference power pads, high-side reference ground pads and high-side output pads in the high-voltage area of the second type of grains can be used as the high-side power supply, high-side ground and high-side output of the final high-voltage driver chip.