Fan fault detection circuit and system

Abstract

The invention provides a fan fault detection circuit and system, which is applied to an FG detection circuit in a fan and comprises a signal conversion module and a logic processing module which are connected in sequence, the signal conversion module comprises a charging and discharging circuit, a first capacitor and a switching tube; the first capacitor is connected to the output end of the FG detection circuit; the switch tube is connected to the first capacitor and the logic processing module; the charging and discharging circuit is used for driving the first capacitor to charge or discharge so as to change the on-off state of the switching tube; and the logic processing module is used for detecting the on-off state of the switching tube and outputting a detection result. Charge and discharge conversion of the first capacitor is realized according to output states of FG signals in different stages by utilizing the direct current blocking and alternating current passing characteristics of the first capacitor, so that stable output of the system can be maintained, conversion of the FG signals and I / O signals is realized, a plurality of fault detection circuits are conveniently connected in parallel to share the same I / O pin, and resource consumption is greatly reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of fan fault detection, and more particularly to a fan fault detection circuit and system. Background Art

[0002] There are two main types of fault circuits in fans currently on the market, namely RD (full name: Rotation Detector) detection circuit and FG (full name: Frequency Generator) detection circuit, which are usually used to detect and output the fan's rotor operating status and rotation frequency.

[0003] The FG detection circuit is usually as follows Figure 1 As shown, the output line of the FG detection circuit is provided with a first transistor, the collector of the first transistor outputs the FG signal, and the emitter is grounded. The output waveform corresponding to the FG detection circuit is as follows Figure 2 As shown, when the fan is working normally, the FG signal maintains a PWM wave output with a stable duty cycle; when the fan fails, the first transistor in the FG detection circuit is affected by the circuit and changes from a fixed on-off frequency to a long-term on or long-term off state, resulting in the output of the FG signal being either high or low.

[0004] Due to the complexity of the FG signal output, the FG signal of each fan needs to be connected to the independent I / O pin or capture port of the MCU (microcontroller) for detection. In applications where the operating status of multiple parallel fans needs to be monitored, it will directly lead to a large amount of MCU resources being occupied, significantly increasing the system's resource consumption. Summary of the invention

[0005] The purpose of the present invention is to overcome the defects of the prior art and provide a fan fault detection circuit and system to solve the technical problem of the complex output of the traditional FG signal.

[0006] In a first aspect, an embodiment of the present invention provides a fan fault detection circuit, which is applied to an FG detection circuit inside a fan, wherein an output end of the FG detection circuit is provided with a first transistor, wherein a collector and an emitter of the first transistor respectively output an FG signal and are grounded, and the fan fault detection circuit comprises: a signal conversion module and a logic processing module connected in sequence;

[0007] The signal conversion module includes: a charge and discharge circuit, a first capacitor and a switch tube; the first capacitor is connected to the output end of the FG detection circuit; the switch tube is connected to the first capacitor and the logic processing module; the charge and discharge circuit is used to drive the first capacitor to charge or discharge, so as to change the on-off state of the switch tube;

[0008] The logic processing module is used to detect the on / off state of the switch tube and output the detection result.

[0009] Wherein, the positive electrode of the first capacitor is connected to the collector of the first transistor.

[0010] Wherein, the charging and discharging circuit includes: a first power supply voltage and a first resistor; one end of the first resistor is connected to the first power supply voltage, and the other end is connected to the collector of the first transistor.

[0011] Wherein, the charging and discharging circuit also includes: a second capacitor and a first diode; the cathode of the first diode is connected to the cathode of the first capacitor, the anode of the first diode is connected to the anode of the second capacitor, and the cathode of the second capacitor is grounded.

[0012] Among them, the charging and discharging circuit also includes: a second diode or a second resistor; the positive electrode of the second diode is connected between the first capacitor and the first diode, and the negative electrode of the second diode is grounded; or one end of the second resistor is connected between the first capacitor and the first diode, and the other end is grounded.

[0013] The switch tube is a triode; the base of the switch tube is connected to the positive electrode of the second capacitor, the collector of the switch tube is connected to the first power supply voltage, and the emitter of the switch tube is grounded.

[0014] Among them, the signal conversion module also includes: a third resistor and a fourth resistor; the two ends of the third resistor are respectively connected to the positive electrode of the second capacitor and the base of the switching tube; the two ends of the fourth resistor are respectively connected to the first power supply voltage and the collector of the switching tube.

[0015] Among them, the logic processing module includes: a fifth resistor, a sixth resistor, a second power supply voltage, a second transistor and an I / O port; the two ends of the fifth resistor are respectively connected to the collector of the switching tube and the base of the second transistor, and one end of the sixth resistor is connected to the second power supply voltage and the collector of the second transistor; the emitter of the second transistor is grounded; and the I / O port is connected to the collector of the second transistor.

[0016] In a second aspect, an embodiment of the present invention provides a fan fault detection system, comprising: a microcontroller and the above-mentioned fan fault detection circuit; the microcontroller is connected to the output end of the logic processing module.

[0017] There are several fan fault detection circuits; the output ends of the several fan fault detection circuits are connected, and the microcontroller is connected to the output end of any one of the logic processing modules.

[0018] Compared with the prior art, the present invention has the following beneficial effects: the present invention utilizes the characteristic of the first capacitor that it blocks direct current but passes alternating current, and realizes the charge and discharge conversion of the first capacitor according to the output state of the FG signal at different stages, thereby ensuring that the system can maintain a stable output regardless of whether it is in a normal operation stage or a fault stage, and realizes the conversion of the FG signal and the I / O signal; the on-off state of the switch tube directly reflects the operating state of the fan, simplifies the output waveform of the FG signal, facilitates parallel connection of multiple fault detection circuits to share the same I / O terminal pin, and helps to realize the detection function of multiple fan faults at a relatively low cost when MCU resources are limited, thereby greatly reducing resource consumption.

[0019] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the following preferred embodiments are specifically cited and described in detail as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a structural schematic diagram of an existing FG detection circuit;

[0021] Figure 2 It is a schematic diagram of the output timing of the existing FG detection circuit;

[0022] Figure 3 A schematic diagram of the structure of a fan fault detection circuit provided by the present invention;

[0023] Figure 4 A schematic diagram of an output timing sequence of a fan fault detection circuit provided by the present invention;

[0024] Figure 5 A schematic structural diagram of a fan fault detection system provided by the present invention. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solution and advantages of the present invention clearer, the present invention is further described in detail in conjunction with the accompanying drawings and specific implementation methods. The technical solution in the embodiment of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiment of the present invention. Obviously, the described embodiment is a part of the embodiment of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0026] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0027] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, the singular forms "a", "an" and "the" are intended to include plural forms unless the context clearly indicates otherwise.

[0028] It should be further understood that the term "and / or" used in the present description and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0029] See also Figure 1 and Figure 3-5 As shown, this embodiment discloses a fan fault detection circuit. Figure 1 It is a structural diagram of an existing FG detection circuit and also a schematic diagram of an application scenario of the fan fault detection circuit of this embodiment. In a specific implementation, the fan fault detection circuit of this embodiment is connected to the output end of the FG detection circuit inside the fan.

[0030] Among them, the output end of the FG detection circuit is provided with a first transistor Q5, the collector and emitter of the first transistor Q5 output the FG signal and are grounded respectively. The fan fault detection circuit of this embodiment can obtain the FG signal by connecting the first transistor Q5, without improving the internal structure of the fan, and has higher safety and convenience.

[0031] The fan fault detection circuit of this embodiment includes: a signal conversion module and a logic processing module connected in sequence;

[0032] The signal conversion module includes: a charge and discharge circuit, a first capacitor C1 and a switch tube Q1; the first capacitor C1 is connected to the output end of the FG detection circuit; the switch tube Q1 is connected to the first capacitor C1 and the logic processing module; the charge and discharge circuit is used to drive the first capacitor C1 to charge or discharge, so as to change the on-off state of the switch tube Q1;

[0033] The logic processing module is used to detect the on / off state of the switch tube Q1 and output the detection result.

[0034] The fan fault detection circuit of the present embodiment utilizes the characteristic of the first capacitor C1 that it blocks direct current but passes alternating current, and realizes the charge and discharge conversion of the first capacitor C1 according to the output states of the FG signal at different stages, thereby ensuring that the system can maintain a stable output regardless of whether it is in a normal operation stage or a fault stage, and realizes the conversion between the FG signal and the I / O signal; the on-off state of the switch tube Q1 directly reflects the operating state of the fan, simplifies the output waveform of the FG signal, facilitates the parallel connection of multiple fault detection circuits to share the same I / O terminal pin, and helps to realize the detection function of multiple fan faults at a relatively low cost when MCU resources are limited, thereby greatly reducing resource consumption.

[0035] Specifically, when the fan is in normal operating state: the FG signal output is a PWM wave with a fixed duty cycle. When the PWM wave is at a high level, the charge and discharge circuit drives the first capacitor C1 to charge and drives the switch tube Q1 to reach the first on-off state; when the PWM wave is at a low level, the charge and discharge circuit drives the first capacitor C1 to discharge, so that the switch tube Q1 maintains the first on-off state.

[0036] When the fan is in a fault state: if the FG signal continues to output a low level, the charge and discharge circuit is interrupted, driving the switch tube Q1 to reach the second on-off state; if the FG signal continues to output a high level, the charge and discharge circuit drives the first capacitor C1 to charge, so that the switch tube Q1 reaches the first on-off state. When the first capacitor C1 is fully charged, no current flows through the first capacitor C1, causing the switch tube Q1 to maintain the second on-off state.

[0037] Among them, the first on-off state is on or off, and the second on-off state is opposite to the first on-off state. The signal conversion module is set so that the switch tube Q1 is in the first on-off state when the fan is operating normally, that is, the output consistency of the FG signal in the normal state is achieved, and the switch tube Q1 is basically in the second on-off state when the fan fails, which is conducive to the output of the FG signal to form a large difference between the fault and normal states, greatly simplifying the complexity of the output processing of the FG signal, and facilitating the detection and judgment of the output signal.

[0038] Specifically, the positive electrode of the first capacitor C1 is connected to the collector of the first transistor Q5. When the fan operates normally, the first transistor Q5 maintains periodic switching between the on and off states; when the fan fails, the first transistor Q5 is turned on or off for a long time. When the first transistor Q5 is turned off, the FG signal output is a high level; when the first transistor Q5 is turned on, the FG signal output is a low level.

[0039] Specifically, the charge and discharge circuit includes: a first power supply voltage VCC1 and a first resistor R1; one end of the first resistor R1 is connected to the first power supply voltage VCC1, and the other end is connected to the collector of the first transistor Q5. Among them, the first power supply voltage VCC1 is a positive power supply voltage. The first power supply voltage VCC1 provides power for the fan fault detection circuit, and the first power supply voltage VCC1 provides a charging voltage for the first capacitor C1 through the first resistor R1; the first resistor R1 is used as a charging resistor, and the resistance value of the first resistor R1 affects the charging speed of the first capacitor C1. When the first transistor Q5 is turned on for a long time, no current flows through the first capacitor C1, causing the switch tube Q1 to be turned off; when the first transistor Q5 is turned off for a long time, the first power supply voltage VCC1 charges the first capacitor C1 through the first resistor R1, and turns on the switch tube Q1. After the first capacitor C1 is fully charged, no current flows through the first capacitor C1, causing the switch tube Q1 to be turned off.

[0040] Specifically, the charge and discharge circuit also includes: a second capacitor C2 and a first diode D1; the cathode of the first diode D1 is connected to the cathode of the first capacitor C1, the anode of the first diode D1 is connected to the anode of the second capacitor C2, and the cathode of the second capacitor C2 is grounded. The first diode D1 is arranged between the two capacitors to prevent the current from flowing back to the first capacitor C1 when the second capacitor C2 is discharged, thereby ensuring the safety of the first capacitor C1 and the circuit; the second capacitor C2 is used for energy storage and delay, and is used to provide energy for the switch tube Q1. The arrangement of the first diode D1 and the second capacitor C2 effectively isolates the function of the first capacitor C1, that is, the first capacitor C1 mainly acts to isolate DC and pass AC, thereby avoiding electrical interference and improving the professionalism and stability of the circuit. In specific implementation, taking the normal state of the fan as an example, when the first transistor Q5 is turned off, the second capacitor C2 is charged through the path of the first power supply voltage VCC1, the first resistor R1, the first capacitor C1 and the first diode D1, and the switch tube Q1 reaches the first on-off state. When the first transistor Q5 is turned on, the charge stored on the second capacitor C2 provides current for the switch tube Q1, so that the switch tube Q1 is maintained in the first on-off state, that is, it is ensured that the switch tube Q1 can be in the first on-off state when the FG signal is high or low, thereby ensuring the consistency of the FG signal output and greatly improving the simplicity of fault detection.

[0041] Specifically, the charge and discharge circuit further includes: a second diode D2 or a second resistor R17; the anode of the second diode D2 is connected between the first capacitor C1 and the first diode D1, and the cathode of the second diode D2 is grounded; or one end of the second resistor R17 is connected between the first capacitor C1 and the first diode D1, and the other end is grounded. The second diode D2 or the second resistor R17 provides a discharge path for the first capacitor C1, so that the charge on the first capacitor C1 can be gradually released.

[0042] Specifically, the switch tube Q1 is a triode; the base of the switch tube Q1 is connected to the positive electrode of the second capacitor C2, the collector of the switch tube Q1 is connected to the first power supply voltage VCC1, and the emitter of the switch tube Q1 is grounded. When the charge-discharge circuit provides current to the switch tube Q1, the switch tube Q1 reaches the first on-off state, at which time, the base of the switch tube Q1 has current, and the switch tube Q1 is in the on state; otherwise, the switch tube Q1 reaches the second on-off state, at which time, the base of the switch tube Q1 has no current, and the switch tube Q1 is in the off state.

[0043] Specifically, the signal conversion module also includes: a third resistor R2 and a fourth resistor R3; the two ends of the third resistor R2 are respectively connected to the positive electrode of the second capacitor C2 and the base of the switch tube Q1; the two ends of the fourth resistor R3 are respectively connected to the first power supply voltage VCC1 and the collector of the switch tube Q1. The fourth resistor R3 is a pull-up resistor, and the third resistor R2 and the fourth resistor R3 are used for voltage division and current limiting to avoid overvoltage damage to the device, thereby ensuring the stability and safety of the circuit.

[0044] Specifically, the logic processing module includes: a fifth resistor R5, a sixth resistor R6, a second power supply voltage VCC2, a second transistor Q2 and an I / O port; two ends of the fifth resistor R5 are respectively connected to the collector of the switch tube Q1 and the base of the second transistor Q2, one end of the sixth resistor R6 is connected to the second power supply voltage VCC2 and the collector of the second transistor Q2; the emitter of the second transistor Q2 is grounded; the I / O port is connected to the collector of the second transistor Q2. Among them, the second power supply voltage VCC2 is a positive power supply voltage, which is used to provide a working voltage for the second transistor Q2; the sixth resistor R6 is a pull-up resistor, and the fifth resistor R5 and the sixth resistor R6 divide the voltage and limit the current to avoid damage to the device by overvoltage, thereby ensuring the stability and safety of the circuit; the I / O port is used to output signals. When the switch tube Q1 is turned on, the collector voltage of the second transistor Q2 is divided by a part of the voltage due to the pull-down of the fifth resistor R5 and the pull-up of the sixth resistor R6. By setting the size of the first power supply voltage VCC1 and the second power supply voltage VCC2, the second transistor Q2 can be turned off or on when the switch tube Q1 is turned on or off. In specific implementation, when the fan operates normally, the switch tube Q1 is turned on, the second transistor Q2 is turned off, and the I / O port outputs a high level; when the fan fails, the switch tube Q1 is turned off, the second transistor Q2 is turned on, and the I / O port outputs a low level. The setting of the logic processing module makes the output of the FG signal conform to the fault detection logic of the I / O pin, which improves the versatility and practicality of the fan fault detection circuit.

[0045] See also Figure 4 As shown, Figure 4The output timing diagram of the fan fault detection circuit of this embodiment. T1 is the normal state detection delay. At this time, the first power supply voltage VCC1 charges the second capacitor C2 through the first resistor R1, the first capacitor C1, and the first diode D1, and provides current to the switch tube Q1 to turn on the switch tube Q1, thereby causing the I / O port to output a high level. When the second capacitor C2 is charged, T1 ends; T2 is the fault state detection delay. At this time, the first power supply voltage VCC1 is supplied to the first capacitor C1 through the first resistor R1, and provides current to the switch tube Q1 to turn on the switch tube Q1, thereby causing the I / O port to output a high level. When the first capacitor C1 is charged, T2 ends. The output level of the I / O port of the detection logic processing module is changed from a high level to a low level, and the fan fails.

[0046] See also Figure 3-5 As shown, this embodiment discloses a fan fault detection system, which includes: a microcontroller and the above-mentioned fan fault detection circuit; the microcontroller is connected to the output end of the logic processing module. The microcontroller is provided with an I / O terminal pin, and the microcontroller is connected to the I / O port of the logic processing module through the I / O terminal pin. The microcontroller can grasp the operating status of the fan by detecting the output level of the I / O port.

[0047] See also Figure 5 As shown, there are several fan fault detection circuits; the output ends of several fan fault detection circuits are connected, and the microcontroller is connected to the output end of any logic processing module. When multiple fans are connected in parallel, several fan fault detection circuits can merge the output of each I / O port into the input of one I / O pin, occupying only the I / O pin of a single microcontroller, greatly saving MCU resources. When the microcontroller detects a transition from a high level to a low level, it can clearly indicate that at least one fan has failed, which is convenient for timely maintenance and repair of the fan.

[0048] A fan fault detection circuit and system of the present embodiment utilizes the characteristic of the first capacitor that it blocks direct current and passes alternating current, and realizes the charge and discharge conversion of the first capacitor according to the output state of the FG signal at different stages, thereby ensuring that the system can maintain a stable output regardless of whether it is in a normal operation stage or a fault stage, and realizes the conversion of the FG signal and the I / O signal; the on-off state of the switch tube directly reflects the operating state of the fan, simplifies the output waveform of the FG signal, facilitates the parallel connection of multiple fault detection circuits to share the same I / O terminal pin, and helps to realize the detection function of multiple fan faults at a relatively low cost when MCU resources are limited, thereby greatly reducing resource consumption.

[0049] The above examples are only used to further illustrate the technical content of the present invention, so that readers can understand it more easily, but they do not mean that the implementation of the present invention is limited to this. Any technical extension or re-creation made according to the present invention is protected by the present invention. The protection scope of the present invention shall be subject to the claims.

Claims

1. A fan fault detection circuit, applied to an FG detection circuit inside a fan, wherein the output end of the FG detection circuit is provided with a first transistor, the collector and emitter of the first transistor respectively output an FG signal and are grounded, wherein: include: A signal conversion module and a logic processing module connected in sequence; The signal conversion module includes: a charge and discharge circuit, a first capacitor and a switch tube; the first capacitor is connected to the output end of the FG detection circuit; the switch tube is connected to the first capacitor and the logic processing module; the charge and discharge circuit is used to drive the first capacitor to charge or discharge, so as to change the on-off state of the switch tube; The logic processing module is used to detect the on / off state of the switch tube and output the detection result.

2. The fan fault detection circuit according to claim 1, characterized in that: The positive electrode of the first capacitor is connected to the collector of the first transistor.

3. The fan fault detection circuit according to claim 2, characterized in that: The charge and discharge circuit includes: a first power supply voltage and a first resistor; one end of the first resistor is connected to the first power supply voltage, and the other end is connected to the collector of the first transistor.

4. The fan fault detection circuit according to claim 3, characterized in that: The charge and discharge circuit further includes: a second capacitor and a first diode; the cathode of the first diode is connected to the cathode of the first capacitor, the anode of the first diode is connected to the anode of the second capacitor, and the cathode of the second capacitor is grounded.

5. The fan fault detection circuit according to claim 4, characterized in that: The charge and discharge circuit also includes: a second diode or a second resistor; the anode of the second diode is connected between the first capacitor and the first diode, and the cathode of the second diode is grounded; or one end of the second resistor is connected between the first capacitor and the first diode, and the other end is grounded.

6. The fan fault detection circuit according to claim 5, characterized in that: The switch tube is a triode; the base of the switch tube is connected to the positive electrode of the second capacitor, the collector of the switch tube is connected to the first power supply voltage, and the emitter of the switch tube is grounded.

7. The fan fault detection circuit according to claim 6, characterized in that: The signal conversion module also includes: a third resistor and a fourth resistor; the two ends of the third resistor are respectively connected to the positive electrode of the second capacitor and the base of the switch tube; the two ends of the fourth resistor are respectively connected to the first power supply voltage and the collector of the switch tube.

8. The fan fault detection circuit according to claim 7, characterized in that: The logic processing module includes: a fifth resistor, a sixth resistor, a second power supply voltage, a second transistor and an I / O port; the two ends of the fifth resistor are respectively connected to the collector of the switching tube and the base of the second transistor, and one end of the sixth resistor is connected to the second power supply voltage and the collector of the second transistor; the emitter of the second transistor is grounded; and the I / O port is connected to the collector of the second transistor.

9. A fan fault detection system, characterized in that: include: A microcontroller and a fan fault detection circuit as described in any one of claims 1 to 8; the microcontroller is connected to the output end of the logic processing module.

10. The fan fault detection system according to claim 9, characterized in that: There are several fan fault detection circuits; the output ends of the several fan fault detection circuits are connected, and the microcontroller is connected to the output end of any one of the logic processing modules.

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