Method for detecting correctness of DVP data in chip test

Abstract

The invention discloses a method for detecting DVP data correctness in chip testing, and belongs to the field of chip testing. When a chip is designed, a DVP detector is arranged behind a DVP receiving end in the chip; detection circuits of different sequences are reserved in the DVP detector, and detection results and DVP data are sent to a subsequent circuit after detection; during a chip test, a test source of a wafer test and / or a package test outputs a detection sequence, and the detection sequence enters a DVP detector through a chip pin and a DVP receiving end; and the correctness of the DVP data is judged according to the detection result output by the DVP detector, so that defective products can be found as early as possible in a chip test. According to the invention, the chip test content of the DVP receiving end can be perfected, the reliability of chip manufacturing can be improved, and the cost of chip manufacturing can be reduced to a certain extent.

Description

Technical Field

[0001] The present invention relates to the technical field of chip testing, and in particular to a method for detecting the correctness of DVP data in chip testing. Background Art

[0002] Chip testing is mainly divided into two stages: wafer testing (CP, Chip Probing) and package testing (FT, Final Test). Among them, wafer testing is to use probes to test each die in the unpackaged whole wafer to screen out defective die; package testing is to test packaged chips to screen out chips with intact packaging and correct functions. In the chip design and manufacturing process, the earlier the production defects are discovered, the more production costs can be saved, so designing for testing is very important.

[0003] DVP (Digital Video Port) is a parallel digital video port. Its main interface signals include PCLK (pixel clock), VSYNC (frame synchronization signal), HSYNC (line synchronization signal) and DATA (pixel data). Figure 1 In the traditional DVP receiver design, usually only the number of frames and lines of input data are counted for chip testing, but such simple counting cannot achieve effective detection in wafer testing and package testing. Summary of the invention

[0004] The object of the present invention is to provide a method for detecting the correctness of DVP data in chip testing to solve the problems in the background technology.

[0005] In order to solve the above technical problems, the present invention provides a method for detecting the correctness of DVP data in chip testing, comprising: When designing the chip, a DVP detector is set after the DVP receiving end in the chip; Different sequences of detection circuits are reserved in the DVP detector, and after detection, the detection results and DVP data are sent to subsequent circuits together; During chip testing, the test source of wafer testing and / or package testing outputs a test sequence, which enters the DVP detector through the chip pins and the DVP receiving end; The correctness of the DVP data is determined by the detection result output by the DVP detector, so as to find defective products as early as possible during chip testing.

[0006] In one embodiment, during chip testing, a chip test source generates a pseudo-random binary sequence, which is passed through the chip pins and the DVP receiving end circuit. The DVP detector then generates another set of pseudo-random binary sequences using the same random code seed, and the comparison results of the two sets of pseudo-random binary sequences are used to detect the correctness of the DVP receiving end path data.

[0007] In one implementation, during chip testing, a chip test source generates DVP data and calculates a cyclic redundancy check code for the data. The DVP data and the cyclic redundancy check code pass through the chip pins and the DVP receiving end circuit together. The DVP detector then calculates the received DVP data to generate another set of cyclic redundancy check codes. The comparison results of the two sets of cyclic redundancy check codes are used to detect the correctness of the DVP receiving end path data.

[0008] In one implementation, during chip testing, a chip test source generates DVP data and calculates an error correction check code for the data. The DVP data and the error correction check code pass through the chip pins and the DVP receiving end circuit together. The DVP detector then calculates the received DVP data to generate another set of error correction check codes. The comparison results of the two sets of error correction check codes are used to detect the correctness of the DVP receiving end path data.

[0009] In one implementation, the error correction check code implements error detection and correction of 1-bit data, or error detection of 2 bits or more of data.

[0010] In one embodiment, based on a fixed error correction check code generation method, the check codes generated by error correction operations on the same data are the same. If the error correction check code changes by a specific number of bits, it is determined whether a single-bit data error or a two-bit or more-bit data error is detected. If a single-bit data error is detected, it is determined whether to correct the single-bit data and report the correction status. If a two-bit or more-bit data error is detected, an error status is reported.

[0011] In one implementation, when the chip is working normally, the 1-bit error correction function of the error correction check code is used to enhance the function of the DVP receiving end; when the chip is tested, only the error detection function of the error correction check code is used to detect the correctness of the DVP data.

[0012] The present invention provides a method for detecting the correctness of DVP data in chip testing. When designing a DVP receiving end chip, a DVP detector is designed after the DVP receiving end to detect the correctness of the DVP data by PRBS detection, CRC check or ECC check during chip testing. The present invention can improve the chip test content of the DVP receiving end, improve the reliability of chip manufacturing and reduce the cost of chip manufacturing to a certain extent. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 This is a schematic diagram of DVP interface signals.

[0014] Figure 2 It is a schematic diagram of the structure of the DVP data detection circuit.

[0015] Figure 3 It is a schematic diagram of the PRBS detection process provided by the present invention.

[0016] Figure 4 This is a CRC check flow chart provided by the present invention.

[0017] Figure 5 This is an ECC check flow chart provided by the present invention. DETAILED DESCRIPTION

[0018] The following is a further detailed description of a method for detecting the correctness of DVP data in chip testing proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0019] The present invention aims to provide a design method capable of detecting the correctness of DVP data during chip testing. The method is applicable to the chip design of any DVP receiving end. The overall structure of the corresponding DVP data detection circuit is as follows: Figure 2 shown.

[0020] When designing a chip, a DVP detector is designed after the DVP receiver. Different sequences of detection circuits are reserved in the DVP detector. After detection, the detection results and DVP data are sent to the subsequent circuits. When testing the chip, the test source such as CP / FT outputs the detection sequence, which enters the DVP detector after passing through the chip pins and the DVP receiver. Finally, the correctness of the DVP data is judged by the detection results output by the DVP detector, so that defective products can be found as early as possible during chip testing.

[0021] For DVP data detection, there are three methods, including but not limited to: 1. PRBS detection: PRBS (Pseudo-Random Binary Sequence) is a pseudo-random binary sequence. As long as the PRBS order and random code seed are determined, a certain PRBS sequence can be obtained. This principle is used to detect the correctness of DVP data. The detection process is as follows: Figure 3 As shown, the following steps are included: The chip test source generates a PRBS sequence, which is recorded as PRBS sequence 1; PRBS sequence 1 is sent to the DVP detector through the chip pins and the DVP receiver; The DVP detector uses the same random code seed to generate a new PRBS sequence, which is recorded as PRBS sequence 2; The DVP detector compares the received PRBS sequence 1 and the newly generated PRBS sequence 2. If the two are equal, PRBS_ERR is not set, proving that the chip test DVP receiving end function is correct; if the two are not equal, PRBS_ERR is set, proving that the DVP receiving end function is incorrect.

[0022] 2. CRC check: CRC (Cyclic Redundancy Check) is a cyclic redundancy data check method. Based on the fixed CRC check code generation method, the check codes generated by CRC operation on the same data are the same. This principle is used to detect the correctness of DVP data. The detection process is as follows: Figure 4 As shown, the following steps are included: The chip test source generates DVP data and calculates the CRC check code, which is recorded as CRC check code 1; The DVP data and CRC check code 1 are sent to the DVP detector through the chip pin and the DVP receiving end; The DVP detector performs CRC operation on the received DVP data, and the result is recorded as CRC check code 2; The DVP detector compares the received CRC check code 1 with the calculated CRC check code 2. If the two are equal, PRBS_ERR is not set, proving that the chip test DVP receiving end function is correct; if the two are not equal, PRBS_ERR is set, proving that the DVP receiving end function is incorrect.

[0023] 3. ECC check: ECC (Error Correcting Code) is a coding method based on Hamming code, which can realize error detection and correction of 1-bit data, or error detection of 2-bit or more data, but cannot realize error correction of 2-bit or more data. Based on the fixed ECC check code generation method, the check code generated by ECC operation on the same data is the same. If the ECC check code changes by a specific number of bits, it can be determined whether it is a 1-bit data error or a 2-bit or more data error. If it is a 1-bit data error, you can choose whether to correct the 1-bit data and report the correction status; if it is a 2-bit or more data error, report the error status. When the chip is working normally, the 1-bit error correction function of ECC can be used to enhance the function of the DVP receiving end. When the chip is tested, only the error detection function of ECC can be used to detect the correctness of the DVP data. The detection process is as follows: Figure 5 As shown, the following steps are included: The chip test source generates DVP data and calculates the ECC check code, which is recorded as ECC check code 1; The DVP data and ECC check code 1 are sent to the DVP detector through the chip pin and the DVP receiving end; The DVP detector performs ECC operation on the received DVP data, and the result is recorded as ECC check code 2; The DVP detector compares the received ECC check code 1 with the calculated ECC check code 2. If the two are equal, PRBS_ERR is not set, proving that the chip test DVP receiving end function is correct; if the two are not equal, PRBS_ERR is set, proving that the DVP receiving end function is incorrect.

[0024] When designing a DVP receiving end chip, the present invention designs a DVP detector after the DVP receiving end to detect the correctness of DVP data in chip testing.

[0025] During the chip test process, the chip test source generates a PRBS sequence, which is passed through the chip pins and the DVP receiving circuit. The DVP detector then generates another set of PRBS sequences using the same random code seed. The comparison results of the two sets of PRBS sequences are used to detect the correctness of the DVP receiving end channel data. During the chip test process, the chip test source generates DVP data and calculates the CRC check code of the data. The DVP data and the CRC check code pass through the chip pins and the DVP receiving end circuit together. The DVP detector then calculates the received DVP data to generate another set of CRC check codes. The comparison results of the two sets of CRC check codes are used to detect the correctness of the DVP receiving end path data. During the chip testing process, the chip test source generates DVP data and calculates the ECC check code of the data. The DVP data and the ECC check code pass through the chip pins and the DVP receiving circuit together. The DVP detector then calculates the received DVP data to generate another set of ECC check codes. The comparison results of the two sets of ECC check codes are used to detect the correctness of the DVP receiving end path data.

[0026] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for detecting the correctness of DVP data in chip testing, characterized in that: include: When designing the chip, a DVP detector is set after the DVP receiving end in the chip; Different sequences of detection circuits are reserved in the DVP detector, and after detection, the detection results and DVP data are sent to subsequent circuits together; During chip testing, the test source of wafer testing and / or package testing outputs a test sequence, which enters the DVP detector through the chip pins and the DVP receiving end; The correctness of the DVP data is determined by the detection result output by the DVP detector, so as to find defective products as early as possible during chip testing.

2. The method for detecting the correctness of DVP data in chip testing according to claim 1, characterized in that: During chip testing, the chip test source generates a pseudo-random binary sequence, which is passed through the chip pins and the DVP receiving circuit. The DVP detector then uses the same random code seed to generate another set of pseudo-random binary sequences. The comparison results of the two sets of pseudo-random binary sequences are used to detect the correctness of the DVP receiving end path data.

3. The method for detecting the correctness of DVP data in chip testing according to claim 1, characterized in that: During chip testing, the chip test source generates DVP data and calculates the cyclic redundancy check code of the data. The DVP data and the cyclic redundancy check code pass through the chip pins and the DVP receiving circuit together. The DVP detector then calculates the received DVP data to generate another set of cyclic redundancy check codes. The comparison results of the two sets of cyclic redundancy check codes are used to detect the correctness of the DVP receiving end path data.

4. The method for detecting the correctness of DVP data in chip testing according to claim 1, characterized in that: During chip testing, the chip test source generates DVP data and calculates the error correction check code of the data. The DVP data and the error correction check code pass through the chip pins and the DVP receiving circuit together. The DVP detector then calculates the received DVP data to generate another set of error correction check codes. The comparison results of the two sets of error correction check codes are used to detect the correctness of the DVP receiving end path data.

5. The method for detecting the correctness of DVP data in chip testing according to claim 4, characterized in that: The error correction check code implements error detection and correction of 1-bit data, or error detection of 2-bit or more data.

6. The method for detecting the correctness of DVP data in chip testing according to claim 4, characterized in that: Based on a fixed error correction check code generation method, the check codes generated by error correction operations on the same data are the same. If the error correction check code changes by a specific number of bits, it is determined whether it is a 1-bit data error or a 2-bit or more data error. If it is a 1-bit data error, choose whether to correct the 1-bit data and report the correction status; if it is a 2-bit or more data error, report the error status.

7. The method for detecting the correctness of DVP data in chip testing according to claim 6, characterized in that: When the chip is working normally, the 1-bit error correction function of the error correction check code is used to enhance the function of the DVP receiving end; when the chip is tested, only the error detection function of the error correction check code is used to detect the correctness of the DVP data.

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