Touch detection circuit, touch chip and electronic equipment

Abstract

According to the touch detection circuit, the touch chip and the electronic equipment, the first-order N-bit delta sigma analog-to-digital converter is used for replacing a charge integrator CA, a programmable gain amplifier PGA and an analog-to-digital converter ADC in a traditional touch detection circuit, and therefore the design structure of the touch detection circuit is greatly simplified; the design difficulty is reduced. In addition, the Nbit DAC in the first-order N-bit delta sigma analog-to-digital converter participates in reference reduction of sensed charges, after the system is stable, net input charges input into the integrator of the first-order N-bit delta sigma analog-to-digital converter during each scanning are approximately equal to zero, the integrator can be quickly stable, and the sensitivity of touch operation can be improved.

Description

Technical Field

[0001] The present invention relates to the field of touch control technology, and in particular to a touch control detection circuit, a touch control chip and an electronic device. Background Art

[0002] Capacitive touch screens are widely used in various electronic devices at present, which usually use capacitive sensors to realize touch detection. When a conductor such as a finger, nail, pen or other object is touching or approaching the touch screen, a corresponding touch event occurs, and the capacitance near the location of the touch event will change. By detecting the change in capacitance, the location of the touch event and the user's touch operation can be determined.

[0003] The existing touch detection circuit has problems such as complex design, high cost and insensitive touch operation response. Summary of the invention

[0004] An object of the present invention is to provide a touch detection circuit, a touch chip and an electronic device, which can simplify the design, reduce the cost and improve the sensitivity of touch detection.

[0005] To achieve the above object, the present invention provides a touch detection circuit, which includes:

[0006] A charge and discharge circuit, coupled to a corresponding sensing channel on the touch screen, and used to charge or discharge the sensing channel during a scanning cycle to convert a sensing signal on the sensing channel into a corresponding sensing charge;

[0007] A first-order N-bit ⊿∑ (delta sigma) analog-to-digital converter, comprising an adder, an integrator, an N-bit analog-to-digital converter and an N-bit digital-to-analog converter, wherein two input terminals of the adder are respectively coupled to the output terminal of the charge-discharge circuit and the output terminal of the N-bit digital-to-analog converter, and an input terminal of the N-bit digital-to-analog converter is coupled to the output terminal of the N-bit analog-to-digital converter, wherein N≥2 and N is an integer;

[0008] The integrator is used to integrate the received net input charge; the N-bit analog-to-digital converter is used to quantize the output of the integrator into an N-bit digital signal, and the N-bit digital-to-analog converter is used to provide a subtracted reference charge under the control of the N-bit digital signal; the adder is used to subtract the subtracted reference charge from the sensed charge to obtain the net input charge.

[0009] Optionally, when the first-order N-bit ⊿∑ analog-to-digital conversion circuit is stable, the net input charge is equal to 0 or close to 0.

[0010] Optionally, the integrator includes an integrating amplifier, an integrating capacitor and an integrating switch, the first input terminal of the integrating amplifier is coupled to the output terminal of the adder, one end of the integrating capacitor and one end of the integrating switch, the second input terminal of the integrating amplifier is connected to a common reference voltage, and the output terminal of the integrating amplifier is coupled to the input terminal of the N-bit analog-to-digital converter, the other end of the integrating capacitor and the other end of the integrating switch.

[0011] Optionally, the capacitance value of the integrating capacitor is adjustable and is used to adjust the accuracy of the N-bit digital signal; or, the range of the N-bit analog-to-digital converter is adjustable and is used to adjust the accuracy of the N-bit digital signal.

[0012] Optionally, the N-bit digital-to-analog converter includes two capacitor arrays with the same structure and connected in parallel; each capacitor array has N capacitors, and one end of each capacitor is coupled to a common reference voltage through a reset switch, and the other end is connected to a first power supply voltage or a second power supply voltage under the control of the N-bit digital signal, and the capacitance values ​​of the N capacitors are different from each other and increase in sequence by multiples of 2 with Cμ / 2 as the starting value, and Cμ is a fixed value; wherein, when the N-bit digital-to-analog converter is reset, when the other end of a capacitor in one of the capacitor arrays is connected to the first power supply voltage, the other end of a capacitor with the same capacitance value as the capacitor in another of the capacitor arrays is connected to the second power supply voltage.

[0013] Optionally, the first-order Nbit⊿∑ analog-to-digital conversion circuit also includes a digital filter, which is coupled to the output end of the N-bit analog-to-digital converter, and is used to convert the N-bit digital signal into a Q-bit digital signal, where Q is an integer and Q≥N.

[0014] Optionally, the N-bit analog-to-digital converter samples and quantizes the output of the integrator in an oversampling manner, Q>N.

[0015] Optionally, the charge and discharge circuit includes first to third switches and a current source; in the self-capacitance scanning mode, one end of the current source is connected to the corresponding second power supply voltage, and the other end is coupled to one end of the second switch, the other end of the second switch is coupled to one end of the first switch, one end of the third switch and the sensing channel, the other end of the first switch is connected to the first power supply voltage, and the other end of the third switch is coupled to the input end of the adder.

[0016] Optionally, the charge and discharge circuit includes first to third switches and a current source; in the mutual capacitance scanning mode, one end of the current source is connected to the first power supply voltage, and the other end is coupled to one end of the second switch, the other end of the second switch is coupled to one end of the first switch, one end of the third switch and the sensing channel, the other end of the first switch is connected to the common reference voltage, and the other end of the third switch is coupled to the input end of the adder.

[0017] Optionally, the touch detection circuits are coupled to the sensing channels in a one-to-one correspondence, or one touch detection circuit is coupled to a plurality of sensing channels.

[0018] Based on the same inventive concept, the present invention further provides a touch control chip, which includes the touch control detection circuit as described in the present invention.

[0019] Based on the same inventive concept, the present invention also provides an electronic device, which includes a touch screen and a touch chip as described in the present invention, the touch screen has a plurality of sensing channels and a plurality of transmitting channels, and the touch chip is coupled to each of the sensing channels and each of the transmitting channels.

[0020] Compared with the prior art, the technical solution of the present invention has at least one of the following beneficial effects:

[0021] 1. A first-order N-bit ⊿∑ analog-to-digital converter (Nbit delta sigma ADC, Nbit⊿∑ADC) is used to replace the charge integrator CA, programmable gain amplifier PGA and analog-to-digital converter in the traditional touch detection circuit, thereby greatly simplifying the design structure of the touch detection circuit and reducing the design difficulty.

[0022] 2. The N-bit digital-to-analog converter Nbit DAC in the first-order N-bit ⊿∑ analog-to-digital converter participates in subtracting the reference of the sensing charge. When the system is stable, the net input charge input to the integrator in the first-order N-bit ⊿∑ analog-to-digital converter is approximately equal to 0 during each scan, and the integrator can quickly reach stability. Therefore, when the output of the first-order Nbit ⊿∑ ADC reaches equilibrium, the entire signal chain of the touch detection circuit can quickly reach stability, which is beneficial to improving the sensitivity of the touch operation.

[0023] 3. The two parallel capacitor arrays in the Nbit DAC constitute a digital-to-analog converter with a capacitor separation structure. Each bit capacitor is equivalent to being divided into two small capacitors with equal capacitance values. When the Nbit DAC is reset, half of the small capacitors in the Nbit DAC are connected to the second power supply voltage, and the other half of the small capacitors are connected to the first power supply voltage, which is equivalent to connecting the bottom plate of each bit capacitor to half of the sum of the first power supply voltage and the second power supply voltage when the Nbit DAC is reset. This is equivalent to avoiding switching from the common reference voltage to the second power supply voltage and from the common reference voltage to the first power supply voltage when the Nbit DAC is reset, thereby avoiding the accuracy problem of the common reference voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.

[0025] Figure 1 This is a schematic diagram of the working principle of an existing touch chip.

[0026] Figure 2 It is a structural schematic diagram of a touch detection circuit in an existing touch chip.

[0027] Figure 3 It is a schematic diagram of the working principle of the touch control chip according to the first embodiment of the present invention.

[0028] Figure 4 2 is a schematic diagram of the structure of a touch detection circuit according to a first embodiment of the present invention.

[0029] Figure 5 FIG. 4 is a circuit diagram of an N-bit DAC in a touch detection circuit according to a first embodiment of the present invention.

[0030] Figure 6 It is a schematic diagram of a working timing of the touch detection circuit according to the first embodiment of the present invention.

[0031] Figure 7 FIG. 4 is another working timing diagram of the touch detection circuit according to the first embodiment of the present invention.

[0032] Figure 8 FIG. 4 is a schematic diagram of the structure of a touch detection circuit according to a second embodiment of the present invention.

[0033] Fig. 9 FIG. 4 is a schematic diagram of the working timing of the touch detection circuit according to the second embodiment of the present invention. DETAILED DESCRIPTION

[0034] In the following description, a large number of specific details are given in order to provide a more thorough understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features known in the art are not described. It should be understood that the present invention can be implemented in different forms and should not be interpreted as being limited to the embodiments proposed here. On the contrary, providing these embodiments will make the disclosure thorough and complete, and the scope of the present invention will be fully conveyed to those skilled in the art. The same reference numerals represent the same elements from beginning to end. It should be understood that when an element is referred to as "connected to", "coupled" other elements, it can be directly connected to other elements, or there can be intervening elements. On the contrary, when an element is referred to as "directly connected to" other elements, there is no intervening element. When used here, the singular forms of "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates another way. It should also be understood that the term "comprising" is used to identify the presence of features, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, steps, operations, elements, components and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0035] The principle of an existing touch chip used in an OLED (Organic Light-Emitting Diode) touch screen is as follows: Figure 1 As shown. The OLED touch screen 10 generally has a plurality of longitudinally extending transmission channels TX (also called transmission lines) and a plurality of transversely extending sensing channels RX (also called sensing lines), and the intersection of each transmission channel TX and each sensing channel RX is a sensing node. The touch chip generally includes a driving circuit 11 coupled to the transmission channel TX and a touch detection circuit 12 coupled to the sensing channel RX. According to the size and shape of the OLED touch screen 10, there will be different numbers of transmission channels TX and sensing channels RX. Figure 1 In the OLED touch screen 10 shown in FIG. 1 , the number of sensing channels RX is n, and the number of sending channels TX is m. The OLED touch screen 10 has n sensing channels RX (ie, RX <1> ~RX <n>), m transmission channels TX (ie TX <1> ~TX <m>) screen model.

[0036] Since the human body is a conductor and is connected to the ground, the self-capacitance and mutual capacitance of the channel touched or approached by the finger will change. Therefore, the touch chip can use self-capacitance and mutual capacitance, two capacitance detection methods, to detect the change of self-capacitance or mutual capacitance on the OLED touch screen 10, and then calculate the touch position of the finger according to the change of self-capacitance or mutual capacitance, so as to realize touch recognition on the OLED touch screen 10. Exemplarily, when performing self-capacitance detection, the touch chip scans the change of self-capacitance of each transmitting channel and sensing channel to the ground. When the finger approaches or touches, the self-capacitance on the transmitting channel TX and the sensing channel RX near the finger will increase. When performing mutual capacitance detection, the touch chip detects the change of mutual capacitance between the transmitting channel TX and the sensing channel RX. Among them, Figure 1 In FIG. 1 , Cm is a parasitic capacitance between a transmission channel TX and a sensing channel RX, and Cb is a parasitic capacitance between a cathode of the OLED touch screen 10 and the sensing channel RX.

[0037] The existing touch detection circuit 12 generally includes an analog front-end circuit AFE (Analog Front-end) and an analog-to-digital converter circuit ADC (Analog-to-Digital Converter).

[0038] Taking self-capacitance detection as an example, the principle of an analog front-end circuit AFE in a conventional touch detection circuit 12 applied to an OLED touch chip is as follows: Figure 2 The analog front-end circuit AFE includes a charge-discharge circuit 120, a charge integrator CA and a programmable gain amplifier PGA. Figure 2 In the figure, Cathode is the cathode of the OLED touch screen, Csig represents the capacitance generated between the finger touching the OLED touch screen and the sensing channel RX (i.e., the capacitance component generated between the finger and the touch screen), and Cb represents the parasitic capacitance between the cathode and the sensing channel RX, which is usually a large capacitance of up to several hundred pF. When the noise of the cathode Cathode is not considered, Cb can be considered as the parasitic capacitance between the sensing channel RX and the ground AVSS.

[0039] The working principle of the touch chip is to generate Csig when a finger touches the screen, and Csig disappears when the finger leaves the screen. By scanning the changes in the self-capacitance of each sending channel and sensing channel to the ground (i.e., whether there is Csig), it can determine whether the OLED touch screen 10 is touched and the touched position.

[0040] Please combine Figure 2 , when the touch chip is scanned for the first time (the finger is not placed on the OLED touch screen at this time), the charge and discharge circuit 120 first pulls the sensing channel RX to the ground potential, and the charge integrator CA is reset at the same time; then, the charge and discharge circuit 120 charges the sensing channel RX again until the potential VRX of the sensing channel RX is equal to the common reference voltage VCOM. In this process, the current source I0 charges the sensing channel RX with a charge amount Q = VCOM*Cb, and then the charge and discharge circuit 120 converts the charge amount Q into a voltage VRX and provides it to the charge integrator CA. The charge integrator CA performs charge integration based on the voltage VRX and the public reference voltage VCOM to obtain the output voltage VOUT corresponding to the sensing signal on the sensing channel RX, and the VOUT is related to VCOM*Csig. When there is a finger touch, the above scanning process is repeated.

[0041] The programmable gain amplifier PGA is generally designed in a coherent double sampling mode. The first sampling VOUT in the sampling period is defined as VOUT1), and the second sampling VOUT is defined as VOUT2. If there is no finger touch, Csig = 0, then the voltage difference between the two sampling VOUTs ⊿VOUT = VOUT2-VOUT1 = 0. If there is a finger touch, Csig≠0, then the voltage difference between the two sampling VOUTs ⊿VOUT≠0. This ⊿VOUT is amplified by the PGA and provided to the ADC for quantization.

[0042] Therefore, combined with Figure 1 and Figure 2 , can be based on the ADC on the touch screen <1> ~ADC <n>The quantification result can be used to determine whether the touch screen is touched and the touch position.

[0043] The entire signal chain of the above-mentioned touch detection circuit 12 is a four-stage structure of a charging and discharging circuit 120, a charge integrator CA, a programmable gain amplifier PGA and an analog-to-digital converter ADC. When the touch detection result is expected to have high precision, the circuit requirements for each stage of the structure are very high, especially for the analog-to-digital converter ADC. The higher the precision, the more complex its circuit design. Moreover, since the input charge Q of the charge integrator CA is not 0 during each scan, the entire signal chain of the touch detection circuit 12 requires a certain amount of stabilization time, which is not conducive to improving the sensitivity of the touch operation.

[0044] Based on this, the present invention provides a touch detection circuit, a touch chip and an electronic device, which replace the charge integrator CA, the programmable gain amplifier PGA and the analog-to-digital converter ADC in the traditional structure with a first-order Nbit⊿∑ADC, thereby reducing the difficulty and requirements of circuit design, and when the output of the first-order Nbit⊿∑ADC reaches equilibrium, the entire signal chain of the touch detection circuit can quickly reach stability, which is beneficial to improving the sensitivity of the touch operation.

[0045] The following is combined with Figures 3 to 9 The technical solution proposed by the present invention is further described in detail with specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0046] First embodiment

[0047] Please refer to Figure 3 The present embodiment provides a touch detection circuit 22, which is coupled to the touch screen 20 and is used to detect the capacitance change on the touch screen 20. The detection result of the touch detection circuit 22 can be used to identify the location of the touch event on the touch screen 20 and determine the user's touch operation.

[0048] The touch screen 20 may be any touch screen such as an OLED touch screen, and has m longitudinally extending transmission channels TX (ie, TX <1> ~TX <m>) and n transversely extending sensing channels RX (ie, RX <1> ~RX <n>), the intersection of each transmission channel TX and each sensing channel RX is a sensing node, and the values ​​of m and n depend on the size and shape of the touch screen 20.

[0049] In this embodiment, the touch detection circuit 22 has a plurality of touch detection branches (not shown in FIG. Figure 3 The number of touch detection branches is the same as the number of sensing channels RX, and the touch detection branches are coupled to the sensing channels RX in a one-to-one correspondence, and each touch detection branch includes a charge-discharge circuit 220 and a first-order N-bit ⊿∑ analog-to-digital converter (hereinafter referred to as "first-order Nbit ⊿∑ ADC") 221. Exemplarily, the charge-discharge circuit 220 <1> With the sensing channel RX <1> and first-order Nbit⊿∑ADC221 <1> Coupling; charging and discharging circuit 220 <2> With the sensing channel RX <2> and first-order Nbit⊿∑ADC 221 <2> Coupling; charging and discharging circuit 220 <3> With the sensing channel RX <3> and first-order Nbit⊿∑ADC 221 <3> coupling; and so on, the charge and discharge circuit 220 <n-1>With the sensing channel RX <n-1>and first-order Nbit⊿∑ADC 221 <n-1>Coupling; charging and discharging circuit 220 <n>With the sensing channel RX <n>and first-order Nbit⊿∑ADC 221 <n>Coupling.

[0050] It should be understood that in other embodiments of the present invention, one touch detection branch may also be coupled to multiple sensing channels RX at the same time.

[0051] In this embodiment, the charge-discharge circuit 220 is used to charge or discharge the sensing channel RX coupled thereto during a scanning period, so as to convert the sensing signal on the sensing channel RX coupled thereto into a corresponding sensing charge Qsig.

[0052] The charge and discharge circuit 220 may adopt any suitable circuit design. As an example, please refer to Figure 4 The charge and discharge circuit 220 includes first to third switches S1-S3 and a current source I0. One end of the current source I0 is connected to a first power supply voltage AVSS (the voltage AVSS is an internal ground voltage, which may be different from an external ground voltage or a 0V voltage), and the other end is coupled to one end of the second switch S2. The other end of the second switch S2 is coupled to one end of the first switch S1, one end of the third switch S3 and a sensing channel RX. The other end of the first switch S1 is connected to a common reference voltage VCOM, and the other end of the third switch S3 is coupled to the input end of the first-order Nbit⊿∑ADC221.

[0053] Please continue to refer to Figure 4 In this embodiment, the first-order Nbit⊿∑ADC 221 includes an adder U0, an integrator 221a, an N-bit analog-to-digital converter Nbit ADC (hereinafter referred to as "Nbit ADC"), an N-bit digital-to-analog converter Nbit DAC (hereinafter referred to as "Nbit DAC"), and a digital filter U1. The integrator 221a includes an integrating amplifier Int_OP, an integrating capacitor Cfb, and an integrating switch Int_RST.

[0054] The circuit connection relationship in the first-order Nbit⊿∑ADC 221 is as follows:

[0055] One input end of the adder U0 is used as the input end of the first-order Nbit⊿∑ADC 221 and is coupled to the output end of the charge-discharge circuit 220 to access the sensed charge Qsig. Another input end of the adder U0 is coupled to the output end of the Nbit DAC. The output end of the adder U0 is coupled to the first input end (i.e., the inverting input end "-") of the integrating amplifier Int_OP, one end of the integrating capacitor Cfb and one end of the integrating switch Int_RST. The second input end (i.e., the non-inverting input end "-") of the integrating amplifier Int_OP is connected to the corresponding common reference voltage VCOM (also known as "common mode voltage"). The output end of the integrating amplifier Int_OP is coupled to the input end of the Nbit ADC, the other end of the integrating capacitor Cfb and the other end of the integrating switch Int_RST. The output end of the Nbit ADC is coupled to the input end of the NbitDAC and the input end of the digital filter U1. The output end of the digital filter U1 is used as the output end of the first-order Nbit⊿∑ADC 221. Wherein, N≥2 and N is an integer, and the larger N is, the higher the accuracy of the N-bit ADC and the N-bit DAC is.

[0056] The integrator 221a is used to integrate the received net input charge Qin. The N-bit ADC is used to quantize the output of the integrator 221a into an N-bit digital signal D. The digital filter U1 is used to quantize the N-bit digital signal D (i.e. Figure 5 D1~DN) in the filter is filtered and converted into a Q-bit digital signal DOUT <q:0>Output, Q>N. The N-bit DAC is used to provide a subtracted reference charge Qadc under the control of the N-bit digital signal D. The adder U0 is used to subtract the subtracted reference charge Qadc from the sensed charge Qsig to obtain a net input charge Qin.

[0057] It should be understood that the adder U0, N Nbit ADC, Nbit DAC and digital filter U1 in the first-order Nbit⊿∑ADC 221 and the integrating amplifier Int_OP in the integrator 221a can all be implemented using any suitable circuit design. The digital filter U1 can be a FIR filter or an IIR filter.

[0058] Please refer to Figure 5 In this embodiment, the N-bit DAC includes two capacitor arrays A and B with the same structure and connected in parallel. The capacitor array A has N capacitors C1a to CNa, and the capacitor array B has N capacitors C1b to CNb.

[0059] Capacitors C1a~CNa and capacitors C1b~CNb correspond one to one. The capacitance values ​​of the N capacitors C1a~Can are different from each other and increase in multiples of 2 with Cμ / 2 as the starting value. The capacitance values ​​of the N capacitors C1b~CNb are different from each other and increase in multiples of 2 with Cμ / 2 as the starting value, that is, C1a=C1b=Cμ / 2, C2a=C2b=2 0 Cμ=Cμ,C3a=C3b=2Cμ,and so on,CNa=CNb=2 N-2 That is to say, the capacitance values ​​of the N capacitors C1a to Can are in a geometric progression, and the common ratio is 2. That is to say, the capacitance values ​​of the N capacitors C1b to CNb are in a geometric progression, and the common ratio is 2.

[0060] Moreover, the top plates (i.e., one end of the capacitors) of capacitors C1a-CNa and capacitors C1a-CNa and capacitors C1b-CNb are all coupled to the common reference voltage VCOM through the reset switch RST, and are also coupled to a main switch S4. When S4 is closed, the Nbit DAC outputs the corresponding subtracted reference charge Qdac. The bottom plates (i.e., the other end of the capacitors) of each capacitor in capacitors C1a-CNa and capacitors C1b-CNb are respectively coupled to one end of two control switches, and the control ends of the two control switches are connected to the corresponding digital signals and their inverted signals in the D1-DN signals. One of the two control switches is connected to the first power supply voltage AVSS (the voltage AVSS is an internal ground voltage, which can be a ground voltage different from the external ground voltage or 0V voltage), and the other is connected to the second power supply voltage AVDD (which can be a system operating voltage). Exemplarily, the bottom plate of capacitor C1a is coupled to one end of control switch s1a and one end of control switch s_1a, the other end of control switch s1a is connected to AVSS, the other end of control switch s_1a is connected to AVDD, the control end of control switch s_1a is connected to digital signal D1 output by Nbit ADC, and the control end of control switch s1a is connected to inverted signal D_1 of digital signal D1; the bottom plate of capacitor C2a is coupled to one end of control switch s2a and one end of control switch s_2a, the other end of control switch s2a is connected to AVSS, the other end of control switch s_2a is connected to AVDD, the control end of control switch s_2a is connected to digital signal D2 output by Nbit ADC, and the control end of control switch s2a is connected to inverted signal D_2 of digital signal D2; the bottom plate of capacitor CNa is coupled to one end of control switch sNa and one end of control switch s_Na, the other end of control switch sNa is connected to AVSS, the other end of control switch s_Na is connected to AVDD, and the control end of control switch s_Na is connected to Nbit The control terminal of the control switch sNa is connected to the inverted signal D_N of the digital signal DN output by the ADC.The bottom plate of the capacitor C1b is coupled to one end of the control switch s1b and one end of the control switch s_1b, the other end of the control switch s1b is connected to AVSS, the other end of the control switch S_1b is connected to AVDD, the control end of the control switch s1b is connected to the digital signal D1, and the control end of the control switch s_1b is connected to the inverted signal D_1 of the digital signal D1 output by the Nbit ADC; the bottom plate of the capacitor C2b is coupled to one end of the control switch s2b and one end of the control switch s_2b, the other end of the control switch s2b is connected to AVSS, the other end of the control switch s_2b is connected to AVDD, the control end of the control switch s2b is connected to the digital signal D2 output by the Nbit ADC, and the control end of the control switch s_2b is connected to the inverted signal D_2 of the digital signal D2; the bottom plate of the capacitor CNb is coupled to one end of the control switch sNb and one end of the control switch s_Nb, the other end of the control switch SNb is connected to AVSS, the other end of the control switch s_Nb is connected to AVDD, and the control end of the control switch sNb is connected to the Nbit The ADC outputs the digital signal DN, and the control terminal of the control switch s_Nb is connected to the inverted signal D_N of the digital signal DN.

[0061] When the reset switch RST is closed, the Nbit DAC is reset, and when the bottom plate of the capacitor on a certain bit in the capacitor array A is connected to AVSS, the bottom plate of the capacitor on the same bit in the capacitor array B (i.e., the capacitor with the same capacitance value as the capacitor in the capacitor array A) is connected to AVDD.

[0062] The N-bit DAC of this embodiment adopts a capacitor separation structure, which is actually equivalent to dividing the total capacitance on each bit in the N-bit DAC into two equal small capacitors, one small capacitor is the capacitance on the bit in capacitor array A, and the other small capacitor is the capacitance on the bit in capacitor array B. For example, the total capacitance on the first bit is divided into Cμ / 2+Cμ / 2, the total capacitance on the second bit is divided into Cμ+Cμ, and the total capacitance on the Nth bit is divided into 2 N-2 *Cμ+2 N-2 *Cμ. When RST is closed to reset the Nbit DAC, if the capacitors in capacitor array A are all connected to AVDD, then the capacitors in capacitor array B are all connected to AVSS. Then, equivalently, when the Nbit DAC is reset, the bottom plate of each capacitor is connected to (AVDD+AVSS) / 2, thereby eliminating the need for a common-mode voltage VCOM, thus avoiding the problem of unequal absolute values ​​of charge changes when switching from VCOM to AVDD and from VCOM to AVSS, thereby improving the nonlinearity of the Nbit DAC and improving the resolution of the touch detection circuit 22 for finger capacitance detection.

[0063] Moreover, the total capacitance of each bit in the Nbit DAC also participates in the subtraction of the reference of the sensing charge Qsig, Qin = Qsig-Qdac. After the system is stable (that is, the output of the first-order Nbit⊿∑ADC 221 reaches equilibrium), Qin(k) = Qsig(k)-Qdac(k-1)≈0 for each scan, where k represents the kth scan cycle. Therefore, the input of the integrator 221 is 0 for each scan, so stability can be achieved quickly, which is beneficial to improving the sensitivity of touch detection.

[0064] It is worth noting that in the touch detection circuit 22 of the present embodiment, the capacitance value of the integral capacitor Cfb may be adjustable, so that the accuracy of the digital signal output by the first-order Nbit⊿∑ADC 221 can be adjusted directly by adjusting the capacitance value of the integral capacitor Cfb to achieve the desired accuracy. Alternatively, the range of the Nbit ADC may be adjustable, so that the accuracy of the digital signal output by the first-order Nbit⊿∑ADC 221 can be adjusted directly by adjusting the range of the Nbit ADC to achieve the desired accuracy.

[0065] The touch detection circuit of this embodiment can adopt the mutual capacitance detection (i.e. mutual capacitance scanning) method. When a touch event such as a finger or other conductor approaches or contacts the touch screen 20, Csig (i.e. the capacitance component generated between the finger and the touch screen) is generated, and the mutual capacitance between the transmission channel TX and the sensing channel RX at the touch event position changes from the original Cm to Cm-Csig (i.e. the equivalent parasitic capacitance between the transmission channel TX and the sensing channel RX changes). The corresponding touch detection branch in the touch detection circuit 22 can detect the presence of Csig; and when the finger or other conductor is away from the screen (i.e. when no touch event occurs or after the touch event is cancelled), Csig disappears. Therefore, by combining the detection results of all touch detection branches in the touch detection circuit 22, it is possible to determine whether Csig exists on the entire screen of the touch screen 20, determine whether a touch event occurs on the entire screen of the touch screen 20, and determine the position of the touch event.

[0066] Please refer to Figure 6 , Figure 6 for Figure 4 The touch detection circuit shown has a working timing of coding on the rising edge of TX (coding here means that TX jumps from a low level to a high level). In the mutual capacitance detection mode, the corresponding code sequence (i.e., the drive signal) is loaded onto the transmitting channel TX at a set time interval. After each sensing channel RX receives the capacitance change signal, coding is performed on the sensing channel RX.

[0067] The working process is as follows: First, the integration switch Int_RST jumps high and closes, S1 jumps high and closes, and the integrator 221a is reset. During the reset of the integrator 221a, the potential of the sensing channel RX is pulled to VCOM. After the reset, Int_RST jumps low and disconnects, and S1 immediately jumps low and disconnects, and when the waiting transmission channel TX jumps high (that is, jumps from a low level to a high level), S2 is closed and turned on (that is, S2 jumps high), and the current source I0 in the charge and discharge circuit 220 charges or discharges the sensing channel RX, and subtracts the reference, thereby converting the capacitance variable Csig into a sensing charge Qsig containing finger information. After that, S3 is closed (S3 jumps high), and the sensing charge Qsig containing finger information is sent to the first-order Nbit⊿∑ADC 221 for quantization. Qsig is different when there is a finger touch or not. By quantifying this "difference", the size of Csig can be determined to determine whether there is a touch.

[0068] from Figure 6 It can be seen that the touch detection circuit 22 adopts the oversampling technology, and its oversampling rate is M. In this way, when the digital signal DOUT output by the digital filter U1 is required <q:0>When the precision is 12 bits (i.e., Q=12), the number of bits N of this Nbit ADC does not need to be 12 bits, i.e., N<12, N=6~8, and the output after Nbit ADC sampling and digital filtering by digital filter U1 can easily reach 12bit precision. This can greatly reduce the design difficulty and area of ​​the Nbit ADC in the first-order Nbit⊿∑ADC 221, and also reduce the performance requirements such as linearity of the Nbit DAC.

[0069] Figure 3 and Figure 4 The touch detection circuit shown can also use the falling edge coding method to realize touch detection. The specific timing is as follows Figure 7 During the reset period, TX continues to be at a high level. After the reset is completed, Int_RST jumps low and disconnects, S1 immediately jumps low and disconnects, and when the transmitting channel TX jumps low (i.e., jumps from a high level to a low level), coding begins, S2 is closed and turned on (i.e., S2 jumps high), and the current source I0 in the charge and discharge circuit 220 charges or discharges the sensing channel RX, and the working process is the same as Figure 6 The rising edge coding shown is similar and will not be described in detail.

[0070] Please refer to Figure 3 This embodiment also provides a touch control chip, which includes the touch control detection circuit as described in this embodiment.

[0071] Optionally, the touch control chip may further include a driving circuit 21, and the driving circuit 21 is coupled to each transmission channel TX of the touch screen 20. In other embodiments of the present invention, the driving circuit 21 may be integrated into a driving chip independent of the touch control chip.

[0072] Please refer to Figure 3 This embodiment also provides an electronic device, which includes a touch screen and the touch chip of this embodiment.

[0073] The touch control chip and the electronic device of the present embodiment have improved performance due to the adoption of the touch control detection circuit of the present embodiment.

[0074] Second embodiment

[0075] Please refer to Figure 3 and Figure 8 This embodiment provides a touch detection circuit, which is coupled to the touch screen 20 and is used to detect the capacitance change on the touch screen 20. The detection result of the touch detection circuit 22 can be used to identify the location of the touch event on the touch screen 20 and determine the user's touch operation. The touch detection circuit 22 has several touch detection branches (not shown in FIG. Figure 3 The touch detection branches may be coupled to the sensing channels RX in a one-to-one correspondence, or one touch detection branch may be coupled to multiple sensing channels RX at the same time.

[0076] Each touch detection branch includes a charge-discharge circuit 220 and a first-order N-bit ⊿∑ ADC 221. <1> With the sensing channel RX <1> and first-order Nbit⊿∑ADC 221 <1> Coupling; charging and discharging circuit 220 <2> With the sensing channel RX <2> and first-order Nbit⊿∑ADC 221 <2> Coupling; charging and discharging circuit 220 <3> With the sensing channel RX <3> and first-order Nbit⊿∑ADC 221 <3> coupling; and so on, the charge and discharge circuit 220 <n-1>With the sensing channel RX <n-1>and first-order Nbit⊿∑ADC 221 <n-1>Coupling; charging and discharging circuit 220 <n>With the sensing channel RX <n>and first-order Nbit⊿∑ADC 221 <n>Coupling.

[0077] The touch detection circuit 22 of this embodiment is different from the touch detection circuit of the first embodiment in that (1) a self-capacitance scanning method (or a self-capacitance detection method) is used to identify the position of the touch event on the touch screen 20; (2) the charge and discharge circuit 220 includes first to third switches S1 to S3 and a current source I0. One end of the current source I0 is connected to the second power supply voltage AVDD, and the other end is coupled to one end of the second switch S2. The other end of the second switch S2 is coupled to one end of the first switch S1, one end of the third switch S3 and the sensing channel RX. The other end of the first switch S1 is grounded, and the other end of the third switch S3 is coupled to the input end of the first-order Nbit⊿∑ADC 221.

[0078] The working sequence of the touch detection circuit of this embodiment is as follows: Fig. 9 As shown, the specific process includes: first, the integration switch Int_RST jumps high and closes, and at the same time, S1 jumps high and closes, and the integrator 221a is reset. During the reset period of the integrator 221a, the charge and discharge circuit 220 discharges the sensing channel RX until the potential of the sensing channel RX is pulled down to the ground. After the reset is completed, the integration switch Int_RST jumps low and disconnects, and S2 immediately jumps high and closes. The charge and discharge circuit 220 charges the sensing channel RX, and the charging time is the width of the high level of S2, thereby converting the self-capacitance change Csig into the sensing charge Qsig containing the finger information. After the charging is completed, S3 jumps high and closes, and the first-order Nbit⊿∑ADC 221 quantizes the sensing charge Qsig containing the finger information.

[0079] From the above working process, it can be seen that when S2 is high, the current source I0 charges the sensing channel RX. The voltage charged to the sensing channel RX when there is a finger touch is lower than the voltage charged when there is no finger touch. Therefore, Qsig is different when there is a finger touch or not. This difference can be used to detect the size of Csig to determine whether there is a touch.

[0080] The touch detection circuit of this embodiment is the same as the touch detection circuit of the first embodiment, and can also greatly simplify the design structure of the touch detection circuit, reduce the design difficulty, and the Nbit DAC in the first-order Nbit⊿∑ADC also participates in subtracting the reference of the sensing charge. When the system is stable, the net input charge input to the integrator of the first-order Nbit⊿∑ADC is approximately equal to 0 during each scan, and the integrator can quickly reach stability, which is beneficial to improving the sensitivity of the touch operation.

[0081] Please refer to Figure 3 This embodiment also provides a touch control chip, which includes the touch control detection circuit as described in this embodiment.

[0082] Optionally, the touch control chip may further include a driving circuit 21, and the driving circuit 21 is coupled to each transmission channel TX of the touch screen 20. In other embodiments of the present invention, the driving circuit 21 may be integrated into a driving chip independent of the touch control chip.

[0083] Please refer to Figure 3 This embodiment also provides an electronic device, which includes a touch screen and the touch chip of this embodiment.

[0084] The touch control chip and the electronic device of the present embodiment have improved performance due to the adoption of the touch control detection circuit of the present embodiment.

[0085] The above description is only a description of the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the technical solution of the present invention.< / n> < / n> < / n> < / n> < / n> < / n> < / n> < / m> < / n> < / m> < / n>

Claims

1. A touch detection circuit, characterized in that: include: A charge and discharge circuit, coupled to a corresponding sensing channel of the touch screen, and used to charge or discharge the sensing channel during a scanning cycle to convert a sensing signal on the sensing channel into a corresponding sensing charge; A first-order N-bit ⊿∑ analog-to-digital converter, comprising an adder, an integrator, an N-bit analog-to-digital converter and an N-bit digital-to-analog converter, wherein two input terminals of the adder are respectively coupled to the output terminal of the charge-discharge circuit and the output terminal of the N-bit digital-to-analog converter, and an input terminal of the N-bit digital-to-analog converter is coupled to the output terminal of the N-bit analog-to-digital converter, wherein N≥2 and N is an integer; The integrator is used to integrate the received net input charge; the N-bit analog-to-digital converter is used to quantize the output of the integrator into an N-bit digital signal, and the N-bit digital-to-analog converter is used to provide a subtracted reference charge under the control of the N-bit digital signal; The adder is used for subtracting the subtracted reference charge from the sensed charge to obtain the net input charge.

2. The touch detection circuit according to claim 1, characterized in that: When the first-order N-bit ⊿∑ analog-to-digital conversion circuit is stable, the net input charge is equal to 0 or close to 0.

3. The touch detection circuit according to claim 1, characterized in that: The integrator includes an integrating amplifier, an integrating capacitor and an integrating switch, wherein a first input terminal of the integrating amplifier is coupled to an output terminal of the adder, one terminal of the integrating capacitor and one terminal of the integrating switch, a second input terminal of the integrating amplifier is connected to a common reference voltage, and an output terminal of the integrating amplifier is coupled to an input terminal of the N-bit analog-to-digital converter, another terminal of the integrating capacitor and another terminal of the integrating switch.

4. The touch detection circuit according to claim 3, characterized in that: The capacitance value of the integrating capacitor is adjustable and used to adjust the accuracy of the N-bit digital signal; or the range of the N-bit analog-to-digital converter is adjustable and used to adjust the accuracy of the N-bit digital signal.

5. The touch detection circuit according to claim 1, characterized in that: The N-bit digital-to-analog converter includes two capacitor arrays with the same structure and connected in parallel; each capacitor array has N capacitors, and one end of each capacitor is coupled to a common reference voltage through a reset switch, and the other end is connected to a first power supply voltage or a second power supply voltage under the control of the N-bit digital signal, and the capacitance values ​​of the N capacitors are different from each other and increase in sequence by multiples of 2 with Cμ / 2 as the starting value, and Cμ is a fixed value; wherein, when the N-bit digital-to-analog converter is reset, when the other end of a capacitor in one of the capacitor arrays is connected to the first power supply voltage, the other end of a capacitor with the same capacitance value as the capacitor in another of the capacitor arrays is connected to the second power supply voltage.

6. The touch detection circuit according to any one of claims 1 to 5, characterized in that: The first-order Nbit⊿∑ analog-to-digital conversion circuit also includes a digital filter, which is coupled to the output end of the N-bit analog-to-digital converter. The digital filter is used to convert the N-bit digital signal into a Q-bit digital signal, where Q is an integer and Q≥N.

7. The touch detection circuit according to claim 6, characterized in that: The N-bit analog-to-digital converter samples and quantizes the output of the integrator in an oversampling manner, Q>N.

8. The touch detection circuit according to claim 1, wherein: The charge and discharge circuit includes first to third switches and a current source; in a self-capacitance scanning mode, one end of the current source is connected to a corresponding second power supply voltage, and the other end is coupled to one end of the second switch, the other end of the second switch is coupled to one end of the first switch, one end of the third switch and the sensing channel, the other end of the first switch is connected to the first power supply voltage, and the other end of the third switch is coupled to the input end of the adder.

9. The touch detection circuit according to claim 1, characterized in that: The charge and discharge circuit includes first to third switches and a current source; in the mutual capacitance scanning mode, one end of the current source is connected to the first power supply voltage, and the other end is coupled to one end of the second switch, the other end of the second switch is coupled to one end of the first switch, one end of the third switch and the sensing channel, the other end of the first switch is connected to a common reference voltage, and the other end of the third switch is coupled to the input end of the adder.

10. The touch detection circuit according to claim 1, wherein: The touch detection circuits are coupled to the sensing channels in a one-to-one correspondence, or one touch detection circuit is coupled to a plurality of the sensing channels at the same time.

11. A touch chip, characterized in that: The method comprises the touch detection circuit as claimed in any one of claims 1 to 10.

12. An electronic device, characterized in that: The invention comprises a touch screen and a touch chip as claimed in claim 11, wherein the touch screen has a plurality of sensing channels and a plurality of transmitting channels, and the touch chip is coupled to each of the sensing channels and each of the transmitting channels.

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