Chip standby management device and system and vehicle

Abstract

The invention discloses a chip standby management device and system and a vehicle, and relates to the technical field of chips. The device comprises a plurality of wake-up source modules, and each wake-up source module is used for judging whether an external signal is a wake-up instruction or not according to a local preset wake-up instruction standard when the external signal is received, and generating a wake-up state signal when the external signal is the wake-up instruction, local preset wake-up instruction standards of any two wake-up source modules are different; and the wake-up control module is connected with the plurality of wake-up source modules and is used for generating a wake-up signal according to the wake-up state signal when receiving the wake-up state signal so as to wake up the standby chip.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and in particular to a chip standby management device, system and vehicle. Background Art

[0002] In order to meet various functional requirements at the automotive system level, as the degree of vehicle automation continues to increase, the hardware and software subsystems associated with automotive microcontrollers are becoming increasingly complex, which leads to increased vehicle power consumption, especially for new energy vehicles, and the requirements for power consumption control are getting higher and higher. In order to reduce power consumption and achieve a longer range, low power consumption control is crucial. Summary of the invention

[0003] The present invention aims to solve one of the technical problems in the related art at least to a certain extent. To this end, the first object of the present invention is to provide a chip standby management device to reduce chip energy consumption.

[0004] The second objective of the present invention is to provide a chip standby management system.

[0005] A third object of the present invention is to provide a vehicle.

[0006] To achieve the above-mentioned purpose, an embodiment of the first aspect of the present invention proposes a chip standby management device, which includes: multiple wake-up source modules, each of which is used to determine whether the external signal is a wake-up instruction according to a local preset wake-up instruction standard when receiving an external signal, and generate a wake-up status signal when the external signal is a wake-up instruction, wherein the local preset wake-up instruction standards of any two of the wake-up source modules are different; a wake-up control module, which is connected to the multiple wake-up source modules, and is used to generate a wake-up signal according to the wake-up status signal when receiving the wake-up status signal, so as to wake up the standby chip.

[0007] In addition, the chip standby management device according to the embodiment of the present invention may also have the following additional technical features: In one embodiment of the present invention, the multiple wake-up source modules include a CAN (Controller Area Network) wake-up source module, and the CAN wake-up source module is also connected to the external CAN signal generation module; the CAN wake-up source module is specifically used to: when receiving the external CAN signal generated by the external CAN signal generation module, obtain the signal specific frame of the external CAN signal according to a preset CAN frame identifier, and when the signal specific frame is consistent with the preset wake-up frame, determine that the external CAN signal is a wake-up instruction.

[0008] In one embodiment of the present invention, the multiple wake-up source modules also include an IO (Input / Output) wake-up source module, and the IO wake-up source module is also connected to the external IO signal generation module; the IO wake-up source module is specifically used to: when receiving the external IO signal generated by the external IO signal generation module, obtain the signal state of the external IO signal, and when the signal state meets the preset IO signal state standard, determine that the external IO signal is a wake-up instruction.

[0009] In one embodiment of the present invention, the multiple wake-up source modules also include an analog signal wake-up source module, and the analog signal wake-up source module is also connected to the external analog signal generation module; the analog signal wake-up source module is specifically used to: when receiving the external analog signal generated by the external analog signal generation module, obtain the signal strength of the external analog signal, and when the signal strength is within a preset signal strength range, determine that the external analog signal is a wake-up instruction.

[0010] In one embodiment of the present invention, the multiple wake-up source modules also include a real-time clock wake-up source module, and the real-time clock wake-up source module is also connected to the external interrupt module; the real-time clock wake-up source module is specifically used to: when receiving an external interrupt signal sent by the external interrupt module, determine that the external interrupt signal is a wake-up instruction.

[0011] In one embodiment of the present invention, the wake-up control module is specifically used to: generate the wake-up signal when receiving the wake-up status signal sent by a preset target module among the multiple wake-up source modules; or, generate the wake-up signal when receiving the wake-up status signal sent by any one of the wake-up source modules; or, generate the wake-up signal when receiving the wake-up status signal sent by at least two of the wake-up source modules.

[0012] In one embodiment of the present invention, when the preset IO signal state standard is a level state standard, the IO wake-up source module is specifically used to determine that the external IO signal is a wake-up instruction when the signal level of the external IO signal meets the level state standard; when the preset IO signal state standard is an edge jump, the IO wake-up source module is specifically used to determine that the external IO signal is a wake-up instruction when an edge jump occurs in the external IO signal.

[0013] In one embodiment of the present invention, the device further includes: a reset module, which is connected to the wake-up control module and is used to send a reset signal to the wake-up control module, so that the wake-up control module generates the wake-up signal when receiving the reset signal.

[0014] To achieve the above object, a second aspect of the present invention provides a chip standby management system, including the above chip standby management device.

[0015] To achieve the above-mentioned purpose, a third aspect of the present invention provides a vehicle, including a chip and the above-mentioned chip standby management system.

[0016] According to the chip standby management device, system and vehicle of the embodiment of the present invention, multiple wake-up source modules and wake-up control modules are provided, each wake-up source module is used to determine whether the external signal is a wake-up instruction according to the local preset wake-up instruction standard when receiving an external signal, and generate a wake-up state signal when the external signal is a wake-up instruction, wherein the local preset wake-up instruction standards of any two wake-up source modules are different; the wake-up control module is connected to the multiple wake-up source modules, and is used to generate a wake-up signal according to the wake-up state signal when receiving the wake-up state signal to wake up the standby chip. By providing the above-mentioned device and using a chip standby management device independent of the chip, the chip does not need to judge whether the received signal is a wake-up instruction by itself, that is, the chip in the standby state does not need to judge the signal by itself, and can be judged by additionally provided hardware, that is, the above-mentioned chip standby management device, thereby reducing energy consumption.

[0017] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a structural block diagram of a chip standby management device according to an embodiment of the present invention; Figure 2 is a structural diagram of a chip standby management device according to an example of the present invention; Figure 3 is a structural schematic diagram of a chip standby management device according to another example of the present invention; Figure 4 is a structural diagram of a chip standby management device according to another example of the present invention; Figure 5 is a structural diagram of a chip standby management device according to another example of the present invention; Figure 6 is a structural diagram of a chip standby management device according to another example of the present invention; Figure 7 is a structural block diagram of a chip standby management system according to an embodiment of the present invention; Figure 8 4 is a structural block diagram of a vehicle according to an embodiment of the present invention. DETAILED DESCRIPTION

[0019] The following describes a chip standby management device, system, and vehicle according to an embodiment of the present invention with reference to the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described with reference to the accompanying drawings are exemplary and should not be construed as limiting the present invention.

[0020] In order to realize chip wake-up, the following signals can be used to wake up the chip: analog signal, IO signal, CAN specific frame.

[0021] However, when using analog signals to wake up the chip, since most chips are in standby mode, the ADC (Analog-to-Digital Converter) module does not work, and there is no way to wake up directly based on analog signals. Therefore, it is necessary to use RTC (Real-Time Clock) to periodically wake up the chip, for example, wake up the chip once every 50ms, and collect analog quantities by ADC after the chip runs the program to determine whether the wake-up conditions are met. If the wake-up conditions are not met, the chip will enter low power consumption again. If the wake-up conditions are met, the chip will run normally and the customer code will execute the task. In other words, when using analog signals to wake up, software is required to control the periodic wake-up additionally. In the case of no analog signal to wake up, periodic wake-up of the MCU (Microcontroller Unit) will generate excess power consumption; in the case of analog signal to wake up, it is necessary to wait for RTC to wake up the MCU for ADC collection and comparison, and this method will result in untimely wake-up.

[0022] For IO signal wake-up, since the function of each IO pin in the chip is fixed in standby mode, each IO pin can only be woken up according to one IO signal.

[0023] For CAN specific frame wakeup, the standby mode also borrows the IO wakeup method, placing the CAN receiving pin on the pin with IO wakeup function. However, this method cannot achieve specific frame wakeup, that is, any frame will cause the IO port to meet the wakeup condition and wake up the MCU, resulting in the loss of the wakeup frame.

[0024] Moreover, the above-mentioned wake-up methods of the standby chip all have the problem that the chip needs to judge the received signal by itself.

[0025] Therefore, the present invention proposes a chip standby management device.

[0026] Figure 1 It is a structural block diagram of a chip standby management device according to an embodiment of the present invention.

[0027] like Figure 1As shown, the chip standby management device 100 includes: multiple wake-up source modules 200, each wake-up source module 200 is used to determine whether the external signal is a wake-up instruction according to a local preset wake-up instruction standard when receiving an external signal, and generate a wake-up status signal when the external signal is a wake-up instruction, wherein the local preset wake-up instruction standards of any two wake-up source modules 200 are different; a wake-up control module 300, connected to the multiple wake-up source modules 200, and used to generate a wake-up signal according to the wake-up status signal when receiving the wake-up status signal, so as to wake up the chip to be awakened.

[0028] Specifically, the present invention proposes a chip standby management device 100, which includes multiple wake-up source modules 200 and a wake-up control module 300. When the wake-up source module 200 receives an external signal, it determines whether the external signal is a wake-up instruction according to a local preset wake-up instruction standard, and generates a wake-up status signal when it determines that the external signal is a wake-up instruction, and sends the wake-up status signal to the wake-up control module 300, so that the wake-up control module 300 wakes up the chip in standby state according to the wake-up status signal.

[0029] The above-mentioned local preset wake-up instruction standard is a pre-set standard, which can be set arbitrarily, and for any wake-up source module 200, the number of local preset wake-up instruction standards that can be set therein can be greater than one.

[0030] At this time, for any wake-up source module 200, since it determines whether the external signal is a wake-up instruction according to the local preset wake-up instruction standard after receiving the external signal, it is possible to adjust the local preset wake-up instruction standard stored in any wake-up source module 200 according to actual needs, and adjust the standard for the wake-up source module 200 to determine whether the external signal is a wake-up instruction. In this way, it is possible to support multiple wake-up methods.

[0031] Since the chip standby management device 100 independent of the chip is used, the chip does not need to judge whether the received signal is a wake-up instruction by itself, that is, the chip in the standby state does not need to judge the signal by itself, which can reduce energy consumption.

[0032] In some embodiments of the present invention, the multiple wake-up source modules 200 include a CAN wake-up source module 200-1, and the CAN wake-up source module 200-1 is also connected to the external CAN signal generation module; the CAN wake-up source module 200-1 is specifically used to: when receiving the external CAN signal generated by the external CAN signal generation module, obtain the signal-specific frame of the external CAN signal according to the preset CAN frame identifier, and when the signal-specific frame is consistent with the preset wake-up frame, determine that the external CAN signal is a wake-up instruction. In other words, for the CAN wake-up source module 200-1, the external signal it receives is the external CAN signal, and its local preset wake-up instruction standard is whether the frame corresponding to the preset CAN frame identifier in the external CAN signal is consistent with the preset wake-up frame. For details, please refer to Figure 2 Example shown.

[0033] exist Figure 2 In the example shown, CAN_RX (2) means that at most two CAN channels are supported, 501 is a receiving data module, that is, the received data is first stored in the receiving data module 501, max deep4 means that the maximum FIFO depth is 4, REG SET means register setting, and the wake-up combination (OR / AND) means that the wake-up control module 300 can be set to generate a wake-up signal when receiving a wake-up status signal sent by a wake-up source module, and can also be set to generate a wake-up signal when receiving a wake-up status signal sent by multiple wake-up source modules. Figure 2 The system also includes a wake-up source control selection module 500 and a standby low power consumption control module 600.

[0034] Specifically, the CAN wake-up module supports at most two CAN channels, that is, the CAN wake-up module supports at most receiving two external CAN signals sent by the above-mentioned external CAN signal generating modules.

[0035] First, the preset CAN frame identifier and the preset wake-up frame stored in the CAN wake-up module can be set through the register.

[0036] The above-mentioned preset CAN frame identifier refers to the CAN ID mapped by the CAN wake-up source module 200-1. That is to say, when the CAN wake-up source module 200-1 receives an external CAN signal, it needs to find the frame corresponding to the frame identifier from the external CAN signal according to the locally pre-stored preset CAN frame identifier, and use the frame as a signal-specific frame.

[0037] The above-mentioned preset wake-up frame refers to a standard of frames that can be used for wake-up, and is used to indicate which frames can be used for wake-up.

[0038] Therefore, when the CAN wake-up source module 200-1 receives an external CAN signal, it first determines whether there is a frame that matches the frame identifier in the received external CAN signal according to the preset CAN frame identifier. If so, it determines that the frame is a signal-specific frame, and when the signal-specific frame is consistent with the preset wake-up frame, it determines that the external CAN signal is a wake-up instruction, and the CAN wake-up source module 200-1 generates a wake-up. Through this method, the chip wake-up can be realized by a specific frame in the external CAN signal, so that the CAN wake-up source module 200-1 only needs to judge the specific frame, and does not need to judge the entire CAN signal, thereby reducing the pressure on the CAN wake-up source module 200-1 and reducing costs.

[0039] For the CAN wake-up source module 200 - 1 , the maximum FIFO depth therein is set to 4, that is, a maximum of 4 preset wake-up frames can be set in the CAN wake-up source module 200 - 1 .

[0040] When receiving an external CAN signal, the CAN wake-up source module 200 - 1 first obtains a signal specific frame from the external CAN signal, and stores the signal specific frame in a receiver data module.

[0041] Furthermore, the signal specific frame stored in the receiver data module is compared with the preset wake-up frame set in the FIFO. If they are identical, a wake-up state signal is sent to the wake-up control module 300 to enable the wake-up control module 300 to wake up the chip to be awakened.

[0042] Therefore, the CAN wake-up source module 200 - 1 can be implemented to judge the external CAN signal based on multiple preset wake-up frames, thereby realizing more flexible chip wake-up.

[0043] In some embodiments of the present invention, the multiple wake-up source modules 200 also include an IO wake-up source module 200-2, and the IO wake-up source module 200-2 is also connected to the external IO signal generation module; the IO wake-up source module 200-2 is specifically used to: when receiving the external IO signal generated by the external IO signal generation module, obtain the signal state of the external IO signal, and when the signal state meets the preset IO signal state standard, determine that the external IO signal is a wake-up instruction. In other words, for the IO wake-up source module 200-2, the external signal it receives is the external IO signal, and its local preset wake-up instruction standard is whether the signal state of the external IO signal meets the preset IO signal state standard. For details, please refer to Figure 3 Example shown.

[0044] Specifically, the IO wake-up source module 200-2 may be awakened by multiple IOs or by a single IO. That is, the IO wake-up source module 200-2 may be connected to one external IO signal generating module or to multiple external IO signal generating modules.

[0045] The above signal status includes the level of the signal and the transition of the signal. Of course, other signal statuses may also be used, such as the duration of the signal, the frequency of the signal, etc.

[0046] by Figure 3 The example shown is used for illustration.

[0047] exist Figure 3 In the example shown, level or sdge means that the IO wake-up source module 200-2 uses the level state or signal jump situation for judgment, GPIO input (max 10) means that the IO wake-up source module 200-2 allows a maximum of 10 IO wake-ups, and the OR / AND in the IO wake-up source module 200-2 means that the IO wake-up source module 200-2 can be set to send a wake-up status signal when it detects that one external IO signal is a wake-up instruction, and can also be set to send a wake-up status signal when multiple external IO signals are wake-up instructions. Figure 3 The meanings of the other symbols can be found in Figure 2 .

[0048] When the preset IO signal state standard is the level state standard, the IO wake-up source module 200-2 is specifically used to determine that the external IO signal is a wake-up instruction when the signal level of the external IO signal meets the level state standard. For example, when the external IO signal is an analog signal, the above-mentioned level state standard refers to the level strength standard, and the signal level of the above-mentioned external IO signal meets the level state standard, which means that the signal strength of the signal level of the external IO signal reaches the above-mentioned strength standard; when the external IO signal is a digital signal, the above-mentioned level state standard refers to the high and low level state of the level, that is, if the level state standard is a high level, then when the external IO signal is a high level, it is determined that the signal level of the external IO signal meets the level state standard, and if the level state standard is a low level, then when the external IO signal is a low level, it is determined that the signal level of the external IO signal meets the level state standard.

[0049] When the preset IO signal state standard is edge transition, the IO wake-up source module 200 - 2 is specifically used to determine that the external IO signal is a wake-up instruction when an edge transition occurs in the external IO signal.

[0050] Moreover, if multiple IO wake-up is used, the wake-up and / or relationship needs to be configured. The IO wake-up source module 200-2 can be set to send a wake-up status signal when it detects that one external IO signal is a wake-up instruction, or it can be set to send a wake-up status signal when multiple external IO signals are wake-up instructions.

[0051] Therefore, through the above settings, it is possible to wake up the chip through multiple signals and / or multi-channel signals, thereby achieving better chip wake-up.

[0052] In some embodiments of the present invention, the multiple wake-up source modules 200 also include an analog signal wake-up source module 200-3, and the analog signal wake-up source module 200-3 is also connected to the external analog signal generation module; the analog signal wake-up source module 200-3 is specifically used to: when receiving an external analog signal generated by the external analog signal generation module, obtain the signal strength of the external analog signal, and when the signal strength is within a preset signal strength range, determine that the external analog signal is a wake-up instruction. That is to say, for the analog signal wake-up source module 200-3, the external signal it receives is the external analog signal, and its local preset wake-up instruction standard is whether the signal strength of the external analog signal is within a preset signal strength range. For details, please refer to Figure 4 Example shown.

[0053] It should be noted that the above analog signal wake-up source module 200 - 3 uses a CMP (Comparator) to determine whether the signal strength of the external analog signal is within a preset signal strength range, thereby reducing current consumption during low power consumption.

[0054] exist Figure 4 In the example shown, Analog input (max 6) means that the analog signal wake-up source module 200 - 3 supports a maximum of 6 analog inputs, that is, it can be connected to a maximum of six external analog signal generation modules.

[0055] Figure 4 Greater than / less than / interval / outside the interval means that the wake-up condition for each analog quantity can be set to be greater than / less than / interval / outside the interval. That is to say, the above-mentioned preset signal strength range can be set to be less than the preset threshold, greater than the preset threshold, within the preset interval, or outside the preset interval.

[0056] Figure 4The OR / AND in the analog signal wake-up source module 200-3 means that if the analog signal wake-up source module 200-3 uses multi-channel wake-up, it is necessary to configure the wake-up and OR relationship. It can be set to send a wake-up status signal when it is detected that one analog quantity meets the set wake-up condition, or it can be set to send a wake-up status signal when multiple analog quantities meet the set wake-up conditions.

[0057] Figure 4 The meanings of the other symbols can be found in Figure 2 .

[0058] In some embodiments of the present invention, the multiple wake-up source modules 200 also include a real-time clock wake-up source module, and the real-time clock wake-up source module is also connected to the external interrupt module; the real-time clock wake-up source module is specifically used to: when receiving an external interrupt signal sent by the external interrupt module, determine that the external interrupt signal is a wake-up instruction. That is, for the real-time clock wake-up source module, the external signal it receives is the external interrupt signal, and its local preset wake-up instruction standard is receiving the external interrupt signal.

[0059] In some embodiments of the present invention, the wake-up control module 300 is specifically used to: generate a wake-up signal when receiving a wake-up status signal sent by a preset target module among multiple wake-up source modules 200; or, generate a wake-up signal when receiving a wake-up status signal sent by any wake-up source module 200; or, generate a wake-up signal when receiving a wake-up status signal sent by at least two wake-up source modules 200.

[0060] The following is an explanation with a specific example.

[0061] In this example, see Figure 5 In this example, the MCU is woken up when both an IO (wake-up condition is high level) and an analog signal (wake-up condition is greater than a certain value) are used as wake-up sources. The wake-up source module 200 is set to the IO wake-up source module 200-2 wake-up condition is high level, and the analog signal wake-up source module 200-3 wake-up condition is greater than a certain value; the wake-up control module 300 is set to AND logic. Therefore, the MCU will be woken up only when the external IO signal is high level and the analog value of the input analog signal is greater than a certain value.

[0062] exist Figure 5, GPIO input means the external signal received by the IO wakeup source module 200-2, Analog input means the external signal received by the analog signal wakeup source module 200-3, H Level means that the wakeup condition of the IO wakeup source module 200-2 is a high level, greater (value) means that the wakeup condition of the analog signal wakeup source module 200-3 is greater than a certain value, IO status means the wakeup status signal output by the IO wakeup source module 200-2, CMP status means the wakeup status signal output by the analog signal wakeup source module 200-3, IO REG SET means the register setting received by the IO wakeup source module 200-2, and CMP REG SET means the register setting received by the analog signal wakeup source module 200-3. Figure 5 The meanings of other symbols in Figure 2 .

[0063] In some embodiments of the present invention, the chip standby management device 100 further includes: a reset module 400, which is connected to the wake-up control module 300 and is used to send a reset signal to the wake-up control module 300 so that the wake-up control module 300 generates a wake-up signal when receiving the reset signal.

[0064] The following is an explanation with a specific example.

[0065] See also Figure 6 In this example, the number of the wake-up source modules 200 is four, namely the above-mentioned CAN wake-up source module 200-1, the IO wake-up source module 200-2, the analog signal wake-up source module 200-3, and the real-time clock wake-up source module 200-4.

[0066] exist Figure 6 In the figure, GPIO (10) has the same meaning as the above GPIO input (max 10), analog (6) has the same meaning as the above Analog input (max 6), PTC period int means the above external interrupt signal, 2KBRetain RAM means RAM (Random Access Memory) that can store 2KB of data. This RAM can save data in standby mode, and the storage space of this RAM can be set according to actual needs. WDG (Watchdog Timer) and clock source 701 are used.

[0067] Specifically, the chip standby management device 100 mainly includes four parts: a wake-up source control selection module 500, a standby low power consumption control module 600, a clock module 700 and a RAM capable of storing data in the standby mode.

[0068] The wake-up source control selection module 500 includes the multiple wake-up source modules 200 , and the standby low power consumption control module 600 includes the wake-up control module 300 and the reset module 400 .

[0069] The wake-up source control selection module 500 mainly functions to enable the wake-up source modules 200 , and can enable these wake-up source modules 200 individually or in full, and is also used to set the conditions for the wake-up source modules 200 to generate a wake-up state signal.

[0070] For the real-time clock wake-up source module 200 - 4 , this part mainly enables the RTC wake-up control. When the RTC wake-up is enabled and the RTC periodic interrupt (ie, the external interrupt signal mentioned above) is generated, a wake-up state signal is sent to the wake-up control module 300 .

[0071] Standby low power control module 600: mainly controls which of the wake-up status signals from the wake-up source control selection module 500 can send out wake-up signals. It can send out a wake-up signal when any wake-up status signal is detected, or it can be set to send out a wake-up signal after there are two or more wake-up status signals. There is also a signal from the reset module 400 that must send out a wake-up signal.

[0072] Clock module 700: drives the chip standby management device 100 to run and ensures the normal operation of the chip standby management device 100 in the standby mode.

[0073] RAM: In standby mode, the RAM is still powered on and can be used by users to save data. These data can be used directly after waking up from low power consumption.

[0074] In summary, the chip standby management device of the embodiment of the present invention is provided with multiple wake-up source modules and wake-up control modules, each of which is used to determine whether the external signal is a wake-up instruction according to the local preset wake-up instruction standard when receiving an external signal, and to generate a wake-up state signal when the external signal is a wake-up instruction, wherein the local preset wake-up instruction standards of any two wake-up source modules are different; the wake-up control module is connected to the multiple wake-up source modules, and is used to generate a wake-up signal according to the wake-up state signal when receiving the wake-up state signal to wake up the standby chip. By setting the above device and using a chip standby management device independent of the chip, the chip does not need to judge whether the received signal is a wake-up instruction by itself, that is, the chip in the standby state does not need to judge the signal by itself, and can be performed by additionally set hardware, that is, the above chip standby management device, thereby reducing energy consumption. Moreover, multiple wake-up source modules are set, and the local preset wake-up instruction standards of each wake-up source module are different, so that multiple wake-up instruction standards can be set, and the standard for generating the wake-up signal by the wake-up control module can be configured by itself, thereby supporting multiple wake-up methods and covering most application requirements.

[0075] Furthermore, the present invention proposes a chip standby management system.

[0076] Figure 7 It is a structural block diagram of a chip standby management system according to an embodiment of the present invention.

[0077] like Figure 7 As shown, the chip standby management system 1000 includes the chip standby management device 100 mentioned above.

[0078] The chip standby management system of the embodiment of the present invention is provided with a plurality of wake-up source modules and a wake-up control module through the chip standby management device of the above embodiment, each wake-up source module is used to determine whether the external signal is a wake-up instruction according to the local preset wake-up instruction standard when receiving an external signal, and generate a wake-up state signal when the external signal is a wake-up instruction, wherein the local preset wake-up instruction standards of any two wake-up source modules are different; the wake-up control module is connected to the plurality of wake-up source modules, and is used to generate a wake-up signal according to the wake-up state signal when receiving the wake-up state signal to wake up the standby chip. By providing the above device, a chip standby management device independent of the chip is adopted, and the chip does not need to judge whether the received signal is a wake-up instruction by itself, that is, the chip in the standby state does not need to judge the signal by itself, and can be performed by the additionally set hardware, that is, the above chip standby management device, thereby reducing energy consumption. Moreover, by providing a plurality of wake-up source modules, the local preset wake-up instruction standards of each wake-up source module are different, so that a plurality of wake-up instruction standards can be set, and the standard for generating the wake-up signal by the wake-up control module can be configured by itself, thereby supporting a plurality of wake-up modes, covering most application requirements.

[0079] Furthermore, the present invention provides a vehicle.

[0080] Figure 8 4 is a structural block diagram of a vehicle according to an embodiment of the present invention.

[0081] like Figure 8 As shown, the vehicle 10 includes a chip 11 and the above-mentioned chip standby management system 1000.

[0082] The vehicle of the embodiment of the present invention is provided with a plurality of wake-up source modules and a wake-up control module through the chip standby management device of the above embodiment. Each wake-up source module is used to determine whether the external signal is a wake-up instruction according to the local preset wake-up instruction standard when receiving an external signal, and generate a wake-up state signal when the external signal is a wake-up instruction, wherein the local preset wake-up instruction standards of any two wake-up source modules are different; the wake-up control module is connected to the plurality of wake-up source modules, and is used to generate a wake-up signal according to the wake-up state signal when receiving the wake-up state signal to wake up the standby chip. By providing the above device, a chip standby management device independent of the chip is used, and the chip does not need to judge whether the received signal is a wake-up instruction by itself, that is, the chip in the standby state does not need to judge the signal by itself, and can be judged by the additionally set hardware, that is, the above chip standby management device, thereby reducing energy consumption. Moreover, by providing a plurality of wake-up source modules, the local preset wake-up instruction standards of each wake-up source module are different, so that a plurality of wake-up instruction standards can be set, and the standard for generating the wake-up signal by the wake-up control module can be configured by itself, thereby supporting a plurality of wake-up modes, covering most application requirements.

[0083] It should be noted that the logic and / or steps represented in the flowchart or described in other ways herein can be considered as a sequenced list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by an instruction execution system, device or equipment (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or equipment and execute instructions), or in combination with these instruction execution systems, devices or equipment. For the purpose of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or equipment, or in combination with these instruction execution systems, devices or equipment. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection portion with one or more wirings (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and editable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or processing in other suitable ways if necessary, and then stored in a computer memory.

[0084] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiment, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. If implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0085] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0086] In the description of this specification, the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and cannot be understood as a limitation on the present invention.

[0087] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0088] In the description of this specification, unless otherwise specified, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0089] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0090] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A chip standby management device, characterized in that: The device comprises: A plurality of wake-up source modules, each of which is used to determine whether the external signal is a wake-up instruction according to a local preset wake-up instruction standard when receiving an external signal, and to generate a wake-up state signal when the external signal is a wake-up instruction, wherein the local preset wake-up instruction standards of any two wake-up source modules are different; The wake-up control module is connected to the plurality of wake-up source modules and is used to generate a wake-up signal according to the wake-up status signal when receiving the wake-up status signal, so as to wake up the standby chip.

2. The chip standby management device according to claim 1, characterized in that: The multiple wake-up source modules include a CAN wake-up source module, and the CAN wake-up source module is also connected to an external CAN signal generating module; the CAN wake-up source module is specifically used for: When the external CAN signal generated by the external CAN signal generating module is received, a signal specific frame of the external CAN signal is obtained according to a preset CAN frame identifier, and when the signal specific frame is consistent with a preset wake-up frame, the external CAN signal is determined to be a wake-up instruction.

3. The chip standby management device according to claim 1, characterized in that: The plurality of wake-up source modules also include an IO wake-up source module, and the IO wake-up source module is also connected to an external IO signal generating module; the IO wake-up source module is specifically used for: When the external IO signal generated by the external IO signal generating module is received, the signal state of the external IO signal is acquired, and when the signal state meets the preset IO signal state standard, the external IO signal is determined to be a wake-up instruction.

4. The chip standby management device according to claim 1, characterized in that: The plurality of wake-up source modules also include an analog signal wake-up source module, and the analog signal wake-up source module is also connected to an external analog signal generating module; the analog signal wake-up source module is specifically used to: When the external analog signal generated by the external analog signal generating module is received, the signal strength of the external analog signal is acquired, and when the signal strength is within a preset signal strength range, it is determined that the external analog signal is a wake-up instruction.

5. The chip standby management device according to claim 1, characterized in that: The plurality of wake-up source modules also include a real-time clock wake-up source module, and the real-time clock wake-up source module is also connected to the external interrupt module; the real-time clock wake-up source module is specifically used for: When an external interrupt signal sent by the external interrupt module is received, it is determined that the external interrupt signal is a wake-up instruction.

6. The chip standby management device according to claim 1, characterized in that: The wake-up control module is specifically used for: When receiving a wake-up state signal sent by a preset target module among the plurality of wake-up source modules, generating the wake-up signal; or, When receiving a wake-up state signal sent by any one of the wake-up source modules, generating the wake-up signal; or, When the wake-up state signals sent by at least two of the wake-up source modules are received, the wake-up signal is generated.

7. The chip standby management device according to claim 3, characterized in that: When the preset IO signal state standard is a level state standard, the IO wake-up source module is specifically used to determine that the external IO signal is a wake-up instruction when the signal level of the external IO signal meets the level state standard; When the preset IO signal state standard is an edge transition, the IO wake-up source module is specifically used to determine that the external IO signal is a wake-up instruction when an edge transition occurs in the external IO signal.

8. The chip standby management device according to claim 1, characterized in that: The device also includes: A reset module, the reset module is connected to the wake-up control module, and is used to send a reset signal to the wake-up control module, so that the wake-up control module generates the wake-up signal when receiving the reset signal.

9. A chip standby management system, characterized in that: It comprises a chip standby management device according to any one of claims 1-8.

10. A vehicle, characterized in that: The invention comprises a chip and the chip standby management system according to claim 9.

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