Thread processing method and related device

Abstract

The invention provides a thread processing method and a related device.Firstly, running data of a first thread are obtained, and a first task runs in a first kernel; then, if the running data meets a first condition and a second load of a second kernel is smaller than a first load threshold value, the first thread is determined as a target thread, and the maximum computing power of the second kernel is lower than the maximum computing power of the first kernel; and finally, target processing is performed on the target thread, and the target processing is used for reducing the current power consumption of the first kernel by the first power consumption. According to the method, the target thread can be accurately identified and timely processed, the system power consumption is greatly reduced, meanwhile, the equipment temperature is reduced, and the user experience is improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a thread processing method and related devices. Background Art

[0002] With the development of technology, when an application runs on a central processing unit (CPU), sometimes a thread runs at full load on a core of the CPU while the load on other cores is not high, which will cause a significant increase in the power consumption and temperature of the device. Summary of the invention

[0003] In view of this, the present application provides a thread processing method and related devices, which can accurately detect abnormal threads and process them in a timely manner, greatly saving power consumption, while reducing device temperature and improving user experience.

[0004] In a first aspect, an embodiment of the present application provides a thread processing method, the method comprising:

[0005] Acquire running data of a first thread, wherein the first task runs on a first kernel;

[0006] If the running data meets the first condition and the second load of the second core is less than the first load threshold, determining that the first thread is the target thread, and the maximum computing power of the second core is lower than the maximum computing power of the first core;

[0007] The target thread is subjected to target processing, wherein the target processing is used to reduce current system power consumption by a first power consumption.

[0008] In a second aspect, an embodiment of the present application provides a thread processing device, the device comprising:

[0009] An acquiring unit, configured to acquire running data of a first thread, wherein the first task runs on a first kernel;

[0010] a determining unit, configured to determine that the first thread is a target thread if the running data meets a first condition and a second load of the second core is less than a first load threshold, and that a maximum computing power of the second core is less than a maximum computing power of the first core;

[0011] The processing unit is used to perform target processing on the target thread, wherein the target processing is used to reduce the current system power consumption by a first power consumption.

[0012] In a third aspect, an embodiment of the present application provides an electronic device, comprising a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and the program includes instructions for executing the steps of any method in the first aspect of the embodiment of the present application.

[0013] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program for electronic data exchange, wherein the computer program enables a computer to execute part or all of the steps described in any method of the first aspect of the embodiment of the present application.

[0014] In a fifth aspect, an embodiment of the present application provides a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to execute some or all of the steps described in any method of the first aspect of the embodiment of the present application. The computer program product may be a software installation package.

[0015] It can be seen that through the above thread processing method and related devices, first, the running data of the first thread is obtained, and the first task is run on the first core; then, if the running data meets the first condition and the second load of the second core is less than the first load threshold, the first thread is determined to be the target thread, and the maximum computing power of the second core is lower than the maximum computing power of the first core; finally, the target thread is subjected to target processing, and the target processing is used to reduce the current power consumption of the first core by the first power consumption. The target thread can be accurately identified and processed in a timely manner, which greatly reduces the system power consumption, while reducing the device temperature and improving the user experience. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.

[0017] Figure 1 A system architecture diagram of a thread processing method provided in an embodiment of the present application;

[0018] Figure 2 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0019] Figure 3 A flowchart of a thread processing method provided in an embodiment of the present application;

[0020] Figure 4 A flowchart of another thread processing method provided in an embodiment of the present application;

[0021] Figure 5 A block diagram of the functional units of a thread processing device provided in an embodiment of the present application;

[0022] Figure 6 A block diagram of the functional units of another thread processing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0023] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0024] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0025] It should be understood that the term "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article indicates that the associated objects before and after are in an "or" relationship. The "plurality" appearing in the embodiments of the present application refers to two or more.

[0026] In the embodiments of the present application, "at least one item" or similar expressions refer to any combination of these items, including any combination of single items or plural items, and refer to one or more, and multiple refers to two or more. For example, at least one item of a, b, or c can represent the following seven situations: a, b, c, a and b, a and c, b and c, a, b, and c. Among them, each of a, b, and c can be an element or a set containing one or more elements.

[0027] The "connection" that appears in the embodiments of the present application refers to various connection methods such as direct connection or indirect connection to achieve communication between devices, and the embodiments of the present application do not impose any limitations on this.

[0028] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0029] The following is an explanation of the relevant contents, concepts, meanings, technical issues, technical solutions, beneficial effects, etc. involved in the embodiments of the present application.

[0030] Thread: It is the smallest unit for executing operations in a process, that is, the basic unit for executing processor scheduling. If a process is understood as a task completed by the operating system logically, then a thread represents one of the many possible subtasks for completing the task. For example, if a user starts a database application in a window, the operating system will represent the call to the database as a process. If a user wants to generate a payroll report from the database and transfer it to a file, this is a subtask; in the process of generating the payroll report, the user can enter a database query request, which is another subtask. In this way, the operating system represents each request, that is, the payroll report and the newly entered data query, as an independent thread in the database process. Threads can be scheduled and executed independently on the processor, so that in a multi-processor environment, several threads are allowed to be executed on separate processors. The operating system provides threads to conveniently and effectively implement this concurrency.

[0031] When using third-party applications, sometimes a thread of the third-party application runs on the super-large core of the CPU and the super-large core runs at full load, while the load of other cores is not high. In this state, the device power consumption and temperature will increase significantly. In fact, the device is not really running at full load, so this state will cause power consumption waste and device temperature rise, affecting the user experience.

[0032] To solve the above problems, the embodiments of the present application provide a thread processing method and related devices, which can accurately identify abnormal threads and process the abnormal threads, greatly reducing system power consumption and device temperature, and improving user experience.

[0033] Combine the following Figure 1 The system architecture of a thread processing method in an embodiment of the present application is described. Figure 1A system architecture diagram of a thread processing method provided in an embodiment of the present application, the system architecture 100 includes a processing module 110, a detection module 120 and a scheduling module 130, wherein the processing module 110 may include multiple cores 111, each core 111 may run at least one thread, the detection module 120 may detect the running status of each core 111, and also may detect the thread status of each thread running on the corresponding core 111, and the scheduling module 130 may schedule any thread to run on any core.

[0034] In a possible embodiment, the detection module 120 can periodically detect each core 111 and determine whether an abnormal thread occurs. If an abnormal thread occurs, the basic information of the abnormal thread is reported through big data tracking, and the scheduling module 130 is notified to schedule the abnormal thread, thereby reducing the abnormally increased power consumption and abnormally increased temperature of the device and improving the user experience. In a possible embodiment, the scheduling module 130 can perform scheduling through strategies such as computing power-aware scheduling. For example, the user space process management service passes the util clamp value of the relevant process to the kernel space through an appropriate interface. The scheduler drives the frequency adjustment through schedutil based on the information provided by the user space, and can also select an appropriate kernel for the process based on the information. It will not be elaborated here.

[0035] Combine the following Figure 2 The electronic device in the embodiment of the present application is described. Figure 2 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application is shown in FIG. Figure 2 As shown, the electronic device includes one or more application processors 220, a memory 230, a communication module 240 and one or more programs 231. The application processor 220 is communicatively connected with the memory 230 and the communication module 240 via an internal communication bus.

[0036] The one or more programs 231 are stored in the memory 230 and configured to be executed by the application processor 220 . The one or more programs 231 include instructions for executing any step in the method embodiment.

[0037] Among them, the application processor 220 can be, for example, a central processing unit (CPU), a general processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It can implement or execute various exemplary logic blocks, units and circuits described in conjunction with the disclosure of this application. The application processor 220 can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of DSP and microprocessors, and the like. The communication unit can be a communication module 240, a transceiver, a transceiver circuit, etc., and the storage unit can be a memory 230.

[0038] The memory 230 may be a volatile memory or a nonvolatile memory, or may include both volatile and nonvolatile memories. Among them, the nonvolatile memory may be a read-only memory (ROM), a programmable ROM (PROM), an erasable programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DR RAM).

[0039] It is understandable that the electronic device 20 may include more or fewer structural elements than those in the above structural block diagram, for example, a power module, physical buttons, a Wi-Fi module, a speaker, a Bluetooth module, a sensor, a display module, etc., which are not limited here.

[0040] After understanding the software and hardware architecture of the embodiment of the present application, Figure 3 A thread processing method in an embodiment of the present application is described. Figure 3 A flowchart of a thread processing method provided in an embodiment of the present application specifically includes the following steps:

[0041] Step 301, obtaining the running data of the first thread.

[0042] The first task runs on a first kernel, which may be a kernel with the greatest computing power.

[0043] The type of the first thread may be a real-time thread, a system thread, a root user root thread, a third-party application thread, etc., which is not specifically limited here.

[0044] Among them, the operating data may include the first frequency data of the first kernel, the first load of the first kernel and the third load of the first thread. The first frequency data may indicate the operating frequency of the first kernel within a certain period of time, the first load may indicate the computing power occupancy ratio of the first kernel within a certain period of time, and the third load may indicate the usage of the first kernel by the first thread.

[0045] In a possible embodiment, the running status of the first thread running on the super-large core of the processor can be periodically detected, and the data obtained within a preset number of detection cycles can be used as running data. For example, each detection cycle can be 4ms, and the running data can be calculated every 10 cycles, that is, the running data is the load of the first thread running on the super-large core within 40ms, the load of the super-large core, and the running frequency of the super-large core.

[0046] It can be seen that by acquiring the running data of the first thread, a data reference can be provided for subsequently accurately determining the target thread.

[0047] Step 302: If the running data meets the first condition and the second load of the second core is less than the first load threshold, determine that the first thread is the target thread.

[0048] Among them, the maximum computing power of the second core is lower than the maximum computing power of the first core. It can be understood that if the first core is an ultra-large core, then the second core is a large core or other core with computing power lower than the ultra-large core, and no specific limitation is made here.

[0049] Among them, the second load can represent the proportion of computing power occupied by the second core within a certain period of time, and the first load threshold can be the upper limit value of the second core in a light load state. If the load of the second core is lower than 50%, the second core is considered to be in a light load state, then the first load threshold can be set to 50%.

[0050] In a possible embodiment, if the first frequency data of the first core is greater than or equal to a preset frequency threshold and the second load is less than the first load threshold, the first thread is determined to be the target thread. For example, the preset frequency threshold may be the upper limit value of the available frequency of the first core. When the operating frequency of the first core is the upper limit value of the available frequency, since the second core with lower computing power is in a light load state, it can be clearly determined that the first thread has caused the abnormal full load operation of the first core, and the first thread is the target thread that needs to be processed.

[0051] In a possible embodiment, if the first load of the first core is greater than or equal to the second load threshold and the second load is less than the first load threshold, the first thread is determined to be the target thread. For example, the first load of the first core is 90%, and the second load threshold is 85%. At this time, the first load of the first core is greater than the second load threshold and is in a heavy-loaded state. Since the second core with lower computing power is in a light-loaded state, it can be clearly determined that the first thread causes the abnormal full-load operation of the first core, and the first thread is the target thread that needs to be processed.

[0052] In a possible embodiment, if the third load of the first thread is greater than or equal to the third load threshold and the second load is less than the first load threshold, the first thread is determined to be the target thread, wherein the third load threshold may be the lower limit of the thread being a "large" load, such as 90%. For example, the third load of the first thread is 92%, and at this time the third load is greater than the third load threshold. Since the second core with lower computing power is in a light load state, it can be clearly determined that the first thread causes the abnormal full load operation of the first core, and the first thread is the target thread that needs to be processed.

[0053] It should be noted that the core load is used to indicate how busy the core is, and the thread load is used to indicate the usage of the core by a thread, indicating whether a thread is "big" or "small". "Big" threads are generally scheduled to run on cores with higher computing power at a high frequency to complete the task faster and in a timely manner. "Small" threads are generally scheduled to run on cores with lower computing power to save system power consumption.

[0054] In a possible embodiment, if the operating data meets the first condition, and the second load is less than the first load threshold, and the duration reaches a preset duration, and the first thread is of the first thread type, then the first thread is determined to be the target thread. It can be understood that the first condition may include at least one of the first frequency data being greater than or equal to the preset frequency threshold, the first load being greater than or equal to the second load threshold, and the third load being greater than or equal to the third load threshold. The first thread type may be any type other than a real-time thread, a system thread, and a root user root thread. This ensures that processes other than system-related processes are processed to prevent system crashes. At the same time, processing after the duration reaches a preset duration can ensure that the task is in an abnormal state of "long-term high-frequency operation" that is unfavorable to power consumption and heat generation. Exception handling is required to improve the accuracy of identifying the target process.

[0055] It can be understood that the first thread can be determined as the target thread when the running data meets any one of the first conditions, or when the running data meets all of the first conditions and other conditions, which is not specifically limited here.

[0056] It can be seen that if the operating data meets the first condition and the second load of the second core is less than the first load threshold, the first thread is determined to be the target thread, which can accurately determine the target thread that will cause abnormal heating and abnormal power consumption increase.

[0057] Step 303: perform target processing on the target thread.

[0058] The target processing is used to reduce the current system power consumption by a first power consumption, wherein the first power consumption can be a fixed value or a range value. For example, the estimated benefit of the scenario power consumption is 70 mA, which is not specifically limited here.

[0059] Among them, the target processing is used to reduce the current device temperature to a first temperature, wherein the first temperature can be a fixed value or a range value. For example, the estimated temperature rise benefit is 2.5 degrees when the ambient temperature is 35 degrees, and the estimated temperature rise benefit is 1.5 degrees when the ambient temperature is 26 degrees. No specific limitation is made here.

[0060] In a possible embodiment, the target thread can be scheduled to run on the second core. Since the second core is in a lightly loaded state and the computing power of the second core is lower than that of the first core, scheduling the target thread to run on the second core can significantly reduce system power consumption and device temperature.

[0061] In a possible embodiment, the first thread load upper limit value of the target thread can be reduced to the second thread load upper limit value, and the target thread can be scheduled to run on the third core corresponding to the second thread load upper limit value, wherein the third core can be the second core or other cores other than the second core, which is not specifically limited here. Among them, the first thread load upper limit value can be the uclamp max value of the target thread, and reducing the uclamp max value of the target thread can schedule the target thread as a small load thread. The specific uclamp scheduling strategy can refer to the existing processing logic, which is not described here.

[0062] It can be seen that by performing target processing on the target thread, the target thread can be scheduled to other cores, the target thread can be accurately identified and processed in a timely manner, which greatly reduces system power consumption, while reducing device temperature and improving user experience.

[0063] For ease of understanding, the following Figure 4 An example of a thread processing method in an embodiment of the present application is given below. Figure 4 A flowchart of another thread processing method provided in an embodiment of the present application specifically includes the following steps:

[0064] First, the detection period is determined by the periodic scheduler scheduler_tick;

[0065] Then, a calculation and judgment is performed every time a preset number of detection cycles pass;

[0066] When the first thread satisfies the following conditions simultaneously within a time window, the duration of a time window is the duration of a preset number of detection cycles:

[0067] "Non-real-time thread", "Non-system thread", "Non-root thread", "Running on the super-large core" and "Running at the highest frequency point of the super-large core", "First thread load > 90%", "Super-large core load > 85%", "Large core load < 50%".

[0068] And when the above conditions are met for 500 consecutive time windows, the first thread is marked as the target thread and corresponding management and control are performed.

[0069] If the above conditions are not met for 500 consecutive time windows, it is determined that the first thread is not the target thread and the process can be run normally.

[0070] It can be understood that when the target thread switches to the background group, the previous detection data can be cleared and the detection can be performed again.

[0071] It can be seen that through the above-mentioned thread processing method, when an exception occurs in the thread of a third-party application and causes the CPU super-large core to run at full frequency, the load of the thread, the running status of the super-large core, and the running status of the large core can be detected in time, the target thread causing the exception can be determined, and it can be processed in time to avoid waste of system power consumption and reduce device temperature, thereby improving user experience.

[0072] The steps not described in detail above can be found in Figure 3 The description of the steps of the method will not be repeated here.

[0073] The above mainly introduces the scheme of the embodiment of the present application from the perspective of the execution process on the method side. It is understandable that, in order to realize the above functions, the electronic device includes a hardware structure and / or software module corresponding to the execution of each function. It should be easily appreciated by those skilled in the art that, in combination with the units and algorithm steps of each example described in the embodiments provided herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present application.

[0074] The embodiment of the present application can divide the electronic device into functional units according to the above method example. For example, each functional unit can be divided according to each function, or two or more functions can be integrated into one processing unit. The above integrated unit can be implemented in the form of hardware or in the form of software functional units. It should be noted that the division of units in the embodiment of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation.

[0075] In the case of dividing each functional module into corresponding functional modules, Figure 5 This is a block diagram of the functional units of a thread processing device provided in an embodiment of the present application. The thread processing device 500 includes:

[0076] An acquiring unit 510 is configured to acquire running data of a first thread, wherein the first task runs on a first kernel;

[0077] A determining unit 520 is configured to determine that the first thread is a target thread if the running data meets a first condition and a second load of the second kernel is less than a first load threshold, and a maximum computing power of the second kernel is less than a maximum computing power of the first kernel;

[0078] The processing unit 530 is used to perform target processing on the target thread, where the target processing is used to reduce the current system power consumption by a first power consumption.

[0079] It can be seen that through the above thread processing method and related devices, first, the running data of the first thread is obtained, and the first task is run on the first core; then, if the running data meets the first condition and the second load of the second core is less than the first load threshold, the first thread is determined to be the target thread, and the maximum computing power of the second core is lower than the maximum computing power of the first core; finally, the target thread is subjected to target processing, and the target processing is used to reduce the current power consumption of the first core by the first power consumption. The target thread can be accurately identified and processed in a timely manner, which greatly reduces the system power consumption, while reducing the device temperature and improving the user experience.

[0080] It should be noted that the specific implementation of each operation can adopt the corresponding description of the method embodiment shown above, and the thread processing device 500 can be used to execute the above method embodiment of the present application, which will not be described in detail.

[0081] In the case of an integrated unit, the following combination Figure 6 Another thread processing device 600 in an embodiment of the present application is described in detail, and the thread processing device 600 includes a processing unit 601 and a communication unit 602, wherein the processing unit 601 is used to execute any step in the above method embodiment, and when performing data transmission such as sending, the communication unit 602 can be selectively called to complete the corresponding operation.

[0082] The thread processing device 600 may further include a storage unit 603 for storing program codes and data. The processing unit 601 may be a processor, the communication unit 602 may be a wireless communication module, the storage unit 603 may be a memory, and the processing unit 601 is specifically used for:

[0083] Acquire running data of a first thread, wherein the first task runs on a first kernel;

[0084] If the running data meets the first condition and the second load of the second core is less than the first load threshold, determining that the first thread is the target thread, and the maximum computing power of the second core is lower than the maximum computing power of the first core;

[0085] The target thread is subjected to target processing, wherein the target processing is used to reduce current system power consumption by a first power consumption.

[0086] It can be seen that through the above thread processing method and related devices, first, the running data of the first thread is obtained, and the first task is run on the first core; then, if the running data meets the first condition and the second load of the second core is less than the first load threshold, the first thread is determined to be the target thread, and the maximum computing power of the second core is lower than the maximum computing power of the first core; finally, the target thread is subjected to target processing, and the target processing is used to reduce the current power consumption of the first core by the first power consumption. The target thread can be accurately identified and processed in a timely manner, which greatly reduces the system power consumption, while reducing the device temperature and improving the user experience.

[0087] It should be noted that the specific implementation of each operation can adopt the corresponding description of the method embodiment shown above, and the thread processing device 600 can be used to execute the above method embodiment of the present application, which will not be described in detail.

[0088] An embodiment of the present application also provides a chip, including a processor, a memory, and a computer program or instructions stored in the memory, wherein the processor executes the computer program or instructions to implement the steps described in the above method embodiment.

[0089] An embodiment of the present application also provides a chip module, including a transceiver component and a chip, the chip including a processor, a memory and a computer program or instructions stored in the memory, wherein the processor executes the computer program or instructions to implement the steps described in the above method embodiment.

[0090] An embodiment of the present application also provides a computer storage medium, wherein the computer storage medium stores a computer program for electronic data exchange, wherein the computer program enables a computer to execute part or all of the steps of any method recorded in the above method embodiments, and the above computer includes an electronic device.

[0091] The embodiment of the present application also provides a computer program product, the computer program product includes a non-transitory computer-readable storage medium storing a computer program, the computer program is operable to cause a computer to execute some or all of the steps of any method described in the method embodiment. The computer program product may be a software installation package, and the computer includes an electronic device.

[0092] It should be noted that, for the above-mentioned various embodiments, for the sake of simple description, they are all expressed as a series of action combinations. Those skilled in the art should be aware that the present application is not limited by the described order of actions, because some steps in the embodiments of the present application can be performed in other orders or simultaneously. In addition, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions, steps, modules or units involved are not necessarily required by the embodiments of the present application.

[0093] In the above embodiments, the embodiments of the present application have different focuses on the description of each embodiment. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0094] The steps of the method or algorithm described in the embodiments of the present application can be implemented in hardware or by executing software instructions by a processor. The software instructions can be composed of corresponding software modules, and the software modules can be stored in RAM, flash memory, ROM, EPROM, electrically erasable programmable read-only memory (electrically EPROM, EEPROM), registers, hard disks, mobile hard disks, read-only compact disks (CD-ROMs) or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in an ASIC. In addition, the ASIC can be located in a terminal device or a management device. Of course, the processor and the storage medium can also be present in a terminal device or a management device as discrete components.

[0095] Those skilled in the art should be aware that in one or more of the above examples, the functions described in the embodiments of the present application can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiments of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server, or data center to another website site, computer, server, or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrations. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a digital video disc (DVD)), or a semiconductor medium (eg, a solid state disk (SSD)).

[0096] The modules / units included in the devices and products described in the above embodiments may be software modules / units or hardware modules / units, or may be partially software modules / units and partially hardware modules / units. For example, for the devices and products applied to or integrated in the chip, the modules / units included therein may all be implemented in the form of hardware such as circuits, or at least some of the modules / units may be implemented in the form of software programs, which run on the processor integrated inside the chip, and the remaining (if any) modules / units may be implemented in the form of hardware such as circuits; for the devices and products applied to or integrated in the chip module, the modules / units included therein may all be implemented in the form of hardware such as circuits, and different modules / units may be located in the same component (such as a chip, circuit module, etc.) or in different components of the chip module, or at least some of the modules / units may be implemented in the form of software programs. The software programs run on the processor integrated inside the chip, and the remaining (if any) modules / units may be implemented in the form of hardware such as circuits. It is implemented in the form of a software program, which runs on a processor integrated inside the chip module, and the remaining (if any) modules / units can be implemented in hardware such as circuits; for various devices and products applied to or integrated in the terminal equipment, the various modules / units contained therein can be implemented in hardware such as circuits, and different modules / units can be located in the same component (for example, chip, circuit module, etc.) or in different components in the terminal equipment, or, at least some modules / units can be implemented in the form of a software program, which runs on a processor integrated inside the terminal equipment, and the remaining (if any) modules / units can be implemented in hardware such as circuits.

[0097] The specific implementation methods described above further illustrate the purpose, technical solutions and beneficial effects of the embodiments of the present application. It should be understood that the above description is only the specific implementation method of the embodiments of the present application and is not intended to limit the protection scope of the embodiments of the present application. Any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the embodiments of the present application should be included in the protection scope of the embodiments of the present application.

Claims

1. A thread processing method, characterized in that: The method comprises: Acquire running data of a first thread, wherein the first task runs on a first kernel; If the running data meets the first condition and the second load of the second core is less than the first load threshold, determining that the first thread is the target thread, and the maximum computing power of the second core is lower than the maximum computing power of the first core; The target thread is subjected to target processing, wherein the target processing is used to reduce current system power consumption by a first power consumption.

2. The method according to claim 1, characterized in that: The operation data includes first frequency data of the first core; if the operation data meets the first condition and the second load of the second core is less than the first load threshold, determining that the first thread is the target thread includes: If the first frequency data is greater than or equal to a preset frequency threshold and the second load is less than the first load threshold, the first thread is determined to be the target thread.

3. The method according to claim 1, characterized in that The operation data includes a first load of the first core; if the operation data meets a first condition and a second load of the second core is less than a first load threshold, determining that the first thread is a target thread includes: If the first load is greater than or equal to a second load threshold and the second load is less than the first load threshold, the first thread is determined to be the target thread.

4. The method according to claim 1, characterized in that: The running data includes a third load of the first thread; if the running data meets the first condition and the second load of the second core is less than the first load threshold, determining that the first thread is the target thread includes: If the third load is greater than or equal to a third load threshold and the second load is less than the first load threshold, the first thread is determined to be the target thread.

5. The method according to any one of claims 1 to 4, characterized in that: If the running data meets the first condition and the second load of the second core is less than the first load threshold, determining the first thread as the target thread includes: If the running data meets the first condition, and the second load is less than the first load threshold, and the duration reaches a preset duration, and the first thread is of a first thread type, then the first thread is determined to be the target thread.

6. The method according to claim 1, characterized in that The target processing of the target thread includes: The target thread is scheduled to the second kernel for execution.

7. The method according to claim 1, characterized in that The target processing of the target thread includes: Lowering the first thread load upper limit value of the target thread to the second thread load upper limit value; The target thread is scheduled to run on a third core corresponding to the upper limit value of the load of the second thread.

8. A thread processing device, characterized in that: The device comprises: An acquiring unit, configured to acquire running data of a first thread, wherein the first task runs on a first kernel; a determining unit, configured to determine that the first thread is a target thread if the running data meets a first condition and a second load of the second core is less than a first load threshold, and that a maximum computing power of the second core is less than a maximum computing power of the first core; The processing unit is used to perform target processing on the target thread, wherein the target processing is used to reduce the current system power consumption by a first power consumption.

9. An electronic device, characterized in that: include: A processor, a memory, and one or more programs; the one or more programs are stored in the memory and are configured to be executed by the processor, the programs comprising instructions for executing the steps in the method according to any one of claims 1 to 7.

10. A computer storage medium, characterized in that: The computer storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the processor is caused to perform the method according to any one of claims 1 to 7.

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