Diode performance optimization method and system based on temperature compensation

Abstract

The present invention discloses a diode performance optimization method and system based on temperature compensation, and relates to the field of data processing technology. The method comprises: obtaining the intrinsic semiconductor layer of a PIN diode; setting multiple groups of temperature detection samples, detecting the intrinsic semiconductor layer, and outputting a forward current carrying sample data set based on the forward state and a reverse current carrying sample data set of carriers under different temperatures; mapping the forward current carrying sample data set and the reverse current carrying sample data set according to multiple groups of temperature detection samples, respectively, and outputting a temperature-forward performance influence layer and a temperature-reverse performance influence layer; establishing a temperature response function, performing balanced optimization of the forward and reverse states, and outputting a temperature response result; and performing temperature compensation on the temperature of the PIN diode. The technical problem that the diode is affected by different temperatures in the prior art, resulting in reduced performance stability, is solved, and the technical effect of improving the performance stability of the diode is achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and in particular to a diode performance optimization method and system based on temperature compensation. Background Art

[0002] In modern electronic devices and systems, the impact of temperature on device performance is becoming increasingly significant. Especially in high-performance and high-precision applications, temperature changes may cause significant changes in the performance of electronic devices, thereby affecting the stability and reliability of the system. As an important semiconductor device, PIN diodes are widely used in the fields of photoelectric detection, radio frequency detection, etc. However, due to their special structure and material properties, the performance of PIN diodes will be significantly affected by temperature. For example, changes in temperature may cause changes in parameters such as the conduction characteristics and reverse leakage current of the diode, thereby affecting its performance in practical applications. In the prior art, the diode is affected by different temperatures, resulting in reduced stability in diode performance. Summary of the invention

[0003] The embodiments of the present application provide a method and system for optimizing diode performance based on temperature compensation, which solves the technical problem in the prior art that the diode is affected by different temperatures, resulting in reduced performance stability.

[0004] In view of the above problems, the embodiments of the present application provide a diode performance optimization method and system based on temperature compensation.

[0005] A first aspect of an embodiment of the present application provides a diode performance optimization method based on temperature compensation, the method comprising:

[0006] Obtaining an intrinsic semiconductor layer of a PIN diode;

[0007] Setting a plurality of groups of temperature detection samples, detecting the intrinsic semiconductor layer according to the plurality of groups of temperature detection samples, and outputting a forward current sample data set of the carriers of the intrinsic semiconductor layer based on the forward state at different temperatures, and a reverse current sample data set of the carriers of the intrinsic semiconductor layer based on the reverse state at different temperatures;

[0008] According to the multiple groups of temperature detection samples, respectively mapping with the forward current carrying sample data set and the reverse current carrying sample data set, outputting a temperature-forward performance influence layer and a temperature-reverse performance influence layer;

[0009] A temperature response function is established according to the temperature-forward performance influence layer and the temperature-reverse performance influence layer, and a balance optimization of the forward and reverse states is performed according to the temperature response function, and a temperature response result is output;

[0010] The temperature of the PIN diode is temperature compensated according to the temperature response result.

[0011] A second aspect of an embodiment of the present application provides a diode performance optimization system based on temperature compensation, the system comprising:

[0012] An acquisition module, wherein the acquisition module is used to acquire an intrinsic semiconductor layer of a PIN diode;

[0013] A detection module, the detection module is used to set a plurality of groups of temperature detection samples, detect the intrinsic semiconductor layer according to the plurality of groups of temperature detection samples, and output a forward current sample data set of the carriers of the intrinsic semiconductor layer based on the forward state at different temperatures, and a reverse current sample data set of the carriers of the intrinsic semiconductor layer based on the reverse state at different temperatures;

[0014] A mapping module, the mapping module is used to map the forward current carrying sample data set and the reverse current carrying sample data set according to the multiple groups of temperature detection samples, and output a temperature-forward performance influence layer and a temperature-reverse performance influence layer;

[0015] An optimization module, the optimization module is used to establish a temperature response function according to the temperature-forward performance influence layer and the temperature-reverse performance influence layer, perform balanced optimization of the forward and reverse states according to the temperature response function, and output a temperature response result;

[0016] A compensation module is used to perform temperature compensation on the temperature of the PIN diode according to the temperature response result.

[0017] One or more technical solutions provided in this application have at least the following technical effects or advantages:

[0018] First, the intrinsic semiconductor layer of the PIN diode is obtained, and multiple groups of temperature detection samples are set. Then, the intrinsic semiconductor layer is detected according to the multiple groups of temperature detection samples, and the forward current carrier sample data set based on the forward state of the intrinsic semiconductor layer at different temperatures, and the reverse current carrier sample data set of the intrinsic semiconductor layer at different temperatures are output. According to the multiple groups of temperature detection samples, they are mapped with the forward current carrier sample data set and the reverse current carrier sample data set, respectively, and the temperature-forward performance influence layer and the temperature-reverse performance influence layer are output. Next, according to the temperature-forward performance influence layer and the temperature-reverse performance influence layer, a temperature response function is established, and the balance optimization of the forward and reverse states is performed according to the temperature response function, and the temperature response result is output. Finally, the temperature of the PIN diode is temperature compensated according to the temperature response result. The technical problem that the performance stability of the diode is reduced due to the influence of different temperatures in the prior art is solved, and the technical effect of improving the performance stability of the diode is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0020] Figure 1 A schematic flow chart of a diode performance optimization method based on temperature compensation provided in an embodiment of the present application;

[0021] Figure 2 A schematic diagram of the structure of a diode performance optimization system based on temperature compensation provided in an embodiment of the present application.

[0022] Explanation of the reference numerals: acquisition module 11 , detection module 12 , mapping module 13 , optimization module 14 , compensation module 15 . DETAILED DESCRIPTION

[0023] The embodiments of the present application solve the technical problem in the prior art that the performance stability of the diode is reduced due to the influence of different temperatures by providing a diode performance optimization method and system based on temperature compensation.

[0024] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0025] It should be noted that the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or server that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or modules that are not explicitly listed or are inherent to these processes, methods, products or devices.

[0026] Embodiment 1

[0027] like Figure 1 As shown, the embodiment of the present application provides a diode performance optimization method based on temperature compensation, wherein the method includes:

[0028] Obtaining an intrinsic semiconductor layer of a PIN diode;

[0029] The PIN diode is composed of a P-type semiconductor, an I-type (intrinsic) semiconductor, and an N-type semiconductor, wherein the I-type semiconductor is the intrinsic semiconductor layer.

[0030] Setting a plurality of groups of temperature detection samples, detecting the intrinsic semiconductor layer according to the plurality of groups of temperature detection samples, and outputting a forward current sample data set of the carriers of the intrinsic semiconductor layer based on the forward state at different temperatures, and a reverse current sample data set of the carriers of the intrinsic semiconductor layer based on the reverse state at different temperatures;

[0031] A plurality of groups of temperature detection samples are set to cover the temperature environment in which the PIN diode works. The intrinsic semiconductor layer of the PIN diode is detected according to the plurality of groups of temperature detection samples to obtain a forward carrier sample data set based on the forward state of the carriers in the intrinsic semiconductor layer at different temperatures, and a reverse carrier sample data set based on the reverse state of the carriers in the intrinsic semiconductor layer at different temperatures. The forward carrier sample data set refers to the data of the carriers when the diode is in the connected state at different temperatures, and the reverse carrier sample data set refers to the data of the carriers when the diode is in the cut-off state at different temperatures.

[0032] Furthermore, the setting of multiple groups of temperature detection samples includes:

[0033] Obtaining the internal structure of the PIN diode;

[0034] configuring an initialization temperature detection interval, performing thermal stability identification on the internal structure of the PIN diode based on the initialization temperature detection interval, and outputting a thermal stability identification result;

[0035] The thermal stability identification result is optimized with a preset thermal stability as a target, and an optimization result is output, wherein the optimization result includes a temperature optimization range, within which the thermal stability of the internal structure of the PIN diode is greater than the preset thermal stability.

[0036] The internal structure of a PIN diode generally includes a P-type semiconductor layer, an N-type semiconductor layer, and an I-type (intrinsic) semiconductor layer. The P-type semiconductor layer and the N-type semiconductor layer form PN junctions respectively, while the I-type semiconductor layer is located between the PN junctions to play an isolation role. The initial temperature detection interval is set based on the working conditions, historical data, and expected application scenarios of the PIN diode to cover the temperature range of the PIN diode. Within the initial temperature detection interval, the internal structure of the PIN diode is thermally stabilized, and after the thermal stability identification result is output, the preset thermal stability target is used as a reference for optimization. For example, within a certain temperature range, the performance of the PIN diode can be maintained at a preset stable level. The thermal stability identification result is optimized, including adjusting the temperature optimization interval to ensure that the thermal stability of the internal structure of the PIN diode within the interval is greater than the preset thermal stability target. The optimization result includes the temperature optimization interval, and the thermal stability of the internal structure of the PIN diode within the temperature optimization interval is greater than the preset thermal stability.

[0037] Furthermore, the intrinsic semiconductor layer is detected, and the method further comprises:

[0038] determining the thickness of the intrinsic semiconductor layer;

[0039] According to whether the thickness of the intrinsic semiconductor layer is less than a preset thickness, if it is less than the preset thickness, setting a continuous sampling instruction;

[0040] Continuously sampling data of carriers in the intrinsic semiconductor layer according to the continuous sampling instruction, including the number of carriers, carrier distribution and carrier mobility;

[0041] The carrier number, carrier distribution and carrier mobility are output as a carrier sample data set.

[0042] Testing the intrinsic semiconductor layer includes measuring the thickness of the intrinsic semiconductor layer, and comparing the measured thickness of the intrinsic semiconductor layer with a preset thickness, which is usually determined based on the design requirements, performance standards, or previous experimental data of the PIN diode. If the measured thickness of the intrinsic semiconductor layer is less than the preset thickness, it means that the layer is thinner and the behavior of the carriers may be more sensitive or unstable. In order to collect carrier data more accurately, a continuous sampling instruction will be set to continuously sample the carrier data. According to the continuous sampling instruction, the carriers in the intrinsic semiconductor layer are continuously sampled, including measuring key parameters such as the number, distribution, and mobility of the carriers, which determine the on / off performance of the diode. The number of carriers, carrier distribution, and carrier mobility are output as a carrier sample data set.

[0043] Furthermore, the thermal stability of the internal structure of the PIN diode is identified, including:

[0044] Identifying the thermal stability of the internal structure of the PIN diode, including the temperature variation rate and the thermal resistance heat dissipation rate;

[0045] The temperature variation rate is the degree of performance variation of the PIN diode as the temperature changes in the initialization temperature detection interval, and the thermal resistance heat dissipation rate is the heat dissipation efficiency of the PIN diode thermal resistance as the temperature changes in the initialization temperature detection interval;

[0046] A thermal stability identification result is output according to the temperature change rate and the thermal resistance heat dissipation rate.

[0047] The thermal stability of the internal structure of the PIN diode is identified, including the temperature variation rate and the thermal resistance heat dissipation rate. The temperature variation rate is obtained by calculating the ratio of the change in performance parameters between different temperature points to the temperature change. The temperature variation rate reflects the degree of performance change of the PIN diode with temperature changes within the initialization temperature detection range. The thermal resistance heat dissipation rate is obtained by comparing the changes in thermal resistance and heat dissipation capacity at different temperatures. The thermal resistance heat dissipation rate describes the heat dissipation efficiency of the PIN diode thermal resistance with temperature changes within the initialization temperature detection range. Thermal resistance is a physical quantity that reflects the ease of heat transfer in a material, while the heat dissipation rate describes how fast heat is dissipated from the PIN diode. Based on the measurement results of the temperature variation rate and the thermal resistance heat dissipation rate, the thermal stability identification result is output.

[0048] According to the multiple groups of temperature detection samples, respectively mapping with the forward current carrying sample data set and the reverse current carrying sample data set, outputting a temperature-forward performance influence layer and a temperature-reverse performance influence layer;

[0049] The forward current carrying sample data set and the reverse current carrying sample data set are mapped to multiple groups of temperature detection samples, and the temperature-forward performance influence layer and the temperature-reverse performance influence layer are output. The temperature-forward performance influence layer reflects the change of the carrier data of the PIN diode in the connected state at different temperatures, and the temperature-reverse performance influence layer reflects the change of the carrier data of the PIN diode in the cut-off state at different temperatures.

[0050] A temperature response function is established according to the temperature-forward performance influence layer and the temperature-reverse performance influence layer, and a balance optimization of the forward and reverse states is performed according to the temperature response function, and a temperature response result is output;

[0051] According to the temperature-forward performance influence layer and the temperature-reverse performance influence layer, the temperature response function is established by using interpolation, fitting and other methods. The temperature response function is used to describe the influence of temperature on semiconductors of different structures. Using the established temperature response function, the forward and reverse states are balanced and optimized, and the forward and reverse switching performances are detected. The forward and reverse responses must be balanced to achieve the best performance and output the temperature response results. The temperature response results are the optimal performance values ​​in the forward and reverse states.

[0052] Furthermore, the method for establishing the temperature response function further includes:

[0053] determining an implantation material for the intrinsic semiconductor layer;

[0054] Obtaining a property of the intrinsic semiconductor layer - a temperature sensitivity index - based on the ion characteristics and material concentration of the implanted material;

[0055] Generate an optimization feedback network layer according to the attribute-temperature sensitivity index;

[0056] The optimization feedback network layer performs function feedback optimization on the temperature response function to obtain an optimized temperature response function;

[0057] According to the optimized temperature response function, the optimized temperature response result is output.

[0058] The implantation material of the intrinsic semiconductor layer is obtained, including doped silicon, gallium arsenide, indium phosphide, etc. Based on the ion characteristics and concentration of the implanted material, the property-temperature sensitive index of the intrinsic semiconductor layer is calculated, including electron mobility, carrier concentration, bandgap width, etc., to describe the performance changes of the semiconductor material at different temperatures. A convolutional neural network is used to establish an optimization feedback network layer, which receives the property-temperature sensitive index as input, trains and outputs the corresponding optimization parameters. The generated optimization feedback network layer is coupled with the temperature response function to realize function feedback optimization. By taking the property-temperature sensitive index as input, the optimization feedback network layer can provide adjustment suggestions for the temperature response function to optimize the performance of the function and obtain the optimized temperature response function. According to the optimized temperature response function, the optimized temperature response result can be output.

[0059] Furthermore, the balance optimization of the forward and reverse states is performed according to the temperature response function, and the temperature response result is output, including:

[0060] Obtain positive current carrying performance and negative current carrying performance;

[0061] Setting a balancing target, wherein the balancing target is to minimize the performance difference between the positive current carrying performance and the negative current carrying performance;

[0062] The temperature response function is optimized for equilibrium in the forward and reverse states according to the equilibrium target, and a temperature response result is output, wherein the temperature response result includes a compensation temperature in the forward state and a compensation temperature in the reverse state.

[0063] Furthermore, the forward current carrying performance includes a switch-on response time output after performing a switch response performance analysis on the forward current carrying sample data set, and the negative current carrying performance includes an interruption response time output after performing a switch response performance analysis on the reverse current carrying sample data set.

[0064] The forward current carrying performance is the output of the switch response time after the switch response performance analysis of the forward current carrying sample data set, that is, the time required for the PIN diode to switch from the off state to the fully on state. The negative current carrying performance is the output of the interrupt response time after the switch response performance analysis of the reverse current carrying sample data set, that is, the time required for the PIN diode to switch from the fully on state to the off state. Minimizing the performance difference between the forward current carrying performance and the negative current carrying performance is taken as the balance target, and the temperature response function is combined to perform the balance optimization of the forward and reverse states. Through the optimization algorithm such as genetic algorithm, particle swarm optimization algorithm, etc., the optimal temperature response function parameters are found under the balance target, and the compensation temperature of the forward state and the compensation temperature of the reverse state are output as the temperature response result. The compensation temperature is relative to the initial operating temperature, and is used to adjust the operating temperature of the PIN diode to achieve a balance between the forward and reverse current carrying performance.

[0065] Furthermore, setting a balance target also includes:

[0066] Obtaining the insertion loss of the forward current carrier of the intrinsic semiconductor layer;

[0067] Obtaining the isolation of the reverse current carrier of the intrinsic semiconductor layer;

[0068] The forward current carrying performance and the negative current carrying performance are optimized according to the insertion loss of the forward current carrying and the isolation of the reverse current carrying, and the optimized forward current carrying performance and the optimized negative current carrying performance are output.

[0069] The insertion loss of the forward current carrier refers to the attenuation of the carriers when the diode is in the connected state, and the isolation of the reverse current carrier refers to the attenuation of the carriers when the diode is in the cut-off state. The insertion loss of the forward current carrier of the intrinsic semiconductor layer and the isolation of the reverse current carrier of the intrinsic semiconductor layer are obtained, and the forward current carrier performance and the negative current carrier performance are optimized. The goal of the optimization is to reduce the insertion loss of the forward current carrier and improve the isolation of the reverse current carrier. After optimization, the optimized forward current carrier performance and the optimized negative current carrier performance data are obtained. Based on the forward current carrier insertion loss and reverse current carrier isolation data of the intrinsic semiconductor layer, the performance of the PIN diode is finely adjusted and optimized, which helps to improve the overall performance of the PIN diode.

[0070] The temperature of the PIN diode is temperature compensated according to the temperature response result.

[0071] The temperature of the PIN diode is temperature compensated according to the temperature response result, and the forward current carrying performance and the reverse current carrying performance are optimized by adjusting the operating temperature of the PIN diode, so as to achieve a better performance balance and further improve the overall performance of the PIN diode.

[0072] In summary, the embodiments of the present application have at least the following technical effects:

[0073] First, the intrinsic semiconductor layer of the PIN diode is obtained, and multiple groups of temperature detection samples are set. Then, the intrinsic semiconductor layer is detected according to the multiple groups of temperature detection samples, and the forward current carrier sample data set based on the forward state of the intrinsic semiconductor layer at different temperatures, and the reverse current carrier sample data set of the intrinsic semiconductor layer at different temperatures are output. According to the multiple groups of temperature detection samples, they are mapped with the forward current carrier sample data set and the reverse current carrier sample data set, respectively, and the temperature-forward performance influence layer and the temperature-reverse performance influence layer are output. Next, according to the temperature-forward performance influence layer and the temperature-reverse performance influence layer, a temperature response function is established, and the balance optimization of the forward and reverse states is performed according to the temperature response function, and the temperature response result is output. Finally, the temperature of the PIN diode is temperature compensated according to the temperature response result. The technical problem that the performance stability of the diode is reduced due to the influence of different temperatures in the prior art is solved, and the technical effect of improving the performance stability of the diode is achieved.

[0074] Embodiment 2

[0075] Based on the same inventive concept as the diode performance optimization method based on temperature compensation in the aforementioned embodiment, Figure 2 As shown, the present application provides a diode performance optimization system based on temperature compensation, and the system and method embodiments in the present application are based on the same inventive concept. The system includes:

[0076] An acquisition module 11, wherein the acquisition module 11 is used to acquire an intrinsic semiconductor layer of a PIN diode;

[0077] A detection module 12, the detection module 12 is used to set a plurality of groups of temperature detection samples, detect the intrinsic semiconductor layer according to the plurality of groups of temperature detection samples, and output a forward current sample data set of the carriers of the intrinsic semiconductor layer based on the forward state at different temperatures, and a reverse current sample data set of the carriers of the intrinsic semiconductor layer based on the reverse state at different temperatures;

[0078] A mapping module 13, wherein the mapping module 13 is used to map the plurality of groups of temperature detection samples with the forward current carrying sample data set and the reverse current carrying sample data set, respectively, and output a temperature-forward performance influence layer and a temperature-reverse performance influence layer;

[0079] An optimization module 14, the optimization module 14 is used to establish a temperature response function according to the temperature-forward performance influence layer and the temperature-reverse performance influence layer, perform balanced optimization of the forward and reverse states according to the temperature response function, and output a temperature response result;

[0080] The compensation module 15 is used to perform temperature compensation on the temperature of the PIN diode according to the temperature response result.

[0081] Furthermore, the detection module 12 is used to perform the following method:

[0082] determining the thickness of the intrinsic semiconductor layer;

[0083] According to whether the thickness of the intrinsic semiconductor layer is less than a preset thickness, if it is less than the preset thickness, setting a continuous sampling instruction;

[0084] Continuously sampling data of carriers in the intrinsic semiconductor layer according to the continuous sampling instruction, including the number of carriers, carrier distribution and carrier mobility;

[0085] The carrier number, carrier distribution and carrier mobility are output as a carrier sample data set.

[0086] Furthermore, the detection module 12 is used to perform the following method:

[0087] Obtaining the internal structure of the PIN diode;

[0088] configuring an initialization temperature detection interval, performing thermal stability identification on the internal structure of the PIN diode based on the initialization temperature detection interval, and outputting a thermal stability identification result;

[0089] The thermal stability identification result is optimized with a preset thermal stability as a target, and an optimization result is output, wherein the optimization result includes a temperature optimization range, within which the thermal stability of the internal structure of the PIN diode is greater than the preset thermal stability.

[0090] Furthermore, the detection module 12 is used to perform the following method:

[0091] Identifying the thermal stability of the internal structure of the PIN diode, including the temperature variation rate and the thermal resistance heat dissipation rate;

[0092] The temperature variation rate is the degree of performance variation of the PIN diode as the temperature changes in the initialization temperature detection interval, and the thermal resistance heat dissipation rate is the heat dissipation efficiency of the PIN diode thermal resistance as the temperature changes in the initialization temperature detection interval;

[0093] A thermal stability identification result is output according to the temperature change rate and the thermal resistance heat dissipation rate.

[0094] Furthermore, the optimization module 14 is used to execute the following method:

[0095] determining an implantation material for the intrinsic semiconductor layer;

[0096] Obtaining a property of the intrinsic semiconductor layer - a temperature sensitivity index - based on the ion characteristics and material concentration of the implanted material;

[0097] Generate an optimization feedback network layer according to the attribute-temperature sensitivity index;

[0098] The optimization feedback network layer performs function feedback optimization on the temperature response function to obtain an optimized temperature response function;

[0099] According to the optimized temperature response function, the optimized temperature response result is output.

[0100] Furthermore, the optimization module 14 is used to execute the following method:

[0101] Obtain positive current carrying performance and negative current carrying performance;

[0102] Setting a balancing target, wherein the balancing target is to minimize the performance difference between the positive current carrying performance and the negative current carrying performance;

[0103] The temperature response function is optimized for equilibrium in the forward and reverse states according to the equilibrium target, and a temperature response result is output, wherein the temperature response result includes a compensation temperature in the forward state and a compensation temperature in the reverse state.

[0104] Furthermore, the optimization module 14 is used to execute the following method:

[0105] The forward current carrying performance includes a switch-on response time output after a switch response performance analysis is performed on the forward current carrying sample data set, and the negative current carrying performance includes an interruption response time output after a switch response performance analysis is performed on the reverse current carrying sample data set.

[0106] Furthermore, the optimization module 14 is used to execute the following method:

[0107] Obtaining the insertion loss of the forward current carrier of the intrinsic semiconductor layer;

[0108] Obtaining the isolation of the reverse current carrier of the intrinsic semiconductor layer;

[0109] The forward current carrying performance and the negative current carrying performance are optimized according to the insertion loss of the forward current carrying and the isolation of the reverse current carrying, and the optimized forward current carrying performance and the optimized negative current carrying performance are output.

[0110] It should be noted that the above-mentioned sequence of the embodiments of the present application is only for description and does not represent the advantages and disadvantages of the embodiments. And the above-mentioned specific embodiments of this specification are described. Other embodiments are within the scope of the attached claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0111] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

[0112] This specification and drawings are merely exemplary illustrations of the present application and are deemed to cover any and all modifications, variations, combinations or equivalents within the scope of the present application. Obviously, a person skilled in the art may make various modifications and variations to the present application without departing from the scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the present application and its equivalents, the present application intends to include these modifications and variations.

Claims

1. A diode performance optimization method based on temperature compensation, characterized in that: The method comprises: Obtaining an intrinsic semiconductor layer of a PIN diode; Setting a plurality of groups of temperature detection samples, detecting the intrinsic semiconductor layer according to the plurality of groups of temperature detection samples, and outputting a forward current sample data set of the carriers of the intrinsic semiconductor layer based on the forward state at different temperatures, and a reverse current sample data set of the carriers of the intrinsic semiconductor layer based on the reverse state at different temperatures; According to the multiple groups of temperature detection samples, respectively mapping with the forward current carrying sample data set and the reverse current carrying sample data set, outputting a temperature-forward performance influence layer and a temperature-reverse performance influence layer; A temperature response function is established according to the temperature-forward performance influence layer and the temperature-reverse performance influence layer, and a balance optimization of the forward and reverse states is performed according to the temperature response function, and a temperature response result is output; Performing temperature compensation on the temperature of the PIN diode according to the temperature response result; The method for establishing a temperature response function further comprises: determining an implantation material for the intrinsic semiconductor layer; Obtaining a property of the intrinsic semiconductor layer - a temperature sensitivity index - based on the ion characteristics and material concentration of the implanted material; Generate an optimization feedback network layer according to the attribute-temperature sensitivity index; The optimization feedback network layer performs function feedback optimization on the temperature response function to obtain an optimized temperature response function; According to the optimized temperature response function, the optimized temperature response result is output.

2. The method according to claim 1, characterized in that The intrinsic semiconductor layer is tested, and the method further comprises: determining the thickness of the intrinsic semiconductor layer; According to whether the thickness of the intrinsic semiconductor layer is less than a preset thickness, if it is less than the preset thickness, setting a continuous sampling instruction; Continuously sampling data of carriers in the intrinsic semiconductor layer according to the continuous sampling instruction, including the number of carriers, carrier distribution and carrier mobility; The carrier number, carrier distribution and carrier mobility are output as a carrier sample data set.

3. The method according to claim 1, characterized in that The setting of multiple groups of temperature detection samples includes: Obtaining the internal structure of the PIN diode; configuring an initialization temperature detection interval, performing thermal stability identification on the internal structure of the PIN diode based on the initialization temperature detection interval, and outputting a thermal stability identification result; The thermal stability identification result is optimized with a preset thermal stability as a target, and an optimization result is output, wherein the optimization result includes a temperature optimization range, within which the thermal stability of the internal structure of the PIN diode is greater than the preset thermal stability.

4. The method according to claim 3, characterized in that The internal structure of the PIN diode is subjected to thermal stability identification, including: Identifying the thermal stability of the internal structure of the PIN diode, including the temperature variation rate and the thermal resistance heat dissipation rate; The temperature variation rate is the degree of performance variation of the PIN diode as the temperature changes in the initialization temperature detection interval, and the thermal resistance heat dissipation rate is the heat dissipation efficiency of the PIN diode thermal resistance as the temperature changes in the initialization temperature detection interval; A thermal stability identification result is output according to the temperature change rate and the thermal resistance heat dissipation rate.

5. The method according to claim 1, characterized in that According to the temperature response function, the forward and reverse states are balanced and optimized, and the temperature response result is output, including: Obtain positive current carrying performance and negative current carrying performance; Setting a balancing target, wherein the balancing target is to minimize the performance difference between the positive current carrying performance and the negative current carrying performance; The temperature response function is optimized for equilibrium in the forward and reverse states according to the equilibrium target, and a temperature response result is output, wherein the temperature response result includes a compensation temperature in the forward state and a compensation temperature in the reverse state.

6. The method according to claim 5, characterized in that The forward current carrying performance includes a switch-on response time output after a switch response performance analysis is performed on the forward current carrying sample data set, and the negative current carrying performance includes an interruption response time output after a switch response performance analysis is performed on the reverse current carrying sample data set.

7. The method according to claim 5, characterized in that Setting a balanced target also includes: Obtaining the insertion loss of the forward current carrier of the intrinsic semiconductor layer; Obtaining the isolation of the reverse current carrier of the intrinsic semiconductor layer; The forward current carrying performance and the negative current carrying performance are optimized according to the insertion loss of the forward current carrying and the isolation of the reverse current carrying, and the optimized forward current carrying performance and the optimized negative current carrying performance are output.

8. A diode performance optimization system based on temperature compensation, characterized in that: The system for implementing the diode performance optimization method based on temperature compensation according to any one of claims 1 to 7 comprises: An acquisition module, wherein the acquisition module is used to acquire an intrinsic semiconductor layer of a PIN diode; A detection module, the detection module is used to set a plurality of groups of temperature detection samples, detect the intrinsic semiconductor layer according to the plurality of groups of temperature detection samples, and output a forward current sample data set of the carriers of the intrinsic semiconductor layer based on the forward state at different temperatures, and a reverse current sample data set of the carriers of the intrinsic semiconductor layer based on the reverse state at different temperatures; A mapping module, the mapping module is used to map the forward current carrying sample data set and the reverse current carrying sample data set according to the multiple groups of temperature detection samples, and output a temperature-forward performance influence layer and a temperature-reverse performance influence layer; An optimization module, the optimization module is used to establish a temperature response function according to the temperature-forward performance influence layer and the temperature-reverse performance influence layer, perform balanced optimization of the forward and reverse states according to the temperature response function, and output a temperature response result; A compensation module, the compensation module is used to perform temperature compensation on the temperature of the PIN diode according to the temperature response result; The optimization module is used to perform the following method: determining an implantation material for the intrinsic semiconductor layer; Obtaining a property of the intrinsic semiconductor layer - a temperature sensitivity index - based on the ion characteristics and material concentration of the implanted material; Generate an optimization feedback network layer according to the attribute-temperature sensitivity index; The optimization feedback network layer performs function feedback optimization on the temperature response function to obtain an optimized temperature response function; According to the optimized temperature response function, the optimized temperature response result is output.

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