Reading electronics system of synchrotron radiation spectrum detector
Through deep learning models, the signals of synchronous radiation spectrum detectors are identified in heterogeneous architectural systems, which solves the pulse accumulation problem, improves the energy spectrum resolution and experimental continuity, and achieves efficient signal processing.
Patent Information
- Application Number
- CN202411177584.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-26
- Publication Date
- 2024-12-27
AI Technical Summary
Under the high count rate of synchronous radiation, traditional readout electronic systems have pulse accumulation problems, resulting in reduced signal loss and calculation performance. Especially in fluorescence experiments with low catalyst content and high background, the stacking discarding method will delete important signals, affecting the Experimental results.
Using a heterogeneous architecture system based on deep learning, the first computing device (equipped with an operating system and FPGA) is used for signal recognition, the second computing device (GPU) is used for model training, and the digital signal is processed through pre-trained LSTM or Transformer model. , identify the amplitude and obtain energy spectrum data, reduce signal accumulation, and improve energy spectrum resolution.
It effectively solves the pulse accumulation problem, improves signal recognition performance and energy spectrum resolution, reduces the abandonment rate, and ensures the quality of experimental data and experimental continuity.
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Figure CN119202576A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of synchrotron radiation devices, and more specifically to a readout electronics system of a synchrotron radiation energy spectrum detector based on deep learning. Background Art
[0002] As synchrotron radiation devices have developed from the first generation to the second, third and diffraction limit rings, the photon flux has increased by several orders of magnitude. The level of detectors must also develop synchronously to fully tap the huge potential of advanced light sources and provide an advanced testing platform for high-level cutting-edge scientific experiments and industrial application research and development. With the development of semiconductor technology, energy spectrum detectors are increasingly used in synchrotron radiation. Energy spectrum detectors have high energy resolution and extremely low detection limits. They play an extremely important role in the Shanghai Light Source Absorption Spectroscopy Experiment Station and are key core equipment for users to carry out high-level scientific research. Therefore, studying synchrotron radiation energy spectrum detectors and mastering their physical analysis and design have important scientific research and application value. As a key device for data collection, the performance of the readout electronics in the energy spectrum detector not only determines the quality of the experimental data, but also directly affects the level of experimental research work, and is an important factor in determining whether the capabilities of the synchrotron radiation light source can be fully utilized.
[0003] The X-ray absorption spectroscopy experimental beamline (BL14W1) of the Shanghai Synchrotron Radiation Facility (SSRF) is equipped with an X-ray energy spectrum detector and its readout electronics system, which are mainly used to detect low-content elements and their chemical state structures in samples. The types of detectors are mainly high-purity germanium semiconductor detectors and silicon drift semiconductor detectors. The synchrotron radiation accelerator produces high-brightness synchrotron radiation light, which is incident on the scientific experimental sample after being collimated, focused and monochromated by the optical elements of the beam line. The X-ray fluorescence signal generated by the sample is collected by the silicon or germanium sensor. The collected weak fluorescence signal is output through the preamplifier and enters the subsequent readout electronics system. The readout electronics system after the detector is generally composed of various digital devices such as gain amplifier circuits, high-speed and high-resolution analog-to-digital converters (ADCs), field programmable gate array chips (FPGAs), microcontrollers (MCUs) and host computers (dedicated computers). On this basis, the order of electronic processing results can be divided into two types: one is to implement both data acquisition and processing in the FPGA, and the other is to first collect data in the FPGA and then upload it to the host computer for data processing.
[0004] Under the conditions of high count rates and high throughput of synchrotron radiation, the electronics system faces some real-time data processing problems: 1. The detector has serious dead time due to hardware circuit problems. The high count rate causes the system to have serious pulse pile-up. The ability to handle pulse pile-up directly determines the overall computing performance and energy resolution of the system; 2. Traditional algorithms use the pile-up rejection method to solve the pile-up problem under high counts. The rejection rate accounts for 80% of the total input signal. However, in synchrotron radiation fluorescence experiments with low catalyst content and high background, this method will delete the fluorescence signal that is accumulated with the background signal. In severe cases, the fluorescence signal will be submerged by the background, making it impossible to continue the experiment. Summary of the invention
[0005] The object of the present invention is to provide a readout electronics system for a synchrotron radiation energy spectrum detector to solve the problem of pulse pile-up.
[0006] Based on the above-mentioned purpose, the present invention provides a readout electronics system of a synchrotron radiation energy spectrum detector, comprising a first computing device, a second computing device and a data acquisition device, wherein the first computing device is connected to the data acquisition device, the data acquisition device is connected to the energy spectrum detector, and the second computing device is connected to the first computing device; the data acquisition device is used to convert the fluorescence signal detected by the energy spectrum detector into a digital signal and transmit the digital signal to the first computing device; the second computing device is used to train a deep learning model and transmit the trained deep learning model to the first computing device; the first computing device is used to identify the digital signal based on a pre-trained deep learning model to obtain an amplitude recognition result, and obtain energy spectrum data according to the amplitude recognition result.
[0007] Furthermore, it also includes a host computer, which is connected to the first computing device and is used to receive the energy spectrum data sent by the first computing device.
[0008] Furthermore, the first computing device is a chip that carries both an operating system and a programmable logic gate array, and the second computing device is a GPU.
[0009] Furthermore, the first computing device is configured with a plurality of hardware accelerators for accelerating signal recognition.
[0010] Furthermore, the deep learning model is an LSTM model or a Transformer model.
[0011] Furthermore, the input of the deep learning model is a sequence including multiple signal values, and the output of the deep learning model is an amplitude recognition result, which is one or more amplitudes of each signal value.
[0012] Furthermore, the first computing device pre-deploys a deep learning model with the same structure as that in the second computing device. After training the deep learning model, the second computing device sends the parameters of the trained deep learning model to the first computing device, so that the first computing device assigns the parameters of the trained deep learning model to the deep learning model in the first computing device.
[0013] Furthermore, the first computing device includes a preprocessing module, an identification module and an energy spectrum data acquisition module. The preprocessing module is used to preprocess the digital signal to obtain a processed signal. The identification module is used to identify the processed signal based on a pre-trained deep learning model to obtain an amplitude recognition result. The energy spectrum data acquisition module is used to acquire energy spectrum data according to the amplitude recognition result.
[0014] Furthermore, the first computing device is also configured to draw an energy spectrum diagram according to the energy spectrum data, and send the energy spectrum diagram to the host computer.
[0015] Furthermore, a communication module and a storage module are provided on the first computing device, the communication module is used to realize data communication between the first computing device and the second computing device, and the storage module is used to store the parameters of the trained deep learning model.
[0016] The readout electronics system of the synchrotron radiation energy spectrum detector of the present invention adopts a heterogeneous architecture, uses a first computing device to perform signal recognition based on a deep learning model, and uses a second computing device to perform model training, which can improve the pulse pile-up recognition performance of the energy spectrum detector and ensure that the energy spectrum detector has high-precision energy spectrum resolution, thereby solving the signal loss problem caused by pulse pile-up under high counting rates of synchrotron radiation. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 It is a structural block diagram of a readout electronics system of a synchrotron radiation energy spectrum detector according to an embodiment of the present invention;
[0018] Figure 2 A schematic diagram of the module composition of a first computing device of a readout electronics system of a synchrotron radiation energy spectrum detector according to an embodiment of the present invention;
[0019] Figure 3 It is a structural block diagram of an LSTM model of a readout electronics system of a synchrotron radiation energy spectrum detector according to an embodiment of the present invention;
[0020] Figure 4 4 is a structural block diagram of a Transformer model of a readout electronics system of a synchrotron radiation energy spectrum detector according to an embodiment of the present invention. DETAILED DESCRIPTION
[0021] The preferred embodiments of the present invention are given below in conjunction with the accompanying drawings and described in detail.
[0022] like Figure 1 As shown, an embodiment of the present invention provides a readout electronics system for a synchrotron radiation energy spectrum detector, which includes a first computing device 100, a second computing device 200 and a data acquisition device 300. The first computing device 100 is connected to the data acquisition device 300, and the data acquisition device 300 is connected to the energy spectrum detector 400. The data acquisition device 300 is used to convert the fluorescence signal (analog signal) detected by the energy spectrum detector 400 into a digital signal, and transmit the digital signal to the first computing device 100. The first computing device 100 is used to identify the digital signal based on a pre-trained deep learning model to obtain an amplitude recognition result, and then obtain energy spectrum data according to the amplitude recognition result; the second computing device 200 is connected to the first computing device 100, and the second computing device 200 is used to train the deep learning model using training data, and transmit the trained deep learning model to the first computing device 100. Since the deep learning model is used to identify the digital signal, the speed is faster and the accuracy is higher, so the problem of signal accumulation can be effectively solved.
[0023] In some embodiments, the system may further include a host computer 500, which is connected to the first computing device 100 and is used to receive the energy spectrum data sent by the first computing device 100; the first computing device 100, the second computing device 200 and the data acquisition device 300 are usually located in the synchrotron radiation experimental line station, and the host computer 500 is located outside the synchrotron radiation experimental line station. By sending the energy spectrum data to the host computer 500, it is convenient for the experimenter to view the experimental results (i.e., energy spectrum data) outside the synchrotron radiation experimental line station, thereby preventing the experimenter from being affected by radiation. The host computer 500 and the first computing device 100 can be connected by wire or wireless means, for example, they can be connected by Ethernet.
[0024] In some embodiments, the data acquisition device 300 may be a high-precision and high-sampling rate ADC (analog-to-digital converter) digital waveform acquisition card, and the ADC chip integrated thereon may be, for example, a 125M and 16-bit acquisition ADC.
[0025] In some embodiments, the first computing device 100 may be a XILINX Zynq UltraScale chip having both an operating system and a programmable logic gate circuit, which integrates a quad-core ARM Cortex-A53 and an FPGA (field programmable logic gate array) programmable logic on a single chip through Processing System (PS) + Programmable Logic (PL) technology. The second computing device 200 may be a dedicated computing GPU (graphics processing unit). Since the training cycle of the deep learning model is relatively long, by using a GPU to perform parallel acceleration processing on it, and then sending the trained deep learning model to the first computing device 100 for signal recognition, the trained model can be obtained more quickly, thereby speeding up the process of signal recognition.
[0026] In some embodiments, the deep learning model can be any suitable sequence to sequence (Sequence to Sequence, Seq2Seq) model, such as a recurrent neural network (RNN), a long short-term memory (LSTM) neural network, a Transformer model, etc. The sequence to sequence model is a deep learning architecture for processing sequence data. The core idea is to use an encoder-decoder structure to encode the input sequence into a fixed-length context vector, and then decode the context vector into a target sequence through a decoder.
[0027] a. Encoder
[0028] The main function of the encoder is to convert the input sequence x t =x1,x2,...,x T Converted to context vector c. Usually, the encoder consists of several layers of recurrent neural network (RNN). The hidden state h at each time step t It can be calculated by the following formula:
[0029] h t =f(h t-1 ,x t )
[0030] Among them, h t-1 is the hidden state of the previous time step, x t is the input of the current time step, and f is the nonlinear activation function. The final hidden state of the encoder h t is regarded as the context vector c, namely:
[0031] c=h T
[0032] b. Decoder
[0033] The decoder uses the context vector c to generate the target sequence y t =y1,y2,...,y T' The decoder is usually composed of several layers of RNN. The decoding process is carried out by the following formula:
[0034] s t =f(s t-1 ,y t-1 ,c)
[0035] Among them, s t is the hidden state of the decoder at time step t, y t-1 is the output of the previous time step. The output of each time step is calculated by the following formula:
[0036] p(y t |s t )=softmax(g(s t ))
[0037] Where g is a linear transformation function.
[0038] The input of the deep learning model of the embodiment of the present invention is a sequence including multiple signal values, each signal value is a voltage value at a certain moment, and the output of the model (i.e., the amplitude recognition result) is one or more amplitudes of these signal values. The length of the input signal sequence (i.e., the number of signals included) can be set as needed, and the number of amplitudes included in the output amplitude recognition result can be determined according to the number of amplitudes included in the label when training the model. For example, when training a deep learning model, each sample of the training data is set to include a preset number (e.g., 200) of signals, and then each sample is labeled, and the label of each sample includes one or more amplitudes. Assuming that the number of amplitudes corresponding to the label containing the most amplitudes is N, then when the trained deep learning model is used for recognition, the number of amplitudes included in the amplitude recognition result will not exceed N.
[0039] In some embodiments, the training data may be obtained through experiments, literature searches, or any other suitable method.
[0040] In some embodiments, after the second computing device 200 has trained the deep learning model, it can only send its trained model parameters to the first computing device 100. The first computing device 100 pre-deploys a deep learning model with the same architecture as that in the second computing device 200, and then assigns the trained model parameters to the deep learning model of the first computing device 100. In this way, the first computing device 100 only needs to perform signal recognition without model training, which can greatly improve the processing speed of the first computing device 100 and prevent signal accumulation.
[0041] In some embodiments, when the input count rate of the energy spectrum detector 400 increases or the energy resolution reaches the recognition limit of the readout electronics system, the recognition performance of the first computing device 100 can be improved by re-training more signal training data in the second computing device 200 to obtain model parameters with better recognition performance, and then sending the model parameters with better recognition performance to the first computing device 100.
[0042] In some embodiments, the first computing device 100 may also be configured to pre-process the digital signal to obtain a processed signal, and then input the processed signal into a trained deep learning model for recognition. Figure 2 As shown, the first computing device 100 includes a preprocessing module 110, an identification module 120 and an energy spectrum data acquisition module 130, wherein the preprocessing module 110 is used to preprocess the digital signal to obtain a processed signal, the identification module 120 is used to identify the processed signal based on a pre-trained deep learning model to obtain an amplitude recognition result, and the energy spectrum data acquisition module 130 is used to obtain energy spectrum data according to the amplitude recognition result. The energy spectrum data is the number of signals corresponding to each amplitude (i.e., the number of signals with this amplitude), and the energy spectrum data acquisition module 130 is used to count each signal according to each amplitude. If the value of a certain signal is the amplitude, then the number of signals corresponding to the amplitude is increased by one, thereby obtaining the number of signals corresponding to each amplitude.
[0043] In some embodiments, the first computing device 100 may also draw an energy spectrum diagram according to the energy spectrum data, and send the energy spectrum diagram to the host computer 500 so that the experimenter can view and analyze the experimental results. The horizontal axis of the energy spectrum diagram is the amplitude, and the vertical axis is the number of signals.
[0044] In some embodiments, a communication module and a storage module may also be provided on the first computing device 100, wherein the communication module is used to implement data communication between the first computing device 100 and the second computing device 200, and the storage module is used to store the parameters of the trained deep learning model. The storage module may be a DDR4 memory, a high-speed solid-state drive (SSD), or any other suitable storage medium.
[0045] In some embodiments, the first computing device 100 may be configured with multiple hardware accelerators for accelerating signal recognition. The hardware accelerators include but are not limited to convolution operation accelerators, matrix multiplication accelerators, and nonlinear activation function accelerators.
[0046] In some embodiments, the preprocessing of the digital signal may include baseline recovery processing, filtering processing and event detection processing. The principles of baseline recovery processing and filtering processing of the signal are well known in the art and will not be repeated here; event detection processing refers to cutting the signal after baseline recovery processing and filtering processing at a certain time series length by a preset amplitude to obtain a processed signal of the same length, which can be used as an input of a deep learning model. When the energy spectrum detector 400 is a semiconductor detector such as a silicon drift semiconductor detector (SDD) and a high purity germanium semiconductor detector (HpGe), the analog signal output by it may be a step signal. At this time, a differential processing needs to be added before the filtering processing to process the step signal into the form of a double exponential signal.
[0047] The recognition module 120 is composed of the encoding structure Encoder and the decoding structure Decoder to form a large framework, and different sub-frame structures are used according to the different needs of the natural language processing algorithm. Here, the LSTM algorithm and the Transformer algorithm are taken as examples: for the LSTM algorithm, it is composed of an initialization module, an Embed module, an LSTM module, an Attention module, and an inference module; for the Transformer algorithm, it is composed of an initialization module, an Embed&Position Embed module, a MultiHeadSelfAttention module, an Add&Layer Norm module, a Feed Forward module, and a Projection inference module.
[0048] The following introduces the architecture and principle of LSTM:
[0049] LSTM is a special RNN that can capture long-distance dependencies and solve the gradient vanishing and gradient exploding problems in traditional RNNs. The LSTM unit consists of an input gate, a forget gate, and an output gate, and its update formula is as follows:
[0050]
[0051] Among them, i t 、f t and t They are input gate, forget gate and output gate respectively, c t is the cell state, σ is the sigmoid function, and ⊙ is the element-wise product.
[0052] like Figure 3As shown in the figure, the Encoder side of the LSTM model consists of an Embed module and an LSTM module, and the Decoder side consists of an Embed module, an LSTM module, an Attention module, and an inference module. During the calculation, each data of the input sequence is input into the Encoder in order for calculation to obtain a set of h data. The set of h data and the last h data in the group are respectively transmitted to the LSTM module and the Attention module of the Decoder side for initialization. An initial value is input into the Decoder side to infer a recognition result, the recognition result of this inference is saved, and it is input into the Decoder side again as an input value for calculation to obtain a new recognition result, which is saved again and passed to the next cycle for calculation. After the operation is repeated for several cycles on the Decoder side, a complete set of recognition results is finally obtained.
[0053] Introduction to each submodule of the LSTM model:
[0054] a) Initialization module: The initialization module is responsible for initializing the registers in the entire LSTM algorithm module. This module first resets and clears all registers inside the FPGA to ensure that the system is in the initial state. Then, the transmitted training parameters (such as weight matrix, bias vector, etc.) are loaded into the corresponding registers. These parameters are transmitted to the FPGA through the training parameter import module and stored by the initialization module in the registers of the corresponding neural network matrix, including the embed matrix parameter registers and lstm matrix parameter registers of the encoder and decoder, as well as the matrix parameter registers of the fully connected linear layer. The key steps to implement the Verilog program are as follows:
[0055] Reset all registers: Reg[i]←0, where i represents all registers;
[0056] Load training parameters:
[0057]
[0058] b) Embed module: Converts each data point in a fixed input sequence length into a high-dimensional vector representation for subsequent LSTM processing. This module uses a pre-trained embedding matrix to map input discrete data (such as vocabulary indexes) into a continuous vector space. The main operations of the Embed module include looking up the embedding matrix and outputting the corresponding vector representation. The key steps to implement the Verilog program are as follows:
[0059] Input fixed length sequence: x t =x1,x2,...,x T
[0060] Embedded Lookup: E t =Embedding(x t )
[0061] c) LSTM module: This module implements the core calculation of the long short-term memory network. This module includes the calculation of the input gate, forget gate, output gate and cell state update. The operation of the LSTM module is implemented on the FPGA through a parallel pipeline to improve the calculation efficiency. The update formula of the LSTM module is as follows:
[0062] Input gate: i t =σ(W t x t +U i h t-1 +b i )
[0063] Forget gate: f t =σ(W f x t +U f h t-1 +b f )
[0064] Output gate: o t =σ(W o x t +U o h t-1 +b o )
[0065] Status Update:
[0066]
[0067] d) Attention module: It is used to perform weighted processing on the LSTM output to increase the attention to important information. This module calculates the attention weight of each time step in the input sequence and weighted sums the hidden state of the LSTM according to the weight. The calculation steps of the Attention mechanism are as follows:
[0068] Calculate attention score: e t =score(h t ,h enc )
[0069] Calculate attention weight: α t =softmax(e t )
[0070] Weighted sum:
[0071] e) Reasoning module: It is responsible for combining the context vector output by the Attention module and the output hidden state of the LSTM module to generate the final prediction result. This module maps the high-dimensional vector to the probability distribution of the output sequence through the fully connected layer and activation function. The specific steps are as follows:
[0072] The context vector is combined with the hidden state: h t ′=[h t ;c t ]
[0073] Fully connected layer: y t =softmax(W y h t ′+b y )
[0074] The following introduces the architecture and principles of the Transformer model:
[0075] The Transformer model uses the Self-Attention Mechanism to replace the traditional RNN, which can process the entire sequence in parallel and improve computational efficiency. Its core components include the Multi-Head Self-Attention Mechanism and the Feed-Forward Neural Network.
[0076] The calculation process of the multi-head self-attention mechanism is as follows:
[0077]
[0078] Where Q, K, and V are query, key, and value matrices, respectively. k is the dimension of the key. The multi-head self-attention mechanism is implemented through the following formula:
[0079]
[0080] Where h is the number of heads, W i Q ,W i K ,W i V ,W O is the learnable weight matrix.
[0081] like Figure 4As shown in the figure, the encoder side of the Transformer model consists of the Embed & Position Embed module, the MultiHeadSelfAttention module, the Add & Layer Norm module, and the Feed Forward module, while the decoder side repeats the MultiHeadSelfAttention module and the Add & Layer Norm module on the structure of the encoder side, and adds a Projection module for the inference result at the end. The cyclic calculation method of the Transformer model is the same as that of the LSTM. After several cycles of calculation on the decoder side, a complete set of recognition results is finally obtained.
[0082] Introduction to each submodule of the Transformer model:
[0083] a) Initialization module: This module is the same as the LSTM initialization module mentioned above. All registers are reset first. The difference is the type of matrix parameter registers for storage. The matrix parameters of Transformer mainly include the embed and pos embed parameter matrix registers of the encoder and decoder, the three QKV matrix registers and linear layer matrix registers in the multi-head self-attention mechanism, the weight and bias matrix registers used for adjustment in Layer Norm, and the weight and bias matrix registers for convolution operations in Feed Forward. The key steps of this module are as follows:
[0084] Reset all registers: Reg[i]←0, where i represents all registers;
[0085] Load training parameters:
[0086]
[0087] b) Embed & Position Embed module: The Embed module converts each data point in the input sequence into a high-dimensional vector representation, and the Position Embed module encodes the position information into the input vector. The specific operations are as follows:
[0088] Input fixed length sequence: x t =x1,x2,...,x T
[0089] Embedded Lookup: E t =Embedding(x t )
[0090] Position embedding: PE t=PositionEmbedding(t)
[0091] Final embedding: E t ′=E t +PE t
[0092] MultiHeadSelfAttention module: It uses multiple self-attention heads to capture the dependencies between different positions in the input sequence. Its main calculation process includes the following steps:
[0093] Calculate the attention score:
[0094] Multi-head attention: head i =Attention(QW i Q ,KW i K ,VW i V )
[0095] Connect all heads: MultiHead(Q,K,V)=Concat(head1,head2,...,head h )W O
[0096] d) Add&Layer Norm module: Perform residual connection and layer normalization after the attention or feedforward layer. The residual connection and layer normalization formulas are as follows:
[0097] Residual connection: z = x + Sublayer (x)
[0098] Layer Normalization:
[0099] in
[0100] e) Feed Forward module: It contains two linear transformations and one nonlinear activation function. Its calculation process is as follows:
[0101] The first layer of linear transformation: FF1(x) = ReLU(W1x+b1)
[0102] The second linear transformation: FF2(x)=W2FF1(x)+b2
[0103] f) Projection inference module: responsible for converting the output of the Transformer model into the final prediction result. The process includes linear transformation and softmax activation. The specific steps are as follows:
[0104] Linear transformation: p = W p h+b p
[0105] Softmax activation: y = softmax(p)
[0106] After experimental verification, when the system of the present invention adopts the LSTM model for signal recognition, the processing speed can reach 1 millisecond when identifying 200 sampling points (that is, the input sequence includes 200 signals) and 5 stacked signals (that is, 5 amplitudes) at a time, while when the Transformer model is used to recognize 128 sampling points and 5 stacked signals at a time, the processing speed can be increased to 4.4 microseconds. For general synchrotron radiation X-ray fluorescence experiments, the time length of a single signal is approximately between a few microseconds and a few milliseconds, so it basically meets the requirements of the time scale. When the Transformer model is used, the system of the present invention has a faster recognition speed and can increase the output count rate to 17.6Mcps. After the two algorithms are trained on the same 1000 sets of training samples, in terms of stacking recognition accuracy, the recognition accuracy of the LSTM algorithm can reach 99.3%, and the recognition accuracy of the Transformer algorithm can reach 99.97%.
[0107] The readout electronics system of the synchrotron radiation energy spectrum detector in an embodiment of the present invention adopts a heterogeneous architecture, uses a first computing device 100 to perform signal recognition based on a deep learning model, and uses a second computing device 200 to perform model training, which can improve the pulse pile-up recognition performance of the energy spectrum detector and ensure that the energy spectrum detector has a high-precision energy spectrum resolution, thereby solving the signal loss problem caused by pulse pile-up under high counting rates of synchrotron radiation.
[0108] The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. The above embodiment of the present invention can also be modified in various ways. That is, all simple, equivalent changes and modifications made according to the claims and the description of the present invention fall within the scope of protection of the claims of the present invention. The contents not described in detail in the present invention are all conventional technical contents.
Claims
1. A readout electronics system for a synchrotron radiation energy spectrum detector, characterized in that: The system comprises a first computing device, a second computing device and a data acquisition device, wherein the first computing device is connected to the data acquisition device, the data acquisition device is connected to an energy spectrum detector, and the second computing device is connected to the first computing device; the data acquisition device is used to convert the fluorescence signal detected by the energy spectrum detector into a digital signal and transmit the digital signal to the first computing device; The second computing device is used to train the deep learning model and transmit the trained deep learning model to the first computing device; The first computing device is used to identify the digital signal based on a pre-trained deep learning model to obtain an amplitude recognition result, and acquire energy spectrum data according to the amplitude recognition result.
2. The readout electronics system of the synchrotron radiation energy spectrum detector according to claim 1, characterized in that: It also includes a host computer, which is connected to the first computing device and is used to receive the energy spectrum data sent by the first computing device.
3. The readout electronics system of the synchrotron radiation energy spectrum detector according to claim 1, characterized in that: The first computing device is a chip that carries both an operating system and a programmable logic gate array, and the second computing device is a GPU.
4. The readout electronics system of the synchrotron radiation energy spectrum detector according to claim 1, characterized in that: The first computing device is configured with a plurality of hardware accelerators for accelerating signal recognition.
5. The readout electronics system of the synchrotron radiation energy spectrum detector according to claim 1, characterized in that: The deep learning model is an LSTM model or a Transformer model.
6. The readout electronics system of the synchrotron radiation energy spectrum detector according to claim 1, characterized in that: The input of the deep learning model is a sequence including multiple signal values, and the output of the deep learning model is an amplitude recognition result, which is one or more amplitudes of each signal value.
7. The readout electronics system of the synchrotron radiation energy spectrum detector according to claim 1, characterized in that: The first computing device is pre-deployed with a deep learning model with the same structure as that in the second computing device. After training the deep learning model, the second computing device sends the parameters of the trained deep learning model to the first computing device, so that the first computing device assigns the parameters of the trained deep learning model to the deep learning model in the first computing device.
8. The readout electronics system of the synchrotron radiation energy spectrum detector according to claim 1, characterized in that: The first computing device includes a preprocessing module, an identification module and an energy spectrum data acquisition module. The preprocessing module is used to preprocess the digital signal to obtain a processed signal. The identification module is used to identify the processed signal based on a pre-trained deep learning model to obtain an amplitude recognition result. The energy spectrum data acquisition module is used to acquire energy spectrum data according to the amplitude recognition result.
9. The readout electronics system of the synchrotron radiation energy spectrum detector according to claim 2, characterized in that: The first computing device is also configured to draw an energy spectrum diagram according to the energy spectrum data, and send the energy spectrum diagram to the host computer.
10. The readout electronics system of the synchrotron radiation energy spectrum detector according to claim 7, characterized in that: The first computing device is provided with a communication module and a storage module, wherein the communication module is used to implement data communication between the first computing device and the second computing device, and the storage module is used to store parameters of the trained deep learning model.
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