A state machine recoding method for driving non-combination logic circuit

Abstract

This invention belongs to the field of integrated circuit design and discloses a method for re-encoding a state machine that drives a non-compositional logic circuit, including: Step 1: State classification; based on whether the KEEP value depends on the previous state of the state machine. S' The process involves several steps: Step 1: Classifying the state machine encoding; Step 2: Classifying state machine transitions: Based on the classification of state machine encoding and the start and end state encodings of state transitions, state machine transitions are subdivided into five types; Step 3: Modifying and recoding state machine transitions; Adjusting the state machine to ensure that its state transitions meet the requirements of the five types described in Step 2; Step 4: Flowchart and summary. This invention can recode state machines in general-purpose circuits, enabling them to directly drive circuits with non-combinatorial logic loops. Through two main steps—modifying the state machine transition diagram and bit recoding—existing state machines are transformed, demonstrating broad applicability.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of integrated circuit design, and particularly relates to a state machine re-encoding method for driving non-combination logic circuit. BACKGROUND

[0002] Logic locking technology protects integrated circuits by inserting key gates, providing full-process protection from design to manufacturing, and is widely used to address hardware Trojan horses, intellectual property piracy, and reverse engineering hardware security issues. Cycle logic locking technology adds loops in the circuit, making it impossible to express as a directed acyclic graph, to increase the complexity of SAT(Boolean Satisfiability) solving, with the characteristics of high structural security and small encryption overhead. However, cycle logic decryption technologies represented by CycSAT and BeSAT focus on the "loop-free" preprocessing of the circuit before SAT solving, combined with ATPG(Automatic Test Pattern Generation) to identify loop types, and have successfully cracked the advanced cycle logic locking method LOOPLock 2.0. Therefore, it is urgent to study more secure and effective loop structures and cycle logic locking methods.

[0003] Cycle logic locking is based on a core assumption that cycle structure is difficult to express in Conjunctive Normal Form(CNF)

[41] , so SAT solvers cannot solve it. By introducing cycles in combinational circuits, the circuit structure is no longer a Directed Acyclic Graph(DAG)

[42] , making traditional SAT attacks ineffective.

[0004] The core technology in the field of cycle logic locking to enhance security is the specific loop added in the circuit. When the circuit receives incorrect key input, these loops can induce output signal errors, thereby affecting the overall circuit function. Through detailed analysis, four types of loops that have been introduced in current cycle logic locking technology are identified.

[0005] (1) Pseudo-loop: This loop is the first structure adopted in the loop logic locking encryption technology. The so-called pseudo-loop refers to the situation that, after inputting the correct key, the signals in the loop will remain static and no jump will occur, so this loop actually does not play any functional role in the circuit and only serves as a structural loop, similar to a "dead circuit". However, when an incorrect key is input, the presence of the pseudo-loop becomes critical, as it will cause the output signal of the circuit to oscillate or have a time-sequential change, thereby interfering with the normal output of the circuit. Therefore, when the pseudo-loop is removed from the encrypted netlist, the corresponding circuit can be decrypted. This design aims to enhance the security of the circuit through a non-functional loop, so that when an incorrect key is input, the circuit will become an erroneous loop state.

[0006] (2) Super-loop: This loop was first introduced by the SRCLock encryption technology and is designed by stacking multiple layers based on the pseudo-loop. This structure results in a large number of loops of various sizes in the circuit. The SRCLock technology greatly increases the computational difficulty of the CycSAT solver in calculating the "loop-free" condition constraints by increasing the complexity of the loops. In essence, the super-loop is similar to the pseudo-loop and, after the chip is activated with the correct key, the super-loop will not affect the output function of the circuit, behaving as a "dead circuit". Therefore, once the super-loop is removed from the encrypted netlist, the circuit can be decrypted. This design strategy aims to improve the security of the circuit by increasing its complexity, making the CycSAT decryption process more difficult.

[0007] (3) Combinational logic loop: This loop can also be referred to as a functional combinational logic loop and was first proposed by the LOOPLock encryption technology. By using the NM technology, some gates in the circuit can be optimized and merged to ultimately build a functional combinational logic loop. Unlike the pseudo-loop or super-loop, the functional combinational logic loop will play a key role when the chip is running normally. Therefore, even if the circuit inputs the correct key, the values in the functional combinational logic loop will still change and affect the output signal of the circuit. Once these functional combinational logic loops are removed from the encrypted netlist, the circuit cannot be decrypted or will result in decryption errors. Therefore, to correctly decrypt the circuit, the attacker must retain these functional combinational logic loops.

[0008] (4) Non-combination logic loop: This kind of loop can be called non-functional non-combination logic loop, which is first proposed in the LOOPLock encryption technology. The main difference from the combination logic loop is its timing feature, the value in the loop not only depends on the current input signal, but also depends on the input signal at the previous time, while the combination logic loop only depends on the current input signal. Due to its timing feature, when the non-combination logic loop is added to the combination logic circuit, the value in the loop will be regarded as "X". In the LOOPLock and LOOPLock2.0 encryption technologies, in order to ensure the correctness of the function of the combination logic circuit, the "X" in the perspective of the logic function is combined with a zero value (logical and), so that "X" will not affect the output of the logic function, and thus will not affect the functionality of the circuit. Therefore, this kind of loop is also called non-functional non-combination logic loop. Due to its non-functional feature, like the pseudo loop and the super loop, once the non-functional non-combination logic loop in the encrypted netlist is removed, the circuit can be decrypted.

[0009] Table 1 Loop types in current loop logic locking

[0010]

[0011] The four existing loops are shown in Table 1. Among the above four loops, the pseudo loop and the super loop are introduced from the structural point of view, and are only used to introduce false loops in the combination logic circuit. These two loops do not affect the normal operation of the circuit in function, so they can be eliminated by the simplification process. For example, the pseudo loop can be simplified and eliminated by the "no loop" assumption and the related constraints added by the CycSAT tool. The super loop is essentially the same as the pseudo loop, but the time required by CycSAT to add constraints increases exponentially with the number of keys. In actual circuits, the super loop will consume a large amount of layout and wiring resources, so in practical applications, the practical value of this encryption technology is low.

[0012] Unlike the pseudo loop and the super loop, the combination logic loop and the non-combination logic loop are introduced into the loop logic locking from the perspective of the circuit function. This means that these two loops have actual functionality in the normal operation of the circuit, so the attacker must include these two loops in the encrypted netlist obtained to ensure the functional correctness of the final decrypted netlist. The main difference between these two loops is the variable on which their values depend: the value of the combination logic loop is directly determined by the current input signal, and its variable is only the current input signal; while the value of the non-combination logic loop depends on the current and previous input signals, and its variable includes the current input signal and the previous input signal. Since both of these two loops are from the functional point of view, each loop plays a specific and important role in the circuit design.

[0013] Although the LOOPLock encryption technique first introduced non-combinational logic loops, these loops are eventually non-functional. During the construction of the loops, the driving circuit downstream of the non-combinational logic loop will embed a blocking node, which prevents the further propagation of the loop value signal. From the perspective of logic function, this blocking node will connect (AND) the loop value with the previous logic 0 value. The loop value signal processed by the blocking node will be converted into a constant value (logic 0), thereby ensuring that it will not have any impact on the final output signal of the circuit. The design of LOOPLock aims to maintain the core function of the circuit by controlling signal propagation, keeping the circuit in the form of combinational logic while achieving the purpose of encryption.

[0014] The non-combinational logic loops in the LOOPLock encryption technique and its upgraded version, LOOPLock 2.0 encryption technique, are non-functional. Although these loops produce a jump in the loop value during the normal operation of the circuit, from the perspective of the output signal, they can actually be considered as inactive circuit parts, that is, the propagation of the uncertain state "X" in the loop value will stop at a certain node in the circuit. The cracking strategy of LOOPLock 2.0 encryption technique is based on this feature, that is, by identifying the blocking nodes in the circuit through ATPG technology to determine the inactive loops. The loops with blocking nodes can be considered as inactive "dead circuits", so they can be removed and replaced with logic 0 or 1, and the functionality of the circuit remains unchanged. After removing the non-combinational logic loops in the encrypted netlist, the remaining key values can be decrypted by SAT decryption technology, and finally an decrypted netlist containing only functional combinational logic loops is obtained. Although the decrypted netlist does not contain non-combinational logic loops, it is functionally equivalent to the correct circuit netlist, so the effectiveness of this decryption method can be proved.

[0015] Overall, although the current loop logic lock encryption technique introduces non-combinational logic loops, due to the non-functionality of the introduced loops, these loops are easy to crack, which reflects a major flaw in the field of encryption techniques: none of the current encryption techniques effectively utilizes functional non-combinational logic loops. If the non-combinational logic loops in the circuit are functional, such loops will no longer be considered "dead circuits", thereby leading to the retention of such loops in the decrypted netlist, which directly breaks the decryption premise of the current decryption techniques. Therefore, researching encryption techniques that can effectively utilize functional non-combinational logic loops is a key direction to enhance the security of circuits in the field of loop logic lock.

[0016] Since the non-combination logic loop has the timing property, for the general circuit, directly introducing the functional non-combination logic loop will make the circuit function uncontrollable, and in order to make the arbitrary circuit can use the functional non-combination logic loop, the state machine coding needs to be modified, so that the timing of the modified state machine meets a certain restriction, under which the functional non-combination logic loop can safely and effectively work in the circuit. SUMMARY

[0017] The present application aims to provide a state machine re-encoding method for driving non-combination logic circuit to solve the above technical problems.

[0018] To solve the above technical problems, the specific technical scheme of a state machine re-encoding method for driving non-combination logic circuit of the present application is as follows:

[0019] A state machine re-encoding method for driving non-combination logic circuit, comprising the following steps:

[0020] Step 1: state classification; based on whether the KEEP value depends on the previous state S' of the state machine, the coding of the state machine is classified;

[0021] Step 2: state machine jump classification; according to the classification of the state machine coding and the start and end state coding of the state jump, the jump of the state machine is subdivided into five types.

[0022] Step 3: state machine jump modification and re-encoding operation; adjust the state machine so that the jump between states meets the requirements of the five types of jumps in step 2;

[0023] Step 4: flow and summary.

[0024] Further, in step 1, the output signal of the circuit containing the non-combination logic loop is denoted by y, and the logic function of the circuit is denoted by f, then the coding of the state machine is divided into the following two categories:

[0025] (1) Sf (State free), free coding state, in which state the loop value of the non-combination logic loop will not affect the output port, in which case,

[0026] y = f (S) (3.8)

[0027] (2) Sk (State keep), keep state, in which state the loop value of the non-combination logic loop will affect the output port of the circuit, in which case,

[0028] y = f (S, S'). (3.9) Further, the five types of jumps in step 2 are internal jump, Sf to Sf jump, Sf to Sk jump, Sk to Sf jump, and Sk to Sk jump,

[0029] The internal jump: in this type of jump, the encoding of the start state and the end state remain unchanged; the Sf to Sf jump: in this type of jump, both the start state and the end state are Sf;

[0030] The Sf to Sk jump: this type of jump causes the latching of the ring value in the non-combination logic ring in the Sf state to the Sk state;

[0031] The Sk to Sf jump: in this type of jump, the end state is Sf.

[0032] Further, each type of the step 2 has its specific requirements and constraints, in which some types of jumps are not allowed:

[0033] The internal jump is allowed in the circuit design;

[0034] The Sf to Sf jump: the jump path of this state machine is allowed;

[0035] The Sf to Sk jump: the jump from Sf to Sk must ensure that the jump entry is unique, and this type of jump is allowed;

[0036] The Sk to Sf jump: in the circuit containing the non-combination logic ring, this type of jump is not only allowed, but also the number of jumps is not limited;

[0037] The Sk to Sk jump: in the circuit containing the non-combination logic ring, this type of jump is not allowed.

[0038] Further, the classification of the jumps between different states in the step 2 and the related restrictions are as follows:

[0039] The internal jump: the start state is S0, the end state is S0, and it is allowed;

[0040] The Sf to Sk jump: the start state is S0, the end state is S1, and it is partially allowed 1;

[0041] The Sf to Sk jump: the start state is S0, the end state is S2, and it is partially allowed 2;

[0042] The Sf to Sf jump: the start state is S0, the end state is S3, and it is allowed;

[0043] The Sk to Sf jump: the start state is S1, the end state is S0, and it is allowed;

[0044] The Sf to Sf jump: the start state is S0, the end state is S3, and it is allowed;

[0045] Internal jump: start state S1, end state S1, allowed;

[0046] Sk to Sk jump: start state S1, end state S2, not allowed;

[0047] Sk to Sf jump: start state S1, end state S3, allowed;

[0048] Sk to Sf jump: start state S2, end state S0, allowed;

[0049] Sk to Sk jump: start state S2, end state S1, not allowed;

[0050] Internal jump: start state S2, end state S2, allowed;

[0051] Sk to Sf jump: start state S2, end state S3, allowed;

[0052] Sf to Sf jump: start state S3, end state S0, allowed;

[0053] Sf to Sk jump: start state S3, end state S1, partially allowed 1;

[0054] Sf to Sk jump: start state S3, end state S2, partially allowed 2;

[0055] Internal jump: start state S3, end state S3, allowed;

[0056] In the jump category marked as "partially allowed 1", only one of the two possible jumps is allowed to be implemented; similarly, the jump category marked as "partially allowed 2" also only allows one of the jumps to exist.

[0057] Further, in step 2, for any circuit, as long as the encoding classification and state jump of its state machine meet the restriction conditions, the state machine can be used to drive the functional non-combination logic ring; for a state machine with multiple bits, a splitting strategy is adopted, and part of the bits are treated as an independent 2-bit state machine for processing; thereafter, it is analyzed whether the encoding and jump of this 2-bit state machine meet the requirements proposed previously.

[0058] Further, in step 3, some more stringent restrictions are included, including: Sf to Sk jump, for a state encoded as Sk, only one jump entry is allowed; Sk to Sk jump, this jump is not allowed.

[0059] To ensure that the state machine re-encoding state jump meets the above restrictions, first need to adjust the state machine jump structure, which includes ensuring that the state machine has multiple states only one entry jump, and then mark these states as Sk, next, according to the specific encoding requirements of Sk and Sf re-encoding work;

[0060] In the modification of the state machine jump path, the first task is to ensure that the function of each state remains unchanged; Next, adjust the jump path itself; In view of the two restrictions mentioned above, state copying is an effective strategy, which generates a state copy with the same function as the original state; Then, the jump entry of the original state and its copy is appropriately limited.

[0061] Further, the specific implementation method of step 3 is:

[0062] An original state machine includes state Si and other parts, state Si has three jump entries a, b, and c, and two jump exits d and e, if considering Si as a non-combination logic ring driving part, that is, Sk state, but Si has three entries, which does not meet the requirement that Sk state has only one jump entry, so the jump entries of Si need to be divided into three parts,

[0063] According to the state machine re-encoding strategy, first copy Si to form three copies Si0, Si1 and Si2, these copies have the same jump exit as the original Si state, that is, they all have two exits d and e, and each inherits the entries a, b and c of Si, in the new state machine design, these copies will replace the original Si state, if Si in the original state machine works through path a, in the new state machine, the corresponding path a will jump to state Si0, Si0, Si1 and Si2 have the same function as the original Si in the circuit, through this state copying strategy, two of Si0, Si1 and Si2 can be selected as Sk, and then the state machine is re-encoded according to the specific encoding requirements of Sk, to ensure that the newly encoded state machine can effectively drive the functional non-combination logic ring.

[0064] Further, the step 4 includes:

[0065] The key of the state machine re-encoding strategy is to first analyze the circuit containing non-combination logic ring, and to identify the type of each input signal accurately, since the state machine is the core of driving such circuits, detailed analysis of each input signal;

[0066] Under the premise that the state machine will be re-encoded, the current stage does not need to deeply analyze whether Sk and Sf in the existing state machine jump graph meet the specific restriction rules, on the contrary, focus on the symbolization of each state and the direct analysis of its jump path;

[0067] For those states with the number of jump entries greater than or equal to 2, the state copying method is adopted to keep the invariance of the circuit function, and a copy state with the same function as the original state is generated by copying, and the copied copies will inherit all the jump exits of the original state, and each entry of the original state is allocated to each copy to ensure that each copy has only one independent jump entry; in addition, since the state copying is performed, there will be no direct jump relationship between the newly generated state copies, which meets the requirement that there should be no jump relationship between the Sk states;

[0068] After each state copying, the number of copies obtained is divided by 2 and the integer part is obtained, which represents the number of states that can drive the functional non-combination logic loop circuit, and also equals the number of keys that can be inserted. Once the number of copied states reaches the required number of keys, the state copying operation will stop, and then the modified state jump graph will be re-encoded based on the {Sk} and {Sf} sets obtained by previous analysis. For a multi-bit state machine, the encoding needs to split part of the bits, and the bit subset is regarded as a small state machine. The encoding operation is started from the small state machine.

[0069] The state machine re-encoding method for driving a non-combination logic circuit of the present application has the following advantages:

[0070] The present application can realize the re-encoding of the state machine in a general circuit, so that it can directly drive the circuit with a non-combination logic loop. Through the two steps of state machine jump graph modification and bit re-encoding operation, the existing state machine is modified, which has wide applicability. The modified state machine can drive the circuit containing the non-combination logic loop, and the non-combination logic loop is functional, that is, it has an influence on the output of the circuit. BRIEF DESCRIPTION OF DRAWINGS

[0071] Fig. 1(a) is a schematic diagram of a circuit structure with a non-combination logic loop;

[0072] Fig. 1(b) is a truth table of the circuit in Fig. 1(a);

[0073] Fig. 1(c) is a schematic diagram of a circuit with two registers;

[0074] Fig. 1(d) is a schematic diagram of adding the circuit structure in Fig. 1(a) to Fig. 1(c);

[0075] Fig. 2(a) is a schematic diagram of a circuit after inserting a key;

[0076] Fig. 2(b) is a schematic diagram of the KEEP value to ensure that the 'X' state is not output, and all the allowed jump entries of the state machine S;

[0077] Figure 2(c) is a diagram showing that when the previous state of the state machine S is fixed, the KEEP value corresponding to the output signal c will no longer be 'X';

[0078] Figure 3 Finding a method for a 2-bit state machine in an actual circuit;

[0079] Figure 4 Diagram of the state machine re-encoding process;

[0080] Figure 5(a) is a diagram of the original state machine;

[0081] Figure 5(b) is a diagram of the state machine after re-encoding. DETAILED DESCRIPTION

[0082] In order to better understand the purpose, structure and function of the present application, a state machine re-encoding method for driving a non-combination logic circuit is described in further detail below in conjunction with the accompanying drawings.

[0083] In order to more clearly explain how to re-encode the state machine, the background corresponding to the re-encoding method, i.e., the FCLock encryption technology, is first introduced below. The encryption technology will use the non-combination logic loop used in Figure 1(a), but in order to make the loop applicable in a general circuit, the state machine driving the loop in Figure 1(a) needs to be re-encoded to ensure the correctness of the circuit with the loop in terms of function.

[0084] Secondly, how to classify the state machine encoding (Sf or Sk) is introduced. The classification is the basis for subsequent state machine jump classification and final state machine encoding.

[0085] Then, how to classify the state machine jump is introduced. The present application needs to modify the jump of the original state machine so that the final state machine jump type meets the requirements of the five type classifications proposed below. The jump diagram is modified by the form in Figure 5, i.e., the state is copied first, and then the jump entry is modified.

[0086] The final state machine encoding value is based on the state machine after jump modification. How each bit is specifically encoded depends on the classification of the state, i.e., whether it belongs to Sf or Sk, and the final encoding value of Sf and Sk depends on the state machine classification method in the first step.

[0087] Finally, the state machine re-encoding method is introduced through a flowchart.

[0088] Introduction of FCLock encryption technology: background knowledge of state machine re-encoding

[0089] To fully utilize the functional non-combinational logic loop, a new encryption technique, FCLock, is introduced. To explain this method more clearly, this section first discusses why the LOOPLock 2.0 encryption technique does not use functional non-combinational logic loops. Second, it analyzes the challenges encountered in introducing functional non-combinational logic loops into combinational logic circuits and demonstrates how the FCLock encryption technique overcomes these difficulties through a detailed example. Finally, this section elaborates on the working principle of the FCLock encryption technique and its application in circuit encryption.

[0090] From the perspective of logic functions, the loop value function of non-combinational logic loops exhibits clear timing characteristics, where the variables include not only the current inputs (CIs), but also the previous inputs (LIs). Specifically, if the current inputs CIs do not directly affect the loop value, the loop value is mainly determined by the LIs, expressed as Y = F(CIs, LIs). In the LOOPLock 2.0 encryption technique, non-combinational logic loops have functionality on a small scale for certain downstream circuits, but the loop value Y does not drive the final output signal, so this loop is considered non-functional. This setting is based on the core consensus of the loop logic locking technique, which is that the purpose of encryption is to enhance the security of combinational logic circuits. To ensure the security of circuit functions, i.e., to avoid the appearance of timing characteristics in combinational logic circuits, the final encrypted circuit should avoid containing timing devices, and non-combinational logic loops can obviously be considered as timing devices. Since non-combinational logic loops are timing, and their variables LIs do not belong to the current time, they are considered as unstable variables "X" in combinational logic circuits where input signals are free variables. To prevent the potential impact of "X" on circuit functions, the LOOPLock 2.0 encryption technique adds blocking nodes at appropriate locations, which prevent the further propagation of "X" and ensure that from the perspective of the output port, the non-combinational logic loop in the circuit maintains its non-functional characteristics, thus ensuring the combinational logic characteristics of the circuit.

[0091] In a loop-locked circuit, one of the main challenges in using a functional non-combinational logic loop is to ensure that the combinational logic circuit avoids timing issues caused by the loop value, even though the loop is introduced. Assume that the output variable in the current combinational logic circuit is denoted by g, and the logic operation is denoted by F. Then, for any combinational logic function, the goal is to maintain a direct response to the current input, while avoiding dependence on the history state. This requires that the impact of the non-combinational logic loop be managed carefully in the design to ensure that it does not disrupt the basic logic of the circuit. For a combinational logic function,

[0092] g = F(CIs) (3.1)

[0093] With the introduction of the non-combinational logic loop, assume that the loop value is denoted by a logic function y. Then,

[0094] g = F(CIs, y) (3.2)

[0095] Since y is a function of CIs and LIs, we have

[0096] g = F(CIs, y(CIs, CIs)) (3.3)

[0097] In a combinational logic circuit, the value of the latched input signal is derived from the previous clock tick, and thus has a timing aspect. According to the nature of the combinational logic function, this timing information must be removed. However, in a standard combinational logic circuit, neither the internal circuit components nor the current input signal can derive the previous CIs information through the logic function. This inability to infer the history state from the current logic state is the main reason why the loop-locked technique does not use a functional non-combinational logic loop.

[0098] In the FCLock encryption technique, in order to use the functional non-combinational logic loop properly, CIs must be a function of the current input signal CIs, in order to remove the timing aspect of the loop value, i.e., a function must be constructed as follows:

[0099] LIs = f(CIs) (3.4)

[0100] In a combinational logic circuit, the function f is usually unknown, but the circuit composition of the chip includes not only the combinational logic part, but also timing logic devices such as registers. These timing logic devices essentially form a state machine. In this architecture, the current input signal CIs of the combinational logic circuit is generated by the state machine. Therefore, when considering the overall design of the circuit, the construction of the function f needs to take into account the state machine that drives the combinational logic circuit, to ensure the coordinated work of the entire system.

[0101] The encryption principle of FCLock encryption technology is to construct a function f, so that even if the combinational logic circuit contains a functional non-combinational logic loop, the circuit is still combinational in nature, that is:

[0102] g = F(Cls, y(Cls, f(Cls))) (3.5)

[0103] The following will detail the FCLock encryption technology through a specific example. In order to ensure that the non-combinational logic loop in the circuit is not affected by the race hazard and cause functional problems, the non-combinational logic loop used in the FCLock encryption technology needs to be specially designed to ensure that the loop value will not be affected by glitches. There are many ways to implement these non-combinational logic loops that are functionally immune to glitches, one of which is shown in Figure 1(a). The logic function of such a non-combinational logic loop can be specifically represented as:

[0104] c = ((a & b) | (a & c) | (b & c)) (3.6) In the application example of FCLock encryption technology, that is, the circuit design shown in Figure 1(a), the variable c on the right side of the equation represents the loop value of the non-combinational logic loop, marked with "KEEP". Figure 1(b) reveals the corresponding logic behavior, especially when the input signal ab is 01 or 10, the output signal c will maintain the loop value KEEP. The specific value of this loop value depends on the previous state of the input signal ab. If there is no timing information about the input signal ab, ab can be regarded as two independent free input variables. In this case, when the input signal ab takes the value of 01 or 10, the output signal c will be in an uncertain state, that is, the value of KEEP is considered to be "X".

[0105] In order to eliminate the uncertainty of the output signal, it must be ensured that when the input signal ab is equal to 01 or 10, the loop value KEEP has a definite value of 0 or 1. For example, the fourth column of Figure 1(b) shows a possible case, when the input signal ab is equal to 01, the output signal c is 1 (KEEP = 1), and when ab is equal to 10, the output signal c is 0 (KEEP = 0). In this configuration, although the circuit shown in Figure 1(a) still contains a non-combinational logic loop, and this loop will affect the output signal c, its logic function function actually still only depends on the current input signal ab. This design makes the circuit logically exhibit the characteristics of a combinational logic circuit, that is, the output is completely determined by the current input.

[0106] To ensure that the truth table of the circuit in Fig. 1(a) matches the pattern shown in the first, second, and fourth columns of Fig. 1(b), the input signal ab must give up its free-running state and be subjected to certain constraints. Such constraints guarantee that the loop value KEEP remains 1 when the ab signal jumps from other values to 01, and remains 0 when the ab signal jumps to 10. Obviously, the combinational logic circuit of cannot implement such constraints with timing properties, and therefore the input signal ab with time-series information must be introduced. Considering that the combinational logic in a real circuit is usually driven by a register output, without loss of generality, it can be assumed that the input signal ab is driven by two registers A and B, as shown in Fig. 1(c). It is further assumed that the registers A and B together constitute a state machine S, where the 0th bit of S drives the signal a and the second bit of S drives the signal b. Therefore, the change of the ab signal depends on the state transition of the state machine S, and the specific value of ab is determined by the encoding of the state machine S.

[0107] When the encoding and transition configuration of the state machine S meet the conditions, the output signal c of the circuit in Fig. 1(a) behaves as shown in Fig. 1(b), and the circuit in Fig. 1(a) can be simplified using the truth table of c under this configuration. As is evident from the truth table in Fig. 1(b), the logic function of the output signal c in this case can be clearly defined as:

[0108] c = b(3.7)

[0109] This logic function exhibits the characteristics of combinational logic and can be directly integrated into the actual circuit shown in Fig. 1(c), thereby introducing the non-combinational logic loop shown in Fig. 1(a) into the real circuit layout. Fig. 1(d) shows one possible way of such integration. As long as the state machine S composed of registers AB in Fig. 1(c) meets certain timing requirements, the circuit function shown in Fig. 1(d) will remain consistent with Fig. 1(c). In addition, the non-combinational logic loop added in this way is functional, because according to the truth table in Fig. 1(b), the loop value KEEP directly affects the logical function expression of the output signal c.

[0110] The registers A and B together constitute a 2-bit state machine S, which has four possible encodings: 00, 01, 10, and 11, labeled as S0, S1, S2, and S3, respectively. The first three columns in Fig. 2(c) describe the correspondence between the input signal ab and the state machine encoding in these four states. In this configuration, when the state machine is in the states S1 and S2, the output signal c of the circuit shown in Fig. 2(a) will remain as the value of KEEP, which corresponds to the third column in Fig. 1(b). Specifically, when the state machine transitions from the previous S0 state to S1 or S2, the value of KEEP is 0; and when it transitions from the previous S3 state to S1 or S2, the value of KEEP is 1.

[0111] In order to make the truth table of the circuit in Fig. 1(a) consistent with the situation shown in the fourth column of Fig. 2(b), the state transitions of the state machine S need to satisfy certain preconditions. Specifically, when the state machine S is currently in state S1, its previous state must be S3; when the state machine S is in state S2, its previous state must be S0. However, when the state machine is in state S0 or S3, there is no specific requirement for the previous state, because when S equals S0 or S3, the loop value of the non-combinational logic loop is directly affected by the current input signal ab, and is not dependent on the signal of the previous clock. This state dependency relationship constitutes the truth table shown in Fig. 2(c), in which the KEEP value is no longer in an indeterminate state. Through this design, the state machine S correctly drives the input signal ab, thereby ensuring the predictability of the looped circuit.

[0112] The state machine jump diagram in Fig. 2(b) can more clearly illustrate this special timing or state machine dependency relationship, in which internal state jumps such as S0 self-jump to S0 are omitted, and all key jump paths that guarantee the output signal to be in a determinate state "0" or "1" are highlighted. In the diagram, the jump paths from state S0 to S2 and from state S3 to S1 are marked with red arrows, indicating that these paths are core and cannot be deleted. Other jumps marked with black arrows can be adjusted or deleted as needed.

[0113] Fig. 2(b) clearly shows that the jump entries of states S1 and S2 are unique, while the jump entries and exits of S0 and S3 are not limited. In particular, when the state machine is in S2, it is not allowed to jump to S1, because in the states of S1 and S2, the looped loop value of the non-combinational logic directly affects the output signal. For example, if the state machine is allowed to jump from S2 to S1, it may go through the paths of S2→S0→S1 or S2→S3→S1, in which S0 and S3 are intermediate states, which will have different effects on the looped loop value. Such state transitions will cause the loop value in state S1 to be in an indeterminate state, thereby affecting the stability and predictability of the circuit. This detailed state design is to ensure that the circuit can maintain the predetermined logic function under all operating conditions, avoiding any form of logic error or indeterminacy.

[0114] When the state machine S in the circuit meets the special timing requirements described above, the key addition operation can be performed. Unlike the exclusive OR gate or the exclusive NOR gate commonly used in existing encryption methods, the FCLock encryption technology can insert an AND gate K in the feedback loop, as shown in FIG. 2(a). The driving key Key of this AND gate K will determine whether the loop is activated. For example, if the correct value of Key is set to 1, and the input signal ab is driven in the manner shown in FIG. 2(c), when Key is 0, the AND gate will be closed, causing the loop value to be fixed at 0, thereby changing the final combinational logic function and affecting the output signal, causing so-called logic "pollution".

[0115] In fact, the key addition gate is not limited to an AND gate, and other types of logic gates can also be used for encryption. For example, if an exclusive OR gate is inserted in the loop, it means that the feedback loop must exist, and the key's role is to determine whether to add a NOT gate in the loop. This design allows more flexible encryption implementation, allowing circuit designers to choose the most suitable encryption strategy based on security requirements and circuit characteristics.

[0116] In summary, this subsection first analyzes the necessary conditions when a combinational logic circuit introduces a functional non-combinational logic loop through logical reasoning. Only when the state machine driving the combinational logic circuit meets certain requirements, can the functional non-combinational logic loop be effectively integrated into the circuit for encryption operation. This subsection describes the working principle of the FCLock encryption technology by showing a typical circuit containing a non-combinational logic loop and a 2-bit state machine. In similar situations, if there is a similar state machine in the circuit, a similar method can be used to introduce a functional non-combinational logic loop to achieve effective encryption of the circuit.

[0117] Although the state machine described in the foregoing example is common in many circuits, in fact, due to the high degree of freedom in state machine coding and jump path, many circuits cannot directly use the functional non-combinational logic loop in FIG. 1(a) for encryption. In order to improve the universality of the FCLock encryption technology, this subsection introduces a state machine re-coding strategy. The core purpose of this strategy is to ensure that any state machine can meet the conditions for adding a functional non-combinational logic loop by re-coding the state machine and re-planning the jump path. This method will expand the scope of application of the FCLock encryption technology, making it adaptable to more diverse circuit design requirements, thereby improving the overall encryption effect and the security of the circuit.

[0118] The state machine re-coding method for driving a non-combinational logic circuit of the present application comprises the following steps:

[0119] Step 1: State classification;

[0120] Based on the analysis of the aforementioned examples, a classification method is proposed to classify the encoding of the state machine based on whether the KEEP value depends on the previous state S' of the state machine. Assuming that the output signal of the circuit containing the non-combination logic loop is denoted by y, and the logic function of the circuit is denoted by f, the encoding of the state machine can be classified into the following two categories:

[0121] (1) Sf (State free), free encoding state, in which the loop value of the non-combination logic loop will not affect the output port. In this case,

[0122] y = f (S) (3.8)

[0123] (2) Sk (State keep), keep state, in which the loop value of the non-combination logic loop will affect the output port of the circuit. In this case,

[0124] y = f (S, S ′ ) (3.9) Table 2 lists the state classification in the previous examples:

[0125] Table 2 State classification in the example

[0126]

[0127] Step 2: State machine jump classification:

[0128] Further, according to the classification of the state machine encoding and the start and end state encoding of the state jump, the jump of the state machine can be subdivided into the following five types. Each type has its specific requirements and constraints, and some jump types are not allowed:

[0129] (1) Internal jump: In this type of jump, the encoding of the start state and the end state remains unchanged. In this case, since the encoding of the state machine does not change, it is reflected on the combination logic circuit as the circuit input signal remains stable and unchanged. Obviously, this internal jump is allowed in circuit design, as it does not cause signal changes and can ensure the stability of the circuit.

[0130] (2) Sf to Sf jump: The start state and the end state of this type of jump are both Sf. Therefore, whether before or after the jump, the loop value of the non-combination logic loop in the circuit will change immediately according to the current input state. Even if the Sf to Sf jump involves intermediate states, the loop value latched in the intermediate state will be reset by the end state, ensuring that the output result of the circuit in the final state remains correct. Therefore, this jump path of the state machine is allowed, which can effectively maintain the logic consistency and correctness of the circuit.

[0131] (3) Sf to Sk jump: This type of jump causes the ring value in the non-combinational logic loop in Sf state to be latched to Sk state. To ensure the ring value in Sk state remains its uniqueness and determinacy, the jump from Sf to Sk must ensure the jump entry is unique. Under this restriction, the jump from Sf to Sk is allowed because it guarantees the consistency and predictability of the ring value in the end state Sk, thus ensuring the correct execution of the circuit logic.

[0132] (4) Sk to Sf jump: In this type of jump, the end state is Sf, thus the ring value of the end state will be directly driven by the current input signal and its internal latched ring value will be updated immediately when the state machine jumps to Sf. Therefore, in a circuit containing a non-combinational logic loop, this type of jump is not only allowed, but also its jump times are not restricted.

[0133] (5) Sk to Sk jump: Since both the start state and the end state are Sk, the function of this jump is intended to maintain the ring value in the non-combinational logic loop unchanged while allowing the change of the circuit input signal. However, the ring value of the non-combinational logic loop in both the start state and the end state depends on the previously latched ring value. Given the intermediate states that the Sk to Sk jump can involve, this can cause the ring value in the start state and the end state to change, thus making the ring value in the end state Sk present an indeterminate state "X". This result contradicts the intended function of the jump, therefore, in a circuit containing a non-combinational logic loop, this type of jump is not allowed. This restriction helps to maintain the consistency and reliability of the circuit logic, avoiding the circuit function errors caused by state indeterminacy.

[0134] Table 3 shows the classification of jumps between different states in an example and their related restrictions. Among them, the jump category marked as "partially allowed 1" allows only one of the two possible jumps to be implemented; similarly, the jump category marked as "partially allowed 2" also allows only one of the jumps to exist.

[0135] Classification of jumps between different states and related restrictions

[0136]

[0137]

[0138] For any circuit, as long as the encoding and state transition of its state machine satisfy the above-mentioned restrictions, the state machine can be used to drive functional non-combinational logic loops. For example, if a circuit contains a 2-bit state machine, and the encoding and transition of the state machine are analyzed and confirmed to satisfy the above-mentioned five types of transitions and the corresponding restrictions, the output of the state machine can be directly used to introduce functional non-combinational logic loops by using the circuit described in FIG. 2(a), thereby achieving effective encryption operations.

[0139] For a state machine with multiple bits, a splitting strategy can be adopted, in which some bits are treated as an independent 2-bit state machine. Thereafter, the encoding and transition of the 2-bit state machine are analyzed to determine whether they satisfy the above-mentioned requirements. This has the advantage that, without the need to re-encode the entire state machine, the number of 2-bit state machines obtained from the above-mentioned flowchart can still satisfy the requirement for the number of keys. Figure 3 The flowchart shown in FIG. 4 can be used to quickly determine whether the state machine in a circuit satisfies the requirement for FCLock encryption.

[0140] Step 3: State machine transition modification and re-encoding operation

[0141] Although in practice the encoding and transition of the state machine in a circuit can not fully satisfy the requirements of the above-mentioned flowchart, and in addition, the number of 2-bit state machines obtained from the above-mentioned flowchart can not satisfy the requirement for the number of keys, it is necessary to re-encode the state machine in order to improve the universality of the FCLock encryption technique and ensure that it can be implemented in most circuits. This operation aims to adjust the state machine so that its state transitions satisfy the above-mentioned five types of transitions.

[0142] Most of the requirements provide relatively loose conditions, but also include some relatively strict restrictions, including:

[0143] (1) Transition from Sf to Sk. For a state encoded as Sk, only one transition entry is allowed.

[0144] (2) Transition from Sk to Sk. This type of transition is not allowed.

[0145] In order to ensure that the state transitions of the re-encoded state machine satisfy the above-mentioned restrictions, it is necessary to first adjust the transition structure of the state machine. This includes ensuring that the state machine has multiple states with only one entry transition, and then marking these states as Sk. Next, re-encoding is performed according to the specific encoding requirements of Sk and Sf. Figure 4 The flowchart shown in FIG. 6 details the key steps of the state machine re-encoding strategy.

[0146] The first task is to ensure that the functions of the states remain unchanged. Then, the jump paths can be adjusted. Given the two constraints, state copying is an effective strategy, by which a copy of the state with the same function as the original state can be generated. Then, the jump entries of the original state and its copy can be appropriately restricted. This method can effectively modify the jump paths of the state machine without changing the basic functions of the circuit, thereby optimizing the encryption strategy and function implementation of the entire circuit.

[0147] Figures 5(a) and 5(b) show the implementation of the strategy. Figure 5(a) describes an original state machine, including state Si and other parts. State Si has three jump entries a, b, and c, and two jump exits d and e. If Si is considered as a driving part of a non-combination logic loop (i.e., Sk state), but Si has three entries, which does not meet the requirement that Sk state has only one jump entry, so the jump entries of Si need to be divided into three parts.

[0148] According to the state machine recoding strategy, Si is first copied to form three copies Si0, Si1, and Si2. These copies have the same jump exit as the original Si state, i.e., they have two exits d and e, and each inherits the entries a, b, and c of Si. In the new state machine design, these copies will replace the original Si state. For example, if Si in the original state machine functions through path a, in the new state machine the corresponding path a will jump to state Si0. Si0, Si1, and Si2 have the same function as the original Si in the circuit. By this state copying strategy, two of Si0, Si1, and Si2 can be selected as Sk, and then the state machine is recoded according to the specific coding requirements of Sk to ensure that the newly coded state machine can effectively drive the functional non-combination logic loop.

[0149] Step 4: Flow and Summary

[0150] The key to this strategy is to first analyze the circuit containing the non-combination logic loop and accurately identify the type of each input signal. This step is crucial because the FCLock encryption technique is not limited to the non-combination logic loop circuit in the aforementioned example, and other types of circuits containing functional non-combination logic loops are also suitable for FCLock encryption. Since the state machine is the core of driving such circuits, detailed analysis of each input signal can help to divide the coding of the state machine into two sets {Sk} and {Sf}. This preliminary analysis provides the necessary data support and design basis for subsequent modification of the jump paths of the state machine.

[0151] In the premise that the state machine will eventually be re-encoded, the current stage does not need to deeply analyze whether Sk and Sf in the existing state machine jump graph meet the specific restriction rules. Instead, the direct analysis of the symbolization of each state and its jump path should be focused on, which will ensure that the state machine structure can be more flexible, effective, adjusted and optimized during the design process to adapt to the encryption needs of the FCLock encryption technology.

[0152] Continuing the foregoing strategy, for those states whose number of jump entries is greater than or equal to 2, taking the state copying method to maintain the invariance of the circuit function is an effective means. Through copying, a copy state with the same function as the original state can be generated. These copied copies will inherit all the jump exits of the original state, and each entry of the original state will be assigned to each copy to ensure that each copy has only one independent jump entry. In addition, since state copying is performed, there will be no direct jump relationship between the newly generated state copies, which meets the requirement that there should be no jump relationship between Sk states. This method not only maintains the original function of the circuit, but also meets the specific encryption needs by simplifying the structure of the state machine.

[0153] After each state copying, the number of copies obtained is divided by 2 and the integer part represents the number of states that can drive the functional non-combination logic loop circuit, and also equals the number of keys that can be inserted. Once the number of copied states reaches the required number of keys, the state copying operation will stop. Subsequently, the modified state jump graph will be re-encoded based on the {Sk} and {Sf} sets obtained through previous analysis. For a multi-bit state machine, its encoding needs to consider splitting some bits, regarding the bit subset as a small state machine, and starting the encoding operation from the small state machine. In summary, the state machine re-encoding strategy described in this section makes the FCLock encryption technology applicable to most circuits, thereby significantly improving its versatility. This strategy not only optimizes the encryption process, but also ensures the feasibility and effectiveness of the encryption solution in different circuit designs.

[0154] It can be understood that the present application is described through some embodiments, and those skilled in the art know that various changes or equivalent replacements can be made to these features and embodiments without departing from the spirit and scope of the present application. In addition, under the guidance of the present application, these features and embodiments can be modified to adapt to specific conditions and materials without departing from the spirit and scope of the present application. Therefore, the present application is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of the present application are within the scope of the present application.

Claims

1. A state machine re-encoding method for driving a non-combinational logic circuit, characterized by, Comprising the following steps: Step 1: State classification; based on whether the KEEP value depends on the previous state of the state machine to classify the encoding of the state machine; Step 2: State machine jump classification: According to the classification of state machine coding and the start and end state coding of state jump, the jump of state machine is subdivided into five types; The five types of jump types are internal jump, Sf to Sf jump, Sf to Sk jump, Sk to Sf jump, and Sk to Sk jump, The internal jump: In this type of jump, the coding of the start state and the end state remains unchanged; The Sf to Sf jump: The start state and the end state of this type of jump are both Sf; The Sf to Sk jump: This type of jump will cause the ring value in the non-combination logic ring in the Sf state to be latched to the Sk state; The Sk to Sf jump: In this type of jump, the end state is Sf; Step 3: State machine jump modification and recoding operation; Adjust the state machine so that the jump between states meets the requirements of the five types of jumps in step 2; Sf to Sk jump, for a state coded as Sk, only one jump entry is allowed; Sk to Sk jump, this type of jump is not allowed; To ensure that the state jump of the state machine after recoding meets the above restriction conditions, first of all, the jump structure of the state machine needs to be adjusted, which includes ensuring that multiple states of the state machine have only one entry jump, and then marking these states as Sk, and then recoding according to the specific coding requirements of Sk and Sf; When modifying the jump path of the state machine, the first task is to ensure that the functions of each state remain unchanged; Next, adjust the jump path itself; Given the two aforementioned limitations, state copying is an effective strategy, which generates a state copy with the same function as the original state; Then, limit the jump entry of the original state and its copy appropriately; Step 4: Process and summary.

2. The state machine recoding method of driving a non-combinational logic circuit according to claim 1, characterized by, The output signal of the circuit containing non-combinational logic loops in Step 1 is denoted by , and the logic function of the circuit is denoted by , then the encoding of the state machine is divided into the following two categories: (1) Sf (State free), free coding state, in this state, the ring value of the non-combination logic ring will not affect the output port, in this case, ， (2) Sk (State keep), keep state, in this state, the ring value of the non-combination logic ring will affect the output port of the circuit, in this case, 。 3. The state machine re-encoding method of driving a non-combinational logic circuit according to claim 1, wherein, Each type of step 2 has its requirements and constraints, and some jump types are not allowed: The internal jump is allowed in circuit design; The Sf to Sf jump: This type of state machine jump path is allowed; The Sf to Sk jump: The Sf to Sk jump must ensure that the jump entry is unique, and this type of jump is allowed; The Sk to Sf jump: In circuits containing non-combination logic rings, this type of jump is not only allowed, but also has no limit on the number of jumps; The Sk to Sk jump: In circuits containing non-combination logic rings, this type of jump is not allowed.

4. The state machine re-encoding method of claim 1, wherein, The classification of jumps between different states in step 2 and related restrictions are as follows: Internal jump: The start state is S0, the end state is S0, and it is allowed; Sf to Sk jump: The start state is S0, the end state is S1, and it is partially allowed 1; Sf to Sk jump: start state S0, end state S2, partially allowed 2; Sf to Sf jump: start state S0, end state S3, allowed; Sk to Sf jump: start state S1, end state S0, allowed; Sf to Sf jump: start state S0, end state S3, allowed; Internal jump: start state S1, end state S1, allowed; Sk to Sk jump: start state S1, end state S2, not allowed; Sk to Sf jump: start state S1, end state S3, allowed; Sk to Sf jump: start state S2, end state S0, allowed; Sk to Sk jump: start state S2, end state S1, not allowed; Internal jump: start state S2, end state S2, allowed; Sk to Sf jump: start state S2, end state S3, allowed; Sf to Sf jump: start state S3, end state S0, allowed; Sf to Sk jump: start state S3, end state S1, partially allowed 1; Sf to Sk jump: start state S3, end state S2, partially allowed 2; Internal jump: start state S3, end state S3, allowed; In the jump category marked as "partially allowed 1", only one of the two possible jumps is allowed to be implemented; Similarly, only one of the jumps is allowed to exist in the jump category marked as "partially allowed 2".

5. The state machine re-encoding method of claim 4, wherein, In step 2, for any circuit, the encoding category and state jump of its state machine comply with the restriction condition, and the state machine is used to drive the functional non-combination logic ring; For a state machine with multiple bits, a splitting strategy is adopted, and part of the bits is regarded as an independent 2-bit state machine for processing; thereafter, it is analyzed whether the encoding and jump of the 2-bit state machine comply with the requirements proposed previously.

6. The state machine re-encoding method of claim 4, wherein, The specific implementation method of step 3 is as follows: An original state machine includes a state Si and other parts, the state Si has three jump entries a, b, and c, and two jump exits d and e, if considering Si as a driving part of the non-combination logic ring, i.e., Sk state, but Si has three entries, which does not meet the requirement that Sk state has only one jump entry, therefore, the jump entries of Si need to be divided into three parts, According to the state machine recoding strategy, Si is copied first to form three copies Si0, Si1 and Si2, which are the same as the original Si state on the jump-out entry, i.e. they all have two exits d and e, and each inherits the entrances a, b and c of Si. In the new state machine design, these copies will replace the original Si state. If Si in the original state machine functions through path a, the corresponding path a in the new state machine will jump to state Si0. Si0, Si1 and Si2 have the same function as the original Si on the circuit. Through this state copying strategy, two of Si0, Si1 and Si2 are selected as Sk, and then the state machine is recoded according to the encoding requirements of Sk to ensure that the newly coded state machine can effectively drive the functional non-combination logic loop.

7. The state machine re-encoding method of claim 4, wherein, The step 4 comprises: The key of the state machine recoding strategy is to first analyze the circuit containing the non-combination logic loop and accurately identify the type of each input signal. Since the state machine is the core of driving such circuits, detailed analysis is required for each input signal. Before the state machine is finally recoded, the current stage does not need to deeply analyze whether Sk and Sf in the existing state machine jump graph meet the restriction rules, but focuses on the direct analysis of the symbolization of each state and its jump path. For states with a jump entry number greater than or equal to 2, the state copying method is adopted to maintain the invariance of the circuit function. Through copying, copy states with the same function as the original state are generated. These copied copies will inherit all the jump exits of the original state, and each entrance of the original state will be allocated to each copy to ensure that each copy has only one independent jump entrance. In addition, since state copying is performed, there will be no direct jump relationship between the newly generated state copies, which meets the requirement that there should be no jump relationship between Sk states. After each state copying, the number of copies obtained is divided by 2 and the integer part is obtained, which represents the number of states that can drive the functional non-combination logic loop circuit, and also equals the number of keys that can be inserted. Once the number of copied states reaches the required number of keys, the state copying operation will stop, and then the modified state jump graph will be recoded based on the {Sk} and {Sf} sets obtained through previous analysis. For a multi-bit state machine, its encoding needs to split part of the bits, regarding the bit subset as a small state machine, and starting from the small state machine to perform the encoding operation.

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