Method for defining abstract template in analog circuit design

Abstract

The invention discloses a method for defining an abstract template in an analog circuit design. The method comprises the following steps of: setting an abstract template definition rule; analyzing the example template file, wherein the types of the circuit components, the port information, the mapping relationship between the types of the components and the ports, and the connection relationship between the types of the components and the ports are defined in the template file; according to a set abstract template definition rule, checking the example template file, and analyzing a template conforming to the rule into an abstract template; analyzing the schematic diagram or the circuit topological diagram to obtain a corresponding chart; instantiating the abstract template according to the component type of a target circuit to obtain a plurality of instantiation combinations; judging whether the instantiated combination is legal or not according to a chart obtained by analyzing a schematic diagram or a circuit topological diagram; and matching the legal instantiation combination in the schematic diagram, and storing a matching result. The abstract template provided by the invention has the characteristic of being irrelevant to the process, and the reusability of the definition template is greatly improved.

Description

Technical Field

[0001] The present invention relates to the technical field of analog circuit EDA (electronic design automation), and in particular to a method for defining an abstract template in analog circuit design. Background Art

[0002] In the automated auxiliary design of analog circuits, a netlist structure is used to describe the connection of digital circuits. The netlist usually conveys information about circuit connections, such as instances of circuit modules, wire nets, and related properties. If more hardware information needs to be included, hardware description languages ​​such as Verilog, VHDL, or other special languages ​​are usually used for description, verification, and simulation. However, this template definition method using a netlist structure can only be effective in a specific process. When switching to another process, the netlist will become invalid. In other words, the circuit module definition under the netlist structure is not very versatile. If it is to be applied to multiple processes, a corresponding template must be defined for each process. Summary of the invention

[0003] In order to solve the defects of the prior art, the purpose of the present invention is to provide a method for defining an abstract template in analog circuit design, which can achieve the template definition of the circuit module being independent of the process and effectively improve the reusability of the defined template.

[0004] In order to achieve the above object, the present invention provides a method for defining an abstract template in analog circuit design, comprising:

[0005] Set abstract template definition rules;

[0006] Parsing an example template file, wherein the template file defines the type of circuit components, port information, a mapping relationship between the type of components and ports, and a connection relationship between the type of components and ports;

[0007] According to the set abstract template definition rules, the sample template file is checked, and the templates meeting the rules are parsed into abstract templates;

[0008] Analyze the schematic diagram or circuit topology diagram to obtain the corresponding chart;

[0009] According to the types of components of the target circuit, instantiate the abstract template to obtain multiple instantiation combinations;

[0010] Determining whether the instantiation combination is legal based on a diagram obtained by parsing the schematic diagram or the circuit topology diagram;

[0011] For legal instantiation combinations, match them in the schematic diagram and save the matching results.

[0012] Furthermore, the abstract template definition rule includes: a template definition start identifier, a template name, a mapping relationship definition start identifier, a mapping relationship definition end identifier, a connection relationship definition start identifier, and a connection relationship definition end identifier;

[0013] Between the mapping relationship definition start mark and the mapping relationship definition end mark, the mapping definition between the component type and the port is completed;

[0014] Between the connection relationship definition start identifier and the connection relationship definition end identifier, the connection definition between the component type and the port is completed.

[0015] Furthermore, the type of the component is identified by a character plus an integer suffix, and different types of components are distinguished by different integer suffixes;

[0016] The connection definition of the component type and the port, and the winding order thereof are mapped one-to-one with the port order of the component defined by the mapping definition of the component type and the port.

[0017] Furthermore, the step of instantiating the abstract template according to the component types of the target circuit to obtain multiple instantiation combinations further includes: when introducing a specific process, mapping each component symbol defined in the abstract template to any component in the target circuit, and obtaining multiple instantiation combinations of the abstract template in a permutation and combination manner.

[0018] Furthermore, the step of parsing the schematic diagram or circuit topology diagram further includes: using different process files to abstract the specific components in the schematic diagram or circuit topology diagram into vertices in the graph, and abstract the connection relationship between the components into the edges of the graph, to obtain a graph corresponding to the schematic diagram or circuit topology diagram.

[0019] Furthermore, the step of judging whether the instantiation combination is legal according to the graph obtained by parsing the schematic diagram or the circuit topology diagram further includes: after instantiating the abstract template, obtaining a first graph of the abstract template according to the instantiation combination; if any edge of the first graph cannot be found in the second graph obtained by parsing the schematic diagram or the circuit topology diagram, the instantiation of the abstract template is judged to be illegal; if and only if all edges in the first graph can be found in the second graph, the instantiation of the abstract template is judged to be legal.

[0020] To achieve the above objectives, the present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor is used to execute the computer program stored in the memory to implement the method for defining an abstract template in analog circuit design as described above.

[0021] To achieve the above objectives, the present invention also provides a computer-readable storage medium, in which a computer program is stored. The computer program is loaded and executed by a processor to implement the method for defining an abstract template in analog circuit design as described above.

[0022] Compared with the prior art, the method for defining an abstract template in analog circuit design provided by the present invention has the following advantages:

[0023] Beneficial effects:

[0024] Abstract characters are used to represent the categories of circuit components in a specific process. The categories of components and the connection relationships between components are defined through abstract modules, and an abstract template of the circuit module is obtained. This template is independent of the process, overcomes the drawbacks and shortcomings of traditional definitions, and greatly improves the reusability of the definition template.

[0025] Other features and advantages of the present invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0027] Figure 1 A flow chart of a method for defining an abstract template in analog circuit design according to an embodiment of the present invention;

[0028] Figure 2 This is a schematic diagram showing the effect of parsing a principle diagram into a Graph according to an embodiment of the present invention;

[0029] Figure 3 A schematic diagram of an abstract template instantiation according to an embodiment of the present invention;

[0030] Figure 4 A schematic diagram of a template matching result according to an embodiment of the present invention;

[0031] Figure 5 A highlighted image of the template matching result in the process according to an embodiment of the present invention;

[0032] Figure 6 FIG. 1 is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0033] The preferred embodiments of the present invention are described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described herein are only used to illustrate and explain the present invention, and are not used to limit the present invention.

[0034] Embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be construed as being limited to the embodiments described herein, which are instead provided for a more thorough and complete understanding of the present invention. It should be understood that the drawings and embodiments of the present invention are only for exemplary purposes and are not intended to limit the scope of protection of the present invention.

[0035] The term "including" and its variations used herein are open inclusions, i.e., "including but not limited to". The term "based on" means "based at least in part on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". The relevant definitions of other terms will be given in the following description.

[0036] It should be noted that the concepts such as “first” and “second” mentioned in the present invention are only used to distinguish different data or units, and are not used to limit the order or interdependence of these data or units.

[0037] It should be noted that the modifications of "one" and "plurality" mentioned in the present invention are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, it should be understood as "one or more". "Plurality" should be understood as two or more.

[0038] Figure 1 The flowchart of the method for defining an abstract template in analog circuit design according to an embodiment of the present invention is as follows. Figure 1 The specific embodiments of the present invention are described in detail.

[0039] In step 101, the sample template file is parsed. The sample template file defines the connection relationship of the components in the abstracted circuit schematic diagram, and the main contents include the template name (name: circuit mirror), the mapping relationship definition between the template component type and the port name (such as type0: D, G, S, B), the connection relationship definition between the template component type and the net (winding) name connected to the port (such as type0: net0, net0, net1, net3), etc.

[0040] In the embodiment of the present invention, the example template is as follows:

[0041] template (template definition start mark)

[0042] name:circuit mirror (template naming)

[0043] term (the mapping relationship definition starts with the identifier)

[0044] type0:D,G,S,B (device type and port mapping definition)

[0045] / term (end mark of mapping relationship definition)

[0046] model (connection relationship definition start identifier)

[0047] type0:net0,net0,net1,net3 (connection definition between the first device and the winding)

[0048] type0:net0,net0,net4,net3 (connection definition between the second device and the winding)

[0049] / model (end mark of connection relationship definition)

[0050] / template (template definition end mark)

[0051] The definition of the above sample template ensures that the start and end of each part of the template definition can be correctly identified. The purpose of the template is to define the connection relationship of circuit components. The first is the port information of the circuit components. For example, NMOS and PMOS usually have 4 ports, and the port names are D, G, S, and B respectively; the second is to define the connection relationship of the circuit components. The circuit components are connected through nets. The model... / model module in the template is used to define the connection relationship of the components. The type of the component is identified by a character (such as type) plus an integer suffix. Different types of components are distinguished by different integer suffixes; the net order defined in the model (connection relationship definition) is mapped one by one with the component port order defined in the term (mapping relationship definition).

[0052] The naming of components is inconsistent in different processes. For example, for NMOS, its naming is different in different processes, which can be nod33ll_ckt (40 process) or nmos (18 process). This is also the problem that the existing conventional template definition is not universal. In the present invention, the categories of circuit components are defined as type0, type1, type2, etc. that are independent of the process, which can effectively avoid the problem of template and process binding.

[0053] In step 102, the validity of the example template is checked. According to the set abstract template definition rules, it is checked whether the definition of the example template meets the set format requirements.

[0054] In an embodiment of the present invention, the abstract template definition rule includes: a template definition start identifier, a template name, a mapping relationship definition start identifier, a mapping relationship definition end identifier, a connection relationship definition start identifier, and a connection relationship definition end identifier; between the mapping relationship definition start identifier and the mapping relationship definition end identifier, a mapping definition of the component type and the port is performed; between the connection relationship definition start identifier and the connection relationship definition end identifier, a connection definition of the component type and the port is performed. For example, the first line in the above example template definition is template, and the end of the example template needs to have an end identifier / template, the content between template and / template is the defined template data, term and / term are the beginning and end of the mapping relationship definition, and model and / model are the beginning and end of the connection relationship definition.

[0055] In step 103, the template is parsed into an abstract template. For the template structure defined in the legal example template file, the template data is read into the memory.

[0056] At step 104, the schematic diagram is parsed.

[0057] In the embodiment of the present invention, Schematic 1 (principle) is analyzed Figure 1 ), Parsing Schematic2 (Principle Figure 2 ) uses different process files (PDK1, PDK2) to abstract the specific components in the schematic (schematic diagram or circuit topology diagram) into vertices in the Graph (graph), and the connection relationship between the components into the edges of the Graph, thereby abstracting the schematic into a Graph.

[0058] PDK (process file), the full name of which is Process Design Kit, is translated as process design kit or process design kit. Specifically, PDK is a set of files that describe the details of semiconductor processes for use by chip design EDA tools.

[0059] Graph is an abstract data structure, which is a collection of a series of vertices and edges, where vertices are represented by circles and edges are lines connecting these circles. In the embodiment of the present invention, edges have no direction.

[0060] Figure 2 Schematic diagram of the effect of parsing a schematic diagram into a Graph according to an embodiment of the present invention, wherein (a) is a circuit topology diagram, and (b) is a Graph corresponding to the circuit topology. Figure 2As shown in the figure, the data of the vertices of the Graph are displayed in the form of N:M, where the integer N is the number of the vertex, representing a number of the vertex, which is equivalent to the serial number after the vertices are sorted according to certain rules. The colon between N and M has no actual meaning and is only used as a separator in the schematic diagram; the integer M represents the type of the vertex, which is used to determine whether two vertices are the same in the subsequent algorithm process; the data on the edge of the Graph is the integer Q, which represents the type of the edge. If the types of two edges are different, then Q is also different. The integer Q is used to determine whether two edges are the same in the subsequent algorithm.

[0061] In step 105, the abstract template is instantiated. The abstract template cannot be used directly, for example, the template in C++ programming has no practical meaning before being instantiated, so the abstract template needs to be instantiated in the specific process.

[0062] In an embodiment of the present invention, in the template data read into the memory, the specific type of the component is anonymous, similar to type0 in the above definition. When brought into a specific process, type0 can be any cell type in the schematic, that is, it can be replaced by NMOS or PMOS, so the essence of instantiation is to map the abstract vertices to the specific component types in the target schematic.

[0063] Figure 3 FIG. 4 is a schematic diagram of an abstract template instantiation according to an embodiment of the present invention. Figure 3 As shown, the vertex list of the abstract template is ["type0", "type0", "type1"]. There are three types of components in the Target circuit: a, b, and c. According to the characteristics of the abstract template definition, the component types corresponding to type0 and type1 defined by the abstract template include: type0→a, type1→b; type0→b, type1→a; type0→a, type1→c; type0→c, type1→a; type0→b, type1→c; type0→c, type1→b. Then there are 6 instantiation combinations of the abstract template, and the 6 instantiation vertex lists are obtained [a,a,b], [b,b,a], [a,a,c], [c,c,a], [b,b,c], [c,c,b].

[0064] In step 106, it is determined whether the instantiation combination is legal. After the abstract template is instantiated, the Graph (A) of the abstract template is obtained. For example, the abstract template defines the connection of two components. The symbols of these two components in the abstract template are type1, type2, and the connection relationship between type1 and type2. After the specific process is introduced, we need to map the real device names in the actual circuit to the template in the form of permutations and combinations. Assuming that there are three devices named mos1, mos2, and mos3 in the actual circuit, after being introduced into the above-mentioned abstract template, three actual connection relationships (mos1, mos2), (mos1, mos3), and (mos2, mos3) will be formed, that is, three Graphs (A). If any edge of Graph (A) cannot be found in Graph (B) obtained by parsing the schematic, the instantiation of the abstract template is judged to be illegal; if and only if all edges in the template Graph (A) can be found in Graph (B) parsing the schematic, the instantiation of the abstract template is judged to be legal.

[0065] In an embodiment of the present invention, the instantiation method is used to make the abstract template have a specific meaning. There may be many types after instantiation, but an effective pruning strategy can be used to make the number of possible instantiation combination results within an acceptable range. For example, after the abstract template is instantiated, a graph of multiple instantiated templates formed by the arrangement and combination of vertices is pruned by determining the existence of the edges of the graph in advance, and the removed parts do not need to continue the subsequent algorithm process, thereby saving performance and improving the overall efficiency of the algorithm. After the abstract template is instantiated in combination with a specific process, the effect of being independent of the process when defining the template is achieved.

[0066] In step 107, for legal instantiation combinations, templates are matched in the schematic diagram and matching results are saved.

[0067] The method for defining an abstract template in analog circuit design provided by the present invention has the characteristic of being independent of the process compared with the traditional definition of circuit connection relationship, overcomes the disadvantages and shortcomings of the traditional definition, effectively solves the problem that the template definition in the existing method is not universal, and greatly improves the reusability of the defined template.

[0068] Abstract characters are used in the present invention to represent the categories of circuit components in a specific process. Type0, type1, type2, etc. are used in this article. This is merely an example. If other non-process device names are used, they are also within the scope of protection of the present invention.

[0069] The implementation effect of the present invention is demonstrated below through a specific example.

[0070] First, the following abstract template is defined:

[0071] template

[0072] name:Differential Pair

[0073] term

[0074] type0:D,G,S,B

[0075] / term

[0076] model

[0077] type0:ni1,ni1,net1,ni1

[0078] type0:ni1,ni1,net1,ni1

[0079] / model

[0080] / template

[0081] In the above definition, when the name of the net is nil, it means that when comparing the connection relationship between components, it is necessary to ignore the connection of this port, because sometimes the type we need to match refers to components with partially identical connections.

[0082] refer to Figure 1 , click the corresponding function menu in the auxiliary design tool to start the template matching process, and the program automatically outputs the matching results in the Schematic (schematic diagram) as follows Figure 4 As shown, (c) is the matching result in process 1, (d) is the matching result in process 2, Schematic Analysis, Match Result, the template match named "Differential Pair" (Default0) in the example matches M0 and M2 in process 1, and PM20 and PM21 in process 2. Select the matching result to highlight the matching result in the Schematic, such as Figure 5 As shown, (e) is the highlighted mark image selected in process 1, and (f) is the highlighted mark image selected in process 2.

[0083] In an embodiment of the present invention, an electronic device is also provided. Figure 6 Schematic diagram of the structure of an electronic device according to an embodiment of the present invention. Figure 6 As shown, the electronic device of the present invention includes a processor 601 and a memory 602, wherein:

[0084] The memory 602 stores a computer program. When the computer program is read and executed by the processor 601 , the computer program executes the steps in the above-mentioned method embodiment for defining an abstract template in analog circuit design.

[0085] In an embodiment of the present invention, a computer-readable storage medium is further provided, in which a computer program is stored, wherein the computer program is configured to execute the steps in the method embodiment for defining an abstract template in analog circuit design as described above when running.

[0086] In this embodiment, the above-mentioned computer-readable storage medium may include but is not limited to: a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and other media that can store computer programs.

[0087] Those skilled in the art can understand that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention is described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions recorded in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for defining an abstract template in analog circuit design, characterized in that: The following steps are involved: Set abstract template definition rules; Parsing an example template file, wherein the template file defines the type of circuit components, port information, a mapping relationship between the type of components and ports, and a connection relationship between the type of components and ports; According to the set abstract template definition rules, the sample template file is checked, and the templates meeting the rules are parsed into abstract templates; Analyze the schematic diagram or circuit topology diagram to obtain the corresponding chart; According to the types of components of the target circuit, instantiate the abstract template to obtain multiple instantiation combinations; Determining whether the instantiation combination is legal based on a diagram obtained by parsing the schematic diagram or the circuit topology diagram; For legal instantiation combinations, match them in the schematic diagram and save the matching results.

2. The method for defining an abstract template in analog circuit design according to claim 1, characterized in that: The abstract template definition rules include: a template definition start identifier, a template name, a mapping relationship definition start identifier, a mapping relationship definition end identifier, a connection relationship definition start identifier, and a connection relationship definition end identifier; Between the mapping relationship definition start mark and the mapping relationship definition end mark, the mapping definition between the component type and the port is completed; Between the connection relationship definition start identifier and the connection relationship definition end identifier, the connection definition between the component type and the port is completed.

3. The method for defining an abstract template in analog circuit design according to claim 2, characterized in that: The type of the component is identified by a character plus an integer suffix, and different types of components are distinguished by different integer suffixes; The connection definition of the component type and the port, and the winding order thereof are mapped one-to-one with the port order of the component defined by the mapping definition of the component type and the port.

4. The method for defining an abstract template in analog circuit design according to claim 1, characterized in that: The step of instantiating the abstract template according to the component types of the target circuit to obtain multiple instantiation combinations further includes: when introducing a specific process, mapping each component symbol defined in the abstract template to any component in the target circuit, and obtaining multiple instantiation combinations of the abstract template in a permutation and combination manner.

5. The method for defining an abstract template in analog circuit design according to claim 1, characterized in that: The step of parsing the schematic diagram or circuit topology diagram further includes: using different process files to abstract the specific components in the schematic diagram or circuit topology diagram into vertices in the graph, and abstract the connection relationship between the components into edges of the graph, to obtain a graph corresponding to the schematic diagram or circuit topology diagram.

6. The method for defining an abstract template in analog circuit design according to claim 1, characterized in that: The step of judging whether the instantiation combination is legal according to the graph obtained by parsing the schematic diagram or the circuit topology diagram further comprises: after instantiating the abstract template, obtaining a first graph of the abstract template according to the instantiation combination; if any edge of the first graph cannot be found in the second graph obtained by parsing the schematic diagram or the circuit topology diagram, then judging that the instantiation of the abstract template is illegal; if and only if all edges in the first graph can be found in the second graph, then judging that the instantiation of the abstract template is legal.

7. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: The processor is used to execute the computer program stored in the memory to implement the method for defining an abstract template in analog circuit design as described in any one of claims 1-6.

8. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, which is loaded and executed by a processor to implement the method for defining an abstract template in analog circuit design as described in any one of claims 1 to 6.

Images