Quantum circuit synthesis method and related device

Abstract

The invention discloses a quantum circuit synthesis method and a related device, and belongs to the technical field of quantum computing, and the method comprises the steps: determining a target quantum circuit template from a quantum circuit template library based on a target unitary matrix; the target unitary matrix is input into a trained first prediction model, initial values of adjustable parameters of the target quantum circuit template are obtained through prediction, the first prediction model is obtained through training by taking fidelity maximization between an output unitary matrix and an input unitary matrix as a target, and the initial values of the adjustable parameters of the target quantum circuit template are obtained through prediction. The output unitary matrix is obtained by reconstructing the input unitary matrix; on the basis of the predicted initial value, optimizing an adjustable parameter in the target quantum circuit template; and when the fidelity between the unitary matrix corresponding to the newest adjustable parameter and the target unitary matrix meets a convergence condition, taking the target quantum circuit template corresponding to the newest adjustable parameter as a synthesized quantum circuit. By applying the embodiment of the invention, the synthesis efficiency of the quantum circuit can be improved.

Description

Technical Field

[0001] The present application belongs to the field of quantum computing technology, and in particular to a quantum circuit synthesis method and related devices. Background Art

[0002] Quantum circuit compilation is a key step in the current quantum computing workflow, which aims to adapt a given quantum circuit to the instruction set supported by a specific quantum device. Modern quantum circuit compilers include multiple processing steps dedicated to different tasks, adapting the hardware with as few gate operations and circuit depth as possible, thereby reducing the impact of quantum hardware noise on the calculation.

[0003] Quantum circuit synthesis is a basic task in most compilers. Its goal is to find a sequence of quantum logic gates in the hardware instruction set that can realize a target unitary matrix given a target unitary matrix. In the process of finding quantum logic gates, an approximate method based on a given circuit template is usually used. Specifically, a circuit template composed of fixed quantum logic gates is used, in which quantum logic gates with adjustable parameters are used. Based on randomly generated parameter values, the adjustable parameters of each quantum logic gate in the circuit template are optimized to maximize the fidelity between the generated circuit and the target unitary matrix. As the number of quantum bits increases, the process of optimizing the adjustable parameters of each quantum logic gate is time-consuming and converges slowly, which leads to low quantum circuit compilation efficiency. Summary of the invention

[0004] The purpose of this application is to provide a quantum circuit synthesis method and related devices, aiming to improve the compilation efficiency of quantum circuits.

[0005] An embodiment of the present application provides a quantum circuit synthesis method, the method comprising:

[0006] Based on the target unitary matrix, determining a target quantum circuit template from a quantum circuit template library, wherein each quantum circuit template in the quantum circuit template library carries at least one adjustable parameter;

[0007] Inputting the target unitary matrix into a trained first prediction model to predict the initial value of the adjustable parameter of the target quantum circuit template, wherein the first prediction model is trained with the goal of maximizing the fidelity between the output unitary matrix and the input unitary matrix, and the output unitary matrix is ​​obtained by reconstructing the input unitary matrix;

[0008] Based on the predicted initial values, optimizing the adjustable parameters in the target quantum circuit template;

[0009] When the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix meets the convergence condition, the target quantum circuit template corresponding to the latest adjustable parameter is used as the synthesized quantum circuit.

[0010] Optionally, determining a target quantum circuit template from a quantum circuit template library based on a target unitary matrix includes:

[0011] Inputting the target unitary matrix into the trained second prediction model to obtain a set of selectable quantum circuit templates and the probability corresponding to each quantum circuit template, wherein the second prediction model is trained by performing probability prediction on the input unitary matrix with the goal of minimizing the cross entropy loss function between the predicted probability and the pre-annotated actual probability;

[0012] Based on the obtained probabilities, the quantum circuit template corresponding to the maximum probability is selected as the target quantum circuit template.

[0013] Optionally, the training process of the second prediction model includes:

[0014] Fill in the parameter values ​​of the adjustable parameters of each quantum circuit template in the quantum circuit template library to obtain the corresponding unitary matrix to construct a training data set;

[0015] Inputting each training data of the training data set into a pre-built second prediction model to obtain a prediction probability corresponding to each training data;

[0016] The model parameters of the second prediction model are adjusted with the goal of minimizing the cross entropy loss function between the predicted probability and the actual probability pre-labeled for the training data.

[0017] Optionally, the second prediction model is a machine learning model.

[0018] Optionally, the second prediction model is a multi-layer fully connected neural network.

[0019] Optionally, when the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix cannot converge, the method further includes:

[0020] From the quantum circuit template library, a quantum circuit template with a probability second only to the current target quantum circuit template is determined as a new target quantum circuit template, and the step of predicting the initial values ​​of the adjustable parameters of the target quantum circuit template through the target unitary matrix is ​​returned to be executed.

[0021] Optionally, the first prediction model is a machine learning model with the same input and learning objective.

[0022] Optionally, the model parameters of the first prediction model are plural numbers.

[0023] Optionally, the first prediction model is an autoencoder.

[0024] Another embodiment of the present application provides a quantum circuit synthesis device, the device comprising:

[0025] A first determination module is used to determine a target quantum circuit template from a quantum circuit template library based on a target unitary matrix, wherein each quantum circuit template in the quantum circuit template library carries at least one adjustable parameter;

[0026] A prediction module, used for inputting the target unitary matrix into a trained first prediction model to predict the initial value of the adjustable parameter of the target quantum circuit template, wherein the first prediction model is trained with the goal of maximizing the fidelity between the output unitary matrix and the input unitary matrix, and the output unitary matrix is ​​obtained by reconstructing the input unitary matrix;

[0027] An optimization module, used for optimizing the adjustable parameters in the target quantum circuit template based on the predicted initial values;

[0028] The second determination module is used to use the target quantum circuit template corresponding to the latest adjustable parameter as the synthesized quantum circuit when the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix meets the convergence condition.

[0029] Yet another embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, any of the above methods is implemented.

[0030] Yet another embodiment of the present application provides a computer device, the computer device comprising a memory and a processor, the memory storing a computer program, and the processor implementing any one of the above methods when executing the computer program.

[0031] Compared with the prior art, the present application provides a quantum circuit synthesis method, which can first determine the target quantum circuit template from the quantum circuit template library based on the target unitary matrix; then input the target unitary matrix into the trained first prediction model to predict the initial values ​​of the adjustable parameters of the target quantum circuit template; then optimize the adjustable parameters in the target quantum circuit template based on the predicted initial values; finally, when the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix meets the convergence condition, the target quantum circuit template corresponding to the latest adjustable parameter is used as the synthesized quantum circuit. Compared with the initial values ​​or empirical values ​​of the adjustable parameters randomly generated in the prior art, the initial values ​​obtained by the present application based on the target unitary matrix using the prediction model are more reasonably set, reducing the number of parameter optimizations, especially with the increase in the number of quantum bits, reducing the number of optimizations, thereby reducing the optimization time, thereby improving the compilation efficiency of the quantum circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A network block diagram of a quantum circuit synthesis system provided in an embodiment of the present application;

[0033] Figure 2 A flowchart of a quantum circuit synthesis method provided in an embodiment of the present application;

[0034] Figure 3 A structural diagram of a quantum circuit synthesis device provided in an embodiment of the present application;

[0035] Figure 4 A schematic diagram of the structure of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0036] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and should not be construed as limiting the present application.

[0037] Figure 1 1 is a network block diagram of a quantum circuit synthesis system provided by an embodiment of the present application. The quantum circuit synthesis system may include a network 110, a server 120, a wireless device 130, a client 140, a storage 150, a classical computing unit 160, a quantum computing unit 170, and may also include additional memories, classical processors, quantum processors, and other devices not shown.

[0038] The network 110 is a medium for providing communication links between various devices and computers connected together in the quantum circuit synthesis system, including but not limited to the Internet, corporate intranets, local area networks, mobile communication networks and combinations thereof. The connection method may be wired, wireless communication links or optical fiber cables, etc.

[0039] The server 120, the wireless device 130 and the client 140 are conventional data processing systems, which may contain data and applications or software tools for performing conventional computing processes. The client 140 may be a personal computer or a network computer, so the data may also be provided by the server 120. The wireless device 130 may be a smart phone, a tablet, a laptop, a smart wearable device, etc. The storage unit 150 may include a database 151, which may be configured to store data such as quantum bit parameters, quantum logic gate parameters, quantum circuits, quantum programs, etc.

[0040] The classical computing unit 160 (quantum computing unit 170) may include a classical processor 161 (quantum processor 171) for processing classical data (quantum data) and a memory 162 (memory 172) for storing classical data (quantum data). The classical data (quantum data) may be a boot file, an operating system image, and an application 163 (application 173). The application 163 (application 173) may be used to implement a quantum algorithm compiled according to the quantum circuit synthesis method provided in an embodiment of the present application.

[0041] Any data or information stored or generated in the classical computing unit 160 (quantum computing unit 170) can also be configured to be stored or generated in another classical (quantum) processing system in a similar manner, and any application program executed by it can also be configured to be executed in another classical (quantum) processing system in a similar manner.

[0042] It should be noted that a true quantum computer is a hybrid structure, which includes at least Figure 1 There are two major parts in it: the classical computing unit 160, which is responsible for performing classical computing and control; the quantum computing unit 170, which is responsible for running quantum programs and thus realizing quantum computing.

[0043] The classical computing unit 160 and the quantum computing unit 170 may be integrated into one device or distributed in two different devices. For example, the first device including the classical computing unit 160 runs a classical computer operating system, on which quantum application development tools and services are provided, as well as storage and network services required for quantum applications. Users develop quantum programs through the quantum application development tools and services thereon, and send quantum programs to the second device including the quantum computing unit 170 through the network services thereon. The second device runs a quantum computer operating system, and the code of the quantum program is parsed and compiled into instructions that can be recognized and executed by the quantum processor 170 through the quantum computer operating system. The quantum processor 170 implements the quantum algorithm corresponding to the quantum program according to the instructions.

[0044] The computing unit of the classic processor 161 in the classic computing unit 160 is a CMOS tube based on a silicon chip. This computing unit is not limited by time and coherence, that is, this computing unit is not limited by the length of use and can be used at any time. In addition, in the silicon chip, the number of such computing units is also sufficient. At present, the number of computing units in a classic processor 161 is tens of thousands. The number of computing units is sufficient and the computing logic that can be selected by the CMOS tube is fixed, such as: AND logic. When calculating with the help of CMOS tubes, a large number of CMOS tubes are combined with limited logic functions to achieve the calculation effect.

[0045] The basic computing unit of the quantum processor 171 in the quantum computing unit 170 is a quantum bit. The input of the quantum bit is limited by coherence and coherence time, that is, the quantum bit is limited by the duration of use and is not available at any time. Making full use of the quantum bit within the available duration of use of the quantum bit is a key problem in quantum computing. In addition, the number of quantum bits in a quantum computer is one of the representative indicators of the performance of the quantum computer. Each quantum bit realizes the computing function through the logical function configured on demand. In view of the limited number of quantum bits, the logical functions in the field of quantum computing are diverse, such as: Hadamard gate (Hadamard gate, H gate), Pauli-X gate (X gate), Pauli-Y gate (Y gate), Pauli-Z gate (Z gate), X gate, RY gate, RZ gate, CNOT gate, CR gate, iSWAP gate, Toffoli gate, etc. In quantum computing, it is necessary to use limited quantum bits combined with a variety of logical function combinations to achieve the computing effect.

[0046] Based on these differences, the design of CMOS tubes by classical logic functions and the design of quantum bits by quantum logic functions are significantly and essentially different. The design of CMOS tubes by classical logic functions does not need to consider the individuality of CMOS tubes. For example, the representation of CMOS tubes in silicon chips is the individual identification, position, and usable life of each CMOS tube. Therefore, the classical algorithm composed of classical logic functions only expresses the operational relationship of the algorithm, but does not express the algorithm's dependence on individual CMOS tubes.

[0047] When quantum logic functions act on qubits, the individuality of qubits needs to be considered, such as the individual identification of the qubit in the quantum chip, its position, its relationship with surrounding qubits, and the usable time of each qubit. Therefore, the quantum algorithm composed of quantum logic functions not only expresses the computational relationship of the algorithm, but also expresses the algorithm's dependence on individual qubits.

[0048] Quantum chips can include quantum bits and channels for regulating quantum bits. Quantum logic gates are implemented through analog signals. Different combinations of analog signals are applied to quantum bits through channels for regulating quantum bits, thereby realizing quantum circuits with different functions and completing data processing. Therefore, the design of quantum logic functions acting on quantum bits (including the design of whether quantum bits are used or not and the design of the efficiency of each quantum bit) is the key to improving the computing performance of quantum computers, and special designs are required. This is also the uniqueness of quantum algorithms based on quantum logic functions, which is essentially and significantly different from classical algorithms based on classical logic functions. The above-mentioned design for quantum bits is a technical issue that ordinary computing devices do not need to consider or face.

[0049] See also Figure 2 , Figure 2 A quantum circuit synthesis method provided in an embodiment of the present application comprises the following steps:

[0050] S201: Based on a target unitary matrix, determine a target quantum circuit template from a quantum circuit template library, wherein each quantum circuit template in the quantum circuit template library carries at least one adjustable parameter.

[0051] For a given target unitary matrix, the quantum circuit template closest to the target unitary matrix is ​​found from the quantum circuit template library as the target quantum circuit template. There are many ways to determine the target quantum circuit template. The fidelity between the unitary matrix corresponding to each quantum circuit template and the target unitary matrix can be calculated, and the quantum circuit template with the largest fidelity can be used as the target quantum circuit template; the target unitary matrix can also be input into a trained model, and the output of the model can be used to determine the target quantum circuit template. Other methods used in quantum circuit approximate synthesis can also be used, which will not be described one by one here.

[0052] It should be noted that the order of the target unitary matrix is ​​the same as the order of the unitary matrix corresponding to the quantum circuit template, and the number of quantum bits of the quantum circuit template in the quantum circuit template library is the same. Different quantum circuit template libraries correspond to target unitary matrices of different orders, and the quantum circuit template structure quantum bit numbers in the quantum circuit template library corresponding to target unitary matrices of the same type but different orders are different, but the circuit structure can be the same. The quantum circuit template library corresponding to each target unitary matrix can be predetermined, or after obtaining the target unitary matrix, the quantum circuit template corresponding to the order of the target unitary matrix can be selected from the quantum circuit template set to form a quantum circuit template library.

[0053] S202: Input the target unitary matrix into a trained first prediction model to predict initial values ​​of adjustable parameters of the target quantum circuit template, wherein the first prediction model is trained with the goal of maximizing the fidelity between the output unitary matrix and the input unitary matrix, and the output unitary matrix is ​​reconstructed from the input unitary matrix.

[0054] The first prediction model is a prediction model that can realize unitary matrix reconstruction, and can be a prediction model with the same input and learning target. The target unitary matrix is ​​input into the trained first prediction model to obtain the initial values ​​of each adjustable parameter in the target quantum circuit template. In some embodiments of the present application, during the training phase, the first prediction model is divided into two parts, one is a prediction part and the other is a reconstruction part. When the model is trained for prediction, the first prediction model does not include the reconstruction part, and the reconstruction part is used to detect the prediction result.

[0055] As an implementation method of an embodiment of the present application, the first prediction model is a machine learning model with the same input and learning objectives.

[0056] First, the consistency between the input and learning objectives of the prediction model can ensure that the model focuses on the most important features and patterns, thereby improving prediction accuracy. At the same time, the complexity of the model design process is reduced because there is no need to additionally process and transform the data to match different objectives. When the input data corresponds directly to the learning objective, the model can learn faster and improve training efficiency because each step in the training process moves directly towards the optimization goal. The model can more accurately capture the inherent laws in the data during the training process, so that it can perform well on new and unseen data, thus having better generalization ability. When the input and learning objectives of the model correspond closely, because the model is not guided to learn complex patterns that are irrelevant to the goal, the risk of the model overfitting the training data can be reduced.

[0057] As an implementation manner of an embodiment of the present application, the model parameters of the first prediction model are complex numbers.

[0058] The first prediction model uses complex parameters so that complex values ​​are directly input and output, which can better represent the complex-valued nature of the unitary matrix.

[0059] As an implementation manner of an embodiment of the present application, the first prediction model is an autoencoder.

[0060] Autoencoder is a neural network model for unsupervised learning. It achieves data compression and reconstruction by learning the low-dimensional representation of input data. Autoencoder consists of two parts: encoder and decoder. The encoder is responsible for mapping the input data to a low-dimensional latent space, which can be a fully connected layer, while the decoder attempts to reconstruct the original data from the latent space. Autoencoders do not require labeled training data, can automatically learn features from unlabeled data, and can also perform nonlinear transformation of features through multi-layer nonlinear activation functions to capture more complex data structures; in addition, the structure of encoders and decoders can be flexibly designed, including the number of neurons, number of layers, activation functions, etc. Autoencoders extract useful information from a large amount of unlabeled data through unsupervised learning, making autoencoders have strong generalization capabilities. The data compression and decompression functions implemented by autoencoders help reduce the cost of data storage and transmission and improve data transmission efficiency.

[0061] S203: Based on the predicted initial values, optimizing the adjustable parameters in the target quantum circuit template.

[0062] The initial value of the adjustable parameter of the target quantum circuit template is the predicted initial value. When optimizing the adjustable parameter, it is adjusted based on the predicted initial value. The gradient descent method can be used in the optimization process, with the fidelity between the generated quantum circuit and the target unitary matrix as the optimization target. Specifically, the gradient of the adjustable parameter relative to the fidelity can be calculated using automatic differentiation technology, and the parameter value of the adjustable parameter is iteratively updated according to the gradient information until a satisfactory fidelity is achieved.

[0063] S204: When the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix meets the convergence condition, the target quantum circuit template corresponding to the latest adjustable parameter is used as the synthesized quantum circuit.

[0064] In the embodiment of the present application, the convergence condition can be that the fidelity is maximum, or that the difference between the two fidelities is within a preset range, or that the fidelity is within a range set for the fidelity, and of course, other conditions for determining whether the optimization converges based on the fidelity can also be used. When the fidelity meets the convergence condition, it means that the fidelity has reached a satisfactory fidelity, and the optimization is terminated at this time to obtain a synthesized quantum circuit.

[0065] This application first determines the target quantum circuit template from the quantum circuit template library based on the target unitary matrix; then inputs the target unitary matrix into the trained first prediction model to predict the initial values ​​of the adjustable parameters of the target quantum circuit template; then optimizes the adjustable parameters in the target quantum circuit template based on the predicted initial values; finally, when the fidelity between the unitary matrix corresponding to the latest adjustable parameters and the target unitary matrix meets the convergence condition, the target quantum circuit template corresponding to the latest adjustable parameters is used as the synthesized quantum circuit. Compared with the initial values ​​or empirical values ​​of the adjustable parameters randomly generated in the prior art, the initial values ​​obtained by this application based on the target unitary matrix using the prediction model are more reasonably set, reducing the number of parameter optimizations, especially with the increase in the number of quantum bits, reducing the number of optimizations, thereby reducing the optimization time, thereby improving the compilation efficiency of quantum circuits.

[0066] As an implementation manner of an embodiment of the present application, determining a target quantum circuit template from a quantum circuit template library based on a target unitary matrix may include:

[0067] Inputting the target unitary matrix into the trained second prediction model to obtain a set of selectable quantum circuit templates and the probability corresponding to each quantum circuit template, wherein the second prediction model is trained by performing probability prediction on the input unitary matrix with the goal of minimizing the cross entropy loss function between the predicted probability and the pre-annotated actual probability;

[0068] Based on the obtained probabilities, the quantum circuit template corresponding to the maximum probability is selected as the target quantum circuit template.

[0069] Using the target unitary matrix for the target quantum circuit template can further accelerate the speed of quantum circuit synthesis, thereby further improving the efficiency of quantum circuit compilation. The actual output of the second prediction model can be a set of probability distributions, in which each probability corresponds to a quantum circuit template, that is, the quantum circuit template and its corresponding probability can be finally obtained. Exemplarily, the output is {0.5, 0.3, 0, 0, 0.2}, then the probability corresponding to quantum circuit template 1 is 0.5, the probability corresponding to quantum circuit template 2 is 0.3, the probability corresponding to quantum circuit template 3 is 0, the probability corresponding to quantum circuit template 4 is 0, and the probability corresponding to quantum circuit template 5 is 0.2. At this time, quantum circuit template 1 is selected as the target quantum circuit template. In some embodiments, the second prediction model can be a machine learning model. Specifically, the second prediction model can be a classical machine learning model, a quantum machine learning model, or a classical quantum hybrid machine learning model. Similarly, the first prediction model can be a classical machine learning model, a quantum machine learning model, or a classical quantum hybrid machine learning model.

[0070] As an implementation manner of the embodiment of the present application, the training process of the second prediction model includes:

[0071] Fill in the parameter values ​​of the adjustable parameters of each quantum circuit template in the quantum circuit template library to obtain the corresponding unitary matrix to construct a training data set;

[0072] Inputting each training data of the training data set into a pre-built second prediction model to obtain a prediction probability corresponding to each training data;

[0073] The model parameters of the second prediction model are adjusted with the goal of minimizing the cross entropy loss function between the predicted probability and the actual probability pre-labeled for the training data.

[0074] In the embodiment of the present application, the parameter values ​​filled in the quantum circuit template can be randomly generated or obtained by other means. For different quantum circuit templates, the same parameter values ​​can be filled in or different parameter values ​​can be filled in. For the same quantum circuit template, multiple sets of data can be filled in to obtain multiple sets of unitary matrices. The number of output data of the second prediction model can be determined by the number of quantum circuit templates in the quantum circuit template library. For example, there are 16 quantum circuit templates in the quantum circuit template library, and the number of output data of the second prediction model can be 16, or less than 16.

[0075] A training data is input into the second prediction model to obtain the prediction probability of the training data, which represents the probability distribution of the quantum circuit template in the quantum circuit template library being selected. The cross entropy loss function between the predicted prediction probability and the actual probability pre-marked for the training data is calculated to see whether it is the minimum. If not, the model parameters of the second prediction model are adjusted. If yes, the trained second prediction model is obtained.

[0076] As an implementation of an embodiment of the present application, the machine learning model is a multi-layer fully connected neural network.

[0077] Multi-layer fully connected neural networks (also called multi-layer perceptrons or multi-layer feedforward neural networks) are able to learn complex patterns and nonlinear relationships in data. Each layer can be seen as a feature converter that can extract higher-level features from raw data. The neurons in each layer usually use nonlinear activation functions such as ReLU, sigmoid, or tanh. These nonlinear functions enable the network to learn and simulate nonlinear relationships. During the training process, multi-layer fully connected neural networks can use regularization techniques to reduce overfitting and improve the generalization ability of the model.

[0078] As an implementation manner of the embodiment of the present application, when the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix cannot converge, the method further includes:

[0079] From the quantum circuit template library, a quantum circuit template with a probability second only to the current target quantum circuit template is determined as a new target quantum circuit template, and the step of predicting the initial values ​​of the adjustable parameters of the target quantum circuit template through the target unitary matrix is ​​returned to be executed.

[0080] When the optimization of the adjustable parameters of the current target quantum circuit fails to converge, a new target quantum circuit template needs to be replaced to achieve quantum circuit synthesis. At this time, a template with a probability only lower than the current target quantum circuit template can be selected as the new target quantum circuit template.

[0081] The failure of the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix to converge means that the fidelity has not converged to the maximum within the preset number of optimizations, or that the fidelity changes very little after a certain number of optimizations, or that other conditions determine convergence failure.

[0082] See also Figure 3 , Figure 3 A quantum circuit synthesis device provided in an embodiment of the present application may include:

[0083] A first determination module 301 is used to determine a target quantum circuit template from a quantum circuit template library based on a target unitary matrix, wherein each quantum circuit template in the quantum circuit template library carries at least one adjustable parameter;

[0084] A prediction module 302 is used to input the target unitary matrix into a trained first prediction model to predict the initial value of the adjustable parameter of the target quantum circuit template, wherein the first prediction model is trained with the goal of maximizing the fidelity between the output unitary matrix and the input unitary matrix, and the output unitary matrix is ​​reconstructed from the input unitary matrix;

[0085] An optimization module 303, configured to optimize the adjustable parameters in the target quantum circuit template based on the predicted initial values;

[0086] The second determination module 304 is configured to use the target quantum circuit template corresponding to the latest adjustable parameter as the synthesized quantum circuit when the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix meets the convergence condition.

[0087] The specific functions and effects achieved by the above-mentioned quantum circuit synthesis device can be explained with reference to other embodiments of the present application, and will not be repeated here. Each module in the quantum circuit synthesis device can be implemented in whole or in part by software, hardware, and a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules.

[0088] See also Figure 4 The present application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the quantum circuit synthesis method in any of the above embodiments when executing the computer program. Figure 4 , the computer device may be a classical computer. The computer device may also be a quantum computer.

[0089] The embodiments of the present application also provide a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a computer, the computer executes the quantum circuit synthesis method in any of the above embodiments.

[0090] The embodiments of the present application also provide a computer program product comprising instructions, which, when executed by a computer, enables the computer to execute the quantum circuit synthesis method in any of the above embodiments.

[0091] It can be understood that in the various implementations of the present application, the size of the serial number of each process does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the implementation methods of the present application.

[0092] It can be understood that the various embodiments described in this application can be implemented individually or in combination, and the embodiments of this application are not limited to this.

[0093] Unless otherwise stated, all technical and scientific terms used in the embodiments of the present application have the same meaning as those generally understood by those skilled in the art of the technical field of the present application. The terms used in the present application are only for the purpose of describing specific embodiments and are not intended to limit the scope of the present application. The term "and / or" used in the present application includes any and all combinations of one or more related listed items. The singular forms of "a kind of", "above" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0094] It can be understood that the processor of the embodiment of the present application can be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method implementation can be completed by the hardware integrated logic circuit or software instructions in the processor. The above processor can be a general processor, a digital signal processor (DigitalSignal Processor, DSP), an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field Programmable Gate Array, FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiment of the present application can be implemented or executed. The general processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in the embodiment of the present application can be directly embodied as a hardware decoding processor to perform, or the hardware and software modules in the decoding processor are combined and executed. The software module can be located in a mature storage medium in the field such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0095] It is understood that the memory in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (programmable ROM, PROM), an erasable programmable read-only memory (erasable PROM, EPROM), an electrically erasable programmable read-only memory (EEPROM) or a flash memory. The volatile memory may be a random access memory (RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0096] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0097] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method implementation methods and will not be repeated here.

[0098] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device implementation described above is only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0099] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0100] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0101] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0102] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A quantum circuit synthesis method, characterized in that: The method comprises: Based on the target unitary matrix, determining a target quantum circuit template from a quantum circuit template library, wherein each quantum circuit template in the quantum circuit template library carries at least one adjustable parameter; Inputting the target unitary matrix into a trained first prediction model to predict the initial value of the adjustable parameter of the target quantum circuit template, wherein the first prediction model is trained with the goal of maximizing the fidelity between the output unitary matrix and the input unitary matrix, and the output unitary matrix is ​​obtained by reconstructing the input unitary matrix; Based on the predicted initial values, optimizing the adjustable parameters in the target quantum circuit template; When the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix meets the convergence condition, the target quantum circuit template corresponding to the latest adjustable parameter is used as the synthesized quantum circuit.

2. The method according to claim 1, characterized in that The step of determining a target quantum circuit template from a quantum circuit template library based on the target unitary matrix includes: Inputting the target unitary matrix into the trained second prediction model to obtain a set of selectable quantum circuit templates and the probability corresponding to each quantum circuit template, wherein the second prediction model is trained by performing probability prediction on the input unitary matrix with the goal of minimizing the cross entropy loss function between the predicted probability and the pre-annotated actual probability; Based on the obtained probabilities, the quantum circuit template corresponding to the maximum probability is selected as the target quantum circuit template.

3. The method according to claim 2, characterized in that The training process of the second prediction model includes: Fill in the parameter values ​​of the adjustable parameters of each quantum circuit template in the quantum circuit template library to obtain the corresponding unitary matrix to construct a training data set; Inputting each training data of the training data set into a pre-built second prediction model to obtain a prediction probability corresponding to each training data; The model parameters of the second prediction model are adjusted with the goal of minimizing the cross entropy loss function between the predicted probability and the actual probability pre-labeled for the training data.

4. The method according to claim 2, characterized in that The second prediction model is a machine learning model.

5. The method according to claim 4, characterized in that The second prediction model is a multi-layer fully connected neural network.

6. The method according to claim 2, characterized in that When the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix cannot converge, the method further includes: From the quantum circuit template library, a quantum circuit template with a probability second only to the current target quantum circuit template is determined as a new target quantum circuit template, and the step of predicting the initial values ​​of the adjustable parameters of the target quantum circuit template through the target unitary matrix is ​​returned to be executed.

7. The method according to any one of claims 1 to 6, characterized in that: The first prediction model is a machine learning model with the same input and learning objective.

8. The method according to claim 7, characterized in that The model parameters of the first prediction model are complex numbers.

9. The method according to claim 7, characterized in that The first prediction model is an autoencoder.

10. A quantum circuit synthesis device, characterized in that: The device comprises: A first determination module is used to determine a target quantum circuit template from a quantum circuit template library based on a target unitary matrix, wherein each quantum circuit template in the quantum circuit template library carries at least one adjustable parameter; A prediction module, used for inputting the target unitary matrix into a trained first prediction model to predict the initial value of the adjustable parameter of the target quantum circuit template, wherein the first prediction model is trained with the goal of maximizing the fidelity between the output unitary matrix and the input unitary matrix, and the output unitary matrix is ​​obtained by reconstructing the input unitary matrix; An optimization module, used for optimizing the adjustable parameters in the target quantum circuit template based on the predicted initial values; The second determination module is used to use the target quantum circuit template corresponding to the latest adjustable parameter as the synthesized quantum circuit when the fidelity between the unitary matrix corresponding to the latest adjustable parameter and the target unitary matrix meets the convergence condition.

11. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 9 is implemented.

12. A computer device, characterized in that: The computer device comprises a memory and a processor, the memory stores a computer program, and the processor implements the method according to any one of claims 1 to 9 when executing the computer program.

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