Display device

By using a light emitting diode chip emitting white light in the display device to cooperate with the phosphor layer, the problems of brightness, contrast, response speed, power consumption and cost in the prior art are solved, and an efficient and low-cost display effect is achieved.

CN119208351APending Publication Date: 2024-12-27SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
CN202411300691.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2018-05-17
Filing Date
2019-05-08
Publication Date
2024-12-27

AI Technical Summary

Technical Problem

Existing display devices have shortcomings in brightness, contrast, response speed, power consumption, cost and life, and it is difficult to meet diverse application needs.

Method used

Adopting a display device structure including transistors, light emitting diode chips, phosphor layer and coloring layer, through the cooperation of the light emitting diode chips that emit white light and the phosphor layer, high brightness, high contrast and low power consumption are achieved, and optimized structural design Reduce manufacturing costs and extend life.

Benefits of technology

It realizes display devices with high brightness, high contrast, fast response speed, low power consumption and low manufacturing cost, and has a long life, which is suitable for diverse display applications.

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Abstract

Provided is a display device having high luminance and contrast and low power consumption. A display device includes a transistor, a light emitting element, a colored layer, a phosphor layer, a first electrode, and a second electrode. The light-emitting element is electrically connected to the first electrode and the second electrode, the first electrode is electrically connected to the transistor, and the second electrode is located on the same surface as the first electrode. The colored layer is located on the light-emitting element, the phosphor layer is located between the light-emitting element and the colored layer, and the phosphor layer, the light-emitting element, and the colored layer have regions overlapping each other. The light-emitting element includes a light-emitting diode chip, and the phosphor layer has a function of emitting light of a complementary color to an emission color of the light-emitting element.
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Description

This invention application is a divisional application of the invention patent application with international application number PCT / IB2019 / 053758, international application date May 8, 2019, application number 201980031517.8 entering the Chinese national phase, and name “Display Device”. Technical Field

[0001] One embodiment of the present invention relates to a display device and a method for manufacturing a display device.

[0002] Note that one embodiment of the present invention is not limited to the above-mentioned technical field. As an example of the technical field of one embodiment of the present invention disclosed in this specification, etc., a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, an electronic device, a lighting device, an input device, an input-output device, a driving method thereof, or a manufacturing method thereof can be cited.

[0003] Note that in this specification, etc., a semiconductor device refers to any device that can operate by utilizing semiconductor characteristics. A transistor, a semiconductor circuit, a computing device, a storage device, etc. are all forms of a semiconductor device. In addition, an imaging device, an electro-optical device, a power generation device (including a thin-film solar cell, an organic thin-film solar cell, etc.), and an electronic device sometimes include a semiconductor device. Background Art

[0004] In recent years, the use of display devices has been continuously diversified. For example, display devices are used in portable information terminals, home television devices (also called televisions or television receivers), digital signage (Digital Signage: electronic billboards), PID (Public Information Display: public information displays), etc. As display devices, typical examples include display devices with light-emitting elements such as organic EL (Electro Luminescence: electroluminescent) elements or light-emitting diodes (LED: Light Emitting Diode), display devices with liquid crystal elements, and electronic paper that displays by electrophoresis, etc. In addition, in order to meet the needs of outdoor use, the brightness requirements of displays are increasing year by year.

[0005] An active matrix type micro LED display device using a small LED (also referred to as micro LED) as a light emitting element and a transistor as a switching element connected to each pixel electrode has been disclosed (Patent Document 1). In addition, an active matrix type display device using a transistor having a channel formation region made of a metal oxide (hereinafter referred to as an oxide semiconductor) exhibiting semiconductor characteristics is known as a switching element connected to each pixel electrode (Patent Documents 2 and 3). [Prior technical literature] [Patent Document]

[0006] [Patent Document 1] U.S. Patent Application Publication No. 2017 / 0179092 [Patent Document 2] Japanese Patent Application Publication No. 2007-123861 [Patent Document 3] Japanese Patent Application Publication No. 2007-96055 Summary of the invention Technical problem to be solved by the invention

[0007] One of the purposes of one embodiment of the present invention is to provide a display device with high brightness. Another purpose of one embodiment of the present invention is to provide a display device with high contrast. Another purpose of one embodiment of the present invention is to provide a display device with fast response speed. Another purpose of one embodiment of the present invention is to provide a display device with low power consumption. Another purpose of one embodiment of the present invention is to provide a display device with low manufacturing cost. Another purpose of one embodiment of the present invention is to provide a display device with long life. Another purpose of one embodiment of the present invention is to provide a novel display device.

[0008] Note that the description of these purposes does not prevent the existence of other purposes. In addition, one embodiment of the present invention does not necessarily achieve all of the above purposes. In addition, purposes other than the above can be extracted from the description of the specification, drawings, claims, etc. Solutions to technical problems

[0009] One embodiment of the present invention is a display device, including a transistor, a light-emitting element, a coloring layer, a first electrode and a second electrode, the light-emitting element is electrically connected to the first electrode and the second electrode, the first electrode is electrically connected to the transistor, the second electrode is located on the same surface as the first electrode, the coloring layer is located on the light-emitting element, the coloring layer has an area overlapping with the light-emitting element, the light-emitting element includes a light-emitting diode chip, and the light-emitting element has the function of emitting white light.

[0010] One embodiment of the present invention is a display device, including a transistor, a light-emitting element, a coloring layer, a phosphor layer, a first electrode and a second electrode, the light-emitting element is electrically connected to the first electrode and the second electrode, the first electrode is electrically connected to the transistor, the second electrode is located on the same surface as the first electrode, the coloring layer is located on the light-emitting element, the phosphor layer is located between the light-emitting element and the coloring layer, the phosphor layer, the light-emitting element and the coloring layer have overlapping areas, the light-emitting element includes a light-emitting diode chip, and the phosphor layer includes a phosphor that emits light of a complementary color to the light-emitting color of the light-emitting element.

[0011] In the above display device, preferably, it further includes a light shielding layer, and the light shielding layer is adjacent to the light emitting element.

[0012] In the above display device, preferably, the light emitting element has a function of emitting blue light, and the phosphor layer includes a phosphor emitting yellow light.

[0013] In the above display device, preferably, the light emitting element has a function of emitting near-ultraviolet light or violet light, and the phosphor layer includes a phosphor emitting red light, a phosphor emitting green light, and a phosphor emitting blue light.

[0014] In the above display device, the light emitting element preferably has a function of emitting light toward the colored layer.

[0015] In the above-mentioned display device, it is preferred that it further includes a first bump and a second bump, the first bump is located between one electrode of the light-emitting element and the first electrode, the second bump is located between another electrode of the light-emitting element and the second electrode, the first bump and the second bump contain silver, and the first electrode and the second electrode contain any one or more of silver, aluminum, titanium and copper.

[0016] In the above display device, the transistor may include an oxide semiconductor in a channel formation region. The transistor may include silicon in a channel formation region. Effects of the Invention

[0017] According to one embodiment of the present invention, a display device with high brightness can be provided. In addition, according to one embodiment of the present invention, a display device with high contrast can be provided. In addition, according to one embodiment of the present invention, a display device with fast response speed can be provided. In addition, according to one embodiment of the present invention, a display device with low power consumption can be provided. In addition, according to one embodiment of the present invention, a display device with low manufacturing cost can be provided. In addition, according to one embodiment of the present invention, a display device with long life can be provided. In addition, according to one embodiment of the present invention, a novel display device can be provided.

[0018] Note that the description of these effects does not prevent the existence of other effects. In addition, one mode of the present invention does not necessarily achieve all of the above effects. In addition, effects other than the above can be extracted from the description of the specification, drawings, claims, etc. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] [Figure 1] (A), (B), and (C) are structural examples of a display device. [Figure 2] (A), (B), and (C) are structural examples of display devices. [Figure 3] (A), (B), and (C) are structural examples of light-emitting elements. [Figure 4] (A), (B), and (C) are structural examples of light-emitting elements. [Figure 5] (A), (B), and (C) are structural examples of display devices. [Figure 6] (A), (B), and (C) are top views of the display device. [ Figure 7 ] is a cross-sectional view of the display device. [ Figure 8 ] is a cross-sectional view of the display device. [Figure 9] (A), (B), and (C) are diagrams illustrating a method for manufacturing a display device. [Figure 10] (A) and (B) are diagrams illustrating a method for manufacturing a display device. [ Fig.11 ] is a diagram illustrating a method for manufacturing a display device. [Figure 12] (A) and (B) are diagrams illustrating a method for manufacturing a display device. [ Fig.13 ] is a cross-sectional view of the display device. [Figure 14] (A) and (B) are diagrams illustrating a method for manufacturing a display device. [Figure 15] (A) and (B) are diagrams illustrating a method for manufacturing a display device. [Figure 16] (A1), (A2), (B1), (B2), (C1), and (C2) are diagrams illustrating transistors. [Figure 17] (A1), (A2), (B1), (B2), (C1), and (C2) are diagrams illustrating transistors. [Figure 18] (A1), (A2), (B1), (B2), (C1), and (C2) are diagrams illustrating transistors. [Figure 19] (A1), (A2), (B1), (B2), (C1), and (C2) are diagrams illustrating transistors. [Fig. 20] (A) is a block diagram of a display device. (B) is a circuit diagram of a display device. [Fig. 21] (A), (B), and (C) are circuit diagrams of a display device. [Fig. 22] (A), (C), and (D) are circuit diagrams of a display device. (B) is a timing diagram of the display device. [Figure 23] (A), (B), (C), (D), and (E) are diagrams for explaining a data processing device. [Figure 24] (A), (B), (C), (D), and (E) are diagrams for explaining a data processing device. Modes for Carrying Out the Invention

[0020] The embodiments are described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description, and a person skilled in the art can easily understand that the method and details can be transformed into various forms without departing from the purpose and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the contents described in the embodiments shown below.

[0021] Note that in the structure of the invention described below, the same reference numerals are used in common between different drawings to represent the same parts or parts with the same function, and their repeated descriptions are omitted. In addition, when representing parts with the same function, the same hatching is sometimes used without adding a reference numeral in particular.

[0022] Note that in each of the drawings described in this specification, the size of each component, the thickness of a layer, and a region may be exaggerated for the sake of clarity. Therefore, the present invention is not limited to the sizes in the drawings.

[0023] The ordinal numbers such as “first” and “second” used in the present specification and the like are provided to avoid confusion among constituent elements and are not intended to limit the number of constituent elements.

[0024] A transistor is a type of semiconductor element that can amplify current or voltage, control conduction or non-conduction switching, etc. The transistor in this specification includes IGFET (Insulated Gate Field Effect Transistor) and thin film transistor (TFT: Thin Film Transistor).

[0025] Note that, in the following, the directions such as "upper" and "lower" are basically used in accordance with the directions in the drawings. However, for the sake of simplicity, the directions indicated by "upper" or "lower" in the specification are sometimes inconsistent with the drawings. For example, when describing the stacking order (or formation order) of a laminate, etc., even if the surface (formed surface, supporting surface, bonding surface, flat surface, etc.) on one side of the laminate is set in the drawings, the direction is sometimes described as "lower", or the opposite direction is described as "upper", etc.

[0026] In this specification, etc., a display panel which is one form of a display device refers to a panel which can display (output) an image etc. on a display surface. Therefore, a display panel is one form of an output device.

[0027] In this specification, etc., a structure in which a connector such as an FPC (Flexible Printed Circuit) or TCP (Tape Carrier Package) is installed on a display panel substrate, or a structure in which an IC is directly mounted on a substrate using a COG (Chip On Glass) method, etc. is sometimes referred to as a display panel module or display module, or simply as a display panel, etc.

[0028] (Implementation Method 1) In this embodiment, a display device which is one embodiment of the present invention is described.

[0029] <Structural Example 1> Figure 1A An example of a cross-sectional structure of a display device 10 according to one embodiment of the present invention is shown.

[0030] The display device 10 includes a functional layer 15, a light emitting element 17, a phosphor layer 35, a coloring layer CFR, a coloring layer CFG, and a coloring layer CFB between the substrates 11 and 13. Figure 1A In the figure, the substrate 11 side corresponds to the display surface side of the display device 10.

[0031] As the light-emitting element 17, for example, a self-luminous light-emitting element such as OLED (Organic Light Emitting Diode), LED, QLED (Quantum-dot Light Emitting Diode), semiconductor laser, etc. can be used. In particular, LED has high brightness and contrast and fast response speed, so it is suitable for use in the light-emitting element 17, thereby realizing a display device 10 with high brightness and contrast and fast response speed. LED is a self-luminous element, so it does not require a backlight and a polarizing plate, so a display device with high brightness and low power consumption can be realized. In addition, the light-emitting layer of LED is composed of inorganic materials, so a display device with less degradation and long life can be realized.

[0032] The functional layer 15 is a layer including a circuit for driving the light emitting element 17. For example, in the functional layer 15, a pixel circuit is constituted by transistors, capacitors, wiring, electrodes, etc. In addition, the functional layer 15 is electrically connected to the electrode 21 and the electrode 23. In other words, the functional layer 15 is electrically connected to the light emitting element 17 through the electrode 21 and the electrode 23.

[0033] In addition, an insulating layer 25 is provided between the electrodes 21 and 23 and the functional layer 15. The electrodes 21 and 23 are electrically connected to the functional layer 15 via the openings provided in the insulating layer 25. Thus, the functional layer 15 and the light emitting element 17 are electrically connected.

[0034] The display device 10 includes an adhesive layer 27 between the electrode 21 and the electrode 23 and the substrate 11. It can also be said that the substrate 11 and the substrate 13 are bonded together by the adhesive layer 27. The adhesive layer 27 is also used as a sealing layer for sealing the light emitting element 17. In this way, the display device 10 includes the light emitting element 17 and the functional layer 15 for driving the light emitting element between a pair of substrates.

[0035] On the substrate 13 side of the substrate 11, a coloring layer CFR, a coloring layer CFG, and a coloring layer CFB are provided at positions overlapping the light emitting element 17. The coloring layer CFR, the coloring layer CFG, and the coloring layer CFB are used as color filters for transmitting red, green, or blue, respectively. Examples of materials that can be used for the coloring layer CFR, the coloring layer CFG, and the coloring layer CFB include metal materials, resin materials, and resin materials containing pigments or dyes.

[0036] A phosphor layer 35 is provided between the coloring layer CFR, the coloring layer CFG, and the coloring layer CFB and each light emitting element 17. As the phosphor layer 35, an organic resin layer mixed with a phosphor or the like can be used. The phosphor included in the phosphor layer 35 can be a material that is excited by the light emitted by the light emitting element 17 and emits light of a complementary color to the light emitting color of the light emitting element 17. By adopting the above structure, the phosphor layer 35 can emit white light.

[0037] For example, by adopting a structure in which the phosphor layer 35 has a phosphor that emits yellow light and the light-emitting element 17 emits blue light, white light is emitted from the phosphor layer 35. Therefore, the light emitted by the light-emitting element 17 provided with the coloring layer CFR is emitted as red light 20R to the display surface side through the phosphor layer 35 and the coloring layer CFR. Similarly, the light emitted by the light-emitting element 17 provided with the coloring layer CFG is emitted as green light 20G, and the light emitted by the light-emitting element 17 provided with the coloring layer CFB is emitted as blue light 20B. Thus, a single light-emitting element 17 can be used for color display. In addition, since a single light-emitting element 17 is used as a display device, the manufacturing process can be simplified. In other words, according to one embodiment of the present invention, a display device with high brightness and contrast, fast response speed and low power consumption can be realized at a low manufacturing cost.

[0038] For example, a structure may be adopted in which phosphor layer 35 includes a phosphor that emits red light and light emitting element 17 emits blue-green light so that white light is emitted from phosphor layer 35 .

[0039] Alternatively, phosphor layer 35 may include phosphors that emit red light, green light, and blue light, and light emitting element 17 may emit near-ultraviolet light or violet light to emit white light from phosphor layer 35 .

[0040] Note that although a structure is shown in which one color is represented by sub-pixels of three colors, red (R), green (G), and blue (B), one embodiment of the present invention is not limited to this. There is no particular limitation on color elements, and colors other than RGB may be used, for example, yellow (Y), cyan (cyan) C, magenta (M), etc. may be used.

[0041] In addition, preferably Figure 1B As shown in the display device 10A, a light shielding layer 33 is provided adjacent to the light emitting element 17. The light shielding layer 33 is preferably provided between adjacent light emitting elements 17. By providing the light shielding layer 33 between adjacent light emitting elements 17, light leakage to adjacent pixels and color mixing between pixels can be suppressed. As the light shielding layer 33, a resin including a pigment, a dye, or carbon black can be used. In addition, the side surface of the light emitting element 17 is preferably in contact with the light shielding layer 33. By covering the side surface of the light emitting element 17 with the light shielding layer 33, light leakage to adjacent pixels and color mixing between pixels can be suppressed. Note that Figure 1B The structure in which the height of the top surface of the light shielding layer 33 is substantially the same as the height of the top surface of the light emitting element 17 is shown, but one embodiment of the present invention is not limited thereto. The height of the top surface of the light shielding layer 33 may be lower than the height of the top surface of the light emitting element 17, or may be higher than the height of the top surface of the light emitting element 17. By making the height of the top surface of the light shielding layer 33 substantially the same as the height of the top surface of the light emitting element 17, or higher than the height of the top surface of the light emitting element 17, light leakage to adjacent pixels and color mixing between pixels can be effectively suppressed.

[0042] Figure 1B Although the case where there is a gap between the light emitting element 17 and the phosphor layer 35 is shown, one embodiment of the present invention is not limited to this. Figure 1C As shown in the display device 10B, the light emitting element 17 may be in contact with the fluorescent layer 35. With the above structure, the distance between the colored layer CFR, the colored layer CFG, and the colored layer CFB and each light emitting element 17 is shortened, and light leakage to adjacent pixels and color mixing between pixels can be suppressed.

[0043] In addition, if Figure 2A As in the display device 10C shown in FIG. 1 , a light shielding layer 31 may be provided. The light shielding layer 31 is provided between adjacent coloring layers. In addition, the light shielding layer 31 has an opening in a region overlapping with the light emitting element 17. The light shielding layer 31 shields the light emitted from the adjacent light emitting element 17 and suppresses color mixing between the adjacent light emitting elements 17. Here, by providing each end of the coloring layer CFR, the coloring layer CFG, and the coloring layer CFB in a manner overlapping with the light shielding layer 31, light leakage can be suppressed. As the light shielding layer 31, a material that shields the light emitted from the light emitting element 17 can be used, for example, a metal material or a resin material containing a pigment or a dye can be used.

[0044] In addition, if Figure 2B As in the display device 10D shown in FIG. 1 , a structure in which a portion of each coloring layer overlaps with an adjacent coloring layer may be adopted. Each region where the coloring layers overlap with each other is used as a light shielding layer. Note that Figure 2B An example is shown in which one end of the coloring layer CFR overlaps one end of the coloring layer CFG, the other end of the coloring layer CFG overlaps one end of the coloring layer CFB, and the other end of the coloring layer CFB overlaps the other end of the coloring layer CFR, but one embodiment of the present invention is not limited to this.

[0045] In addition, you can Figure 2C As shown in the display device 10E, a pixel not including a coloring layer is formed and white light 20W is emitted from the pixel. By adopting the above structure, one color can be expressed by sub-pixels of four colors, R (red), G (green), B (blue), and W (white). By adopting the above structure, compared with a structure in which sub-pixels of three colors, red (R), green (G), and blue B, express one color, the current flowing through the light emitting element 17 can be reduced, thereby realizing a display device with low power consumption.

[0046] A light emitting diode chip (hereinafter also referred to as an LED chip) that can be used as the light emitting element 17 will be described.

[0047] The LED chip includes a light emitting diode. There is no particular limitation on the structure of the light emitting diode, and it can adopt MIS (Metal Insulator Semiconductor) junction, or a homojunction structure, heterojunction structure or double heterojunction structure with PN junction or PIN junction. In addition, a superlattice structure, a single quantum well structure of stacked thin films that produce quantum effects, or a multiple quantum well (MQW: Multi Quantum Well) structure can also be adopted.

[0048] Figure 3A and Figure 3B An example of an LED chip is shown. Figure 3A A cross-sectional view showing an LED chip 51, Figure 3B: A top view of the LED chip 51 is shown. The LED chip 51 includes a semiconductor layer 81 and the like. The semiconductor layer 81 includes an n-type semiconductor layer 75, a light-emitting layer 77 on the n-type semiconductor layer 75, and a p-type semiconductor layer 79 on the light-emitting layer 77. As a material for the p-type semiconductor layer 79, a material whose band gap energy is greater than the band gap energy of the light-emitting layer 77 and which can confine carriers in the light-emitting layer 77 can be used. In addition, the LED chip 51 is provided with an electrode 85 used as a cathode on the n-type semiconductor layer 75, an electrode 83 used as a contact electrode on the p-type semiconductor layer 79, and an electrode 87 used as an anode on the electrode 83. In addition, the top surface and side surfaces of the electrode 83 are preferably covered with an insulating layer 89. The insulating layer 89 is used as a protective film for the LED chip 51.

[0049] The area of ​​the light emitting region of the LED chip that can be used for the light emitting element 17 is 1 mm 2 Below, preferably 10000 μm 2 Less than, more preferably 3000 μm 2 Below, more preferably 700 μm 2 In this specification, the area of ​​the light emitting region may be 10000 μm. 2 The following LED chips are referred to as Micro LEDs.

[0050] Figure 3C FIG. 8 shows an example of an enlarged view of the semiconductor layer 81. Figure 3C As shown, the n-type semiconductor layer 75 may include an n-type contact layer 75a on the substrate 71 side and an n-type cladding layer 75b on the light emitting layer 77 side. The p-type semiconductor layer 79 may include a p-type cladding layer 79a on the light emitting layer 77 side and a p-type contact layer 79b on the p-type cladding layer 79a.

[0051] The light-emitting layer 77 may have an MQW structure in which barrier layers 77a and well layers 77b are stacked multiple times. The barrier layer 77a preferably uses a material whose band gap energy is greater than the band gap energy of the well layer 77b. By adopting the above structure, energy can be confined in the well layer 77b, thereby improving quantum efficiency and improving the light-emitting efficiency of the LED chip 51.

[0052] In the face-up LED chip 51, the electrode 83 can be made of a material that allows light to pass through, such as ITO (In2O3-SnO2), AZO (Al2O3-ZnO), In-Zn oxide (In2O3-ZnO), GZO (GeO2-ZnO), ICO (In2O3-CeO2) and other oxides. In the face-up LED chip 51, light is mainly emitted to the electrode 87 side. In the face-down LED chip 51, the electrode 83 can be made of a material that reflects light, such as silver, aluminum, rhodium and other metals. In the face-down LED chip 51, light is mainly emitted to the substrate 71 side.

[0053] As the substrate 71, sapphire single crystal (Al2O3), spinel single crystal (MgAl2O4), ZnO single crystal, LiAlO2 single crystal, LiGaO2 single crystal, MgO single crystal and other oxide single crystals, Si single crystal, SiC single crystal, GaAs single crystal, AlN single crystal, GaN single crystal, ZrB2 and other boride single crystals can be used. In the face-down LED chip 51, the substrate 71 preferably uses a material that allows light to pass through, for example, sapphire single crystal can be used.

[0054] A buffer layer (not shown) may be provided between the substrate 71 and the n-type semiconductor layer 75. The buffer layer has a function of alleviating the difference in lattice constant between the substrate 71 and the n-type semiconductor layer 75.

[0055] The LED chip 51 that can be used for the light emitting element 17 is preferably Figure 3A The electrode 85 and the electrode 87 are arranged on one side of the same surface as shown in the horizontal structure. By arranging the electrode 85 and the electrode 87 of the LED chip 51 on one side of the same surface, the electrode 21 can be easily connected to the electrode 23, so that the structure of the electrode 21 and the electrode 23 can be simplified. In addition, the LED chip 51 that can be used as the light-emitting element 17 is preferably a face-down type. By using the face-down type LED chip 51, the light emitted from the LED chip 51 is efficiently emitted to the display surface side of the display device, so that a display device with high brightness can be realized. As the LED chip 51, a commercially available LED chip can also be used.

[0056] As the phosphor included in the phosphor layer 35, an organic resin layer on the surface of which the phosphor is printed or coated, an organic resin layer mixed with the phosphor, etc. can be used. The phosphor layer 35 can use a material that is excited by the light emitted by the LED chip 51 and emits light of a complementary color to the color emitted by the LED chip 51. By adopting the above structure, white light can be emitted from the phosphor layer 35.

[0057] For example, by using an LED chip 51 that emits blue light and a phosphor that emits yellow light, which is a complementary color of blue, a structure in which white light is emitted from the phosphor layer 35 can be realized. As the LED chip 51 capable of emitting blue light, a diode composed of a Group 13 nitride compound semiconductor is typically used. As an example, a diode including a semiconductor having the formula In x Al y Ga 1-x-y A GaN diode represented by N (x is greater than or equal to 0 and less than or equal to 1, y is greater than or equal to 0 and less than or equal to 1, and x+y is greater than or equal to 0 and less than or equal to 1). A typical example of a phosphor that emits yellow light when excited by blue light is Y3Al5O 12 : Ce (YAG: Ce), (Ba, Sr, Mg)2SiO4: Eu, Mn, etc.

[0058] For example, by using the LED chip 51 that emits blue-green light and a phosphor that emits red light, which is a complementary color to blue-green, a structure in which white light is emitted from the phosphor layer 35 can be realized.

[0059] The phosphor layer 35 may include multiple phosphors, and may also be configured to emit light of different colors. For example, a structure in which white light is emitted from the phosphor layer 35 may be realized by using an LED chip 51 that emits blue light, a phosphor that emits red light, and a phosphor that emits green light. Typical examples of phosphors that are excited by blue light and emit red light include (Ca, Sr)S:Eu, Sr2Si7Al3ON 13 Typical examples of phosphors that emit green light when excited by blue light include SrGa2S4:Eu, Sr3Si 13 Al3O2N 21 :Eu et al.

[0060] In addition, a structure in which white light is emitted from the phosphor layer 35 can be realized by using an LED chip 51 emitting near ultraviolet light or purple light, a phosphor emitting red light, a phosphor emitting green light, and a phosphor emitting blue light. Typical examples of phosphors that emit red light when excited by near ultraviolet light or purple light include (Ca, Sr)S:Eu, Sr2Si7Al3ON 13 :Eu, La2O2S:Eu, etc. Typical examples of phosphors that emit green light when excited by near-ultraviolet light or purple light include SrGa2S4:Eu, Sr3Si 13 Al3O2N 21 :Eu, etc. As a typical example of a phosphor that emits blue light when excited by near-ultraviolet light or purple light, there are Sr 10 (PO4)6Cl2: Eu, (Sr, Ba, Ca) 10(PO4)6Cl2:Eu, etc.

[0061] Note that near ultraviolet light has a maximum peak at a wavelength of 200nm to 380nm in the emission spectrum. In addition, violet light has a maximum peak at a wavelength of 380nm to 430nm in the emission spectrum. In addition, blue light has a maximum peak at a wavelength of 430nm to 490nm in the emission spectrum. In addition, green light has a maximum peak at a wavelength of 490nm to 550nm in the emission spectrum. In addition, yellow light has a maximum peak at a wavelength of 550nm to 590nm in the emission spectrum. In addition, red light has a maximum peak at a wavelength of 640nm to 770nm in the emission spectrum.

[0062] When the phosphor layer 35 includes a phosphor that emits yellow light and an LED chip 51 that emits blue light is used, the light emitted by the LED chip 51 preferably has a maximum peak at a wavelength of 330nm to 500nm in the emission spectrum, more preferably has a maximum peak at a wavelength of 430nm to 490nm, and further preferably has a maximum peak at a wavelength of 450nm to 480nm. In this way, the phosphor can be efficiently excited. In addition, the light emitted by the LED chip 51 has a maximum peak at 430nm to 490nm in the emission spectrum, and the blue light of the excitation light and the yellow light from the phosphor can be mixed to become white light. Furthermore, the light emitted by the LED chip 51 has a maximum peak at 450nm to 480nm, and a high-purity white can be achieved.

[0063] In addition, various optical components may be arranged outside the substrate 11. Examples of the optical components include a light diffusion layer (diffusion film, etc.), an antireflection layer, and a light focusing film. In addition, an antistatic film for suppressing the adhesion of dust, a waterproof film for preventing dirt from adhering, a hard coating film for suppressing damage during use, etc. may be arranged outside the substrate 11.

[0064] Alternatively, a touch sensor may be provided outside the substrate 11. Thus, a structure including the display device 10 and the touch sensor can be used as a touch panel.

[0065] <Structure Example 2> Different structures of the above-mentioned display device will be described. As the light emitting element 17 included in the display device of one embodiment of the present invention, an LED package can be used.

[0066] An LED package that can be used for the light emitting element 17 will be described.

[0067] As the light emitting element 17, a currently used LED package such as a lead type or a surface mount (SMD: Surface Mount Device) type LED package can be used. As the light emitting element 17, it is particularly preferable to use a surface mount type LED package. Figure 4A and Figure 4B An example of a surface mount type LED package is shown. Figure 4A A cross-sectional view of an LED package 50 is shown, Figure 4B FIG. 1 shows a top view of an LED package 50. The LED package 50 includes an LED chip 51, an electrode 55, and an electrode 57 on a substrate 52. The LED chip 51 is electrically connected to the electrode 55 and the electrode 57 via a metal wire 59 and a metal wire 61. In addition, a phosphor 65 and a light-transmitting resin layer 63 are provided on the LED chip 51. The substrate 52 and the LED chip 51 are bonded together by an adhesive layer 67. In addition, a commercially available LED package can also be used as the light-emitting element 17.

[0068] The area of ​​the light emitting region of the LED package that can be used for the light emitting element 17 is 1 mm 2 Below, preferably 10000 μm 2 Less than, more preferably 3000 μm 2 Below, more preferably 700 μm 2 In this specification, the area of ​​the light emitting region may be 10000 μm. 2 The following LED packages are referred to as Micro LEDs.

[0069] As the substrate 52 , a glass epoxy substrate, a polyimide substrate, a ceramic substrate, an alumina substrate, an aluminum nitride substrate, or the like can be used.

[0070] As the phosphor 65, an organic resin layer on the surface of which the phosphor is printed or coated, an organic resin layer mixed with the phosphor, etc. can be used. The phosphor 65 can be a material that is excited by the light emitted by the LED chip 51 and emits light of a complementary color to the color emitted by the LED chip 51. By adopting the above structure, the LED package 50 can emit white light. The phosphor 65 can refer to the description of the phosphor included in the above-mentioned phosphor layer 35, so the detailed description is omitted.

[0071] For example, by using the LED chip 51 that emits blue-green light and a phosphor that emits red light, which is a complementary color to blue-green, a structure in which white light is emitted from the LED package 50 can be realized.

[0072] In addition, a structure in which white light is emitted from the LED package 50 may be realized using the LED chip 51 emitting near-ultraviolet light or violet light, a phosphor emitting red light, a phosphor emitting green light, and a phosphor emitting blue light.

[0073] When the LED package 50 uses an LED chip 51 that emits blue light and a phosphor 65 that emits yellow light, the light emitted by the LED chip 51 preferably has a maximum peak at a wavelength of 330nm to 500nm in the emission spectrum, more preferably has a maximum peak at a wavelength of 430nm to 490nm, and further preferably has a maximum peak at a wavelength of 450nm to 480nm. In this way, the phosphor 65 can be efficiently excited. In addition, the light emitted by the LED chip 51 has a maximum peak at 430nm to 490nm in the emission spectrum, and the blue light of the excitation light and the yellow light from the phosphor 65 can be mixed to become white light. Furthermore, the light emitted by the LED chip 51 has a maximum peak at 450nm to 480nm, and a high-purity white can be achieved.

[0074] The resin layer 63 is formed of a light-transmitting organic resin. The type of organic resin is not particularly limited, and typically, ultraviolet curing resins such as epoxy resins and silicone resins, visible light curing resins, etc. can be appropriately used. Figure 4A The top surface of the resin layer 63 is shown to be flat, but one embodiment of the present invention is not limited thereto. For example, the top surface of the resin layer 63 may be convex. The shape may be appropriately selected according to the desired directivity.

[0075] As the metal wires 59 and 61 , thin wires of metal formed of gold, an alloy containing gold, copper, or an alloy containing copper can be used.

[0076] The electrodes 55 and 57 are conductive layers electrically connected to the electrodes included in the LED chip 51, and are formed of an element selected from nickel, copper, silver, platinum and gold, or an alloy material containing the element at a content of 50% or more. The electrodes 55 and 57 are connected to the electrodes of the LED chip 51 by wire bonding such as thermal compression or ultrasonic bonding.

[0077] Preferably, a reflector 53 made of ceramic or the like is disposed around the LED chip 51 so that a portion of the light emitted by the LED chip 51 is reflected, thereby emitting more light from the LED package 50. Figure 4A The reflector 53 is shown to have a shape that expands in a tapered shape upward, but one embodiment of the present invention is not limited thereto and the shape can be appropriately selected according to desired directivity of light.

[0078] Note that although Figure 4A The LED package 50 shown in the figure uses a face-up LED chip structure that emits light toward the electrode side of the LED chip 51 , but the structure of the LED package 50 that can be used in one embodiment of the present invention is not limited to this.

[0079] Figure 4C Shown with Figure 4A Examples of different LED packages are shown. Figure 4C is a cross-sectional view of the LED package 50. The top view can be referred to Figure 4B . Figure 4C The LED package 50 shown is a flip chip type LED package in which the electrodes included in the LED chip 51 are opposite to the electrodes 55 and 57. The electrodes included in the LED chip 51 are electrically connected to the electrodes 55 and 57 through the conductive bumps 90. Figure 4C The LED package 50 shown uses a face-down type LED chip that emits light to the side opposite to the electrode of the LED chip 51. In addition, Figure 4A and Figure 4C Although the LED chip 51 is shown as a vertical structure, one embodiment of the present invention is not limited thereto. The LED chip 51 included in the LED package 50 may have a vertical structure in which the electrodes 85 and the electrodes 87 are arranged on opposite surfaces.

[0080] Note that FIG. 4 shows an example in which the LED package 50 includes one LED chip 51, but the structure of the LED package 50 that can be used in one embodiment of the present invention is not limited thereto. The LED package 50 may also include a plurality of LED chips 51. In addition, a structure that does not include the phosphor 65 may also be used. For example, by using an LED chip 51 that emits red light, an LED chip 51 that emits green light, and an LED chip 51 that emits green light but does not include the phosphor 65, white light is emitted from the LED package 50.

[0081] The structure of a display device using an LED package 50 as the light emitting element 17 will be described.

[0082] Figure 5A An example of a cross-sectional structure of a display device according to one embodiment of the present invention is shown. Figure 5A The display device 10F shown includes a functional layer 15, a light emitting element 17, a coloring layer CFR, a coloring layer CFG, and a coloring layer CFB between a substrate 11 and a substrate 13. Figures 1A to 1C and FIG. 2A to FIG. 2C The main difference of the display device shown in the figure, which uses LED chips as the light emitting elements 17, is that the phosphor layer 35 and the light shielding layer 33 are not included. Figure 5A In the figure, the substrate 11 side corresponds to the display surface side of the display device 10.

[0083] Since the LED package 50 has a reflector 53 to improve the directivity of light, when the structure using the LED package 50 as the light-emitting element 17 is adopted, it is possible to suppress light leakage to adjacent pixels and color mixing between pixels without providing the light-shielding layer 33. In addition, by using the LED package 50 that emits white light as the light-emitting element 17, color display can be performed without providing the phosphor layer 35.

[0084] Figure 5A Although a gap is provided between the coloring layer CFR, the coloring layer CFG, and the coloring layer CFB and the light emitting element 17, one embodiment of the present invention is not limited thereto. The coloring layer CFR, the coloring layer CFG, and the coloring layer CFB may be in contact with the light emitting element 17. By adopting the above structure, the distance between the coloring layer CFR, the coloring layer CFG, and the coloring layer CFB and each light emitting element 17 is shortened, thereby suppressing light leakage to adjacent pixels and color mixing between pixels.

[0085] In addition, if Figure 5B As shown in the display device 10G, a light shielding layer 31 may be provided. The light shielding layer 31 is provided between adjacent coloring layers. In addition, the light shielding layer 31 has an opening in a region overlapping with the light emitting element 17. The light shielding layer 31 shields the light emitted from the adjacent light emitting element 17 and suppresses the color mixing between the adjacent light emitting elements 17. Here, by providing each end of the coloring layer CFR, the coloring layer CFG, and the coloring layer CFB in a manner overlapping with the light shielding layer 31, light leakage can be suppressed. As the light shielding layer 31, a material that shields the light emitted from the light emitting element 17 can be used, for example, a metal material or a resin material containing a pigment or a dye can be used.

[0086] In addition, if Figure 5C As in the display device 10H shown in FIG. 1 , a structure in which a portion of each coloring layer overlaps with an adjacent coloring layer may be adopted. Each region where the coloring layers overlap with each other is used as a light shielding layer. Note that Figure 5C An example is shown in which one end of the coloring layer CFR overlaps one end of the coloring layer CFG, the other end of the coloring layer CFG overlaps one end of the coloring layer CFB, and the other end of the coloring layer CFB overlaps the other end of the coloring layer CFR, but one embodiment of the present invention is not limited to this.

[0087] In addition, a structure may be adopted in which a pixel not including a coloring layer is formed and white light is emitted from the pixel. By adopting the above structure, one color can be expressed by four sub-pixels of R (red), G (green), B (blue), and W (white). By adopting the above structure, compared with a structure in which one color is expressed by sub-pixels of three colors of red (R), green (G), and blue B, the current flowing through the light-emitting element 17 can be reduced, thereby realizing a display device with low power consumption.

[0088] The above is the description of the structural example.

[0089] At least a part of this embodiment mode can be implemented in combination with other embodiment modes described in this specification as appropriate.

[0090] (Implementation Method 2) In this embodiment, an example of the display device exemplified in the above embodiment is described in detail.

[0091] <Structure example> Fig. 6A 7 shows a top view of a display device 700. The display device 700 includes a first substrate 701 and a second substrate 705 bonded together by a sealant 712. In a region sealed by the first substrate 701, the second substrate 705, and the sealant 712, a pixel portion 702, a source driver circuit portion 704, and a gate driver circuit portion 706 are provided on the first substrate 701. The pixel portion 702 is provided with a plurality of display elements.

[0092] In addition, an FPC terminal portion 708 connected to an FPC 716 is provided in a portion of the first substrate 701 that does not overlap with the second substrate 705. The FPC 716 supplies various signals to the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 through the FPC terminal portion 708 and the signal line 710.

[0093] A plurality of gate drive circuits 706 may be provided. In addition, the gate drive circuit 706 and the source drive circuit 704 may be separately formed on a semiconductor substrate or the like, or may be packaged as an IC chip. The IC chip may be mounted on the first substrate 701 or mounted on the FPC 716.

[0094] The structure of the transistor included in the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 is not particularly limited. As the semiconductor layer of the transistor, one or more of a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or an amorphous semiconductor can be used. As the semiconductor material, for example, silicon or germanium can be used. In addition, compound semiconductors such as silicon germanium, silicon carbide, gallium arsenide, oxide semiconductors, nitride semiconductors, or organic semiconductors can also be used.

[0095] When an organic semiconductor is used as the semiconductor layer, a low molecular weight organic material having an aromatic ring or a π-electron conjugated conductive polymer can be used. For example, rubrene, tetracene, pentacene, perylene diimide, tetracyanoquinodimethane, polythiophene, polyacetylene, polyparaphenylene vinylene, etc. can be used.

[0096] The transistor used in this embodiment preferably includes an oxide semiconductor film that is highly purified and in which the formation of oxygen defects is suppressed. The transistor can have a low off-state current. Therefore, the retention time of an electrical signal such as an image signal can be extended, and the write interval can also be extended in the on state. Therefore, the frequency of the refresh operation can be reduced, thereby achieving the effect of reducing power consumption.

[0097] In addition, the transistor used in this embodiment can obtain a higher field effect mobility, so it can be driven at high speed. For example, by using such a transistor capable of high-speed driving in a display device, a switching transistor for a pixel portion and a driving transistor for a driving circuit portion can be formed on the same substrate. That is, a structure that does not use a driving circuit formed by a silicon wafer or the like can be adopted, thereby reducing the number of components of the semiconductor device. In addition, by also using a transistor capable of high-speed driving in the pixel portion, a high-quality image can be provided.

[0098] Figure 6B The display device 700A shown is an example of a display device that can be used as a flexible display using a resin layer 743 having flexibility instead of the first substrate 701.

[0099] The pixel portion 702 of the display device 700A is not a rectangular shape but has arc-shaped corners. Figure 6B As shown in the region P1 in FIG. 1 , the pixel portion 702 and a portion of the resin layer 743 have a cutout portion. A pair of gate drive circuit portions 706 are provided on one side sandwiching the pixel portion 702. The gate drive circuit portion 706 is provided on one side of the corner of the pixel portion 702 along the arc-shaped contour.

[0100] The portion of the resin layer 743 provided with the FPC terminal portion 708 protrudes. The portion of the resin layer 743 including the FPC terminal portion 708 may be along Figure 6B By folding a portion of the resin layer 743 to the back, the display device 700A can be mounted on an electronic device in a state where the FPC 716 and the back of the pixel portion 702 are overlapped, thereby saving space in the electronic device.

[0101] The FPC 716 connected to the display device 700A is mounted with an IC 717. The IC 717 has, for example, a function of a source driver circuit. Here, the source driver circuit unit 704 in the display device 700A may have a structure including at least one of a protection circuit, a buffer circuit, a demultiplexer circuit, and the like.

[0102] Figure 6C The display device 700B shown is a display device suitable for electronic devices with a large screen, for example, a television device, a monitor device, a personal computer (including a notebook or a desktop), a tablet terminal, a digital signage, etc.

[0103] The display device 700B includes a plurality of source driver ICs 721 and a pair of gate driver circuit units 722 .

[0104] A plurality of source driver ICs 721 are mounted on FPCs 723. In addition, one terminal of each of the plurality of FPCs 723 is connected to the substrate 701, and another terminal is connected to a printed circuit board 724. By bending the FPC 723, the printed circuit board 724 can be arranged on the back side of the pixel portion 702 and installed in an electrical device, thereby reducing the space for installing the electronic device.

[0105] On the other hand, the gate driving circuit portion 722 is formed on the substrate 701. Thus, an electronic device with a narrow frame can be realized.

[0106] By adopting the above structure, a large and high-resolution display device can be realized. For example, a display device with a screen size of 30 inches or more, 40 inches or more, 50 inches or more, or 60 inches or more can be realized. In addition, a display device with extremely high resolution such as 4K2K and 8K4K can be realized.

[0107] <Cross-sectional structure example 1> Figure 7 are respectively along Fig. 6A A cross-sectional view along the dashed line QR is shown.

[0108] 6 and 7 include a wiring portion 711, a pixel portion 702, a source driver circuit portion 704, and an FPC terminal portion 708. The wiring portion 711 includes a signal line 710. In addition, the pixel portion 702 includes a transistor 750 and a capacitor 790. The source driver circuit portion 704 includes a transistor 752.

[0109] Figure 7 The capacitor 790 shown includes a lower electrode formed by processing a film that is the same film as the first gate electrode included in the transistor 750, and an upper electrode formed by processing the same metal oxide as the semiconductor layer. The upper electrode is low-resistance, similar to the source region and the drain region of the transistor 750. In addition, a portion of the insulating film used as the first gate insulating layer of the transistor 750 is provided between the lower electrode and the upper electrode. That is, the capacitor 790 has a stacked structure in which the insulating film used as a dielectric film is sandwiched between a pair of electrodes. In addition, the upper electrode is electrically connected to a wiring formed by processing the same film as the source electrode and the drain electrode of the transistor.

[0110] In addition, an insulating layer 770 is provided over the transistor 750, the transistor 752, and the capacitor 790. The insulating layer 770 has a function as a planarization film, and can flatten the top surfaces of the conductive layers 772 and 774 provided on the insulating layer 770. Since the conductive layers 772 and 774 are located on the same surface and the top surfaces of the conductive layers 772 and 774 are flat, the conductive layers 772 and 774 are easily electrically connected to the light-emitting element 782.

[0111] The conductive layers 772 and 774 are electrically connected to the light emitting element 782 via the conductive bumps 791 and 793 . Figure 7 The structure in which the heights of the cathode electrode and the anode electrode included in the light-emitting element 782 are different and the heights of the bumps 791 and the bumps 793 are different is shown. Note that when the heights of the cathode electrode and the anode electrode included in the light-emitting element 782 are the same, a structure in which the heights of the bumps 791 and the bumps 793 are substantially the same can be achieved.

[0112] like Figure 7 As shown, the transistor 750 included in the pixel portion 702 is preferably provided below the conductive layer 772 in such a manner as to overlap with the conductive layer 772. By having a region where the transistor 750 (particularly a channel formation region) overlaps with the conductive layer 772, light emitted from the light-emitting element 782 or external light can be prevented from reaching the transistor 750, and changes in the electrical characteristics of the transistor 750 can be suppressed.

[0113] In addition, the transistor 750 included in the pixel portion 702 and the transistor 752 included in the source driver circuit portion 704 may also use transistors of different structures. For example, a structure in which one side uses a top-gate transistor and the other side uses a bottom-gate transistor may be adopted. In addition, the gate driver circuit portion 706 is also the same as the source driver circuit portion 704.

[0114] The signal line 710 is formed of the same conductive film as the source electrode and drain electrode of the transistors 750 and 752. Here, a low-resistance material such as a material containing copper is preferably used, thereby reducing signal delay caused by wiring resistance, thereby achieving a large-screen display.

[0115] The FPC terminal portion 708 includes a wiring 760, a part of which is used as a connection electrode, an anisotropic conductive film 780, and an FPC 716. The wiring 760 is electrically connected to the terminal of the FPC 716 via the anisotropic conductive film 780. Here, the wiring 760 is formed of a film that is the same conductive film as the source electrode and the drain electrode of the transistors 750 and 752.

[0116] A flexible substrate such as a glass substrate or a plastic substrate can be used as the first substrate 701 and the second substrate 705. When a flexible substrate is used as the first substrate 701, an insulating layer having a barrier property against water or hydrogen is preferably provided between the first substrate 701 and the transistor 750 or the like.

[0117] In addition, a light shielding layer 738, a coloring layer 736, and a fluorescent layer 797 are provided on the second substrate 705 side. The coloring layer 736 is provided on the light emitting element 782. The fluorescent layer 797 is provided between the light emitting element 782 and the coloring layer 736. In addition, the fluorescent layer 797, the light emitting element 782, and the coloring layer 736 have a region overlapping each other. Figure 7 As shown, it is preferred that the end of the fluorescent layer 797 is located outside the end of the light-emitting element 782, and the end of the coloring layer 736 is located outside the end of the fluorescent layer 797. By adopting the above structure, it is possible to suppress light leakage to adjacent pixels and color mixing between pixels. In addition, by providing a light shielding layer 738 between the adjacent coloring layer 736, it is possible to reduce glare from external light and realize a display device with high contrast.

[0118] For example, by adopting a structure in which the phosphor layer 797 includes a phosphor that emits yellow light and the light-emitting element 782 emits blue light, white light is emitted from the phosphor layer 797. The light emitted by the light-emitting element 782 set in the area overlapping with the coloring layer 736 that allows red light to pass through the phosphor layer 797 and the coloring layer 736 and is emitted as red light to the display surface side. Similarly, the light emitted by the light-emitting element 782 set in the area overlapping with the coloring layer 736 that allows green light to pass through is emitted as green light. The light emitted by the light-emitting element 782 set in the area overlapping with the coloring layer 736 that allows blue light to pass through is emitted as blue light. Thus, a single light-emitting element 782 can be used for color display. In addition, since a single light-emitting element 782 is used as a display device, the manufacturing process can be simplified. In other words, according to one embodiment of the present invention, a display device with high brightness and contrast, fast response speed and low power consumption can be realized at a low manufacturing cost.

[0119] For example, a structure in which the fluorescent layer 797 includes a fluorescent material that emits red light and the light-emitting element 782 emits blue-green light may be employed so that white light is emitted from the fluorescent layer 797 .

[0120] Alternatively, the phosphor layer 797 may include a phosphor that emits red light, a phosphor that emits green light, and a phosphor that emits blue light, and the light-emitting element 782 may emit near-ultraviolet light or violet light, thereby emitting white light from the phosphor layer 797 .

[0121] Figure 7The display device 700 shown includes a light emitting element 782. As the light emitting element 782, a face-down type LED chip having a horizontal structure as shown in FIG.

[0122] In addition, the coloring layer 736 is provided at a position overlapping with the light emitting element 782, and the light shielding layer 738 is provided at a position overlapping with the end of the coloring layer 736, the routing wiring portion 711, and the source driver circuit portion 704. In addition, the space between the phosphor layer 797, the coloring layer 736, the light shielding layer 738, and the light emitting element 782 is filled with a sealing film 732.

[0123] The light shielding layer 795 is provided adjacent to the light emitting element 782. The light shielding layer 795 is preferably provided between adjacent light emitting elements 782. By providing the light shielding layer 795 between adjacent light emitting elements 782, light leakage to adjacent pixels and color mixing between pixels can be suppressed. As the light shielding layer 795, a resin including a pigment, a dye, or carbon black can be used. In addition, the side surface of the light emitting element 782 is preferably in contact with the light shielding layer 795. By covering the side surface of the light emitting element 782 with the light shielding layer 795, light leakage to adjacent pixels and color mixing between pixels can be suppressed. Note that Figure 7 The structure in which the height of the top surface of the light shielding layer 795 is substantially the same as the height of the top surface of the light emitting element 782 is shown, but one embodiment of the present invention is not limited thereto. The height of the top surface of the light shielding layer 795 may be lower than the height of the top surface of the light emitting element 782, or may be higher than the height of the top surface of the light emitting element 782. By making the height of the top surface of the light shielding layer 795 substantially the same as the height of the top surface of the light emitting element 782, or higher than the height of the top surface of the light emitting element 782, light leakage to adjacent pixels and color mixing between pixels can be effectively suppressed.

[0124] Figure 8 The structure of a display device suitable for a flexible display is shown. Figure 8 It is along Figure 6B A cross-sectional view taken along dashed line ST in the display device 700A is shown.

[0125] Figure 8 The display device 700A shown in the figure adopts a stacked structure of a supporting substrate 745, an adhesive layer 742, a resin layer 743 and an insulating layer 744 instead of Figure 7 A substrate 701 is shown. A transistor 750, a capacitor 790, and the like are provided on an insulating layer 744 provided on a resin layer 743.

[0126] The support substrate 745 is a flexible thin substrate including an organic resin, glass, or the like. The resin layer 743 is a layer of an organic resin including a polyimide resin, an acrylic resin, or the like. The insulating layer 744 includes an inorganic insulating film including silicon oxide, silicon oxynitride, silicon nitride, or the like. The resin layer 743 and the support substrate 745 are bonded together by an adhesive layer 742. The resin layer 743 is preferably thinner than the support substrate 745.

[0127] also, Figure 8 The display device 700A shown includes a protective layer 740 instead of Figure 7 The substrate 705 is shown. The protective layer 740 is bonded to the sealing film 732. The protective layer 740 may be a glass substrate, a resin film, etc. In addition, the protective layer 740 may be an optical member such as a scattering plate, an input device such as a touch sensor panel, or a stacked structure of two or more of the above.

[0128] also, Figure 8 7 shows a foldable region P2. The region P2 includes a portion where no inorganic insulating film such as a supporting substrate 745, an adhesive layer 742, and an insulating layer 744 is provided. In addition, in the region P2, a resin layer 746 is provided to cover the wiring 760. By not providing an inorganic insulating film in the foldable region P2 as much as possible and adopting a structure in which only a conductive layer containing a metal or alloy and a layer containing an organic material are stacked, cracks can be prevented from being generated when the display device 700A is bent. In addition, by not providing a supporting substrate 745 in the region P2, a portion of the display device 700A can be bent with an extremely small radius of curvature.

[0129] Next, Figure 7 9 to 12 are schematic cross-sectional views showing each step in the process of the method for manufacturing the display device 700. FIG.

[0130] The thin film (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed by sputtering, chemical vapor deposition (CVD: Chemical Vapor Deposition) method, vacuum evaporation method, pulsed laser deposition (PLD: Pulsed Laser Deposition) method, atomic layer deposition (ALD: Atomic Layer Deposition) method, etc. As a CVD method, a plasma enhanced chemical vapor deposition (PECVD) method and a thermal CVD method can also be used. As an example of a thermal CVD method, an organic metal chemical vapor deposition (MOCVD: Metal Organic CVD) method can be used.

[0131] In addition, the thin films (insulating films, semiconductor films, conductive films, etc.) that constitute the display device can be formed using methods such as spin coating, dipping, spraying, inkjet printing, dispenser, screen printing, offset printing, and tools (equipment) such as doctor knife, slit coating, roller coating, curtain coating, and doctor blade coating.

[0132] In addition, when processing the thin film constituting the display device, it can be processed by photolithography or the like. In addition, an island-shaped thin film can be formed by a film forming method using a shielding mask. In addition, the thin film can be processed by nanoimprinting, sandblasting, stripping, etc. There are two methods of photolithography, for example. One is to apply a photosensitive resist material on the thin film to be processed, expose it through a mask, and then develop it to form a resist mask, process the thin film by etching, etc., and remove the resist mask. The other is a method of forming a photosensitive thin film, exposing it, and developing it to process the thin film into a desired shape.

[0133] In the photolithography method, as the light used for exposure, for example, i-line (wavelength 365nm), g-line (wavelength 436nm), h-line (wavelength 405nm) or a mixture of these lights can be used. In addition, ultraviolet light, KrF laser or ArF laser, etc. can also be used. In addition, liquid immersion exposure technology can also be used for exposure. As the light used for exposure, extreme ultraviolet light (EUV: Extreme Ultra-violet) or X-rays can also be used. In addition, an electron beam can also be used instead of the light used for exposure. When extreme ultraviolet light, X-rays or electron beams are used, extremely fine processing can be performed, so it is preferred. Note that when exposure is performed by scanning with a light beam such as an electron beam, a photomask is not required.

[0134] As a method for etching the thin film, a dry etching method, a wet etching method, a sand blast method, or the like can be used.

[0135] 〈Formation of transistors, etc.〉 First, the conductive layer 301, the conductive layer 303, and the conductive layer 305 are formed over the substrate 701. The conductive layer 301, the conductive layer 303, and the conductive layer 305 can be formed by forming a resist mask after forming a conductive film, etching the conductive film, and then removing the resist mask.

[0136] Next, an insulating layer 311 is formed to cover the substrate 701 , the conductive layer 301 , the conductive layer 303 , and the conductive layer 305 .

[0137] Next, a semiconductor layer 321, a semiconductor layer 323, and a semiconductor layer 325 are formed (see Fig.9A). The semiconductor layer 321, the semiconductor layer 323, and the semiconductor layer 325 can be formed by forming a resist mask after forming a semiconductor film, etching the semiconductor film, and then removing the resist mask.

[0138] Next, an insulating layer 331, a conductive layer 341, a conductive layer 351, an insulating layer 333, a conductive layer 343, and a conductive layer 353 are formed. An insulating film to be the insulating layer 331 and the insulating layer 333, a conductive film to be the conductive layer 341 and the conductive layer 343, and a conductive film to be the conductive layer 351 and the conductive layer 353 are formed, and then a resist mask is formed, and the insulating film and the conductive film are etched, and then the resist mask is removed.

[0139] Next, an insulating layer 361 and an insulating layer 363 are formed ( Fig. 9B ).

[0140] Next, openings are formed in the insulating layer 361 and the insulating layer 363, and the conductive layers 371, 373a, 373b, 375, 377, and the wiring 760 are formed. The conductive layers 371, 373a, 373b, 375, 377, and the wiring 760 are formed by the same method as the conductive layer 301 and the like.

[0141] Through the above steps, the signal line 710, the transistor 750, the capacitor 790 and the transistor 752 can be formed. Fig. 9C ). Next, an insulating layer 379 is formed. The insulating layer 379 functions as a protective film for the transistor 750 and the like.

[0142] <Formation of Insulating Layer 770> Next, an insulating layer 770 is formed. By using a photosensitive material for the insulating layer 770, an opening can be formed by photolithography or the like. Alternatively, after forming the insulating film as the insulating layer 770, an opening can be formed by etching a portion of the insulating film using a resist mask. When an organic insulating material is used for the insulating layer 770, the flatness of the top surface can be improved, which is preferable.

[0143] Alternatively, an inorganic insulating film may be used as the insulating layer 770. A single layer or a stack of inorganic insulating materials such as silicon nitride, silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, or aluminum nitride oxide may be used as the insulating layer 770. Thus, the insulating layer 770 is used as a protective layer for the transistor 750 or the like.

[0144] Alternatively, the insulating layer 770 may have a stacked-layer structure of an inorganic insulating film and an organic insulating film.

[0145] Next, a portion of the insulating layer 379 on the wiring 760 of the FPC terminal portion 708 is removed to expose the wiring 760 .

[0146] <Formation of Conductive Layer 772 and Conductive Layer 774> Next, a conductive layer 772 and a conductive layer 774 are formed on the insulating layer 770 ( Fig. 10A ). The conductive layer 772 is electrically connected to the transistor 750 through the opening included in the insulating layer 770. The conductive layer 772 and the conductive layer 774 can be formed by the same method as the conductive layer 301. The conductive layer 772 and the conductive layer 774 are preferably made of a material that is reflective to light. For example, the conductive layer 772 and the conductive layer 774 can be made of a material containing silver, palladium and copper alloy (also called APC), aluminum, titanium, copper, or the like.

[0147] Next, conductive bumps 791 and 793 are formed on the conductive layer 772 and the conductive layer 774, respectively. Fig. 10B ). As the bumps 791 and the bumps 793, metals such as gold, silver, and tin, alloys containing the above metals, anisotropic conductive films such as conductive resins, and conductive pastes can be used. As the bumps 791 and the bumps 793, for example, gold can be appropriately used. The bumps 791 and the bumps 793 can be formed using a printing method, a transfer method, an injection method, or the like.

[0148] <Configuration of Light Emitting Element 782> Next, the light-emitting element 782 is arranged on the bumps 791 and the bumps 793. As the light-emitting element 782, a face-down LED chip with a horizontal structure as shown in FIG. 3 can be used. When arranging, the light-emitting element 782 is arranged in such a way that the electrode on the cathode side and the electrode on the anode side of the light-emitting element 782 are in contact with the bumps 791 and the bumps 793, respectively. The bumps 791, the bumps 793, the light-emitting element 782, the conductive layers 772 and the conductive layers 774 are rolled, and the light-emitting element 782 is fixed on the conductive layers 772 and the conductive layers 774. At the same time, the conductive layers 772 and the conductive layers 774 are electrically connected to the light-emitting element 782 (refer to Fig.11 ).

[0149] When configuring the light emitting element 782, a pick-and-place device that picks up the light emitting element 782 from a specified position and transports it to a specified position can be used. Alternatively, the light emitting element 782 can be configured using the FSA (Fluidic Self Assembly) method. In the FSA method, a concave insulating layer suitable for the light emitting element 782 is formed in the area overlapping the conductive layer 772 and the conductive layer 774, and the light emitting element 782 is self-aligned in the liquid. In one embodiment of the present invention, a single LED chip is used as the light emitting element 782, so it is easier to configure the light emitting element 781 than when multiple LED chips are used.

[0150] <Formation of light shielding layer 795> Next, a light shielding film ( Fig.11 ). As the light-shielding film, a metal material or a resin containing a pigment or a dye is used and formed by a photolithography method or the like. At this time, the thickness of the light-shielding film is adjusted so that the light-shielding film is also formed on the light-emitting element 782.

[0151] Next, a portion of the light shielding film that becomes the light shielding layer 795 is removed to expose the top surface of the light emitting element 782 ( Fig. 12A ). When removing the light shielding film, etching or the like can be used. In one embodiment of the present invention, the LED chip used as the light emitting element 782 is one, and the height of the light emitting element 782 of each sub-pixel can be made consistent, so it is easy to make the top surface of each light emitting element 782 uniformly exposed, thereby suppressing the manufacturing cost. In other words, according to one embodiment of the present invention, a display device with high brightness and contrast, fast response speed and low power consumption can be realized at a low manufacturing cost.

[0152] <Formation of Colored Layer 736 and Phosphor Layer 797> Next, a light shielding layer 738 and a coloring layer 736 are formed over the substrate 705 .

[0153] A metal material or a resin material can be used as the light shielding layer 738. When a metal material is used, after forming a conductive film, unnecessary portions are removed by photolithography or the like to form the light shielding layer 738. Alternatively, when a metal material or a photosensitive resin material including a pigment or a dye is used as the light shielding layer 738, it can be formed by photolithography or the like.

[0154] For example, a photosensitive resin material can be used as the coloring layer 736. The coloring layer 736 can be formed by applying a material on the substrate 705 and the light-shielding layer 738, exposing the material to light through a photomask, performing development treatment, and then performing heat treatment.

[0155] Next, a fluorescent layer 797 is formed on the coloring layer 736 ( Fig. 12B ) The fluorescent layer 797 can be formed by, for example, a screen printing method, a dispensing method, or the like using an organic resin layer mixed with a fluorescent substance.

[0156] <Attachment of substrate 701 and substrate 705> Next, an adhesive layer is formed on one or both of the substrate 701 and the substrate 705 to bond them together. The adhesive layer is formed in a manner surrounding the region where the pixels are provided. As the adhesive layer, a thermosetting resin or an ultraviolet curing resin or the like can be used. In addition, a resin or the like that is cured by heating after being cured by ultraviolet light can be used. Alternatively, as the adhesive layer, a resin or the like that has both ultraviolet curing properties and thermosetting properties can also be used.

[0157] Next, the substrate 701 and the substrate 705 are bonded together, and the adhesive layer is cured to form a sealing film 732. Bonding in a reduced pressure atmosphere is preferred because it is possible to prevent bubbles or the like from entering between the substrate 701 and the substrate 705.

[0158] Next, an anisotropic conductive film 780 is provided on the wiring 760. By placing the FPC 716 on the anisotropic conductive film 780 and performing thermocompression bonding, the wiring 760 and the FPC 716 can be electrically connected.

[0159] Through the above steps, the display device 700 ( Figure 7 ).

[0160] <Cross-sectional structure example 2> Fig.13 A configuration example different from that of the above-described display device 700 is shown. Fig.13 It is along Figure 7 A cross-sectional view along the dashed line QR is shown. Fig.13 The display device 700C shown is Figure 7 The main difference between the device 700 shown is that the light emitting element 782 includes the LED package shown in FIG. 4 but does not include the light shielding layer 795 and the phosphor layer 797 .

[0161] Explanation using Figures 14 and 15 Fig.13 14 and 15 are schematic cross-sectional views of the manufacturing method of the display device 700C at various stages of the process. The manufacturing method until the insulating layer 770 is formed can refer to the description of the manufacturing method of the display device 700, so the detailed description is omitted.

[0162] <Formation of Conductive Layer 772 and Conductive Layer 774> Next, a conductive layer 772 and a conductive layer 774 are formed on the insulating layer 770 ( Fig.14A ). The conductive layer 772 is electrically connected to the transistor 750 through an opening included in the insulating layer 770. The conductive layer 772 and the conductive layer 774 can be formed by the same method as that of the conductive layer 301 and the like.

[0163] Next, conductive bumps 791 and 793 are formed on the conductive layer 772 and the conductive layer 774, respectively. Fig. 14B ). As the bumps 791 and the bumps 793, metals such as gold, silver, and tin, alloys containing the above metals, anisotropic conductive films such as conductive resins, and conductive pastes can be used. The bumps 791 and the bumps 793 can be formed by printing, transfer, spraying, or the like.

[0164] For example, silver paste can be used as the bumps 791 and 793, and any one or more of APC, aluminum, titanium, and copper can be used as the conductive layers 772 and 774. With this structure, the light emitting element 782 can be electrically connected to the conductive layers 772 and 774 in a good manner.

[0165] <Configuration of Light Emitting Element 782> Next, light emitting element 782 is arranged on bump 791 and bump 793. As light emitting element 782, a surface mount face-down LED chip shown in FIG. 4 can be used. When arranging, light emitting element 782 is arranged in such a way that the electrode on the cathode side and the electrode on the anode side of light emitting element 782 are in contact with bump 791 and bump 793, respectively. Bump 791, bump 793, light emitting element 782, conductive layer 772 and conductive layer 774 are rolled, and light emitting element 782 is fixed on conductive layer 772 and conductive layer 774. At the same time, conductive layer 772 and conductive layer 774 are electrically connected to light emitting element 782 ( Fig.15A ).

[0166] The light emitting element 782 may be arranged using a pick-and-place device. Alternatively, the light emitting element 782 may be arranged using an FSA method. In one embodiment of the present invention, a single LED chip is used as the light emitting element 782, so that the light emitting element 781 is easier to arrange than when multiple LED chips are used.

[0167] <Formation of Colored Layer> Next, a light shielding layer 738 and a coloring layer 736 are formed on the substrate 705 ( Fig. 15B ). The light shielding layer 738 and the coloring layer 736 can refer to the description of the manufacturing method of the above-mentioned display device 700, so the detailed description is omitted.

[0168] <Attachment of substrate 701 and substrate 705> Next, an adhesive layer for bonding the substrate 701 and the substrate 705 is formed on one or both of them. The bonding between the substrate 701 and the substrate 705 can refer to the description of the manufacturing method of the display device 700, and thus a detailed description is omitted.

[0169] Next, an anisotropic conductive film 780 is provided on the wiring 760. By placing the FPC 716 on the anisotropic conductive film 780 and performing thermocompression bonding, the wiring 760 and the FPC 716 can be electrically connected.

[0170] Through the above steps, the display device 700C ( Fig.13 ).

[0171] <Configuration Example of Input Device Provided on Display Device> In addition, you can also Figure 7 , Figure 8 and Fig.13 The display device shown is provided with an input device. As the input device, for example, a touch sensor or the like can be cited.

[0172] For example, various sensor types may be used, such as electrostatic capacitance type, resistance film type, surface acoustic wave type, infrared type, optical type, pressure sensitive type, etc. Furthermore, two or more of the above types may be used in combination.

[0173] In addition, the touch panel has the following structures: a so-called In-Cell touch panel in which the input device is formed on the inner side of a pair of substrates; a so-called On-Cell touch panel in which the input device is formed on the display device 700; a so-called Out-Cell touch panel in which the input device is attached to the display device 700; and the like.

[0174] At least a part of this embodiment mode can be implemented in combination with other embodiment modes described in this specification as appropriate.

[0175] (Implementation 3) In this embodiment, an example of a transistor that can be used for the display device described in the above embodiment will be described.

[0176] The display device of one embodiment of the present invention can be manufactured using various types of transistors such as bottom-gate transistors and top-gate transistors, so that the semiconductor layer material or transistor structure used can be easily replaced in accordance with existing production lines.

[0177] <Bottom-gate transistor> Fig.16A1 FIG. 1 is a cross-sectional view of a channel protection transistor 1810, which is one of the bottom-gate transistors, in the channel length direction. Fig.16A1 In the embodiment, the transistor 1810 is formed on a substrate 1771. In addition, the transistor 1810 includes an electrode 1746 on the substrate 1771 via an insulating layer 1772. In addition, the semiconductor layer 1742 is included on the electrode 1746 via an insulating layer 1726. The electrode 1746 may be used as a gate electrode. The insulating layer 1726 may be used as a gate insulating layer.

[0178] In addition, an insulating layer 1741 is included on the channel formation region of the semiconductor layer 1742. In addition, an electrode 1744a and an electrode 1744b are included on the insulating layer 1726 in a manner of contacting a portion of the semiconductor layer 1742. The electrode 1744a can be used as one of a source electrode and a drain electrode. The electrode 1744b can be used as the other of a source electrode and a drain electrode. A portion of the electrode 1744a and a portion of the electrode 1744b are formed on the insulating layer 1741.

[0179] The insulating layer 1741 can be used as a channel protection layer. By providing the insulating layer 1741 on the channel formation region, the semiconductor layer 1742 can be prevented from being exposed when the electrodes 1744a and 1744b are formed. Thus, the channel formation region of the semiconductor layer 1742 can be prevented from being etched when the electrodes 1744a and 1744b are formed. According to one embodiment of the present invention, a transistor with good electrical characteristics can be realized.

[0180] In addition, the transistor 1810 includes an insulating layer 1728 over the electrode 1744 a , the electrode 1744 b , and the insulating layer 1741 , and includes an insulating layer 1729 over the insulating layer 1728 .

[0181] When an oxide semiconductor is used for the semiconductor layer 1742, a material that can remove oxygen from a portion of the semiconductor layer 1742 to generate oxygen vacancies is preferably used for at least a portion of the electrode 1744a and the electrode 1744b that is in contact with the semiconductor layer 1742. The carrier concentration in the region where the oxygen vacancies are generated in the semiconductor layer 1742 increases, and the region is converted to n-type to become an n-type region (n + When an oxide semiconductor is used for the semiconductor layer 1742, an example of a material that can remove oxygen from the semiconductor layer 1742 to generate an oxygen vacancy is tungsten, titanium, or the like.

[0182] By forming the source region and the drain region in the semiconductor layer 1742, the contact resistance between the electrode 1744a and the electrode 1744b and the semiconductor layer 1742 can be reduced. Therefore, the electrical characteristics of the transistor such as field effect mobility and threshold voltage can be improved.

[0183] When a semiconductor such as silicon is used for the semiconductor layer 1742, a layer used as an n-type semiconductor or a p-type semiconductor is preferably provided between the semiconductor layer 1742 and the electrode 1744a and between the semiconductor layer 1742 and the electrode 1744b. The layer used as an n-type semiconductor or a p-type semiconductor can be used as a source region or a drain region of a transistor.

[0184] The insulating layer 1729 is preferably formed using a material having a function of preventing impurities from being diffused into the transistor from the outside or reducing the diffusion of impurities. Note that the insulating layer 1729 can be omitted as necessary.

[0185] Fig.16A2 The transistor 1811 shown in the figure is different from the transistor 1810 in that an electrode 1723 which can function as a back gate electrode is included over the insulating layer 1729. The electrode 1723 can be formed using the same material and method as the electrode 1746.

[0186] Generally speaking, the back gate electrode is formed using a conductive layer and is arranged in a manner that the channel formation region of the semiconductor layer is sandwiched by the gate electrode and the back gate electrode. Therefore, the back gate electrode can have the same function as the gate electrode. The potential of the back gate electrode can be equal to that of the gate electrode, or it can be a ground potential (GND potential) or an arbitrary potential. In addition, by independently changing the potential of the back gate electrode without being linked to the gate electrode, the threshold voltage of the transistor can be changed.

[0187] The electrode 1746 and the electrode 1723 can both be used as gate electrodes. Therefore, the insulating layer 1726, the insulating layer 1728, and the insulating layer 1729 can all be used as gate insulating layers. Alternatively, the electrode 1723 may be provided between the insulating layer 1728 and the insulating layer 1729.

[0188] Note that when one of the electrode 1746 and the electrode 1723 is referred to as a "gate electrode", the other is referred to as a "back gate electrode". For example, in the transistor 1811, when the electrode 1723 is referred to as a "gate electrode", the electrode 1746 is referred to as a "back gate electrode". In addition, when the electrode 1723 is used as a "gate electrode", the transistor 1811 can be considered to be a top gate transistor. In addition, one of the electrode 1746 and the electrode 1723 is sometimes referred to as a "first gate electrode", and the other is sometimes referred to as a "second gate electrode".

[0189] By providing the electrode 1746 and the electrode 1723 with the semiconductor layer 1742 interposed therebetween and setting the potentials of the electrode 1746 and the electrode 1723 to be the same, the region through which carriers flow in the semiconductor layer 1742 is further expanded in the film thickness direction, so that the amount of carrier movement increases. As a result, the on-state current of the transistor 1811 increases, and the field effect mobility also increases.

[0190] Therefore, transistor 1811 is a transistor having a large on-state current relative to the occupied area. That is, the occupied area of ​​transistor 1811 can be reduced relative to the required on-state current. According to one embodiment of the present invention, the occupied area of ​​the transistor can be reduced. Therefore, according to one embodiment of the present invention, a semiconductor device with high integration can be realized.

[0191] In addition, since the gate electrode and the back gate electrode are formed using a conductive layer, they have a function of preventing the electric field generated outside the transistor from affecting the semiconductor layer forming the channel (especially the electric field shielding function against static electricity, etc.). In addition, when the back gate electrode is formed larger than the semiconductor layer so as to cover the semiconductor layer with the back gate electrode, the electric field shielding function can be improved.

[0192] In addition, by forming the back gate electrode using a light-shielding conductive film, light can be prevented from entering the semiconductor layer from the back gate electrode side, thereby preventing light degradation of the semiconductor layer and preventing degradation of electrical characteristics such as threshold voltage drift of the transistor.

[0193] According to one embodiment of the present invention, a transistor with high reliability can be realized. In addition, a semiconductor device with high reliability can be realized.

[0194] Fig.16B1 Shown with Fig.16A1 A cross-sectional view of a channel length direction of a channel protection transistor 1820 having a different structure. The transistor 1820 has a structure substantially the same as the transistor 1810, except that the insulating layer 1741 covers the end of the semiconductor layer 1742. In an opening formed by selectively removing a portion of the insulating layer 1741 overlapping the semiconductor layer 1742, the semiconductor layer 1742 is electrically connected to the electrode 1744a. In addition, in other openings formed by selectively removing a portion of the insulating layer 1741 overlapping the semiconductor layer 1742, the semiconductor layer 1742 is electrically connected to the electrode 1744b. The region of the insulating layer 1741 overlapping the channel formation region can be used as a channel protection layer.

[0195] Figure 16B2 The transistor 1821 shown is different from the transistor 1820 in that an electrode 1723 which can be used as a back gate electrode is included on the insulating layer 1729 .

[0196] By providing the insulating layer 1729, exposure of the semiconductor layer 1742 that is generated when the electrode 1744a and the electrode 1744b are formed can be prevented. Therefore, the semiconductor layer 1742 can be prevented from being thinned when the electrode 1744a and the electrode 1744b are formed.

[0197] In addition, the distance between the electrode 1744a and the electrode 1746 and the distance between the electrode 1744b and the electrode 1746 of the transistor 1820 and the transistor 1821 are longer than those of the transistor 1810 and the transistor 1811. Therefore, the parasitic capacitance generated between the electrode 1744a and the electrode 1746 can be reduced. In addition, the parasitic capacitance generated between the electrode 1744b and the electrode 1746 can be reduced. According to one embodiment of the present invention, a transistor having good electrical characteristics can be provided.

[0198] Fig.16C1The transistor 1825 shown is a cross-sectional view of a channel-etched transistor 1825, which is one of the bottom-gate transistors, in the channel length direction. In the transistor 1825, the electrode 1744a and the electrode 1744b are formed without using the insulating layer 1741. Therefore, a portion of the semiconductor layer 1742 exposed when the electrode 1744a and the electrode 1744b are formed is sometimes etched. On the other hand, since the insulating layer 1741 is not provided, the productivity of the transistor can be improved.

[0199] Fig.16C2 The transistor 1826 shown is different from the transistor 1825 in that an electrode 1723 which can function as a back gate electrode is provided over the insulating layer 1729 .

[0200] FIG. 17A1 to FIG. 17C2 A cross-sectional view of transistors 1810 , 1811 , 1820 , 1821 , 1825 , and 1826 in the channel width direction is shown.

[0201] exist Figure 17B2 and Fig.17C2 In the structure shown, the gate electrode and the back gate electrode are connected to each other, so that the gate electrode and the back gate electrode have the same potential. In addition, the semiconductor layer 1742 is sandwiched between the gate electrode and the back gate electrode.

[0202] The length of the gate electrode and the back gate electrode in the channel width direction is greater than the length of the semiconductor layer 1742 in the channel width direction, and the entire semiconductor layer 1742 in the channel width direction is covered by the gate electrode or the back gate electrode via the insulating layers 1726 , 1741 , 1728 , and 1729 .

[0203] By adopting this structure, the semiconductor layer 1742 included in the transistor can be electrically surrounded by the electric field of the gate electrode and the back gate electrode.

[0204] A device structure of a transistor such as the transistor 1821 or the transistor 1826 in which the semiconductor layer 1742 forming a channel formation region is electrically surrounded by an electric field between a gate electrode and a back gate electrode can be referred to as a surrounded channel (S-channel) structure.

[0205] By adopting the S-channel structure, an electric field for causing channel formation can be effectively applied to the semiconductor layer 1742 using one or both of the gate electrode and the back gate electrode. As a result, the current driving capability of the transistor is improved, so that a higher on-state current characteristic can be obtained. As a result, the current driving capability of the transistor is improved, so that a higher on-state current characteristic can be obtained. In addition, since the on-state current can be increased, the transistor can be miniaturized. In addition, by adopting the S-channel structure, the mechanical strength of the transistor can be improved.

[0206] <Top-gate transistor> Fig.18A1 The transistor 1842 shown as an example is a top-gate transistor. The transistor 1842 is different from the transistors 1810 and 1820 in that the electrodes 1744a and 1744b are formed after the insulating layer 1729 is formed. The electrodes 1744a and 1744b are electrically connected to the semiconductor layer 1742 in the openings formed in the insulating layers 1728 and 1729.

[0207] In addition, a portion of the insulating layer 1726 that does not overlap with the electrode 1746 is removed, and impurities are introduced into the semiconductor layer 1742 using the electrode 1746 and the remaining insulating layer 1726 as a mask, thereby forming an impurity region in the semiconductor layer 1742 in a self-aligned manner. The transistor 1842 includes a region where the insulating layer 1726 extends beyond the end of the electrode 1746. The impurity concentration of the region of the semiconductor layer 1742 into which the impurities are introduced through the insulating layer 1726 is lower than that of the region into which the impurities are not introduced through the insulating layer 1726. Therefore, an LDD (Lightly Doped Drain) region is formed in the region of the semiconductor layer 1742 that does not overlap with the electrode 1746.

[0208] Fig.18A2 The transistor 1843 shown is different from the transistor 1842 in that it includes an electrode 1723. The transistor 1843 includes the electrode 1723 formed on the substrate 1771. The electrode 1723 includes a region overlapping the semiconductor layer 1742 via the insulating layer 1772. The electrode 1723 can be used as a back gate electrode.

[0209] In addition, if Figure 18B1 The transistor 1844 and Figure 18B2 As in the transistor 1845 shown in FIG. 1 , the insulating layer 1726 in the region not overlapping with the electrode 1746 may be completely removed. Fig.18C1 The transistor 1846 and Fig.18C2 As in the transistor 1847 shown in the figure, the insulating layer 1726 does not need to be removed.

[0210] In the transistors 1843 to 1847, after forming the electrode 1746, impurities may be introduced into the semiconductor layer 1742 using the electrode 1746 as a mask, thereby forming an impurity region in the semiconductor layer 1742 in a self-aligned manner. According to one embodiment of the present invention, a transistor with good electrical characteristics can be realized. In addition, according to one embodiment of the present invention, a semiconductor device with high integration can be realized.

[0211] FIG. 19A1 to FIG. 19C2A cross-sectional view of transistors 1842 , 1843 , 1844 , 1845 , 1846 , and 1847 in the channel width direction is shown.

[0212] The transistor 1843, the transistor 1845, and the transistor 1847 have the above-described S-channel structure. However, the present invention is not limited thereto, and the transistor 1843, the transistor 1845, and the transistor 1847 may not have the S-channel structure.

[0213] Hereinafter, metal oxides suitable for use in a channel formation region of a transistor will be described.

[0214] As a semiconductor material for a transistor, a metal oxide having an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more can be used. Typically, a metal oxide containing indium can be used, for example, CAC-OS described later can be used.

[0215] A transistor using a metal oxide having a wider band gap than silicon and a lower carrier density has a small off-state current and can therefore retain the charge stored in a capacitor connected in series with the transistor for a long period of time.

[0216] As the semiconductor layer, for example, a film represented by an “In-M-Zn-based oxide” containing indium, zinc, and M (a metal such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or hafnium) can be used.

[0217] When the metal oxide constituting the semiconductor layer is an In-M-Zn oxide, the atomic ratio of the metal element of the sputtering target used to form the In-M-Zn oxide film preferably satisfies In≥M and Zn≥M. The atomic ratio of the metal element of such a sputtering target is preferably In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, etc. Note that the atomic ratio of the semiconductor layer formed may vary within the range of ±40% of the atomic ratio of the metal element in the above-mentioned sputtering target.

[0218] As the semiconductor layer, a metal oxide film with a low carrier density can be used. For example, a metal oxide film with a carrier density of 1×10 17 / cm 3 Below, preferably 1×10 15 / cm 3 Below, more preferably 1×10 13 / cm 3 Below, more preferably 1×10 11 / cm 3 Below, more preferably less than 1×10 10 / cm 3 , 1×10 -9 / cm 3 Such metal oxides are called high-purity intrinsic or substantially high-purity intrinsic metal oxides. Since the impurity concentration and defect level density of the metal oxide are low, it can be said that the metal oxide is a metal oxide with stable characteristics.

[0219] Note that the present invention is not limited to the above description, and an oxide semiconductor having an appropriate composition can be used according to the semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the desired transistor. In addition, it is preferred to appropriately set the carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. of the semiconductor layer to obtain the desired semiconductor characteristics of the transistor.

[0220] When the metal oxide constituting the semiconductor layer contains silicon or carbon, which is one of the elements of Group 14, oxygen defects in the semiconductor layer increase, which makes the semiconductor layer n-type. Therefore, the concentration of silicon or carbon in the semiconductor layer (the concentration measured by secondary ion mass spectrometry) is set to 2×10 18 atoms / cm 3 Below, preferably 2×10 17 atoms / cm 3 the following.

[0221] In addition, when alkali metals and alkaline earth metals are bonded to metal oxides, carriers are generated, which increases the off-state current of the transistor. Therefore, the concentration of alkali metals or alkaline earth metals in the semiconductor layer measured by secondary ion mass spectrometry is set to 1×10 18 atoms / cm 3 Below, preferably 2×10 16 atoms / cm 3 the following.

[0222] In addition, when the metal oxide constituting the semiconductor layer contains nitrogen, electrons are generated as carriers, the carrier density increases, and the transistor is easily converted to n-type. As a result, the transistor using the metal oxide containing nitrogen is easily converted to normally-on characteristics. Therefore, the nitrogen concentration of the semiconductor layer measured by secondary ion mass spectrometry is preferably 5×10 18 atoms / cm 3 the following.

[0223] Oxide semiconductors are classified into single crystal oxide semiconductors and non-single crystal oxide semiconductors. Examples of non-single crystal oxide semiconductors include CAAC-OS (c-axis aligned crystalline oxide semiconductor), polycrystalline oxide semiconductors, nc-OS (nanocrystalline oxide semiconductor), a-like OS (amorphous-like oxide semiconductor), and amorphous oxide semiconductors.

[0224] A semiconductor layer of a transistor disclosed as one embodiment of the present invention may use CAC-OS (Cloud-Aligned Composite Oxide Semiconductor).

[0225] The semiconductor layer of the transistor disclosed in one embodiment of the present invention can use the above-mentioned non-single-crystal oxide semiconductor or CAC-OS. In addition, nc-OS or CAAC-OS is preferably used as the non-single-crystal oxide semiconductor.

[0226] In one embodiment of the present invention, CAC-OS is preferably used as a semiconductor layer of a transistor. By using CAC-OS, high electrical characteristics and high reliability can be imparted to the transistor.

[0227] The semiconductor layer may also be a mixed film of two or more of a CAAC-OS region, a polycrystalline oxide semiconductor region, an nc-OS region, an a-like OS region, and an amorphous oxide semiconductor region. The mixed film may sometimes have a single-layer structure or a stacked-layer structure including two or more of the above regions.

[0228] Hereinafter, a configuration of a CAC-OS that can be used for the transistor disclosed in one embodiment of the present invention will be described.

[0229] CAC-OS refers to a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm to 10 nm, preferably 1 nm to 2 nm or a similar size. Note that the state in which one or more metal elements are unevenly distributed in the metal oxide and the regions containing the metal elements are mixed is also referred to as a mosaic or patch shape below, and the size of the region is 0.5 nm to 10 nm, preferably 1 nm to 2 nm or a similar size.

[0230] The metal oxide preferably contains at least indium. In particular, it preferably contains indium and zinc. In addition, it may also contain one or more selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten and magnesium.

[0231] For example, CAC-OS in In-Ga-Zn oxide (in CAC-OS, In-Ga-Zn oxide can be referred to as CAC-IGZO in particular) refers to a material divided into indium oxide (hereinafter referred to as InO X1 (X1 is a real number greater than 0)) or indium zinc oxide (hereinafter referred to as In X2 Zn Y2 O Z2 (X2, Y2 and Z2 are real numbers greater than 0)) and gallium oxide (hereinafter referred to as GaO X3 (X3 is a real number greater than 0)) or gallium zinc oxide (hereinafter referred to as Ga X4 Zn Y4 O Z4 (X4, Y4 and Z4 are real numbers greater than 0)) etc. to form a mosaic shape, and the mosaic-shaped InO X1 or In X2 Zn Y2 O Z2 A structure uniformly distributed in the film (hereinafter also referred to as a cloud shape).

[0232] In other words, CAC-OS is a GaO X3 The area with In as the main component X2 Zn Y2 O Z2 or InO X1 In this specification, for example, when the atomic ratio of In to element M in the first region is greater than that in the second region, the In concentration in the first region is higher than that in the second region.

[0233] Note that IGZO is a general term and sometimes refers to a compound containing In, Ga, Zn, and O. As a typical example, InGaO3(ZnO) m1 (m1 is a natural number) or In (1+x0) Ga (1-x0) O3(ZnO) m0 (-1≤x0≤1, m0 is an arbitrary number).

[0234] The crystalline compound has a single crystal structure, a polycrystalline structure or a CAAC structure. The CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have c-axis orientation and are connected in a non-oriented manner on the ab plane.

[0235] On the other hand, CAC-OS is related to the material composition of metal oxides. CAC-OS refers to the following composition: in the material composition containing In, Ga, Zn and O, nanoparticle-like regions with Ga as the main component are observed in part, and nanoparticle-like regions with In as the main component are observed in part, and these regions are scattered irregularly in a mosaic shape. Therefore, in CAC-OS, the crystal structure is a secondary factor.

[0236] CAC-OS does not include a stacked-layer structure of two or more films having different compositions, for example, a structure consisting of two layers of a film having In as a main component and a film having Ga as a main component.

[0237] Note that sometimes no GaO X3 The area with In as the main component X2 Zn Y2 O Z2 or InO X1 There are clear boundaries between the regions of the main components.

[0238] In the case where CAC-OS includes one or more selected from aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten and magnesium instead of gallium, CAC-OS refers to a structure in which nanoparticle-like regions with the metal element as the main component are observed in a part and nanoparticle-like regions with In as the main component are observed in a part and are irregularly dispersed in a mosaic manner.

[0239] CAC-OS can be formed, for example, by sputtering without heating the substrate. When CAC-OS is formed by sputtering, one or more selected from an inert gas (typically argon), an oxygen gas, and a nitrogen gas can be used as a film-forming gas. In addition, the lower the flow rate ratio of the oxygen gas in the total flow rate of the film-forming gas during film formation, the better. For example, the flow rate ratio of the oxygen gas is set to be greater than 0% and less than 30%, preferably greater than 0% and less than 10%.

[0240] CAC-OS has the following characteristics: when measured by the Out-of-plane method using θ / 2θ scanning, which is one of the X-ray diffraction (XRD) measurement methods, no clear peak is observed. In other words, according to X-ray diffraction, it can be seen that there is no orientation in the ab plane direction and the c-axis direction in the measurement area.

[0241] In addition, in the electron diffraction pattern of CAC-OS obtained by irradiating an electron beam with a beam diameter of 1 nm (also called a nanobeam), a ring-shaped area with high brightness (ring-shaped area) and multiple bright spots in the ring-shaped area were observed. Therefore, according to the electron diffraction pattern, it can be seen that the crystal structure of CAC-OS has an nc (nano-crystal) structure that is not oriented in the plane direction and the cross-sectional direction.

[0242] In addition, for example, in CAC-OS of In-Ga-Zn oxide, it can be confirmed from an EDX mapping image obtained by energy dispersive X-ray spectroscopy (EDX) that there is a GaO X3 The area with In as the main component X2 Zn Y2 O Z2 or InO X1 A composition in which the main components are unevenly distributed in the area.

[0243] The structure of CAC-OS is different from that of IGZO compounds in which metal elements are evenly distributed, and it has different properties from IGZO compounds. X3 The area with In as the main component X2 Zn Y2 O Z2 or InO X1 The regions where the main components are present are separated from each other, and the regions where the main components are present are in a mosaic-like structure.

[0244] Here, In X2 Zn Y2 O Z2 or InO X1 The conductivity of the area with GaO as the main component is higher than that of the area with GaO as the main component. X3 In other words, when the carrier flows through the region with In X2 Zn Y2 O Z2 or InO X1 When In is the main component, the conductivity of metal oxide is shown. X2 Zn Y2 O Z2 or InO X1 When the region with Mg as the main component is distributed in a cloud-like manner in the metal oxide, a high field-effect mobility (μ) can be achieved.

[0245] On the other hand, GaO X3 The insulation of the area with In as the main component is higher than that of the area with In X2Zn Y2 O Z2 or InO X1 In other words, when GaO X3 When regions with the main components of MgO and MgO are distributed in the metal oxide, leakage current can be suppressed and good switching operation can be achieved.

[0246] Therefore, when CAC-OS is used in semiconductor devices, the X3 The insulation properties of etc. and the causes of In X2 Zn Y2 O Z2 or InO X1 The complementary effect of conductivity can achieve high on-state current (I on ) and high field effect mobility (μ).

[0247] In addition, semiconductor elements using CAC-OS have high reliability, and therefore, CAC-OS is suitable for various semiconductor devices such as displays.

[0248] In addition, since the transistor whose semiconductor layer includes CAC-OS has high field effect mobility and high driving capability, by using the transistor in a driving circuit, typically a scanning line driving circuit that generates a gate signal, a display device with a small frame width (also called a narrow frame) can be provided. In addition, by using the transistor in a signal line driving circuit included in the display device (especially, a demultiplexer connected to the output terminal of the shift register included in the signal line driving circuit), a display device with a small number of wirings connected to the display device can be provided.

[0249] In addition, like transistors using low-temperature polysilicon, transistors whose semiconductor layers include CAC-OS do not require a laser crystallization process. As a result, even for display devices using large-area substrates, manufacturing costs can be reduced. Moreover, in large display devices with high resolutions such as ultra-high definition (also known as "4K resolution", "4K2K" or "4K") and ultra-high definition (also known as "8K resolution", "8K4K" or "8K"), by using transistors having CAC-OS in the semiconductor layer for driving circuits and display units, writing can be performed in a short time and display defects can be reduced, so it is preferred.

[0250] Alternatively, silicon can be used for a semiconductor having a channel of a transistor. Amorphous silicon can be used as silicon, and crystalline silicon is particularly preferred. For example, microcrystalline silicon, polycrystalline silicon, single crystal silicon, etc. are preferably used. In particular, polycrystalline silicon can be formed at a lower temperature than single crystal silicon, and its field effect mobility and reliability are higher than amorphous silicon.

[0251] At least a part of this embodiment mode can be implemented in combination with other embodiment modes described in this specification as appropriate.

[0252] (Implementation 4) In this embodiment, a display device which is one embodiment of the present invention is described.

[0253] Fig. 20A The display device shown includes a pixel portion 502, a driver circuit portion 504, a protective circuit 506, and a terminal portion 507. Note that a structure in which the protective circuit 506 is not provided may be employed.

[0254] The transistor of one embodiment of the present invention can be used as a transistor included in the pixel portion 502 or the driver circuit portion 504. Furthermore, the transistor of one embodiment of the present invention can be used for the protection circuit 506.

[0255] The pixel portion 502 includes a plurality of pixel circuits 501 that drive a plurality of display elements arranged in X rows and Y columns (X and Y are each an independent natural number of 2 or more).

[0256] The driving circuit unit 504 includes a gate driver 504a that outputs scanning signals to the gate lines GL_1 to GL_X, a source driver 504b that supplies data signals to the data lines DL_1 to DL_Y, and other driving circuits. The gate driver 504a may be configured to include at least a shift register. In addition, the source driver 504b may be configured to include, for example, a plurality of analog switches. In addition, the source driver 504b may also be configured to include a shift register.

[0257] The terminal portion 507 is a portion where terminals for inputting power, control signals, image signals, and the like from an external circuit to the display device are provided.

[0258] The protection circuit 506 is a circuit that causes the wiring connected thereto to be in a conductive state with other wirings when a potential outside a certain range is supplied thereto. Fig. 20A The protection circuit 506 shown is connected to various wirings such as the scanning line GL between the gate driver 504 a and the pixel circuit 501 or the data line DL between the source driver 504 b and the pixel circuit 501 .

[0259] In addition, a structure in which the gate driver 504a and the source driver 504b are each arranged on the same substrate as the pixel portion 502 can be adopted, or a structure in which another substrate having a gate driving circuit or a source driving circuit formed thereon (for example, a driving circuit board formed using a single crystal semiconductor film or a polycrystalline semiconductor film) is installed on the substrate by COG or TAB (Tape Automated Bonding).

[0260] In addition, for example, Fig. 20A The plurality of pixel circuits 501 shown may have Fig. 20B The structure shown. Fig. 20B The pixel circuit 501 shown includes a transistor 552, a transistor 554, a capacitor 562, and a light emitting element 572. In addition, the pixel circuit 501 is connected to a data line DL_n, a scanning line GL_m, a potential supply line VL_a, a potential supply line VL_b, and the like.

[0261] In addition, a high power supply potential VDD is applied to one of the potential supply line VL_a and the potential supply line VL_b, and a low power supply potential VSS is applied to the other of the potential supply line VL_a and the potential supply line VL_b. According to the potential applied to the gate of the transistor 554, the current flowing through the light-emitting element 572 is controlled, thereby controlling the brightness of the light emitted from the light-emitting element 572.

[0262] Fig.21A Shown as Fig. 20B The transistor 554 in the pixel circuit 501 shown in the figure is an example of using an n-channel transistor. Fig.21A The pixel circuit 501 shown includes a transistor 552, a transistor 554a, a capacitor 562, and a light-emitting element 572a. The transistor 552 is an n-channel transistor, and the transistor 554a is an n-channel transistor. For example, as the transistor 552, a transistor having an oxide semiconductor in a channel formation region shown in the above embodiment mode can be used, and as the transistor 554a, a transistor having silicon in a channel formation region can be used.

[0263] Alternatively, for example, the transistor 552 and the transistor 554a may include a transistor having an oxide semiconductor in a channel formation region as described in the above embodiment. With this structure, the area occupied by the transistor in the pixel is reduced, so that an extremely high-definition image can be displayed.

[0264] exist Fig.21AIn the pixel circuit 501 shown, one of the source and drain of the transistor 552 is electrically connected to the data line DL_n. The other of the source and drain of the transistor 552 is electrically connected to one electrode of the capacitor 562 and the gate of the transistor 554a. The other electrode of the capacitor 562 is electrically connected to the potential supply line VL_a. The gate of the transistor 552 is electrically connected to the scanning line GL_m. One of the source and drain of the transistor 554a is electrically connected to the potential supply line VL_a. The other of the source and drain of the transistor 554a is electrically connected to one electrode of the light emitting element 572a. The other electrode of the light emitting element 572a is electrically connected to the potential supply line VL_b. The potential supply line VL_a is supplied with a low power supply potential VSS, and the potential supply line VL_b is supplied with a high power supply potential VDD.

[0265] Fig. 21B Shown with Fig.21A The pixel circuit 501 shown has a different structure. Fig. 21B In the pixel circuit 501 shown, one of the source and the drain of the transistor 552 is electrically connected to the data line DL_n. The other of the source and the drain of the transistor 552 is electrically connected to one electrode of the capacitor 562 and the gate of the transistor 554a. The gate of the transistor 552 is electrically connected to the scanning line GL_m. One of the source and the drain of the transistor 554a is electrically connected to the potential supply line VL_a. The other of the source and the drain of the transistor 554a is electrically connected to the other electrode of the capacitor 562 and one electrode of the light-emitting element 572a. The other electrode of the light-emitting element 572a is electrically connected to the potential supply line VL_b. The potential supply line VL_a is supplied with a high power supply potential VDD, and the potential supply line VL_b is supplied with a low power supply potential VSS.

[0266] Fig. 21C Shown as Fig. 20B The transistor 554 in the pixel circuit 501 shown is an example of a p-channel transistor. Fig. 21C The pixel circuit 501 shown includes a transistor 552, a transistor 554b, a capacitor 562, and a light-emitting element 572a. The transistor 552 is an n-channel transistor, and the transistor 554b is a p-channel transistor. For example, as the transistor 552, a transistor having an oxide semiconductor in a channel formation region shown in the above embodiment mode can be used, and as the transistor 554b, a transistor having silicon in a channel formation region can be used.

[0267] exist Fig. 21CIn the pixel circuit 501 shown, one of the source and drain of the transistor 552 is electrically connected to the data line DL_n. The other of the source and drain of the transistor 552 is electrically connected to one electrode of the capacitor 562 and the gate of the transistor 554b. The other electrode of the capacitor 562 is electrically connected to the potential supply line VL_a. The gate of the transistor 552 is electrically connected to the scanning line GL_m. One of the source and drain of the transistor 554b is electrically connected to the potential supply line VL_a. The other of the source and drain of the transistor 554a is electrically connected to one electrode of the light-emitting element 572a. The other electrode of the light-emitting element 572a is electrically connected to the potential supply line VL_b. The potential supply line VL_a is supplied with a high power supply potential VDD, and the potential supply line VL_b is supplied with a low power supply potential VSS.

[0268] At least a part of this embodiment mode can be implemented in combination with other embodiment modes described in this specification as appropriate.

[0269] (Implementation method 5) A pixel circuit having a memory for correcting grayscale displayed by a pixel and a display device having the pixel circuit are described. The transistors described in the above embodiment can be used as transistors used in the pixel circuits described below.

[0270] <Circuit Structure> Fig.22A : shows a circuit diagram of a pixel circuit 400. The pixel circuit 400 includes a transistor M1, a transistor M2, a capacitor C1, and a circuit 401. In addition, the pixel circuit 400 is connected to a wiring S1, a wiring S2, a wiring G1, and a wiring G2.

[0271] The gate of the transistor M1 is connected to the wiring G1, one of the source and the drain is connected to the wiring S1, and the other of the source and the drain is connected to one electrode of the capacitor C1. The gate of the transistor M2 is connected to the wiring G2, one of the source and the drain is connected to the wiring S2, and the other of the source and the drain is connected to the other electrode of the capacitor C1 and the circuit 401.

[0272] The circuit 401 includes at least one display element, which can be an LED element.

[0273] A node connecting the transistor M1 and the capacitor C1 is denoted as N1, and a node connecting the transistor M2 and the circuit 401 is denoted as N2.

[0274] The pixel circuit 400 can maintain the potential of the node N1 by turning off the transistor M1. In addition, the potential of the node N2 can be maintained by turning off the transistor M2. In addition, by writing a predetermined potential to the node N1 through the transistor M1 when the transistor M2 is in the off state, the potential of the node N2 can be changed in accordance with the potential change of the node N1 due to the capacitive coupling through the capacitor C1.

[0275] Here, as one or both of the transistor M1 and the transistor M2, the transistor using an oxide semiconductor illustrated in the previous embodiment can be used. Since the transistor has an extremely low off-state current, the potential of the node N1 and the node N2 can be maintained for a long time. In addition, when the potential holding period of each node is short (specifically, when the frame frequency is 30 Hz or more, etc.), a transistor using a semiconductor such as silicon can also be used.

[0276] <Example of driving method> Next, refer to Fig. 22B An example of an operation method of the pixel circuit 400 will be described. Fig. 22B 4 is a timing chart of the operation of the pixel circuit 400. Note that for the sake of convenience, the influence of various resistances such as wiring resistance, parasitic capacitance of transistors and wiring, and threshold voltage of transistors are not considered here.

[0277] exist Fig. 22B In the operation shown, one frame period is divided into a period T1 and a period T2. The period T1 is a period for writing a potential to the node N2, and the period T2 is a period for writing a potential to the node N1.

[0278] 〔Period T1〕 During the period T1, a potential that turns on the transistor is supplied to both the wiring G1 and the wiring G2. In addition, a fixed potential V is supplied to the wiring S1. ref , providing the first data potential V to the wiring S2 w .

[0279] The node N1 is supplied with a potential V from the wiring S1 via the transistor M1. ref In addition, the node N2 is supplied with the first data potential V through the transistor M2. w Therefore, capacitor C1 becomes to maintain the potential difference V w -V ref status.

[0280] 〔Period T2〕 Next, in period T2, a potential for turning on the transistor M1 is supplied to the wiring G1, a potential for turning off the transistor M2 is supplied to the wiring G2, and a second data potential V is supplied to the wiring S1. dataIn addition, the wiring S2 may be provided with a predetermined constant potential or may be placed in a floating state.

[0281] The node N1 is supplied with the second data potential V via the transistor M1. data At this time, due to the capacitive coupling through the capacitor C1, the corresponding second data potential V data The potential of the node N2 changes by a potential dV. That is, the circuit 401 is input with a potential obtained by adding the first data potential Vw and the potential dV. Fig. 22B dV is shown as a positive value, but it can also be a negative value. That is, the potential V data It can also be compared with the potential V ref Low.

[0282] Here, the potential dV is basically determined by the capacitance value of the capacitor C1 and the capacitance value of the circuit 401. When the capacitance value of the capacitor C1 is sufficiently larger than the capacitance value of the circuit 401, the potential dV becomes close to the second data potential V data The potential.

[0283] As described above, since the pixel circuit 400 can combine two types of data signals to generate a potential supplied to the circuit 401 including a display element, grayscale correction can be performed within the pixel circuit 400 .

[0284] In addition, the pixel circuit 400 can generate a potential exceeding the maximum potential that can be supplied to the wiring S1 and the wiring S2. When a light-emitting element is used, high dynamic range (HDR) display and the like can be performed.

[0285] [Example of using light-emitting elements] Fig. 22C The pixel circuit 400EL shown includes a circuit 401EL. The circuit 401EL includes a light emitting element EL, a transistor M3, and a capacitor C2.

[0286] The gate of the transistor M3 is connected to the node N2 and one electrode of the capacitor C2, and one of the source and the drain is connected to the supplied potential V L The other of the source and drain is connected to one electrode of the light emitting element EL. The other electrode of the capacitor C2 is connected to the supply potential V com The other electrode of the light emitting element EL is connected to the wiring supplied with the potential V H Wiring connections.

[0287] The transistor M3 has a function of controlling the current supplied to the light emitting element EL. The capacitor C2 is used as a storage capacitor. The capacitor C2 may be omitted when not required.

[0288] In addition, although the structure in which the cathode side of the light emitting element EL is connected to the transistor M3 is shown here, it is also possible to adopt a structure in which the cathode side of the light emitting element EL is connected to the transistor M3. Fig.22D The anode side is connected to the transistor M3 as shown. At this time, the potential V can be appropriately changed. H With potential V L The value of .

[0289] The pixel circuit 400EL can make a large current flow through the light emitting element EL by applying a high potential to the gate of the transistor M3, so that, for example, HDR display can be realized. In addition, by providing a correction signal to the wiring S1 or the wiring S2, the electrical characteristic deviation of the transistor M3 and the light emitting element EL can be corrected.

[0290] In addition, not limited to Fig. 22C and Fig.22D The circuit shown may also adopt a structure in which transistors or capacitors are additionally added.

[0291] At least a part of this embodiment mode can be implemented in combination with other embodiment modes described in this specification as appropriate.

[0292] (Implementation 6) In this embodiment, a configuration of a data processing device according to one embodiment of the present invention will be described with reference to FIGS. 23 and 24 .

[0293] 23 and 24 are diagrams for explaining the structure of a data processing device according to one embodiment of the present invention. Fig.23A is a block diagram of a data processing device, FIG. 23B to FIG. 23E 2 is a perspective view illustrating the structure of a data processing device. FIG. 24A to FIG. 24E It is a perspective view illustrating the structure of a data processing device.

[0294] <Data Processing Device> The data processing device 5200B described in this embodiment includes a computing device 5210 and an input / output device 5220 (see Fig.23A ).

[0295] The computing device 5210 has a function of being supplied with operation data, and has a function of supplying image data based on the operation data.

[0296] The input / output device 5220 includes a display unit 5230, an input unit 5240, a detection unit 5250, and a communication unit 5290, and has a function of supplying operation data and a function of being supplied with image data. In addition, the input / output device 5220 has a function of supplying detection data, a function of supplying communication data, and a function of being supplied with communication data.

[0297] The input unit 5240 has a function of supplying operation data. For example, the input unit 5240 supplies operation data according to an operation of a user of the data processing device 5200B.

[0298] Specifically, a keyboard, a hardware button, a pointing device, a touch sensor, an illuminance sensor, a camera device, a sound input device, a line of sight input device, a posture detection device, or the like can be used for the input unit 5240 .

[0299] The display portion 5230 includes a display panel and has a function of displaying image data. For example, the display device described in the above embodiment mode can be used for the display portion 5230.

[0300] The detection unit 5250 has a function of supplying detection data. For example, it has a function of detecting the use environment around the data processing device and supplying the detection data.

[0301] Specifically, an illumination sensor, a camera device, a posture detection device, a pressure sensor, a human body sensing sensor, or the like can be used for the detection unit 5250 .

[0302] The communication unit 5290 has the function of being supplied with communication data and the function of supplying communication data. For example, it has the function of connecting with other electronic devices or communication networks by wireless communication or wired communication. Specifically, it has the functions of wireless LAN communication, telephone communication, short-range wireless communication, etc.

[0303] <Configuration Example 1 of Data Processing Device> For example, the display portion 5230 may be formed along the outer shape of a cylindrical column or the like (see Fig. 23B ). In addition, the data processing device 5200B has a function of changing the display method according to the illumination of the use environment. In addition, the data processing device 5200B has a function of detecting the presence of a person and changing the display content. Therefore, the data processing device 5200B can be set on a pillar of a building, for example. Alternatively, it can display advertisements or guides, etc. Alternatively, the data processing device 5200B can be used for digital signage, etc.

[0304] <Configuration Example 2 of Data Processing Device> For example, the data processing device 5200B has a function of generating image data based on the trajectory of a pointer used by the user (see Fig.23C ). Specifically, a display panel with a diagonal length of 20 inches or more, preferably 40 inches or more, and more preferably 55 inches or more can be used. Alternatively, a plurality of display panels can be arranged and used as one display area. Alternatively, a plurality of display panels can be arranged and used as a multi-screen display panel. Therefore, the data processing device 5200B can be used, for example, for an electronic blackboard, an electronic message board, a digital signage, etc.

[0305] <Configuration Example 3 of Data Processing Device> For example, the data processing device 5200B has a function of changing the display method according to the illumination of the use environment (see Fig.23D ). Thus, for example, the power consumption of the smart watch can be reduced. Alternatively, the image can be displayed on the smart watch in a manner that allows the smart watch to be appropriately used in an environment with strong external light, such as outdoors on a sunny day.

[0306] <Configuration Example 4 of Data Processing Device> The display portion 5230 has, for example, a curved surface that is gently curved along the side surface of the housing (see Fig.23E ). Alternatively, the display unit 5230 includes a display panel, and the display panel has, for example, a function of displaying on its front, side, and top surface. Thus, for example, image data can be displayed not only on the front of the mobile phone, but also on the side and top surfaces of the mobile phone.

[0307] <Configuration Example 5 of Data Processing Device> For example, the data processing device 5200B has a function of changing the display method according to the illumination of the use environment (see Fig.24A ). Thus, the power consumption of the smartphone can be reduced. Alternatively, the image can be displayed on the smartphone in a manner that allows the smartphone to be used appropriately in an environment with strong external light, such as outdoors on a sunny day.

[0308] <Configuration Example 6 of Data Processing Device> For example, the data processing device 5200B has a function of changing the display method according to the illumination of the use environment (see Fig. 24B ). Thus, the image can be displayed on the television system in a manner that allows the television system to be appropriately used even in an environment where strong external light enters indoors on a sunny day.

[0309] <Configuration Example 7 of Data Processing Device> For example, the data processing device 5200B has a function of changing the display method according to the illumination of the use environment (see Fig.24C ). Thus, the image can be displayed on the tablet computer in a manner that allows the tablet computer to be suitably used even in an environment with strong external light, such as outdoors on a sunny day.

[0310] <Configuration Example 8 of Data Processing Device> For example, the data processing device 5200B has a function of changing the display method according to the illumination of the use environment (see Fig.24D ). Thus, the photographed object is displayed on the digital camera in a manner that the image can be appropriately viewed even in an environment with strong external light, such as outdoors on a sunny day.

[0311] <Configuration Example 9 of Data Processing Device> For example, the data processing device 5200B has a function of changing the display method according to the illumination of the use environment (see Fig.24E ). Thus, the image can be displayed on the personal computer in a manner that enables the personal computer to be suitably used even in an environment with strong external light, such as outdoors on a sunny day.

[0312] At least a part of this embodiment mode can be implemented in combination with other embodiment modes described in this specification as appropriate. [Explanation of symbols]

[0313] 10, 10A, 10B, 10C, 10D, 10E, 10F, 10G, 10H: display device, 11, 13: substrate, 15: functional layer, 17: light emitting element, 20B: blue light, 20G: green light, 20R: red light, 21, 23: electrode, 25: insulating layer, 27: adhesive layer, 31, 33: light shielding layer, 35: phosphor layer, 50: LED package, 51: LED chip

Claims

1. A display device, comprising: a first substrate, a second substrate, a transistor located between the first substrate and the second substrate, a light emitting element, a coloring layer, a phosphor layer, a first electrode, and a second electrode, wherein the light emitting element has a third electrode serving as a cathode and a fourth electrode serving as an anode, The third electrode is electrically connected to the first electrode via a first bump, The fourth electrode is electrically connected to the second electrode via a second bump, The height of the first bump is different from the height of the second bump, The first electrode is electrically connected to the transistor, The second electrode is located on the same surface as the first electrode, The coloring layer is located on the light emitting element, The phosphor layer is located between the light emitting element and the coloring layer. The phosphor layer, the light-emitting element, and the coloring layer have regions that overlap with each other. A sealing film is included between the phosphor layer and the light emitting element, A light shielding layer is included between the sealing film and the first electrode, and between the sealing film and the second electrode, The light shielding layer is adjacent to the light emitting element, The light emitting element comprises a light emitting diode chip, Furthermore, the phosphor layer includes a phosphor that emits light of a complementary color to the light emitted by the light emitting element.

2. The display device according to claim 1, The light emitting element has the function of emitting blue light. And the phosphor layer includes a phosphor emitting yellow light.

3. The display device according to claim 1, The light emitting element has the function of emitting near ultraviolet light or purple light, And the phosphor layer includes a phosphor emitting red light, a phosphor emitting green light, and a phosphor emitting blue light.

4. The display device according to claim 1, The light emitting element has a function of emitting light toward the coloring layer.

5. The display device according to claim 1, wherein the first bump and the second bump include silver, Furthermore, the first electrode and the second electrode include at least one of silver, aluminum, titanium and copper.

6. The display device according to claim 1, The transistor includes an oxide semiconductor in a channel formation region.

7. The display device according to claim 1, The transistor includes silicon in a channel formation region.

8. The display device according to claim 1, The area of ​​the light emitting element emitting light is 10000 μm 2 The following micro LED.

Citation Information

Patent Citations

  • Semiconductor device and method for manufacturing the same

    JP2007096055A

  • Semiconductor device and its manufacturing method

    JP2007123861A

  • Hybrid Display using Inorganic Micro Light Emitting Diodes (uLEDs) and Organic LEDs (OLEDs)

    US20170179092A1