Silicon-based heterojunction solar cell and preparation method thereof

Abstract

The invention relates to the technical field of solar cells, in particular to a silicon-based heterojunction solar cell and a preparation method thereof. The embodiment of the invention provides a silicon-based heterojunction solar cell which comprises a silicon substrate, a first passivation layer, an N-type doping layer and a first transparent electrode which are sequentially arranged in the first direction, and the first direction is the direction, pointing to the first transparent electrode from the silicon substrate, in the thickness direction of the silicon substrate; the first passivation layer comprises a plurality of sub-layers which are sequentially arranged along the first direction: an intrinsic oxygen-doped amorphous silicon layer and an N-surface intrinsic amorphous silicon layer; and along the first direction, the refractive index of the intrinsic oxygen-doped amorphous silicon layer is gradually increased. According to the embodiment of the invention, passivation can be ensured, the conductivity can be improved, and the open-circuit voltage and the fill factor can be effectively improved.

Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and in particular to a silicon-based heterojunction solar cell and a preparation method thereof. Background Art

[0002] Silicon-based heterojunction cells have attracted much attention from the market due to their ultra-high efficiency, and the research and development of this technology has progressed rapidly in recent years. The mass production of silicon-based heterojunction cells has also begun to take shape, with the current production capacity exceeding 50GW and the planned capacity exceeding 150GW. At present, the passivation layer on the light-facing side of silicon-based heterojunction cells mostly uses an intrinsic amorphous silicon layer, which maintains the passivation effect but is not conducive to improving conductivity.

[0003] It should be noted that the above content is not necessarily prior art, nor is it intended to limit the scope of patent protection of this application. Summary of the invention

[0004] The embodiments of the present application provide a silicon-based heterojunction solar cell and a method for preparing the same, so as to solve or alleviate the above-mentioned technical problem of poor conductivity of the passivation layer of the silicon-based heterojunction solar cell.

[0005] A first aspect of an embodiment of the present application provides a silicon-based heterojunction solar cell, comprising a silicon substrate, a first passivation layer, an N-type doping layer, and a first transparent electrode arranged in sequence along a first direction, wherein the first direction is a direction from the silicon substrate to the first transparent electrode in the thickness direction of the silicon substrate;

[0006] The first passivation layer includes the following multiple sub-layers arranged in sequence along the first direction: an intrinsic oxygen-doped amorphous silicon layer and an N-face intrinsic amorphous silicon layer;

[0007] Along the first direction, the refractive index of the intrinsic oxygen-doped amorphous silicon layer increases gradually.

[0008] In a first aspect of the embodiment of the present application, the first passivation layer is divided into an intrinsic oxygen-doped amorphous silicon layer and an N-side intrinsic amorphous silicon layer. Due to the existence of the intrinsic oxygen-doped amorphous silicon layer, the refractive index of the intrinsic oxygen-doped amorphous silicon layer increases along the first direction. In this way, passivation can be ensured, conductivity can be improved, and open circuit voltage and fill factor can be effectively improved.

[0009] A second aspect of an embodiment of the present application provides a method for preparing a silicon-based heterojunction solar cell, comprising:

[0010] Providing a silicon substrate, and sequentially forming a first passivation layer, an N-type doping layer and a first transparent electrode on a surface of one side of the silicon substrate;

[0011] Forming a second passivation layer, a P-type doping layer and a second transparent electrode in sequence on the other side surface of the silicon substrate;

[0012] Preparing copper fine grids on the first transparent electrode and the second transparent electrode respectively, then immersing the copper fine grids in acid to remove oxides on the surfaces of the copper fine grids, and then covering the surfaces of the copper fine grids with tin films by a wet method;

[0013] The main grids are printed on the first transparent electrode and the second transparent electrode respectively, and then the main grids are cured.

[0014] Thus, a silicon-based heterojunction solar cell is obtained. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments disclosed in the present application and should not be regarded as limiting the scope of the present application.

[0016] Figure 1 is a schematic structural diagram of a silicon-based heterojunction battery provided by some embodiments;

[0017] Figure 2 is a schematic structural diagram of a silicon-based heterojunction battery provided by some other embodiments;

[0018] Figure 3 is a schematic structural diagram of a silicon-based heterojunction battery provided in some further embodiments;

[0019] Figure 4 It is a schematic diagram of the structure of a silicon-based heterojunction battery provided in some other embodiments.

[0020] Description of reference numerals:

[0021] 100-N-type single crystal silicon; 201-intrinsic oxygen-doped amorphous silicon layer; 202-N-side intrinsic amorphous silicon layer; 301-first P-side intrinsic amorphous silicon layer; 302-second P-side intrinsic amorphous silicon layer; 303-third P-side intrinsic amorphous silicon layer; 401-first N-type doped seed layer; 402-second N-type doped seed layer; 403-N-type doped main layer; 404-N-type doped contact layer; 501-P-type doped seed layer; 502-P-type doped main layer; 503-P-type doped contact layer; 601-first transparent electrode; 602-second transparent electrode; 701-N-side copper fine grid; 702-first tin-plated layer; 703-P-side copper fine grid; 704-second tin-plated layer; 801-N-side main grid; 802-P-side main grid. DETAILED DESCRIPTION

[0022] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings. In the accompanying drawings, for clarity, the sizes of layers, regions, elements and their relative sizes may be exaggerated. Wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limitations on the present application. It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0023] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not mean that the present disclosure necessarily has the first element, component, region, layer or part.

[0024] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0025] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein, for example. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0026] In the present application, when it comes to a numerical interval (i.e., a numerical range), unless otherwise specified, the distribution of the optional numerical values ​​in the numerical interval is considered to be continuous, and includes the two numerical endpoints (i.e., the minimum and maximum values) of the numerical interval, and each numerical value between the two numerical endpoints. Unless otherwise specified, when the numerical interval only refers to an integer in the numerical interval, it includes the two endpoint integers of the numerical range, and each integer between the two endpoints, which is equivalent to directly listing each integer. When multiple numerical ranges are provided to describe features or characteristics, these numerical ranges can be merged. In other words, unless otherwise specified, the numerical range disclosed in the present application should be understood to include any and all sub-ranges included therein. The "numerical value" in the numerical interval can be any quantitative value, such as a number, a percentage, a ratio, etc. "Numerical interval" allows for broadly including quantitative intervals such as percentage intervals, ratio intervals, and ratio intervals.

[0027] The embodiments of the present application provide a silicon-based heterojunction solar cell and a method for preparing the same, as described below.

[0028] Hereinafter, exemplary embodiments according to the present application will be described in more detail with reference to the accompanying drawings. It should be noted that these exemplary embodiments can be implemented in many different forms and should not be construed as being limited to the embodiments described herein.

[0029] like Figure 1 As shown, the embodiment of the present application provides a silicon-based heterojunction solar cell. The silicon-based heterojunction solar cell may include:

[0030] A silicon substrate, a first passivation layer, an N-type doped layer and a first transparent electrode are sequentially arranged along a first direction, wherein the first direction is a direction from the silicon substrate to the first transparent electrode in a thickness direction of the silicon substrate;

[0031] The first passivation layer includes the following multiple sub-layers arranged in sequence along the first direction: an intrinsic oxygen-doped amorphous silicon layer 201 and an N-face intrinsic amorphous silicon layer 202;

[0032] Along the first direction, the refractive index of the intrinsic oxygen-doped amorphous silicon layer 201 increases gradually.

[0033] In the embodiment of the present application, the first passivation layer is divided into an intrinsic oxygen-doped amorphous silicon layer 201 and an N-face intrinsic amorphous silicon layer 202. The presence of the intrinsic oxygen-doped amorphous silicon layer 201 increases the refractive index of the intrinsic oxygen-doped amorphous silicon layer 201 along the first direction. The refractive index of the intrinsic oxygen-doped amorphous silicon layer 201 is related to the oxygen content therein. The lower the refractive index, the higher the oxygen content, and the higher the oxygen content, the better the passivation effect. From the perspective of improving the passivation effect, it tends to maintain a lower refractive index; and when the refractive index remains at a low level, the electron tunneling barrier is wide and the probability of electron tunneling is reduced. In the embodiment of the present application, the intrinsic oxygen-doped amorphous silicon layer 201 is set to have an increasing refractive index, which can increase the probability of electron tunneling while taking into account the passivation effect. In this way, both passivation can be guaranteed and conductivity can be improved, which is apparent in the increase of the opening voltage and the filling factor.

[0034] It is worth noting that along the first direction, the refractive index of the intrinsic oxygen-doped amorphous silicon layer 201 increases gradually, and the refractive index may increase linearly or nonlinearly as the distance between the intrinsic oxygen-doped amorphous silicon layer 201 and the silicon substrate increases. The intrinsic oxygen-doped amorphous silicon layer 201 with a gradient refractive index may be realized by gradient oxygen doping.

[0035] Optionally, the refractive index of the intrinsic oxygen-doped amorphous silicon layer 201 is 1.9-4, for example, 1.9, 2.5, 3, 3.3, 3.6, 4, etc. Increasing within this range is more conducive to improving the tunneling probability of electrons.

[0036] Furthermore, the refractive index of the N-face intrinsic amorphous silicon layer 202 is 3.5-4.3, for example, 3.5, 3.6, 3.7, 4, 4.3, etc. Therefore, the refractive index of the N-face intrinsic amorphous silicon layer 202 is higher than the refractive index of the intrinsic oxygen-doped amorphous silicon layer 201, which is more conducive to matching the refractive index of the film layer and the refractive index between the film layers.

[0037] The refractive indices in the examples of the present application are obtained by fitting the J.A. Woolam ellipsometer test.

[0038] In some embodiments, in a silicon-based heterojunction solar cell, the thickness of the first passivation layer is less than 8 nm, and may further be 5 nm to 7.5 nm. Within this range, the conductive performance of the first passivation layer is optimized.

[0039] In some embodiments, in a silicon-based heterojunction solar cell, the N-type doped layer includes the following multiple sublayers arranged in sequence along the first direction: a first N-type doped seed layer 401, a second N-type doped seed layer 402, an N-type doped main layer 403 and an N-type doped contact layer 404; the first N-type doped seed layer 401 is a low-oxygen seed layer, and the oxygen-silicon ratio in the low-oxygen seed layer is less than 0.4; the second N-type doped seed layer 402 is an oxygen-containing seed layer; the N-type doped main layer 403 is an oxygen-containing main layer; and the N-type doped contact layer 404 is an oxygen-free contact layer. Therefore, the N-type doped layer is divided into four sublayers, a low-oxygen seed layer, an oxygen-containing seed layer, an oxygen-containing main layer and an oxygen-free contact layer; the first seed layer (low-oxygen seed layer) needs to maintain the characteristics of a high crystallization rate according to the structural design and functional selection, but the high crystallization rate will lead to band contraction, resulting in discontinuity in the energy band, thereby affecting the transmission of carriers, so the band gap and the position of the Fermi level are adjusted by means of low oxygen doping (oxygen-silicon ratio <0.4) and low phosphorus doping to ensure the continuity of the energy band; under high oxygen doping (oxygen-silicon ratio ≥0.4), the band gap is too large, which increases the difficulty of electron tunneling, thereby affecting The fill factor (FF) of the battery is affected; the second seed layer (oxygen-containing seed layer), as a supplementary layer to the first seed layer, has the main functionality of a buffer layer (transition layer), which mainly reduces the instability of the early process of the main layer; the oxygen-containing main layer is the most important part of the N-type doped layer, which bears the main optical and electrical properties. In order to ensure the balance of its electrical and optical properties, a large amount of oxygen and phosphorus doping is required to maintain the balance; the main function of the outermost oxygen-free contact layer is to conduct electricity and form a good ohmic contact with the TCO, and a large amount of phosphorus doping is required to form an ohmic contact. The embodiment of the present application can improve the current while ensuring the FF and achieve improved battery efficiency through the optimized design of the N-type doped layer.

[0040] It can be understood that, unless otherwise specified, the silicon-oxygen ratio in the embodiments of the present application refers to the ratio of oxygen atoms to silicon atoms in the film. For example, the oxygen-silicon ratio in the low-oxygen seed layer (the second N-type doped seed layer 402) is less than 0.4, which means that the ratio of oxygen atoms to silicon atoms in the low-oxygen seed layer is less than 0.4, and can be 0.38, 0.35, 0.3, 0.2, 0.1, etc.

[0041] In some embodiments, in a silicon-based heterojunction solar cell, the first N-type doped seed layer 401 satisfies at least one of the following conditions: (A) the thickness of the first N-type doped seed layer 401 is ≤1nm, for example, the thickness is 1nm, 0.75nm, 0.6nm, etc.; (B) the crystallization rate of the first N-type doped seed layer 401 is greater than 50%, for example, it can be 52%, 55%, 60%, 65%, 70%, etc.; (C) the phosphorus-silicon ratio of the first N-type doped seed layer 401 is less than 0.02, for example, it can be 0.0051, 0.01, 0.015, etc.; therefore, the first N-type doped seed layer 401 adopts ultra-low thickness, higher crystallization rate and ultra-low phosphorus-silicon ratio, which is more conducive to carrier transmission.

[0042] It can be understood that, unless otherwise specified, the phosphorus-to-silicon ratio in the embodiments of the present application refers to the ratio of phosphorus atoms to silicon atoms within the film. For example, the phosphorus-to-silicon ratio of the first N-type doped seed layer 401 is less than 0.02, which means that the ratio of phosphorus atoms to silicon atoms within the first N-type doped seed layer 401 is less than 0.02.

[0043] In some embodiments, in a silicon-based heterojunction solar cell, the second N-type doped seed layer 402 satisfies at least one of the following conditions: (D) the oxygen-to-silicon ratio of the second N-type doped seed layer 402 is greater than 0.4, for example, it can be 0.5, 0.6, 0.7, etc.; (E) the thickness of the second N-type doped seed layer 402 is ≤1nm, and can further be 0.65nm~1nm; (F) the crystallization rate of the second N-type doped seed layer 402 is greater than 50%, for example, it can be 52%, 52%, 55%, 60%, 65%, 70%, etc.; (G) the phosphorus-to-silicon ratio of the second N-type doped seed layer 402 is greater than 0.05, and can further be 0.06~0.1, for example, it can be 0.06, 0.07, 0.1, etc. Therefore, the second N-type doped seed layer 402 adopts a large silicon-oxygen ratio (>0.4), ultra-thin thickness, high crystallization rate (>50%) and a large phosphorus-silicon ratio (>0.05), which is more conducive to improving the crystallization rate of the oxygen-containing main layer and the continuity of the process.

[0044] In some embodiments, in a silicon-based heterojunction solar cell, the N-type doped main layer 403 satisfies at least one of the following conditions: (H) the silicon-oxygen ratio of the N-type doped main layer 403 is ≥ 0.6, and can further be 0.6-1, for example, 0.6, 0.7, 0.8, 0.9, 1, etc. Thus, a large silicon-oxygen ratio is beneficial to improving the optical film of the main layer; (I) the thickness of the N-type doped main layer 403 is > 10 nm, and can further be 12 nm-30 nm, for example, 12 nm, 18 nm, 20 nm, 25 nm, 30 nm, etc. Thus, the optical performance is better. (J) The crystallization rate of the N-type doped main layer 403 is less than 50%, and can be further 30% to 48%, for example, 30%, 35%, 40%, 45%; thereby, it is more conducive to the transmission of carriers; (K) The phosphorus-silicon ratio of the N-type doped main layer 403 is greater than 0.06, for example, 0.08, 0.09, 0.1, etc.; thereby, the electrical performance is better and the conductivity of the film layer is improved.

[0045] In some embodiments, in a silicon-based heterojunction solar cell, the N-type doped contact layer 404 satisfies at least one of the following conditions: (L) the thickness of the N-type doped contact layer 404 is less than 3 nm, and can further be 2.5 nm to 3 nm; (M) the crystallization rate of the N-type doped contact layer 404 is less than 50%, and can further be 30% to 48%, for example, it can be 30%, 35%, 40%, 45%; thereby, the doping activation rate is improved, and the carrier concentration is increased; (N) the phosphorus-silicon ratio of the N-type doped contact layer 404 is greater than 0.06, for example, it can be 0.08, 0.09, 0.1, etc.; thereby, the carrier concentration of the film layer is increased, and the contact between the silicon-based thin film and the TCO is optimized.

[0046] In some embodiments, in a silicon-based heterojunction solar cell, a second passivation layer, a P-type doping layer, and a second transparent electrode are sequentially disposed on a side of the silicon substrate away from the first passivation layer along a direction opposite to the first direction.

[0047] Further, the P-type doped layer includes the following multiple sub-layers arranged in sequence in the opposite direction of the first direction: a P-type doped seed layer 501, a P-type doped main layer 502 and a P-type doped contact layer 503; the thickness of the P-type doped seed layer 501 is greater than 1nm, the crystallization rate is greater than 50%, and the boron-silicon ratio is greater than 0.01; the thickness of the P-type doped main layer 502 is greater than 10nm, the crystallization rate is greater than 20%, and the boron-silicon ratio is greater than 0.04; the thickness of the P-type doped contact layer 503 is greater than 1nm, the crystallization rate is greater than 20%, and the boron-silicon ratio is greater than 0.6. Thus, the P-type doped area is optimized and the battery performance is improved.

[0048] In some embodiments, the second passivation layer includes the following multiple sub-layers arranged in sequence in the opposite direction of the first direction: a first P-plane intrinsic amorphous silicon layer 301, a second P-plane intrinsic amorphous silicon layer 302, and a third P-plane intrinsic amorphous silicon layer 303, and the thin film structure factors of the first P-plane intrinsic amorphous silicon layer 301, the second P-plane intrinsic amorphous silicon layer 302, and the third P-plane intrinsic amorphous silicon layer 303 are successively reduced. The thickness of the first P-plane intrinsic amorphous silicon layer 301, the second P-plane intrinsic amorphous silicon layer 302, and the third P-plane intrinsic amorphous silicon layer 303 can be increased, for example, the thickness of the three is 1nm, 1.5nm, and 6nm, respectively. Thus, the P-plane passivation effect is optimized.

[0049] It is worth noting that in silicon-based heterojunction solar cells, the first passivation layer, the N-type doped layer and the first transparent electrode are located on the front side of the silicon substrate, which is the light-facing side; the second passivation layer, the P-type doped layer and the second transparent electrode are located on the back side of the silicon substrate; the front side of the silicon substrate is the N side, that is, the side where the dopant is the P element; the back side of the silicon substrate is the P side, that is, the side where the dopant is the B element.

[0050] The embodiment of the present application does not limit the material of the first transparent electrode 601 and the second transparent electrode 602. The material of the first transparent electrode 601 and the second transparent electrode 602 can be one or a combination of indium-containing or indium-free TCO materials such as ITO, AZO, GAZO, SnO2, ATO, FTO, ICO, and IWO.

[0051] In some embodiments, the silicon-based heterojunction solar cell further includes grid lines arranged on the front and back sides; the grid lines on the front side are located on the side of the first transparent electrode away from the silicon substrate; the grid lines on the back side are located on the side of the second transparent electrode away from the silicon substrate; the grid lines all include a main grid and a fine grid, and the fine grid includes a copper fine grid and a tin-plated layer. Thus, the copper fine grid and the tin-plated layer are used to replace the silver grid, thereby reducing the cost of the grid lines.

[0052] See also Figure 1 and Figure 2 It can be seen that the gate line includes an N-side main gate 801, an N-side fine gate, a P-side main gate 802 and a P-side fine gate. Specifically, the N-side fine gate includes an N-side copper fine gate 701 and a first tin-plated layer 702 located on the N-side copper fine gate 701; the P-side fine gate includes a P-side copper fine gate 703 and a second tin-plated layer 704.

[0053] Further, see Figure 3 and Figure 4 The gate line satisfies at least one of the following conditions: the width W2 of the fine gate is less than the width W1 of the main gate and less than 100 μm. For example, the width W2 of the fine gate is 10 μm to 20 μm, and the width W1 of the main gate is 70 μm to 80 μm, and both widths are less than 100 μm.

[0054] The height H2 of the fine gate is less than the height H1 of the main gate and is less than 50 μm; for example, the height H2 of the fine gate is 10 μm to 15 μm, and the height H1 of the main gate is 30 μm to 45 μm.

[0055] The fine grid spacing L3 on the back side (illuminated side) is less than the fine grid spacing L2 on the front side (light-facing side) <2μm < the main grid spacing L1. For example, the fine grid spacing L3 on the illuminated side is 0.8μm to 1μm, the fine grid spacing L2 on the light-facing side is 1.2μm to 1.8μm, and the main grid spacing L1 is 2.2μm to 4μm. Therefore, by limiting the size of the grid lines above, it is possible to reduce silver, reduce the front shadow shielding, and increase the current of the battery.

[0056] At present, the factors that limit the large-scale expansion of silicon-based heterojunction cells are the high cost of equipment, the small process window of silicon-based thin films, the high cost of consumables, and many other factors. The high cost of equipment will gradually decrease with the trend of localization of accessories; the small process window of silicon-based can be adjusted by designing a multi-material stack to reduce the difficulty of the process; the high cost of consumables is the most difficult limitation to overcome for large-scale mass production. Existing attempts include replacing the indium-containing TCO layer with a cheap TCO (transparent conductive oxide) film layer, and completely or partially replacing the pure silver grid line with cheap metals, but the result is that the efficiency of silicon-based heterojunction cells will decrease due to the use of cheap materials.

[0057] Based on this, the embodiment of the present application can also provide a method for preparing a silicon-based heterojunction solar cell, providing a silicon substrate, and sequentially forming a first passivation layer, an N-type doping layer and a first transparent electrode on a surface of one side of the silicon substrate;

[0058] Forming a second passivation layer, a P-type doping layer and a second transparent electrode in sequence on the other side surface of the silicon substrate;

[0059] A copper fine grid is prepared by a rapid ion plating device, and then an acid immersion is performed to remove oxides on the surface of the copper fine grid, and then a tin film is covered on the surface of the copper fine grid by a wet method;

[0060] Then print the main grid (N side and P side) by screen printing, and then solidify the main grid;

[0061] Wherein, forming the N-doped layer on the first passivation layer comprises: forming the following sub-layers in sequence on a side of the first passivation layer away from the silicon substrate: a low-oxygen seed layer, an oxygen-containing seed layer, an oxygen-containing main layer and an oxygen-free contact layer;

[0062] Forming the P-type doped layer on the second passivation layer includes: forming the following sub-layers in sequence on a side of the second passivation layer away from the silicon substrate: a P-type doped seed layer 501 , a P-type doped main layer 502 and a P-type doped contact layer 503 .

[0063] Therefore, the embodiment of the present application uses copper and tin to replace the fine silver grid lines, which greatly reduces the production cost while maintaining the efficiency of the silicon-based heterojunction solar cell.

[0064] In an optional embodiment, immersion is performed using a 2 wt % dilute sulfuric acid aqueous solution to remove oxides.

[0065] The following will conduct performance tests on the method for preparing a silicon-based heterojunction solar cell provided in the embodiments of the present application and related comparative examples.

[0066] [Example 1]

[0067] Step (1): providing a silicon substrate

[0068] The N-type single crystal silicon substrate with a crystal orientation of

[100] is cleaned and damaged, and then textured to form a pyramid texture structure of uniform size. Then, RCA cleaning (wet chemical cleaning process) is used to remove surface organic matter and metal ions, and after the surface pyramids are smoothed, HF solution is used to remove the oxide layer;

[0069] Step (2), preparing a first P-plane intrinsic amorphous silicon layer 301 of 1 nm, a second P-plane intrinsic amorphous silicon layer 302 of 1.5 nm, and a third P-plane intrinsic amorphous silicon layer 303 of 6 nm on one side of the silicon substrate by RF-PECVD (radio frequency enhanced plasma chemical vapor deposition) equipment;

[0070] Step (3), turning over the silicon substrate, and preparing a 3 nm intrinsic oxygen-doped amorphous silicon layer 201 and a 4.6 nm intrinsic amorphous silicon stack on the other surface of the silicon substrate;

[0071] Then, N-type doping layers are prepared, including a first N-type doping seed layer 401 of 0.8 nm, a second N-type doping seed layer 402 of 0.8 nm, an N-type doping main layer 403 of 11 nm, and an N-type doping contact layer 404 of 2 nm;

[0072] Step (4), after turning over again, prepare a P-type doped layer, specifically: a 1.5nm P-type doped seed layer 501, a 25nm P-type doped main layer 502 and a 3nm P-type doped contact layer 503, to complete the preparation of the silicon-based film; prepare 68nm ITO (indium tin oxide) on the N side of the silicon-based film by PVD (physical vapor deposition) equipment to obtain a first transparent electrode 601, and prepare 77nm ITO on the P side to obtain a second transparent electrode 602;

[0073] Step (5), using fast ion plating equipment to prepare copper fine grids, then soaking in 2wt% dilute sulfuric acid aqueous solution to remove oxides on the copper grid surface, then covering the copper grid line surface with a layer of tin film by wet method, and then drying the battery; then printing the N-side and P-side main grids by screen printing, and then curing the grid lines; wherein the fine grid width W2 is 15μm, the main grid width W1 is 70μm; the fine grid height H2 is 12μm, the main grid height H1 is 45μm; the fine grid spacing L3 on the illuminated side is 0.9μm, and the fine grid spacing L2 on the light-facing side is 1.2μm;

[0074] Step (6): Finally, light injection is performed at 180° C. to complete the preparation of the silicon-based heterojunction solar cell.

[0075] The silicon-based heterojunction solar cell of Example 1 was tested as follows:

[0076] (1) The intrinsic oxygen-doped amorphous silicon film layer was tested using a J.A. Woolam ellipsometer. The refractive index of the intrinsic oxygen-doped amorphous silicon layer 201 increased from the silicon wafer to the gate line direction, and the refractive index was 2.3 to 3.5. The refractive index of the N-side intrinsic amorphous silicon layer 202 was 3.6.

[0077] (2) Raman, J.A. woollam and SIMS tests were performed on multiple sublayers of the N-type doped layer, and the results showed that the first N-type doped seed layer 401 had an oxygen-silicon ratio of 0.2, a thickness of 0.8 nm, a crystallization rate of 60%, and a phosphorus-silicon ratio of 0.015; the second N-type doped seed layer 402 had an oxygen-silicon ratio of 0.8, a thickness of 0.8 nm, a crystallization rate of 52%, and a phosphorus-silicon ratio of 0.07; the N-type doped main layer 403 had a silicon-oxygen ratio of 0.8, a thickness of 11 nm, a crystallization rate of 45%, and a phosphorus-silicon ratio of 0.07; and the N-type doped contact layer 404 had a thickness of 2 nm, a crystallization rate of 26%, and a phosphorus-silicon ratio of 0.08.

[0078] (3) Raman, J.A. woollam and SIMS tests were performed on multiple sublayers of the P-type doped layer, and it was found that the thickness of the P-type doped seed layer 501 was 1.5 nm, the crystallinity was 60%, and the boron-silicon ratio was 0.02;

[0079] The thickness of the P-type doped body layer 502 is 25 nm, the crystallinity is 40%, and the phosphorus-silicon ratio is 0.08;

[0080] The thickness of the P-type doped contact layer 503 is 3 nm, the crystallinity is 40%, and the phosphorus-silicon ratio is 0.1.

[0081] (4) The TCO film layer was subjected to a J·A woollam test, and it was found that the refractive index of the first transparent electrode 601 and the second transparent electrode 602 were both 1.97.

[0082] [Example 2]

[0083] The other operations are the same as those in Example 1, except that the process conditions of step (3) are adjusted so that the refractive index of the intrinsic oxygen-doped amorphous silicon layer 201 increases gradually between 1.9 and 3, and the refractive index of the N-side intrinsic amorphous silicon layer 202 is 3.6.

[0084] [Example 3]

[0085] The other operations are the same as those in Example 2, except that, in step (5), the main grid and fine grid of the N-side and P-side are printed by screen printing, and the specifications of the main grid and fine grid remain unchanged.

[0086] [Example 4]

[0087] The other operations are the same as those in Example 1, except that the process conditions of step (3) are adjusted so that the refractive index of the intrinsic oxygen-doped amorphous silicon layer 201 increases gradually between 1.2 and 1.8, and the refractive index of the N-side intrinsic amorphous silicon layer 202 is 4.3.

[0088] [Comparative Example 1]

[0089] The other operations are the same as those in Example 1, except that the operating conditions of step (3) are adjusted so that the refractive index of the intrinsic amorphous silicon layer is fixed at 2.5 and the refractive index of the N-side intrinsic amorphous silicon layer is 3.6.

[0090]

Test example

[0091] The silicon-based heterojunction solar cells of the embodiment and the comparative example were subjected to 25°C, AM1.5G spectrum, 1000 W / cm 2 IV test was carried out under light intensity, and the results are shown in Table 1.

[0092] Table 1

[0093]

[0094] It can be seen from Table 1 above that the open circuit voltage and fill factor of Examples 1 to 4 are better than those of Comparative Example 1. This is because Examples 1 to 4 use intrinsic oxygen-doped amorphous silicon with a gradient refractive index, and Comparative Example 1 uses intrinsic amorphous silicon with a fixed refractive index. The open circuit voltage and fill factor of the battery of Examples 1 to 4 are significantly improved compared to that of Comparative Example 1. Furthermore, Examples 1, 2, and 4 use ion plating to prepare copper grid lines, and Example 3 uses screen printing slurry printing. The fill factor and average conversion efficiency of Example 3 are better. This may be because ion plating does not have the extension phenomenon after screen printing slurry printing, the front shading becomes less, the current is improved, but the copper grid line has poor contact with TCO, and the fill factor is lower than that of screen printing, but the efficiency loss is lower (less than 0.1%), which has certain cost advantages.

[0095] It should be noted that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. The orientation words "inside" and "outside" refer to the inside and outside relative to the outline of each component itself. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Therefore, the exemplary term "above..." can include both "above..." and "below..." orientations. The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used here are interpreted accordingly.

[0096] It should also be noted that "one embodiment", "another embodiment", "embodiment", etc. mentioned in this application refer to the specific features, structures or characteristics described in conjunction with the embodiment included in at least one embodiment generally described in this application. The same expression appearing in multiple places in the specification does not necessarily refer to the same embodiment. Further, when describing a specific feature, structure or characteristic in conjunction with any embodiment, it is claimed that the realization of such feature, structure or characteristic in conjunction with other embodiments also falls within the scope of this application.

[0097] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0098] It should also be noted that the above are only preferred embodiments of the present application, and the patent protection scope of the present application is not limited thereto. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A silicon-based heterojunction solar cell, characterized in that: It comprises a silicon substrate, a first passivation layer, an N-type doping layer and a first transparent electrode arranged in sequence along a first direction, wherein the first direction is a direction from the silicon substrate to the first transparent electrode in the thickness direction of the silicon substrate; The first passivation layer comprises the following multiple sub-layers arranged in sequence along the first direction: an intrinsic oxygen-doped amorphous silicon layer (201) and an N-face intrinsic amorphous silicon layer (202); Along the first direction, the refractive index of the intrinsic oxygen-doped amorphous silicon layer (201) increases gradually.

2. The silicon-based heterojunction solar cell according to claim 1, characterized in that: Satisfy at least one of the following characteristics: (1) The refractive index of the intrinsic oxygen-doped amorphous silicon layer (201) is 1.9 to 4; (2) The refractive index of the N-side intrinsic amorphous silicon layer (202) is 3.5 to 4.3; (3) The thickness of the first passivation layer is less than 8 nm.

3. The silicon-based heterojunction solar cell according to claim 1, characterized in that: The N-type doped layer comprises the following multiple sub-layers arranged in sequence along the first direction: a first N-type doped seed layer (401), a second N-type doped seed layer (402), an N-type doped main layer (403) and an N-type doped contact layer (404); The first N-type doped seed layer (401) is a low-oxygen seed layer, and the oxygen-to-silicon ratio in the low-oxygen seed layer is less than 0.4; The second N-type doped seed layer (402) is an oxygen-containing seed layer; The N-type doped main layer (403) is an oxygen-containing main layer; The N-type doped contact layer (404) is an oxygen-free contact layer.

4. The silicon-based heterojunction solar cell according to claim 3, characterized in that: At least one of the following conditions is met: (A) the thickness of the first N-type doped seed layer (401) is ≤1 nm; (B) the crystallization rate of the first N-type doped seed layer (401) is greater than 50%; (C) the phosphorus-to-silicon ratio of the first N-type doped seed layer (401) is less than 0.02; (D) the oxygen-to-silicon ratio of the second N-type doped seed layer (402) is greater than 0.4; (E) the thickness of the second N-type doped seed layer (402) is ≤1 nm; (F) the crystallization rate of the second N-type doped seed layer (402) is greater than 50%; (G) the phosphorus-to-silicon ratio of the second N-type doped seed layer (402) is greater than 0.05; (H) the silicon-oxygen ratio of the N-type doped main layer (403) is ≥0.6; (I) the thickness of the N-type doped main layer (403) is greater than 10 nm; (J) the crystallization rate of the N-type doped main layer (403) is less than 50%; (K) the phosphorus-to-silicon ratio of the N-type doped main layer (403) is greater than 0.06; (L) the thickness of the N-type doped contact layer (404) is less than 3 nm; (M) the crystallization rate of the N-type doped contact layer (404) is less than 50%; (N) The phosphorus-to-silicon ratio of the N-type doped contact layer (404) is greater than 0.

06.

5. The silicon-based heterojunction solar cell according to any one of claims 1 to 4, characterized in that: Along the direction opposite to the first direction, a second passivation layer, a P-type doping layer and a second transparent electrode are sequentially arranged on a side of the silicon substrate away from the first passivation layer.

6. The silicon-based heterojunction solar cell according to claim 5, characterized in that: The P-type doped layer comprises the following multiple sub-layers arranged in sequence along the opposite direction of the first direction: a P-type doped seed layer (501), a P-type doped main layer (502) and a P-type doped contact layer (503).

7. The silicon-based heterojunction solar cell according to claim 6, characterized in that: The thickness of the P-type doped seed layer (501) is greater than 1 nm, the crystallization rate is greater than 50%, and the boron-silicon ratio is greater than 0.01; or / and The thickness of the P-type doped main layer (502) is greater than 10 nm, the crystallinity is greater than 20%, and the boron-silicon ratio is greater than 0.04; or / and The thickness of the P-type doped contact layer (503) is greater than 1 nm, the crystallization rate is greater than 20%, and the boron-silicon ratio is greater than 0.

6.

8. The silicon-based heterojunction solar cell according to claim 5, characterized in that: Also includes grid lines arranged on the front and back surfaces; The gate line on the front side is located at a side of the first transparent electrode away from the silicon substrate; The gate line on the back side is located at a side of the second transparent electrode away from the silicon substrate; The gate lines all include a main gate and a fine gate.

9. The silicon-based heterojunction solar cell according to claim 8, characterized in that: The material of the main grid includes one or more of copper, tin, nickel, and silver; and / or The material of the fine grid includes one or more of copper, tin, nickel, and silver.

10. A method for preparing a silicon-based heterojunction solar cell according to any one of claims 1 to 9, characterized in that: include: Providing a silicon substrate, and sequentially forming a first passivation layer, an N-type doping layer and a first transparent electrode on a surface of one side of the silicon substrate; Forming a second passivation layer, a P-type doping layer and a second transparent electrode in sequence on the other side surface of the silicon substrate; Preparing copper fine grids on the first transparent electrode and the second transparent electrode respectively, then immersing the copper fine grids in acid to remove oxides on the surfaces of the copper fine grids, and then covering the surfaces of the copper fine grids with tin films by a wet method; The main grids are printed on the first transparent electrode and the second transparent electrode respectively, and then the main grids are cured.

11. The method for preparing a silicon-based heterojunction solar cell according to claim 10, characterized in that: Forming the N-doped layer on the first passivation layer comprises: forming the following sub-layers in sequence on a side of the first passivation layer away from the silicon substrate: a low-oxygen seed layer, an oxygen-containing seed layer, an oxygen-containing main layer, and an oxygen-free contact layer; Forming the P-type doped layer on the second passivation layer includes: forming the following sub-layers in sequence on a side of the second passivation layer away from the silicon substrate: a P-type doped seed layer (501), a P-type doped main layer (502) and a P-type doped contact layer (503).

Images