Signal control link topology and logic time sequence method of HCC converter valve

Abstract

The invention provides a signal control link topology of an HCC converter valve and a logic time sequence method, which have the advantages of sensitivity and high efficiency, the topology comprises: current sensors arranged on each bridge arm of an HCC converter, the current sensors being used for collecting current signals on the bridge arms; the zero-crossing comparator and the voltage comparator correspond to the current sensor on each bridge arm; wherein the zero-crossing comparator is used for judging whether the bridge arm current crosses zero or not based on an analog voltage signal generated by a current signal collected by the current sensor, and outputting a zero-crossing comparison result signal to the valve-based electronic equipment; the voltage comparator is used for generating an analog voltage signal based on a current signal collected by the current sensor, judging whether the bridge arm current is in an overvoltage state, and outputting an overvoltage comparison result signal to the valve base electronic equipment; and the valve-based electronic equipment is used for judging according to the zero-crossing comparison result signal and the overvoltage comparison result signal and outputting a turn-on / off signal to control the turn-on or turn-off of the HCC converter valve.

Description

Technical Field

[0001] The invention belongs to the technical field of power electronics, and in particular relates to a signal control link topology and logic timing method for an HCC converter valve. Background Art

[0002] HCC (Hybrid Commutated Converter) adopts a new hybrid commutation transmission technology based on fully controlled devices. Compared with the traditional LCC (Line-Commutated Converter) DC transmission technology, it can solve the commutation failure problem caused by voltage drop due to AC grid failure.

[0003] The LCC converter valve is triggered to turn on when the pressure is positive, and automatically turns off after the negative pressure current passes through zero, without the need for a shutdown signal. The HCC converter valve is triggered to turn on when the pressure is positive, and after the negative pressure current passes through zero, the VBE (Valve Base Electronics) needs to send a shutdown signal to the HCC to shut down.

[0004] HCC uses VBE to send a shutdown signal to HCC to achieve active shutdown. In this case, how to accurately obtain the zero-crossing signal of the bridge arm current and how to accurately detect whether the bridge arm current exceeds the shutdown current of the HCC converter valve are key factors for safe and precise control of HCC. When the bridge arm current is greater than the shutdown current of the HCC converter valve, the shutdown command cannot be issued to HCC, otherwise the HCC converter valve will be damaged. Based on this, how to reduce the delay of bridge arm current detection and improve reliability has become a technical problem that needs to be solved urgently. Summary of the invention

[0005] In view of the above problems, the present invention provides a signal control link topology of an HCC converter valve, which is applied in a direct current transmission HCC converter. The HCC converter includes a plurality of bridge arms, and one or more HCC converter valves are arranged on each bridge arm. The HCC converter valve can be actively shut down when the current passes through zero, including:

[0006] A current sensor is arranged on each bridge arm, and the current sensor is used to collect a current signal on the bridge arm;

[0007] A zero-crossing comparator and a voltage comparator corresponding to the current sensor on each bridge arm; wherein,

[0008] The zero-crossing comparator is used to determine whether the bridge arm current is zero-crossing based on the analog voltage signal generated by the current signal collected by the current sensor, and output a zero-crossing comparison result signal to the valve base electronic device;

[0009] The voltage comparator is used to determine whether the bridge arm current is over-voltage based on the analog voltage signal generated by the current signal collected by the current sensor, and output the over-voltage comparison result signal to the valve base electronic device;

[0010] The valve base electronic device is used to make a judgment based on the zero-crossing comparison result signal and the overvoltage comparison result signal, and output an on / off signal to control the HCC converter valve to be on or off.

[0011] Furthermore, it also includes a logic comparator corresponding to each bridge arm,

[0012] N current sensors are arranged on each bridge arm, N is not less than 3, and all are connected to the corresponding logic comparator;

[0013] The logic comparator is used to compare the current signals collected by N current sensors on the corresponding bridge arms, and select a circuit signal having at least two identical signals as an output result.

[0014] Furthermore, it also includes a signal conditioning circuit corresponding to each bridge arm,

[0015] The signal conditioning circuit is used to convert the current signal collected by the current sensor into a voltage signal and output it to the logic comparator.

[0016] Further, the output terminal of the logic comparator is connected to the input terminals of the corresponding zero-crossing comparator and the voltage comparator respectively;

[0017] The voltage signal output by the logic comparator is divided into two paths: a first voltage signal and a second voltage signal, which are input into the zero-crossing comparator and the voltage comparator respectively.

[0018] Further, the output terminal of the logic comparator is connected to the negative pin of the zero-crossing comparator, and the positive pin of the zero-crossing comparator serves as the zero voltage input terminal;

[0019] The output terminal of the logic comparator is connected to the positive pin of the voltage comparator, and the negative pin of the voltage comparator serves as an input terminal of a specified threshold voltage for judging overvoltage.

[0020] Further, the signal conditioning circuit includes a plurality of operational amplifiers;

[0021] The output ends of the current sensors are respectively connected to the positive pins of the corresponding operational amplifiers, and the output ends of the operational amplifiers are connected to the negative pins of the current operational amplifiers and the corresponding input ends of the corresponding logic comparators through resistors.

[0022] Furthermore, the valve base electronic device is used to make a comprehensive judgment on the input zero-crossing comparison result signal and the overvoltage comparison result signal. When the zero-crossing comparison result signal determines that the detected current is greater than zero and the HCC converter valve is under positive pressure, it is allowed to send the HCC converter valve conduction instruction; when the detected current is less than or equal to zero, a judgment is made based on the overvoltage comparison result signal. When it is judged that the current of the bridge arm is greater than the shutdown current of the HCC converter valve according to the overvoltage comparison result signal, the shutdown instruction is not sent to the HCC converter valve. If the current of the bridge arm is not greater than the shutdown current of the HCC converter valve, it is allowed to send the shutdown instruction to the HCC converter valve.

[0023] The present invention also provides a logic timing method based on the signal control link topology of the HCC converter valve, comprising:

[0024] After the bridge arm current signal is converted into an analog signal, it is input into the zero-crossing comparator and the comparator, and the output on / off signal is determined according to the zero-crossing comparison result signal and the overvoltage comparison result signal output by the zero-crossing comparator.

[0025] Further, the method comprises:

[0026] When the zero-crossing comparison result signal is at a first level, the output on / off signal allows the output of an HCC converter valve opening instruction; when the zero-crossing comparison result signal is at a second level, the HCC converter valve control instruction is determined according to the overvoltage comparison result signal; wherein the first level is used to indicate that the bridge arm current has not crossed zero, and the second level indicates that the bridge arm circuit has crossed zero.

[0027] Further, determining the HCC converter valve control instruction according to the overvoltage comparison result signal includes:

[0028] When the overvoltage comparison result signal is at the third level, the HCC converter valve shutoff instruction is allowed to be output, and when the overvoltage comparison result signal is at the fourth level, the current valve shutoff instruction is not allowed to be output;

[0029] The third level is used to indicate that the bridge arm current has no overvoltage, and the fourth level is used to indicate that the bridge arm current has an overvoltage.

[0030] The signal control link topology and logic timing method of the HCC converter valve of the present invention directly compares the detected analog signal using a zero-crossing comparator and a voltage comparator without converting it into a digital signal, thereby reducing the signal delay and the delay of the intermediate process and improving the sensitivity of the HCC converter valve protection.

[0031] The use of a 3-in-1 link topology for bridge arm current detection improves detection reliability and accuracy, reduces the risk of HCC converter valve shutdown, and effectively protects the HCC converter valve.

[0032] The present invention improves the topology-based logic timing method and can achieve accurate intelligent detection and control.

[0033] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0035] Figure 1 A schematic diagram of a signal control link topology of an HCC converter valve applied in an HCC converter according to an embodiment of the present invention is shown;

[0036] Figure 2 A logical timing diagram of a signal control link topology based on an HCC converter valve according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0037] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0038] The embodiment of the present invention proposes a signal control link topology and logic timing method for an HCC converter valve, which can not only ensure the accuracy of bridge arm current zero-crossing detection, but also improve the sensitivity and reliability of protection.

[0039] HCC converter valves are used in HCC converters for DC transmission, such as Figure 1As shown, the HCC converter includes a plurality of bridge arms, and one or more HCC converter valves are arranged on each bridge arm, and the HCC converter valve can be actively shut down when the current passes through zero. Specifically, the HCC converter includes 6 bridge arms, and each bridge arm includes a shut-off valve string, or includes a shut-off valve string and a thyristor valve string connected in series. The 6 bridge arms include 3 upper bridge arms and 3 lower bridge arms, one end of the 3 upper bridge arms is connected to the positive electrode port, and the other end is respectively connected to the A phase AC port, the B phase AC port and the C phase AC port, and one end of the 3 lower bridge arms is connected to the negative electrode port, and the other end is respectively connected to the A phase AC port, the B phase AC port and the C phase AC port. The shut-off valve string includes a converter valve (i.e., an HCC converter valve) connected in series, and the converter valve adopts an active shut-off device, which can realize active shut-off. The commutator valve can adopt insulated gate bipolar transistor IGBT, gate turn-off thyristor GTO, integrated gate commutated thyristor IGCT, injection enhanced gate transistor IEGT, etc.

[0040] The bridge arm current is sampled by a current sensor. The current sensor uses a photocurrent transformer or a Rogowski coil to convert a large current signal into a weak current signal through a certain principle. In the embodiment of the present invention, each bridge arm of the converter is detected to obtain multiple current signals (weak current signals). Each group of multiple current signals corresponding to each bridge arm is input into a signal conditioning circuit, and a circuit signal with at least two identical signals is selected as the output result. For example, Figure 1 As shown, each bridge arm collects 3 current signals, and the 3 weak current signals enter the signal conditioning circuit, convert the current signals into voltage signals, and then enter the logic comparator, such as a three-choice (or "3-choice") logic comparator. The three-choice logic comparator analyzes the 3 input current signals. If the 3 signals are the same, one of them is selected for output. If 2 of them are the same and 1 is different, one of them is selected for output from the 2 identical signals.

[0041] The voltage signal output by the three-to-one logic comparator includes two identical signals, namely, a first voltage signal and a second voltage signal.

[0042] The first voltage signal is input to the zero-crossing comparator, compared with the zero voltage, and the zero-crossing comparison result signal is output to the VBE system. Exemplarily, when the first voltage signal is greater than the zero-crossing signal, a high-level signal ('1') is output, otherwise, a low-level signal ('0') is output. The second voltage signal is input to the voltage comparator, compared with the predetermined threshold voltage, and the overvoltage comparison result signal is input to the VBE system (electronic valve and device). The VBE system makes a comprehensive judgment on the input zero-crossing comparison result signal and the overvoltage comparison result signal. When the zero-crossing comparison result signal determines that the current is greater than zero and the HCC converter valve is under positive pressure, the converter valve conduction instruction is allowed to be sent; when the current is detected to be less than or equal to zero, the judgment is made based on the overvoltage comparison result signal. If the overvoltage comparison result signal is high, it means that the current of the bridge arm is greater than the shut-off current of the converter valve, and the shut-off instruction cannot be sent to the converter valve. If the overvoltage comparison result signal is low level '0', it means that the current of the bridge arm is not greater than the shut-off current of the converter valve, and the shut-off instruction is allowed to be sent to the converter valve.

[0043] like Figure 1 As shown, the current acquisition, signal conversion, comparison and control of each bridge arm adopt the same structure. Each bridge arm of the HCC converter adopts the following link topology: each bridge arm is connected in series with one or more turnable converter valves and multiple current sensors. Multiple current sensors are connected to the input end of the corresponding signal conditioning loop. The signal conditioning loop is used to convert the current signal into a voltage signal and output it to the logic comparator. The signal conditioning loop includes multiple operational amplifiers. The output end of the current sensor is connected to the positive pin of the operational amplifier, and the output end of the operational amplifier is connected to the negative pin of the current operational amplifier through a resistor. The output end of the signal conditioning circuit is connected to the input end of the logic comparator. Specifically, the output end of the operational amplifier is connected to the corresponding input end of the corresponding logic comparator. In the embodiment of the present invention, "corresponding" means that for the signal processing process on each bridge arm, there is an input and output relationship between the devices, and for the subsequent processing process of multiple current signals on the same bridge arm, there is an input and output relationship between the devices in the processing process of each signal.

[0044] The logic comparator is used to determine whether the multiple current signals collected on the same bridge arm are the same. Specifically, the input end of the logic comparator is connected to the output ends of multiple operational amplifiers of the corresponding signal conditioning circuit. The output end of the logic comparator is connected to the negative pin of the corresponding zero-crossing comparator and the positive pin of the voltage comparator. The output ends of the zero-crossing comparator and the voltage comparator are respectively connected to the input end of the VBE system, and the output end of the VBE system is connected to the switchable converter valve (referred to as the converter valve) on the corresponding bridge arm.

[0045] Specifically, among the six bridge arms, the first bridge arm is connected in series with an HCC converter valve D1 to control the active current shutoff. Without loss of generality, the first bridge arm includes multiple HCC converter valves D1 connected in series (only one is shown in the figure), and for multiple HCC converter valves D1, the output of the VBE system (the on / off signal is input to each converter valve respectively) is used.

[0046] Three current sensors are arranged on the first bridge arm to collect three current signals. The currents of the three current sensors are input into the corresponding signal conditioning circuit, and the signal conditioning circuit outputs analog voltage signals (S11, S12, S13) to the three-select-one logic comparator, and outputs the voltage signal S1'. S1' is output to the zero-crossing comparator and the voltage comparator as two voltage signals, respectively, wherein the first voltage signal is input into the zero-crossing comparator, specifically as the negative pin of the zero-crossing comparator, and compared with the zero voltage of the positive pin of the zero-crossing comparator, and the zero-crossing comparison result signal is output to the VBE system. The second voltage signal is input into the voltage comparator, specifically as the input of the positive pin of the voltage comparator, and compared with the specified threshold voltage Vsell of the negative pin of the voltage comparator, and the overvoltage comparison result signal is input into the VBE system. The VBE system makes a judgment based on the overvoltage comparison result signal and the zero-crossing comparison result signal, and outputs an on / off signal for controlling the on or off of the converter valve of the first bridge arm.

[0047] The structures of other bridge arms are similar to this. The converter valve of the second bridge arm includes one or more converter valves D3, and the converter valve of the third bridge arm includes one or more converter valves D5. The first bridge arm, the second bridge arm and the third bridge arm are upper bridge arms, and the converter valves in the bridge arms are connected to the positive electrode port, and the other ends are respectively connected to the A-phase AC port, the B-phase AC port and the C-phase AC port. The converter valve of the fourth bridge arm includes one or more converter valves D4, the converter valve of the fifth bridge arm includes one or more converter valves D6, and the converter valve of the sixth bridge arm includes one or more converter valves D2. The fourth bridge arm, the fifth bridge arm and the sixth bridge arm are lower bridge arms, and the converter valves in the bridge arms are connected to the negative electrode port, and the other ends are respectively connected to the A-phase AC port, the B-phase AC port and the C-phase AC port.

[0048] The collected currents of the first to sixth bridge arms are respectively input into their respective logic comparators after passing through their respective signal conditioning circuits, and the voltage signals S1'-S6' are respectively output. The signals output by the logic comparators are respectively divided into two paths and input into the corresponding zero-crossing comparators and voltage comparators. The zero-crossing comparison result signal and the overvoltage comparison result signal are respectively input into their respective VBE systems, and the VBE systems respectively output on-off signals to the converter valves in the corresponding bridge arms.

[0049] Based on the above link topology, an embodiment of the present invention further provides a logic timing method. Figure 2As shown, after the bridge arm current signal is converted and compared, an analog voltage signal is generated, which is input to the zero-crossing comparator and the comparator, and the output opening and closing signal is determined according to the zero-crossing comparison result signal and the overvoltage comparison result signal output by the zero-crossing comparator. When the zero-crossing comparison result signal is at the first level, the output opening and closing signal is to allow the output of the converter valve opening instruction. When the zero-crossing comparison result signal is at the second level, the overvoltage comparison result signal is judged: when the overvoltage comparison result signal is at the third level, the output of the converter valve closing instruction is allowed, and when the overvoltage comparison result signal is at the fourth level, the output of the current valve closing instruction is not allowed. Among them, the first level is used to indicate that the bridge arm current is not zero-crossing, and the second level indicates that the bridge arm circuit is zero-crossing (equal to or less than zero). Without loss of generality, the first level is a high level and the second level is a low level. The third level is used to indicate that the bridge arm current is not overvoltage, and the fourth level is used to indicate that the bridge arm current is overvoltage (exceeding the specified threshold voltage). Without loss of generality, the third level is a low level and the fourth level is a flat level.

[0050] In the embodiment of the present invention, the bridge arm current detection multiple-choice link topology improves the reliability and accuracy of the detection, reduces the risk of the HCC converter valve shutting down, and effectively protects the HCC converter valve. The detected analog signal is directly compared with the zero-crossing comparator and the voltage comparator without converting it into a digital signal, which reduces the signal delay and the delay of the intermediate process, and improves the sensitivity of the HCC converter valve protection.

[0051] Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent substitutions for some of the technical features therein; and these modifications or substitutions do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A signal control link topology of an HCC converter valve, applied in a HCC converter for direct current transmission, wherein the HCC converter comprises a plurality of bridge arms, each of which is provided with one or more HCC converter valves, wherein the HCC converter valve can be actively shut down when the current passes through zero, and wherein: include: A current sensor is arranged on each bridge arm, and the current sensor is used to collect a current signal on the bridge arm; A zero-crossing comparator and a voltage comparator corresponding to the current sensor on each bridge arm; wherein, The zero-crossing comparator is used to determine whether the bridge arm current is zero-crossing based on the analog voltage signal generated by the current signal collected by the current sensor, and output a zero-crossing comparison result signal to the valve base electronic device; The voltage comparator is used to determine whether the bridge arm current is over-voltage based on the analog voltage signal generated by the current signal collected by the current sensor, and output the over-voltage comparison result signal to the valve base electronic device; The valve base electronic device is used to make a judgment based on the zero-crossing comparison result signal and the overvoltage comparison result signal, and output an on / off signal to control the HCC converter valve to be on or off.

2. The signal control link topology of the HCC converter valve according to claim 1, characterized in that: Also included is a logic comparator corresponding to each bridge arm, N current sensors are arranged on each bridge arm, N is not less than 3, and all are connected to the corresponding logic comparator; The logic comparator is used to compare the voltage signals converted from the current signals collected by the N current sensors on the corresponding bridge arms, and select the voltage signal with at least two identical signals as the output result.

3. The signal control link topology of the HCC converter valve according to claim 2, characterized in that: It also includes a signal conditioning circuit corresponding to each bridge arm. The signal conditioning circuit is used to convert the current signal collected by the current sensor into a voltage signal and output it to the logic comparator.

4. The signal control link topology of the HCC converter valve according to claim 3, characterized in that: The output terminal of the logic comparator is connected to the input terminal of the corresponding zero-crossing comparator and the voltage comparator respectively; The voltage signal output by the logic comparator is divided into two paths: a first voltage signal and a second voltage signal, which are input into the zero-crossing comparator and the voltage comparator respectively.

5. The signal control link topology of the HCC converter valve according to claim 3 or 4, characterized in that: The output end of the logic comparator is connected to the negative pin of the zero-crossing comparator, and the positive pin of the zero-crossing comparator serves as the zero voltage input end; The output terminal of the logic comparator is connected to the positive pin of the voltage comparator, and the negative pin of the voltage comparator serves as an input terminal of a specified threshold voltage for judging overvoltage.

6. The signal control link topology of the HCC converter valve according to claim 3 or 4, characterized in that: The signal conditioning circuit includes multiple operational amplifiers; The output ends of the current sensors are respectively connected to the positive pins of the corresponding operational amplifiers, and the output ends of the operational amplifiers are connected to the negative pins of the current operational amplifiers and the corresponding input ends of the corresponding logic comparators through resistors.

7. The signal control link topology of the HCC converter valve according to any one of claims 1 to 4, characterized in that: The valve base electronic device is used to make a comprehensive judgment on the input zero-crossing comparison result signal and the overvoltage comparison result signal. When the zero-crossing comparison result signal determines that the detected current is greater than zero and the HCC converter valve is under positive pressure, it is allowed to send the HCC converter valve conduction instruction; when the detected current is less than or equal to zero, it is judged based on the overvoltage comparison result signal. When it is judged that the current of the bridge arm is greater than the shutdown current of the HCC converter valve according to the overvoltage comparison result signal, the shutdown instruction is not sent to the HCC converter valve. If the current of the bridge arm is not greater than the shutdown current of the HCC converter valve, it is allowed to send the shutdown instruction to the HCC converter valve.

8. A logic timing method for the signal control link topology of the HCC converter valve based on any one of claims 1 to 7, characterized in that: include: After the bridge arm current signal is converted into an analog signal, it is input into the zero-crossing comparator and the comparator, and the output on / off signal is determined according to the zero-crossing comparison result signal and the overvoltage comparison result signal output by the zero-crossing comparator.

9. The logic timing method according to claim 8, characterized in that: include: When the zero-crossing comparison result signal is at the first level, the output on / off signal is to allow the output of the HCC converter valve opening instruction; when the zero-crossing comparison result signal is at the second level, the HCC converter valve control instruction is determined according to the overvoltage comparison result signal; The first level is used to indicate that the bridge arm current has not passed zero, and the second level indicates that the bridge arm current has passed zero.

10. The logic timing method according to claim 9, characterized in that: Determining the HCC converter valve control instruction according to the overvoltage comparison result signal includes: When the overvoltage comparison result signal is at the third level, the HCC converter valve shutoff instruction is allowed to be output, and when the overvoltage comparison result signal is at the fourth level, the current valve shutoff instruction is not allowed to be output; The third level is used to indicate that the bridge arm current has no overvoltage, and the fourth level is used to indicate that the bridge arm current has an overvoltage.

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