Insulation Impedance Detection Circuit and Its Control Method, Control Device and Photovoltaic Equipment
By using an asymmetric insulation impedance detection circuit in the photovoltaic power generation system and using two sub-detection circuits to calculate the insulation impedance value, the problems of high hardware cost and poor reliability in the prior art are solved, and the detection effect of low-cost and high-reliability is achieved.
Patent Information
- Application Number
- CN202411274066.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-11
- Publication Date
- 2025-07-25
- Estimated Expiration
- 2044-09-11
AI Technical Summary
The insulation impedance detection circuit of existing photovoltaic power generation systems has the problem of high hardware cost and poor reliability, especially when the relay fails, resulting in detection failure.
Asymmetric insulation impedance detection circuit is used to detect the voltages of the positive and negative electrode buses through two sub-detection circuits respectively. The insulation impedance value is calculated using formulas, which avoids dependence on switching devices and simplifies the software control process.
It realizes low-cost and high-reliability insulation impedance detection, avoids detection failure caused by switching device failure, and ensures the accuracy and stability of the detection results.
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Figure CN119210336B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of photovoltaic technology, and more particularly, to an insulation impedance detection circuit, a control method and a control device thereof, and a photovoltaic device. Background Art
[0002] For a photovoltaic power generation system, it is necessary to ensure that there is a sufficiently large insulation impedance between the photovoltaic panel and the ground (GND) during operation. Therefore, it is necessary to detect the insulation impedance of the photovoltaic panel to the ground.
[0003] In the related art, for an insulation impedance detection circuit applied to a photovoltaic power generation system, a detection resistor is set on the DC bus at the output end of the photovoltaic power generation system, and one or more relays are set. The software controls the switching state of one or more relays to increase the disturbance amount, so as to realize the insulation impedance detection. Since the detection process involves software control, the detection logic is relatively complex and the hardware cost is relatively high. And when the relay fails or malfunctions, it will directly cause the insulation impedance detection to fail, resulting in poor reliability of the insulation impedance detection circuit. Summary of the Invention
[0004] The present application aims to at least solve one of the technical problems existing in the prior art or related art.
[0005] To this end, a first aspect of the present application provides an insulation impedance detection circuit.
[0006] A second aspect of the present application provides a photovoltaic device.
[0007] A third aspect of the present application provides a control method for an insulation impedance detection circuit.
[0008] A fourth aspect of the present application provides a control device for an insulation impedance detection circuit.
[0009] A fifth aspect of the present application provides a readable storage medium.
[0010] In view of this, a first aspect of the present application provides an insulation impedance detection circuit. The insulation impedance detection circuit is used to detect the impedance of the DC bus to the ground. The DC bus includes a positive bus and a negative bus. The insulation impedance detection circuit includes: a sub-detection circuit, the sub-detection circuit includes a positive detection resistor and a negative detection resistor. The sub-detection circuit is used to detect the bus voltage between the positive bus and the negative bus through the positive detection resistor, and detect the negative voltage of the negative bus to the ground through the negative detection resistor; wherein, the number of sub-detection circuits is two, the two sub-detection circuits include a first sub-detection circuit and a second sub-detection circuit, the resistance values of the positive detection resistor and the negative detection resistor in the first sub-detection circuit are not equal, and the resistance values of the positive detection resistor and the negative detection resistor in the second sub-detection circuit are equal.
[0011] In this technical solution, exemplarily, for scenarios such as photovoltaic systems, the photovoltaic modules serving as power generation components include N-type photovoltaic modules and P-type photovoltaic modules. Among them, N-type photovoltaic modules mainly conduct electricity through electrons, while P-type photovoltaic modules conduct electricity through holes. During use, taking the N-type photovoltaic module as an example, if the voltage across the cell is negative and the frame has a positive bias voltage, that is, when the photovoltaic module is under a negative bias voltage, leakage anode ions will flow into the cell.
[0012] When impurities appear in the semiconductor, these impurities will form conductive channels inside the battery. Under the long-term action of a high negative voltage, leakage current will occur between the glass and the encapsulation materials. Among them, the encapsulation materials of photovoltaic modules can be divided into external encapsulation materials and internal encapsulation materials. External encapsulation materials include glass backsheets, TPT (Thermoplastic Polyester Elastome) backsheets, aluminum frames, and edge sealants, etc. Internal encapsulation materials such as EVA (ethylene-vinyl acetate copolymer) films, PVB (Polyvinyl Butyral) films, PIB (Polyisobutylene) laminated sealants, etc.
[0013] When a large amount of charge accumulates on the surface of the cell, the passivation effect on the cell surface deteriorates, resulting in a decrease in the fill factor, short-circuit current, and open-circuit voltage of the panel. This phenomenon is called the PID (Potential Induced Degradation) effect, which will cause a decrease in the power generation of the photovoltaic system and seriously affect the power generation of the power station. At this time, the manifestation is that the insulation impedance of the DC bus of the photovoltaic power generation component to the ground decreases. Therefore, it is necessary to monitor the insulation impedance of the DC bus to the ground in real time and intervene immediately when the detected insulation impedance to the ground decreases.
[0014] This application proposes an asymmetric insulation impedance detection circuit that does not require a signal relay. When performing insulation impedance detection through this insulation impedance detection circuit, there is no need to set up a complex control process for software-controlled switching devices. And since there is no need to set up switching devices, it is possible to avoid the failure of insulation impedance detection caused by the failure of switching devices, thereby achieving low-cost and high-reliability insulation impedance detection. The following will detail the specific implementation of the insulation impedance detection circuit of this application.
[0015] Exemplarily, let the insulation impedance of the positive busbar to the ground in the busbar voltage be Rins+, and let the insulation impedance of the negative busbar to the ground in the busbar voltage be Rins-. When performing insulation impedance detection, sample the voltage value of the positive busbar to the negative busbar, that is, the busbar voltage Vpv of the DC busbar, and sample the voltage value of the negative busbar to the ground, that is, the negative-to-ground voltage Vg. Determine the insulation impedance Rins+ of the positive busbar to the ground and the insulation impedance Rins- of the negative busbar to the ground according to the busbar voltage Vpv and the negative-to-ground voltage Vg.
[0016] At this time, the calculation is performed through the following formula (1):
[0017]
[0018] Among them, Vpv is the busbar voltage, Vg is the negative-to-ground voltage, R1 is the positive detection resistor, R2 is the negative detection resistor, R7 is the second resistor, and R5, R6, R7, R8, and R9 are constants.
[0019] The selection of the positive detection resistor and the negative detection resistor is the key to the insulation impedance detection circuit. When the positive detection resistor and the negative detection resistor are equal, generally, it is recorded that this sub-detection circuit is a symmetric detection circuit, and when the evidence detection resistor and the negative detection resistor are not equal, it is considered that this sub-detection circuit is an asymmetric detection circuit.
[0020] Let the positive detection resistor be R1 and the negative detection resistor be R2. Then, in the symmetric detection circuit, that is, the above-mentioned second sub-detection circuit, R1 = R2. The changes in the insulation impedance Rins+ of the positive busbar to the ground and the insulation impedance Rins- of the negative busbar to the ground can be divided into the following three cases:
[0021] Case 1: The insulation impedance Rins+ of the positive busbar to the ground changes, and the insulation impedance Rins- of the negative busbar to the ground remains unchanged (at this time, it is default that the resistance value of Rins- is infinite);
[0022] Case 2: The insulation impedance Rins+ of the positive busbar to the ground remains unchanged, and the insulation impedance Rins- of the negative busbar to the ground changes;
[0023] Case 3: The insulation impedance Rins+ of the positive busbar to the ground and the insulation impedance Rins- of the negative busbar to the ground both change.
[0024] At this time, for the second sub-detection circuit, in Case 1, the larger the Rins+, the smaller the sampled value of the negative bus voltage to ground. In Case 2, the larger the Rins-, the larger the sampled value of the negative bus voltage to ground. In Case 3, when Rins+ and Rins- change simultaneously, the sampled value of the negative bus voltage to ground remains basically unchanged. Since the sampled value of the negative bus voltage to ground remains basically unchanged when Rins+ and Rins- change simultaneously, the insulation impedance value cannot be deduced by calculating the difference between the bus voltage Vpv of the DC bus and the negative voltage to ground Vg for the positive bus insulation impedance Rins+ and the negative bus insulation impedance Rins-.
[0025] To address the above problems, the present application adds an asymmetric detection circuit, that is, the above-mentioned first sub-detection circuit. In the first sub-detection circuit, R1≠R2. Assume R1 = k×R2, where k is a proportionality coefficient. For example, when k is taken as 10 / 7, for the asymmetric first sub-detection circuit, in the above-mentioned Case 1, Case 2, and Case 3, the insulation impedance Rins+ of the positive bus to ground and the insulation impedance Rins- of the negative bus to ground can be deduced by collecting the difference between the bus voltage Vpv of the DC bus and the negative voltage to ground Vg.
[0026] If only the asymmetric detection circuit is set, then in specific cases, such as when k is taken as 10 / 7 and R1 = 10 / 7×R2, if it exactly satisfies Rins+ = 10 / 7×Rins-, it will result in R1×Rins- = R2×Rins+. At this time, it can be deduced from the above formula (1) that the difference between the bus voltage and the sampled value of the negative bus voltage to ground remains basically unchanged.
[0027] In response to this, in the present application, both an asymmetric detection circuit and a symmetric detection circuit are set, that is, the above-mentioned first sub-detection circuit and the second sub-detection circuit. The insulation of the bus circuit is detected by the two sub-detection circuits respectively. When the insulation impedance to ground detected by the two sub-detection circuits both meets the requirements, it is confirmed that the equipment is normally insulated to ground; otherwise, it is considered that the equipment is abnormally insulated to ground.
[0028] The insulation impedance detection circuit proposed in the embodiment of the present application does not require setting a complex control process for software-controlled switching devices, and since no switching devices need to be set, it can avoid the failure of insulation impedance detection caused by the failure of switching devices, thereby realizing low-cost and high-reliability insulation impedance detection.
[0029] In addition, the insulation impedance detection circuit in the above technical solution provided by the present application may also have the following additional technical features:
[0030] In some technical solutions of the present application, optionally, the insulation impedance detection circuit further includes: a controller, the controller is electrically connected to the first sub-detection circuit and the second sub-detection circuit, and the controller is used for:
[0031] Determine the first impedance detection information based on the first bus voltage and the first negative pole-to-ground voltage, where the first bus voltage and the first negative pole-to-ground voltage are detected by the first sub-detection circuit; determine the second impedance detection information based on the second bus voltage and the second negative pole-to-ground voltage, where the second bus voltage and the second negative pole-to-ground voltage are detected by the second sub-detection circuit; and determine the insulation impedance detection result of the DC bus based on the first impedance detection information and the second impedance detection information.
[0032] In this technical solution, the first sub-detection circuit is an asymmetric detection circuit, and the second sub-detection circuit is a symmetric detection circuit. Among them, for the second sub-detection circuit, it can accurately detect the insulation impedance of the DC bus to the ground in scenarios other than when the insulation impedance Rins+ of the positive bus to the ground and the insulation impedance Rins- of the negative bus to the ground change simultaneously. For the first sub-detection circuit, it can accurately detect the insulation impedance of the DC bus to the ground in all scenarios except when R1×Rins- = R2×Rins+.
[0033] This application combines the first sub-detection circuit and the second sub-detection circuit. The first sub-detection circuit detects the first bus voltage Vpv1 and the first negative pole-to-ground voltage Vg1, and calculates Rins1+ and Rins1- using the above formula (1). Similarly, the second sub-detection circuit detects the second bus voltage Vpv2 and the second negative pole-to-ground voltage Vg2, and calculates Rins2+ and Rins2- using the above formula (1).
[0034] Among them, Rins1+ and Rins1- are the above-mentioned first impedance detection information, and Rins2+ and Rins2- are the above-mentioned second impedance detection information.
[0035] Determine the insulation impedance detection result of the DC bus by comparing whether both the first detection information and the second detection information meet the ground insulation impedance threshold required for the safe and stable operation of the system.
[0036] Exemplarily, when both the first detection information and the second detection information meet the above-mentioned ground insulation impedance threshold, the detection result is determined to meet the requirements. When any one of the first detection information and the second detection information does not meet the above-mentioned ground insulation impedance threshold, the detection result is determined not to meet the requirements.
[0037] This application combines a symmetric detection circuit and an asymmetric detection circuit, and can ensure the accuracy and reliability of the detection result of the insulation impedance to the ground in any case.
[0038] In some technical solutions of the present application, optionally, the sub-detection circuit includes: a positive detection resistor, the first end of the positive detection resistor is electrically connected to the positive bus, and the second end of the positive detection resistor is grounded; a first comparator, the first input end of the first comparator is electrically connected to the negative bus, the second input end of the first comparator is electrically connected to the first end of the positive detection resistor, and the output end of the first comparator is used to output the bus voltage.
[0039] In this technical solution, the positive detection resistor is R1. One end of the positive detection resistor is connected to the positive bus, the other end is grounded, and is connected to the first input end (input positive) of the first comparator. The second input end (input negative) of the first comparator is connected to the negative bus through a voltage-dividing resistor. Through the above simple circuit structure, accurate detection of the insulation impedance of the DC bus to the ground can be achieved without setting additional switching devices, simplifying the structure of the insulation impedance detection circuit and improving the reliability of the insulation impedance detection circuit.
[0040] In some technical solutions of the present application, optionally, the sub-detection circuit further includes: a first capacitor, the first end of the first capacitor is electrically connected to the second input end of the first comparator, and the second end of the first capacitor is electrically connected to the negative bus; a first resistor, the first resistor is connected in parallel with the first capacitor.
[0041] In this technical solution, a first capacitor and a first resistor connected in parallel are provided between the first input end of the first comparator and the positive detection resistor, which can reliably absorb the noise signals in the circuit and improve the detection accuracy.
[0042] In some technical solutions of the present application, optionally, the sub-detection circuit further includes: a negative detection resistor, the first end of the negative detection resistor is grounded; a second comparator, the first input end of the second comparator is electrically connected to the negative bus, the second input end of the second comparator is electrically connected to the second end of the negative detection resistor, and the output end of the second comparator is used to output the negative voltage to the ground.
[0043] In this technical solution, the negative detection resistor is R2. One end of the negative detection resistor is connected to the negative bus, the other end is grounded, and is connected to the first input end (input positive) of the second comparator. The second input end (input negative) of the second comparator is connected to the negative bus through a voltage-dividing resistor. Through the above simple circuit structure, accurate detection of the insulation impedance of the DC bus to the ground can be achieved without setting additional switching devices, simplifying the structure of the insulation impedance detection circuit and improving the reliability of the insulation impedance detection circuit.
[0044] In some technical solutions of the present application, optionally, the sub-detection circuit further includes: a second capacitor, a first end of the second capacitor is electrically connected to a second input terminal of the second comparator, and a second end of the second capacitor is electrically connected to the negative bus; a second resistor, the second resistor is connected in parallel with the second capacitor.
[0045] In this technical solution, a second capacitor and a second resistor connected in parallel are provided between the second input terminal of the second comparator and the positive detection resistor, which can reliably absorb the noise signals in the circuit and improve the detection accuracy.
[0046] The second aspect of the present application provides a photovoltaic device, including: a photovoltaic power generation component, an output terminal of the photovoltaic power generation component is electrically connected to a DC bus; an insulation impedance detection circuit provided in any of the above technical solutions, the insulation impedance detection circuit is electrically connected to the DC bus and is used to detect the impedance of the DC bus to the ground.
[0047] In this technical solution, the photovoltaic device includes the insulation impedance detection circuit provided in any of the above technical solutions, so it also includes all the beneficial effects of the insulation impedance detection circuit provided in any of the above technical solutions. To avoid repetition, they will not be elaborated here.
[0048] The third aspect of the present application provides a control method for an insulation impedance detection circuit. The insulation impedance detection circuit includes a first sub-detection circuit and a second sub-detection circuit. The resistance values of the positive detection resistor and the negative detection resistor in the first sub-detection circuit are not equal, and the resistance values of the positive detection resistor and the negative detection resistor in the second sub-detection circuit are equal; the control method includes:
[0049] Obtain a first bus voltage of the DC bus, a first negative voltage to the ground, a second bus voltage, and a second negative voltage to the ground; wherein, the first bus voltage and the first negative voltage to the ground are detected by the first sub-detection circuit, and the second bus voltage and the second negative voltage to the ground are detected by the second sub-detection circuit; determine first impedance detection information according to the first bus voltage and the first negative voltage to the ground, and determine second impedance detection information according to the second bus voltage and the second negative voltage to the ground; determine the insulation impedance detection result of the DC bus based on the first impedance detection information and the second impedance detection information.
[0050] In this technical solution, the first sub-detection circuit is an asymmetric detection circuit, and the second sub-detection circuit is a symmetric detection circuit. Among them, for the second sub-detection circuit, it can accurately detect the impedance of the DC bus to the ground in scenarios other than when the insulation impedance Rins+ of the positive bus to the ground and the insulation impedance Rins- of the negative bus to the ground change simultaneously. For the first sub-detection circuit, it can accurately detect the impedance of the DC bus to the ground in all scenarios except when R1×Rins- = R2×Rins+.
[0051] This application combines a first sub-detection circuit and a second sub-detection circuit. The first sub-detection circuit detects the first bus voltage Vpv1 and the first negative pole-to-ground voltage Vg1, and uses the above formula (1) to calculate Rins1+ and Rins1-. Similarly, the second sub-detection circuit detects the second bus voltage Vpv2 and the second negative pole-to-ground voltage Vg2, and uses the above formula (1) to calculate Rins2+ and Rins2-.
[0052] Among them, Rins1+ and Rins1- are the above-mentioned first impedance detection information, and Rins2+ and Rins2- are the above-mentioned second impedance detection information.
[0053] By comparing whether both the first detection information and the second detection information meet the ground insulation impedance threshold required for the safe and stable operation of the system, the insulation impedance detection result of the DC bus is determined.
[0054] This application combines a symmetric detection circuit and an asymmetric detection circuit, and can ensure the accuracy and reliability of the ground insulation impedance detection result in any case.
[0055] In some technical solutions of this application, optionally, based on the first impedance detection information and the second impedance detection information, determining the insulation impedance detection result of the DC bus includes: when both the first impedance detection information and the second impedance detection information meet the insulation detection conditions of the DC bus, determining that the insulation impedance detection result passes the insulation detection; or, when any one of the first impedance detection information and the second impedance detection information does not meet the insulation detection conditions of the DC bus, determining that the insulation impedance detection result fails the insulation detection.
[0056] In this technical solution, assuming that the positive pole detection resistor is R1 and the negative pole detection resistor is R2, then in the symmetric detection circuit, that is, the above-mentioned second sub-detection circuit, R1 = R2, and in the asymmetric detection circuit, that is, the above-mentioned first sub-detection circuit, R1 ≠ R2. For the second sub-detection circuit, Rins+ and Rins- change simultaneously, and the sampling value of the negative bus-to-ground voltage remains basically unchanged. For the first sub-detection circuit, in a specific case, if it exactly satisfies R1×Rins- = R2×Rins+, the difference between the bus voltage and the sampling value of the negative bus-to-ground voltage remains basically unchanged.
[0057] Therefore, in this application, an asymmetric detection circuit and a symmetric detection circuit are simultaneously set, that is, the above-mentioned first sub-detection circuit and second sub-detection circuit. The insulation of the bus circuit is detected by the two sub-detection circuits respectively. When the ground insulation impedance detected by the two sub-detection circuits meets the requirements, it is confirmed that the equipment has normal ground insulation, otherwise it is considered that the equipment has abnormal ground insulation.
[0058] Exemplarily, when both the first detection information and the second detection information meet the above-mentioned ground insulation impedance threshold, it is determined whether the detection result meets the requirements. When any one of the first detection information and the second detection information does not meet the above-mentioned ground insulation impedance threshold, it is determined that the detection result does not meet the requirements.
[0059] By combining an asymmetric detection circuit and a symmetric detection circuit, the present application realizes accurate and reliable ground insulation impedance detection without the need to set switching devices and complex switching control logics.
[0060] The fourth aspect of the present application provides a control device for an insulation impedance detection circuit, including: a memory for storing programs or instructions; a processor for implementing the control method of the insulation impedance detection circuit in any of the above technical solutions when executing the programs or instructions. Therefore, it also includes all the beneficial effects of the control method of the insulation impedance detection circuit in any of the above technical solutions. To avoid repetition, they will not be elaborated here.
[0061] The fifth aspect of the present application provides a readable storage medium, on which programs or instructions are stored. When the programs or instructions are executed by a processor, the control method of the insulation impedance detection circuit in any of the above technical solutions is implemented. Therefore, it also includes all the beneficial effects of the control method of the insulation impedance detection circuit in any of the above technical solutions. To avoid repetition, they will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0062] The above and / or additional aspects and advantages of the present application will become apparent and easy to understand from the description of the embodiments in conjunction with the following drawings, where:
[0063] Figure 1 The circuit diagrams of the insulation impedance detection circuits of some embodiments of the present application are shown;
[0064] Figure 2 The circuit diagrams of the first sub-detection circuits of some embodiments of the present application are shown;
[0065] Figure 3 The circuit diagrams of the second sub-detection circuits of some embodiments of the present application are shown;
[0066] Figure 4 The flowcharts of the control methods of the insulation impedance detection circuits of some embodiments of the present application are shown;
[0067] Figure 5 The structural block diagrams of the control devices of the insulation impedance detection circuits of some embodiments of the present application are shown.
[0068] REFERENCE NUMERALS:
[0069] 10 Insulation impedance detection circuit, R1 positive detection resistor, R2 negative detection resistor, 102 first sub-detection circuit, 104 second sub-detection circuit, 106 controller, Q1 first comparator, C1 first capacitor, R4 first resistor, Q2 second comparator, C2 second capacitor, R7 second resistor, PV+ positive bus, PV- negative bus. Detailed implementation manners
[0070] In order to more clearly understand the above objects, features and advantages of the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific implementation manners. It should be noted that, without conflict, the embodiments of the present application and the features in the embodiments can be combined with each other.
[0071] In the following description, many specific details are set forth in order to fully understand the present application. However, the present application may also be implemented in other ways different from those described herein. Therefore, the protection scope of the present application is not limited by the specific embodiments disclosed below.
[0072] The following refers to Figures 1 to 5 Describe an insulation impedance detection circuit and its control method, control device and photovoltaic device according to some embodiments of the present application.
[0073] In some embodiments of the present application, an insulation impedance detection circuit is provided. Figure 1 The circuit diagram of the insulation impedance detection circuit according to some embodiments of the present application is shown. Figure 2 The circuit diagram of the first sub-detection circuit according to some embodiments of the present application is shown. Figure 3 The circuit diagram of the second sub-detection circuit according to some embodiments of the present application is shown. As Figure 1 , Figure 2 and Figure 3 shown, the insulation impedance detection circuit 10 is used to detect the impedance of the DC bus to the ground. The DC bus includes a positive bus and a negative bus. The insulation impedance detection circuit 10 includes:
[0074] A sub-detection circuit. The sub-detection circuit includes a positive detection resistor R1 and a negative detection resistor R2. The sub-detection circuit is used to detect the bus voltage between the positive bus PV+ and the negative bus PV- through the positive detection resistor R1, and to detect the negative voltage of the negative bus PV- to the ground through the negative detection resistor R2. Among them, the number of sub-detection circuits is two. The two sub-detection circuits include a first sub-detection circuit 102 and a second sub-detection circuit 104. The resistance values of the positive detection resistor R1 and the negative detection resistor R2 in the first sub-detection circuit 102 are not equal, and the resistance values of the positive detection resistor R1 and the negative detection resistor R2 in the second sub-detection circuit 104 are equal.
[0075] In this embodiment, by way of example, for scenarios such as a photovoltaic system, the photovoltaic modules serving as power generation components include N-type photovoltaic modules and P-type photovoltaic modules. Among them, the N-type photovoltaic modules mainly conduct electricity through electrons, while the P-type photovoltaic modules conduct electricity through holes. During use, taking the N-type photovoltaic module as an example, if the voltage across the cell is negative and the frame has a positive bias voltage, that is, when the photovoltaic module is under a negative bias voltage, the leakage anode ions flow into the cell.
[0076] When impurities appear in the semiconductor, these impurities will form conductive channels inside the battery. Under the long-term action of a high negative voltage, leakage current will occur between the glass and the encapsulation materials. Among them, the encapsulation materials of the photovoltaic module can be divided into external encapsulation materials and internal encapsulation materials. The external encapsulation materials include, for example, glass backsheets, TPT (Thermoplastic Polyester Elastome) backsheets, aluminum frames, and edge sealants. The internal encapsulation materials such as EVA (ethylene-vinyl acetate copolymer) film, PVB (Polyvinyl Butyral) film, PIB (Polyisobutylene) laminated sealant, etc.
[0077] When a large amount of charge accumulates on the surface of the cell, the passivation effect on the cell surface deteriorates, resulting in a decrease in the fill factor, short-circuit current, and open-circuit voltage of the cell panel. This phenomenon is called the PID (Potential Induced Degradation) effect, which will cause a decrease in the power generation of the photovoltaic system and seriously affect the power generation of the power station. At this time, the manifestation is that the insulation impedance of the DC bus of the photovoltaic power generation module to the ground decreases. Therefore, it is necessary to monitor the insulation impedance of the DC bus to the ground in real time and intervene immediately when it is detected that the insulation impedance to the ground decreases.
[0078] This application proposes an asymmetric insulation impedance detection circuit 10 that does not require a signal relay. When performing insulation impedance detection through this insulation impedance detection circuit 10, there is no need to set up a complex control process for software-controlled switching devices. And since there is no need to set up switching devices, it is possible to avoid the failure of insulation impedance detection caused by the failure of the switching devices, thereby achieving low-cost and high-reliability insulation impedance detection. The following will detail the specific implementation of the insulation impedance detection circuit 10 of this application.
[0079] Exemplarily, such as Figure 1As shown in the figure, let PV+ be the positive busbar PV+, PV- be the negative busbar PV-. Let the insulation impedance of the positive busbar PV+ in the busbar voltage to the ground be Rins+, and the insulation impedance of the negative busbar PV- in the busbar voltage to the ground be Rins-. When performing insulation impedance detection, sample the voltage value of the positive busbar PV+ to the negative busbar PV-, that is, the busbar voltage Vpv of the DC busbar, and sample the voltage value of the negative busbar PV- to the ground, that is, the negative-to-ground voltage Vg. Determine the insulation impedance Rins+ of the positive busbar PV+ to the ground and the insulation impedance of the negative busbar PV- to the ground as Rins- according to the busbar voltage Vpv and the negative-to-ground voltage Vg.
[0080] At this time, the calculation is performed through the following formula (1):
[0081]
[0082] Among them, Vpv is the busbar voltage, Vg is the negative-to-ground voltage, R1 is the positive detection resistor, R2 is the negative detection resistor, and R5, R6, R7, R8, and R9 are Figure 1 the resistors shown in, and R5, R6, R7, R8, and R9 are constants.
[0083] The selection of the positive detection resistor R1 and the negative detection resistor R2 is the key to the insulation impedance detection circuit 10. When the positive detection resistor R1 and the negative detection resistor R2 are equal, generally this sub-detection circuit is recorded as a symmetric detection circuit, and when the evidence detection resistor and the negative detection resistor R2 are not equal, then this sub-detection circuit is considered an asymmetric detection circuit.
[0084] Let the positive detection resistor be R1 and the negative detection resistor be R2. Then, in the symmetric detection circuit, that is, in the above-mentioned second sub-detection circuit 104, R1 = R2. The changes in the insulation impedance Rins+ of the positive busbar PV+ to the ground and the insulation impedance Rins- of the negative busbar PV- to the ground can be divided into the following three cases:
[0085] Case 1: The insulation impedance Rins+ of the positive busbar PV+ to the ground changes, and the insulation impedance Rins- of the negative busbar PV- to the ground remains unchanged (at this time, it is default that the resistance value of Rins- is infinite);
[0086] Case 2: The insulation impedance Rins+ of the positive busbar PV+ to the ground remains unchanged, and the insulation impedance Rins- of the negative busbar PV- to the ground changes;
[0087] Case 3: The insulation impedance Rins+ of the positive busbar PV+ to the ground and the insulation impedance Rins- of the negative busbar PV- to the ground both change.
[0088] At this time, for the second sub-detection circuit 104, in case 1, the larger the Rins+, the smaller the sampling value of the voltage of the negative bus PV- with respect to the ground. In case 2, the larger the Rins-, the larger the sampling value of the voltage of the negative bus PV- with respect to the ground. In case 3, when Rins+ and Rins- change simultaneously, the sampling value of the voltage of the negative bus PV- with respect to the ground remains basically unchanged. The detection data of the second sub-detection circuit 104 is shown in Table 1 below:
[0089] Table 1
[0090]
[0091] Since the sampling value of the voltage of PV- with respect to the ground remains basically unchanged when Rins+ and Rins- change simultaneously, the insulation impedance values cannot be deduced by calculating the difference between the bus voltage Vpv of the DC bus and the voltage Vg of the negative pole with respect to the ground for the positive bus PV+ and the negative bus PV- with respect to the ground insulation impedance Rins+ and Rins- respectively.
[0092] To address the above problems, the present application adds an asymmetric detection circuit, namely the above-mentioned first sub-detection circuit 102. In the first sub-detection circuit 102, R1≠R2. Assume R1 = k×R2, where k is a proportionality coefficient. For example, if k is taken as 10 / 7, the data of the first sub-detection circuit 102 is shown in Table 2 below:
[0093] Table 2
[0094]
[0095] As shown in Table 2, for the asymmetric first sub-detection circuit 102, in the above-mentioned case 1, case 2, and case 3, the insulation impedance Rins+ of the positive bus PV+ with respect to the ground and the insulation impedance Rins- of the negative bus PV- with respect to the ground can be deduced by collecting the difference between the bus voltage Vpv of the DC bus and the voltage Vg of the negative pole with respect to the ground.
[0096] If only the asymmetric detection circuit is set, in a specific case, for example, when k is taken as 10 / 7 and R1 = 10 / 7×R2, if it exactly satisfies Rins+ = 10 / 7×Rins-, then it will result in R1×Rins- = R2×Rins+. At this time, it can be deduced from the above formula (1) that the difference between the bus voltage and the sampling value of the voltage of the negative bus PV- with respect to the ground remains basically unchanged.
[0097] In response to this, the present application sets both an asymmetric detection circuit and a symmetric detection circuit, namely the above-mentioned first sub-detection circuit 102 and second sub-detection circuit 104. The insulation of the bus circuit is detected by the two sub-detection circuits respectively. When the insulation impedances with respect to the ground detected by the two sub-detection circuits both meet the requirements, it is confirmed that the equipment insulation with respect to the ground is normal; otherwise, it is considered that the equipment insulation with respect to the ground is abnormal.
[0098] The insulation impedance detection circuit 10 proposed in the embodiments of the present application does not need to set a complex control process for software-controlled switching devices. Moreover, since there is no need to set switching devices, it is possible to avoid the failure of insulation impedance detection caused by the failure of switching devices, thereby achieving low-cost and high-reliability insulation impedance detection.
[0099] In addition, the insulation impedance detection circuit 10 in the above-mentioned embodiments provided by the present application may further have the following additional technical features:
[0100] In some embodiments of the present application, optionally, the insulation impedance detection circuit 10 further includes: a controller 106, which is electrically connected to the first sub-detection circuit 102 and the second sub-detection circuit 104, and the controller 106 is configured to:
[0101] Determine first impedance detection information according to the first bus voltage and the first negative pole-to-ground voltage, where the first bus voltage and the first negative pole-to-ground voltage are detected by the first sub-detection circuit 102; determine second impedance detection information according to the second bus voltage and the second negative pole-to-ground voltage, where the second bus voltage and the second negative pole-to-ground voltage are detected by the second sub-detection circuit 104; and determine the insulation impedance detection result of the DC bus based on the first impedance detection information and the second impedance detection information.
[0102] In this embodiment, the first sub-detection circuit 102 is an asymmetric detection circuit, and the second sub-detection circuit 104 is a symmetric detection circuit. Among them, for the second sub-detection circuit 104, it can accurately detect the insulation impedance of the DC bus in scenarios other than when the insulation impedance Rins+ of the positive bus PV+ to the ground and the insulation impedance Rins- of the negative bus PV- to the ground change simultaneously. For the first sub-detection circuit 102, it can accurately detect the insulation impedance of the DC bus in all scenarios except when R1×Rins- = R2×Rins+.
[0103] The present application combines the first sub-detection circuit 102 and the second sub-detection circuit 104. The first sub-detection circuit 102 detects the first bus voltage Vpv1 and the first negative pole-to-ground voltage Vg1, and calculates Rins1+ and Rins1- using the above formula (1). Similarly, the second sub-detection circuit 104 detects the second bus voltage Vpv2 and the second negative pole-to-ground voltage Vg2, and calculates Rins2+ and Rins2- using the above formula (1).
[0104] Among them, Rins1+ and Rins1- are the above-mentioned first impedance detection information, and Rins2+ and Rins2- are the above-mentioned second impedance detection information.
[0105] The insulation impedance detection result of the DC bus is determined by comparing whether both the first detection information and the second detection information meet the ground insulation impedance threshold required for the safe and stable operation of the system.
[0106] Exemplarily, when both the first detection information and the second detection information meet the above-mentioned ground insulation impedance threshold, the detection result is determined whether it meets the requirements. When any one of the first detection information and the second detection information does not meet the above-mentioned ground insulation impedance threshold, it is determined that the detection result does not meet the requirements.
[0107] This application combines a symmetric detection circuit and an asymmetric detection circuit, and can ensure the accuracy and reliability of the detection result of the ground insulation impedance in any case.
[0108] In some embodiments of the present application, optionally, the sub-detection circuit includes: a positive detection resistor R1, the first end of the positive detection resistor R1 is electrically connected to the positive bus PV+, and the second end of the positive detection resistor R1 is grounded; a first comparator Q1, the first input end of the first comparator Q1 is electrically connected to the negative bus PV-, the second input end of the first comparator Q1 is electrically connected to the first end of the positive detection resistor R1, and the output end of the first comparator Q1 is used to output the bus voltage.
[0109] In this embodiment, the positive detection resistor is R1. One end of the positive detection resistor R1 is connected to the positive bus PV+, the other end is grounded, and is connected to the first input end (input positive) of the first comparator Q1. The second input end (input negative) of the first comparator Q1 is connected to the negative bus PV- through a voltage dividing resistor. Through the above simple circuit structure, accurate detection of the ground insulation impedance of the DC bus can be achieved without setting additional switching devices, simplifying the structure of the insulation impedance detection circuit 10 and improving the reliability of the insulation impedance detection circuit 10.
[0110] In some embodiments of the present application, optionally, the sub-detection circuit further includes: a first capacitor C1, the first end of the first capacitor C1 is electrically connected to the second input end of the first comparator Q1, and the second end of the first capacitor C1 is electrically connected to the negative bus PV-; a first resistor R4, the first resistor R4 is connected in parallel with the first capacitor C1.
[0111] In this embodiment, a parallel-connected first capacitor C1 and first resistor R4 are provided between the first input end of the first comparator Q1 and the positive detection resistor R1, which can reliably absorb the noise signals in the circuit and improve the detection accuracy.
[0112] In some embodiments of the present application, optionally, the sub-detection circuit further includes: a negative electrode detection resistor R2, the first end of the negative electrode detection resistor R2 is grounded; a second comparator Q2, the first input terminal of the second comparator Q2 is electrically connected to the negative electrode bus PV-, the second input terminal of the second comparator Q2 is electrically connected to the second end of the negative electrode detection resistor R2, and the output terminal of the second comparator Q2 is used to output the voltage of the negative electrode to the ground.
[0113] In this embodiment, the negative electrode detection resistor is R2. One end of the negative electrode detection resistor R2 is connected to the negative electrode bus PV-, the other end is grounded, and is connected to the first input terminal (positive input) of the second comparator Q2 through a resistor R6. At the same time, the first input terminal of the second comparator Q2 is connected to the negative electrode bus PV- through a resistor R6 and a filter capacitor C3. The second input terminal (negative input) of the second comparator Q2 is connected to the negative electrode bus PV- through a voltage-dividing resistor. Through the above simple circuit structure, the accurate detection of the insulation impedance of the DC bus to the ground can be realized without setting additional switching devices, simplifying the structure of the insulation impedance detection circuit 10 and improving the reliability of the insulation impedance detection circuit 10.
[0114] In some embodiments of the present application, optionally, the sub-detection circuit further includes: a second capacitor C2, the first end of the second capacitor C2 is electrically connected to the second input terminal of the second comparator Q2, and the second end of the second capacitor C2 is electrically connected to the negative electrode bus PV-; a second resistor R7, the second resistor R7 is connected in parallel with the second capacitor C2.
[0115] In this embodiment, a second capacitor C2 and a second resistor R7 connected in parallel are provided between the second input terminal of the second comparator Q2 and the positive electrode detection resistor R1, which can reliably absorb the noise signals in the circuit and improve the detection accuracy.
[0116] In some embodiments of the present application, a photovoltaic device is provided, including: a photovoltaic power generation component, the output terminal of the photovoltaic power generation component is electrically connected to the DC bus; an insulation impedance detection circuit as provided in any of the above embodiments, the insulation impedance detection circuit is electrically connected to the DC bus and is used to detect the impedance of the DC bus to the ground.
[0117] In this embodiment, the photovoltaic device includes the insulation impedance detection circuit as provided in any of the above embodiments, and thus also includes all the beneficial effects of the insulation impedance detection circuit as provided in any of the above embodiments. To avoid repetition, they will not be elaborated here.
[0118] In some embodiments of the present application, a control method for an insulation impedance detection circuit is provided. The insulation impedance detection circuit includes a first sub-detection circuit and a second sub-detection circuit. The resistance values of the positive detection resistor and the negative detection resistor in the first sub-detection circuit are not equal, and the resistance values of the positive detection resistor and the negative detection resistor in the second sub-detection circuit are equal.
[0119] Figure 4 The flowchart of the control method for the insulation impedance detection circuit according to some embodiments of the present application is shown, as Figure 4 shown, the control method includes:
[0120] Step 402, obtaining a first bus voltage of the DC bus, a first negative pole-to-ground voltage, a second bus voltage, and a second negative pole-to-ground voltage; wherein, the first bus voltage and the first negative pole-to-ground voltage are detected by the first sub-detection circuit, and the second bus voltage and the second negative pole-to-ground voltage are detected by the second sub-detection circuit;
[0121] Step 404, determining first impedance detection information according to the first bus voltage and the first negative pole-to-ground voltage, and determining second impedance detection information according to the second bus voltage and the second negative pole-to-ground voltage;
[0122] Step 406, determining an insulation impedance detection result of the DC bus based on the first impedance detection information and the second impedance detection information.
[0123] In this embodiment, the first sub-detection circuit is an asymmetric detection circuit, and the second sub-detection circuit is a symmetric detection circuit. Among them, for the second sub-detection circuit, it can accurately detect the insulation impedance of the DC bus to the ground in scenarios other than when the insulation impedance Rins+ of the positive bus to the ground and the insulation impedance Rins- of the negative bus to the ground change simultaneously. For the first sub-detection circuit, it can accurately detect the insulation impedance of the DC bus to the ground in all scenarios except when R1×Rins- = R2×Rins+.
[0124] The present application combines the first sub-detection circuit and the second sub-detection circuit. The first bus voltage Vpv1 and the first negative pole-to-ground voltage Vg1 are detected by the first sub-detection circuit, and Rins1+ and Rins1- are calculated using the above formula (1). Similarly, the second bus voltage Vpv2 and the second negative pole-to-ground voltage Vg2 are detected by the second sub-detection circuit, and Rins2+ and Rins2- are calculated using the above formula (1).
[0125] Among them, Rins1+ and Rins1- are the above-mentioned first impedance detection information, and Rins2+ and Rins2- are the above-mentioned second impedance detection information.
[0126] The insulation impedance detection result of the DC bus is determined by comparing whether both the first detection information and the second detection information meet the ground insulation impedance threshold required for the safe and stable operation of the system.
[0127] This application combines a symmetric detection circuit and an asymmetric detection circuit, which can ensure the accuracy and reliability of the ground insulation impedance detection result under any circumstances.
[0128] In some embodiments of this application, optionally, based on the first impedance detection information and the second impedance detection information, determining the insulation impedance detection result of the DC bus includes: when both the first impedance detection information and the second impedance detection information meet the insulation detection conditions of the DC bus, determining that the insulation impedance detection result passes the insulation detection; or, when any one of the first impedance detection information and the second impedance detection information does not meet the insulation detection conditions of the DC bus, determining that the insulation impedance detection result fails the insulation detection.
[0129] In this embodiment, assuming that the positive detection resistance is R1 and the negative detection resistance is R2, in the symmetric detection circuit, that is, the second sub-detection circuit above, R1 = R2, and in the asymmetric detection circuit, that is, the first sub-detection circuit above, R1 ≠ R2. For the second sub-detection circuit, Rins+ and Rins- change simultaneously, and the sampling value of the negative bus voltage to ground remains basically unchanged. For the first sub-detection circuit, in a specific case, if it exactly satisfies R1 × Rins- = R2 × Rins+, the difference between the bus voltage and the sampling value of the negative bus voltage to ground remains basically unchanged.
[0130] Therefore, in this application, an asymmetric detection circuit and a symmetric detection circuit are simultaneously set, that is, the first sub-detection circuit and the second sub-detection circuit above. The insulation of the bus circuit is detected by the two sub-detection circuits respectively. When the ground insulation impedance detected by the two sub-detection circuits meets the requirements, it is confirmed that the equipment has normal insulation to the ground, otherwise it is considered that the equipment has abnormal insulation to the ground.
[0131] Exemplarily, when both the first detection information and the second detection information meet the above ground insulation impedance threshold, it is determined whether the detection result meets the requirements. When any one of the first detection information and the second detection information does not meet the above ground insulation impedance threshold, it is determined that the detection result does not meet the requirements. Specifically, as shown in Table 3:
[0132] Table 3
[0133]
[0134] This application combines an asymmetric detection circuit and a symmetric detection circuit to achieve accurate and reliable ground insulation impedance detection without the need to set switch devices and complex switch control logics.
[0135] In some embodiments of the present application, a control device for an insulation impedance detection circuit is provided. Figure 5 The structural block diagram of the control device for the insulation impedance detection circuit according to some embodiments of the present application is shown. As Figure 5 shown, the control device 500 for the insulation impedance detection circuit includes: a memory 502 for storing programs or instructions; a processor 504 for implementing the control method for the insulation impedance detection circuit in any of the above embodiments when executing the programs or instructions. Therefore, it also includes all the beneficial effects of the control method for the insulation impedance detection circuit in any of the above embodiments. To avoid repetition, it will not be elaborated here.
[0136] In some embodiments of the present application, a readable storage medium is provided, on which programs or instructions are stored. When the programs or instructions are executed by a processor, the control method for the insulation impedance detection circuit in any of the above embodiments is implemented. Therefore, it also includes all the beneficial effects of the control method for the insulation impedance detection circuit in any of the above embodiments. To avoid repetition, it will not be elaborated here.
[0137] The methods can be implemented in various different ways according to specific features and / or example applications. For example, these methods can be implemented by a combination of hardware, firmware, and / or software. For example, in a hardware implementation, the processor can be implemented in one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, electronic devices, other device units for performing the above functions, and / or combinations thereof.
[0138] A computer-readable storage medium can be a tangible device that can retain and store instructions for use by an instruction execution device. A computer-readable storage medium can be an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the above devices, but is not limited thereto. A non-exhaustive list of more specific examples of computer-readable storage media includes: portable computer floppy disks, hard disks, random access memories (RAMs), read-only memories (ROMs), erasable programmable read-only memories (EPROMs or flash memories), static random access memories (SRAMs), portable compact disc read-only memories (CD-ROMs), digital versatile discs (DVDs), memory cards, floppy disks, encoding mechanical devices (such as punched cards or grooves with raised structures recording instructions), and any suitable combination of the above devices. The computer-readable storage medium used herein should not be construed as a signal per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagated through waveguides or other transmission media, or electrical signals transmitted through wires, etc.
[0139] In the description of the present application, the term "a plurality of" refers to two or more, unless otherwise clearly defined. The orientation or positional relationship indicated by terms such as "upper", "lower", etc. is based on the orientation or positional relationship described in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present application; terms such as "connection", "installation", "fixation", etc. should all be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.
[0140] In the description of the present application, the description of terms such as "one embodiment", "some embodiments", "specific embodiments", etc. means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present application, the schematic expressions of the above terms do not necessarily refer to the same embodiment or instance. Moreover, the specific features, structures, materials or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.
[0141] The above are only the preferred embodiments of the present application and are not used to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application.
Claims
1. An insulation impedance detection circuit, characterized in that, The insulation impedance detection circuit is used to detect the impedance of the DC bus to the ground. The DC bus includes a positive bus and a negative bus. The insulation impedance detection circuit includes: A sub-detection circuit. The sub-detection circuit includes a positive detection resistor and a negative detection resistor. The sub-detection circuit is used to detect the bus voltage between the positive bus and the negative bus through the positive detection resistor, and detect the negative voltage of the negative bus to the ground through the negative detection resistor. Wherein, the number of the sub-detection circuits is two. The two sub-detection circuits include a first sub-detection circuit and a second sub-detection circuit. The resistance values of the positive detection resistor and the negative detection resistor in the first sub-detection circuit are not equal, and the resistance values of the positive detection resistor and the negative detection resistor in the second sub-detection circuit are equal. A controller. The controller is electrically connected to the first sub-detection circuit and the second sub-detection circuit. The controller is used for: Determining first impedance detection information according to a first bus voltage and a first negative voltage to the ground; wherein, the first bus voltage and the first negative voltage to the ground are detected by the first sub-detection circuit. Determining second impedance detection information according to a second bus voltage and a second negative voltage to the ground; wherein, the second bus voltage and the second negative voltage to the ground are detected by the second sub-detection circuit. And determining the insulation impedance detection result of the DC bus based on the first impedance detection information and the second impedance detection information.
2. The insulation impedance detection circuit according to claim 1, wherein The controller is further used for: When both the first impedance detection information and the second impedance detection information meet the insulation detection conditions of the DC bus, determining that the insulation impedance detection result is passing the insulation detection. Or, when any one of the first impedance detection information and the second impedance detection information does not meet the insulation detection conditions of the DC bus, determining that the insulation impedance detection result is failing the insulation detection.
3. The insulation impedance detection circuit according to claim 1, wherein The sub-detection circuit includes: The positive detection resistor. The first end of the positive detection resistor is electrically connected to the positive bus, and the second end of the positive detection resistor is grounded. A first comparator. The first input end of the first comparator is electrically connected to the negative bus, the second input end of the first comparator is electrically connected to the first end of the positive detection resistor, and the output end of the first comparator is used to output the bus voltage.
4. The insulation impedance detection circuit according to claim 3, wherein, The sub-detection circuit further includes: A first capacitor. The first end of the first capacitor is electrically connected to the second input end of the first comparator, and the second end of the first capacitor is electrically connected to the negative bus. A first resistor. The first resistor is connected in parallel with the first capacitor.
5. The insulation impedance detection circuit according to claim 1, characterized in that, The sub-detection circuit further includes: The negative detection resistor. The first end of the negative detection resistor is grounded. A second comparator. The first input end of the second comparator is electrically connected to the negative bus, the second input end of the second comparator is electrically connected to the second end of the negative detection resistor, and the output end of the second comparator is used to output the negative voltage to the ground.
6. The insulation impedance detection circuit according to claim 5, wherein The sub-detection circuit further includes: A second capacitor, a first end of the second capacitor is electrically connected to a second input terminal of the second comparator, and a second end of the second capacitor is electrically connected to the negative busbar; A second resistor, the second resistor is connected in parallel with the second capacitor.
7. A photovoltaic device, characterized in that, Comprising: A photovoltaic power generation module, an output terminal of the photovoltaic power generation module is electrically connected to a DC busbar; The insulation impedance detection circuit according to any one of claims 1 to 6, the insulation impedance detection circuit is electrically connected to the DC busbar and is used for detecting the impedance of the DC busbar to the ground.
8. A control method for an insulation impedance detection circuit, characterized in that The insulation impedance detection circuit includes a first sub-detection circuit and a second sub-detection circuit. Resistance values of a positive detection resistor and a negative detection resistor in the first sub-detection circuit are not equal, and resistance values of the positive detection resistor and the negative detection resistor in the second sub-detection circuit are equal; the control method includes: Obtain a first busbar voltage, a first negative terminal to ground voltage, a second busbar voltage, and a second negative terminal to ground voltage of the DC busbar; wherein, the first busbar voltage and the first negative terminal to ground voltage are detected by the first sub-detection circuit, and the second busbar voltage and the second negative terminal to ground voltage are detected by the second sub-detection circuit; Determine first impedance detection information according to the first busbar voltage and the first negative terminal to ground voltage, and determine second impedance detection information according to the second busbar voltage and the second negative terminal to ground voltage; Based on the first impedance detection information and the second impedance detection information, determine an insulation impedance detection result of the DC busbar.
9. The control method of the insulation impedance detection circuit according to claim 8, characterized in that The determining the insulation impedance detection result of the DC busbar based on the first impedance detection information and the second impedance detection information includes: When both the first impedance detection information and the second impedance detection information meet the insulation detection condition of the DC busbar, determine that the insulation impedance detection result is passed the insulation detection; Or, when any one of the first impedance detection information and the second impedance detection information does not meet the insulation detection condition of the DC busbar, determine that the insulation impedance detection result is not passed the insulation detection.
10. A control device for an insulation impedance detection circuit, characterized in that, Comprising: A memory for storing programs or instructions; A processor for implementing the control method of the insulation impedance detection circuit according to claim 8 or 9 when executing the programs or instructions.
11. A readable storage medium, on which a program or instructions are stored, characterized in that, The programs or instructions, when executed by the processor, implement the control method of the insulation impedance detection circuit according to claim 8 or 9.
Citation Information
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