Top drop compensation method and circuit of solid-state high-voltage pulse modulator and modulator

Abstract

The invention discloses a top drop compensation method and circuit for a solid-state high-voltage pulse modulator and the modulator, and the method comprises the steps: superposing negative pressure at the front part of a discharge pulse when the pulse discharge of the solid-state high-voltage pulse modulator begins, thereby reducing the amplitude of the front part of the discharge pulse, and after the pulse discharge reaches a set time threshold, reducing the amplitude of the front part of the discharge pulse. Positive voltage is superposed at the rear part of the discharge pulse, so that the amplitude of the rear part of the discharge pulse is raised, and the top of the output high-voltage pulse is flat by setting a time threshold value and corresponding negative voltage and positive voltage values. By adjusting the voltage of the compensation capacitor and adjusting the delay time between the compensation switch and the discharge switch, compensation of pulse top drop can be completed quickly and conveniently, and the effect is good.

Description

Technical Field

[0001] The present invention relates to the field of pulse power technology, and in particular to a droop compensation method and compensation circuit for a solid-state high-voltage pulse modulator, and a solid-state high-voltage pulse modulator with droop compensation. Background Art

[0002] High-voltage pulse modulators are important components of accelerator systems and are widely used in the fields of medical treatment, security inspection, industrial flaw detection, and scientific research. With the development of technology, solid-state pulse modulators have become the mainstream technical direction of high-voltage pulse modulators due to their excellent performance.

[0003] Solid-state high-voltage pulse modulators mainly use semiconductor devices as discharge switches and medium and low-voltage capacitors as energy storage devices. They output high-voltage pulses after being boosted by pulse transformers. During the discharge process (within the discharge pulse width range), the voltage of the energy storage capacitor decreases slowly due to discharge and the excitation current of the pulse transformer. The pulse waveform finally output to the load will have a top drop phenomenon as the pulse width increases. However, many applications have very strict requirements on the flatness of the pulse top, so pulse top drop compensation is a research hotspot and difficulty in the industry.

[0004] At present, there are two main methods for compensating the pulse top drop of conventional solid-state high-voltage pulse modulators:

[0005] 1. Increase the capacity of energy storage capacitor:

[0006] This method can improve the top drop caused by the decrease in capacitor voltage due to pulse discharge. However, this method has great limitations. First, this method can only improve the top drop of narrow pulse widths, and has limited effect on the top drop caused by the excitation current and distributed parameters of the pulse transformer; second, energy storage capacitors are mostly medium and high voltage capacitors, and increasing their capacitance will lead to a rapid increase in volume and cost. Therefore, the application scenarios of this method are very limited, and the effect is also very limited.

[0007] 2. LR compensation method:

[0008] This method mainly involves inserting a resistor-inductor parallel network in series in the discharge pulse loop. The principle is that at the beginning of the pulse discharge, due to the fact that the inductor current cannot change suddenly, the main current passes through the resistor to form a loop, so that a part of the voltage is sacrificed on the resistor, which can reduce the amplitude of the front part of the pulse waveform. As the discharge continues, the current in the inductor gradually increases, and the current flowing through the resistor gradually decreases. The system gradually forms a pulse loop through the inductor, and the voltage sacrificed on the original resistor gradually decreases until it reaches zero. In this way, the effect of "flattening" the front part of the pulse waveform is achieved, thereby achieving the effect of top drop compensation. This method can be effective for top drop compensation. By changing the values ​​of the inductance R and L, it can be used for top drop compensation of different pulse widths, so it is widely used.

[0009] However, the disadvantages of this method are also very obvious. This method achieves top drop compensation by consuming the energy in the front part of the pulse. The lost energy is very high, and in most cases it can reach more than 10% of the total energy, which greatly reduces the system efficiency. At the same time, this part of the energy will be completely converted into heat, which introduces the problem of heat dissipation. In addition, in order to control energy loss, the resistance value of the resistor needs to be controlled at the milliohm level and the power is high, which leads to a larger size and higher cost of the resistor. Summary of the invention

[0010] The purpose of the present invention is to overcome the shortcomings of the prior art and to provide a top drop compensation method, a compensation circuit and a solid-state high-voltage pulse modulator with top drop compensation. The top drop is cut and the valley is filled by the designed top drop compensation circuit, thereby making the top of the output high-voltage pulse flatter.

[0011] In order to achieve the above-mentioned purpose, the technical solution adopted by the present invention is: a top drop compensation method for a solid-state high-voltage pulse modulator, the method comprising: at the beginning of the pulse discharge of the solid-state high-voltage pulse modulator, a negative pressure is superimposed on the front part of the discharge pulse, thereby reducing the amplitude of the front part of the discharge pulse, and after the pulse discharge reaches a set time threshold, a positive pressure is superimposed on the rear part of the discharge pulse, thereby raising the amplitude of the rear part of the discharge pulse, and the top of the output high-voltage pulse is flat by setting the time threshold and the corresponding negative and positive pressure values.

[0012] The discharge voltage of the energy storage capacitor of the solid-state high-voltage pulse modulator is compensated with negative or positive pressure through the compensation capacitor circuit, and the droop compensation is realized by controlling the positive and negative pressure of the compensation capacitor to compensate the timing of the energy storage capacitor.

[0013] The compensation capacitor circuit includes a compensation switch S2, a compensation capacitor C2 and an inductor L1, wherein the negative electrode of the energy storage capacitor C1 of the solid-state pulse modulator is connected to the negative electrode of the compensation capacitor C2; a grounding point is drawn between the energy storage capacitor C1 and the compensation capacitor C2 and grounded; the positive electrode of the compensation capacitor C2 is connected to the second pin on the primary side of the transformer T1 of the solid-state pulse modulator; the positive electrode of the compensation capacitor C2 is connected to the negative electrode of the capacitor C2 through the compensation switch S2 and the inductor L1 connected in series in sequence; and the compensation of the top drop of the output high-voltage pulse is achieved by controlling the voltage of the compensation capacitor C2, controlling the opening and closing timing of the compensation switch S2, and the discharge timing of the solid-state pulse modulator.

[0014] A top drop compensation circuit of a solid-state high-voltage pulse modulator, the top compensation circuit comprising a compensation switch S2, a compensation capacitor C2 and an inductor L1, wherein the negative electrode of the energy storage capacitor C1 of the solid-state pulse modulator is connected to the negative electrode of the compensation capacitor C2, a grounding point is drawn between the energy storage capacitor C1 and the compensation capacitor C2 and grounded; the positive electrode of the compensation capacitor C2 is connected to the second pin on the primary side of the transformer T1 of the solid-state pulse modulator; the positive electrode of the compensation capacitor C2 is connected to the negative electrode of the capacitor C2 through the compensation switch S2 and the inductor L1 which are connected in series in sequence; and the compensation of the top drop of the output high-voltage pulse is achieved by controlling the voltage of the compensation capacitor C2, controlling the opening and closing timing of the compensation switch S2 and the discharge timing of the solid-state pulse modulator.

[0015] The compensation capacitor C2 is charged by the compensation power supply G2.

[0016] The compensation power supply G2, compensation capacitor C2, compensation switch S2 and inductor L1 are all integrated on a printed circuit board and reserved with input and output terminals, and the input and output terminals are used to connect to the energy storage power supply C1 and the transformer T1.

[0017] A solid-state high-voltage pulse modulator with droop compensation comprises an energy storage capacitor C1, a discharge switch S1, and a transformer T1. The modulator further comprises a compensation capacitor C2, a compensation switch S2, and an inductor L1. A main charging source G1 charges the energy storage capacitor G1. The positive electrode of the energy storage capacitor C1 is connected to the first terminal of the primary side of the transformer T1 via the discharge switch S1. The negative electrode of the energy storage capacitor C1 is connected to the negative electrode of the compensation capacitor C2, and a grounding point is drawn between the negative electrode of the energy storage capacitor C1 and the negative electrode of the compensation capacitor C1 and is grounded. The positive electrode of the compensation capacitor C2 is connected to the negative electrode of the compensation capacitor C2 via the compensation switch S1 and the inductor L1 connected in series in sequence. The positive electrode of the compensation capacitor C2 is connected to the second terminal of the primary side of the transformer T1. The secondary side of the transformer T1 is used to output high-voltage pulses.

[0018] The compensation capacitor C2 is charged by a compensation power supply G2, and the compensation power supply G2 is a low-voltage switching power supply.

[0019] The compensation switch S2 is a semiconductor device switch.

[0020] When the solid-state high-voltage pulse modulator is working, first, the main charging source G1 and the compensation power source G2 charge the energy storage capacitor C1 and the compensation capacitor C2 with their respective set voltages, and then stop charging. After the charging is completed, the polarities of the energy storage capacitor C1 and the compensation capacitor C2 are opposite; the compensation switch S2 is turned on by the trigger signal Tr2, at which time the compensation capacitor C2 and the resonant inductor L1 form an LC series resonant circuit, and the voltage on the capacitor C2 gradually decreases to zero and then reverses; after the compensation switch S2 is turned on by the trigger signal Tr2, the discharge switch S1 is turned on by the trigger signal Tr1 after a delay of a set time, at which time C1, C2, S1 and T1 form a discharge circuit, and the resonant circuit composed of C2 and L1 works simultaneously with the discharge circuit; by adjusting the delay between the trigger signals Tr1 and Tr2, the capacitor C2 is in a negative voltage state in the first half of the pulse waveform and in a positive voltage state in the second half of the pulse waveform, so that the voltage of the compensation capacitor C2 compensates the pulse waveform for the top drop.

[0021] The advantages of the present invention are:

[0022] 1. This invention is suitable for pulse top drop compensation under various voltages and pulse widths. The compensation of pulse top drop can be completed quickly and conveniently by adjusting the voltage of the compensation capacitor and adjusting the delay time between the compensation switch and the discharge switch, with good effect.

[0023] 2. The devices used in the circuit of this invention are all low-voltage, low-power devices, which are small in size, low in price, and abundant in supply. They have little impact on the size and cost of the system and are easy to implement.

[0024] 3. The circuit of this invention can be conveniently integrated into a small module, which is very conducive to integrated installation, debugging and batch production. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The following is a brief description of the contents expressed in the drawings of the present invention and the symbols in the drawings:

[0026] Figure 1 It is a schematic diagram of the circuit principle after the droop compensation circuit of the present invention is connected to the pulse modulator;

[0027] Figure 2 This is a diagram showing the change in the compensation resonant circuit and the compensation capacitor voltage of the present invention;

[0028] Figure 3 It is a timing diagram corresponding to the start-up signals of the discharge switch and the compensation switch of the present invention;

[0029] Figure 4 A schematic diagram of compensating a pulse waveform by a compensation switch voltage according to the present invention;

[0030] Figure 5 A schematic diagram showing a comparison of output pulse waveforms after compensation and before compensation according to the present invention;

[0031] Figure 6 It is a schematic diagram of the structural installation after the compensation circuit of the present invention is integrated;

[0032] Figure 7 It is a schematic diagram for comparing high voltage pulses after compensation generated by peak shaving and valley filling according to the present invention.

[0033] The markings in the above figures are: 1. Compensation capacitor; 2. Compensation power supply; 3. Resonant inductor; 4. Compensation switch; 5. Printed circuit board; 6. Input terminal; 7. Energy storage capacitor; 8. Capacitor terminal. DETAILED DESCRIPTION

[0034] The specific implementation of the present invention will be further explained in detail below by describing the optimal embodiment with reference to the accompanying drawings.

[0035] The present invention introduces a top drop compensation circuit based on the discharge circuit of a solid-state high-voltage pulse modulator. The top drop compensation circuit is mainly an LC series resonant circuit, in which a compensation capacitor is connected in series with an energy storage capacitor, and a compensation power supply is used to pre-charge the compensation capacitor with a lower voltage, and its polarity is opposite to that of the energy storage capacitor. When working, first turn on the compensation switch in the LC series resonant circuit, so that the voltage on the compensation capacitor gradually changes from negative to positive under the condition of series resonance; after a certain delay, turn on the discharge switch, and use the negative voltage of the compensation capacitor to reduce the voltage of the first half of the discharge pulse; and in the second half of the pulse waveform, the voltage on the compensation capacitor changes from negative to positive under the action of series resonance, and at this time, use its positive voltage to raise the voltage of the second half of the pulse waveform, thus achieving the effect of "peak shaving and valley filling", thereby achieving compensation for the top drop of the pulse waveform. The following is a detailed introduction as follows:

[0036] The present invention provides a top drop compensation method for a solid-state high-voltage pulse modulator. The method includes: when the solid-state high-voltage pulse modulator pulse discharge starts, a negative pressure is superimposed on the front part of the discharge pulse, thereby reducing the amplitude of the front part of the discharge pulse; after the pulse discharge reaches a set time threshold, a positive pressure is superimposed on the rear part of the discharge pulse, thereby raising the amplitude of the rear part of the discharge pulse; and the top of the output high-voltage pulse is flat by setting the time threshold and the corresponding negative and positive pressure values. The pulse top drop is referred to as pulse top drop. In order to compensate for the pulse top drop, the main idea of ​​this scheme is to reduce the pulse voltage amplitude in the first half of the high-voltage pulse, and to superimpose and increase the pulse voltage amplitude in the second half. In this way, although the pulse voltage output by the energy storage capacitor is a pulse voltage with a top drop phenomenon, the first half of the pulse is offset and the second half is superimposed during output, so that the top of the pulse is relatively flat; for example, for a pulse in the time period from 0 to T, the pulse top gradually decreases in amplitude from 0 to T, resulting in an uneven top; this scheme reduces the voltage amplitude by using a voltage of opposite polarity from 0 to T / 2, and increases the voltage by superimposing a voltage of the same polarity from T / 2 to T. In this way, by controlling the amplitude of the superimposed negative line voltage and the positive polarity voltage, the amplitude of the pulse voltage output after superposition can be guaranteed to be basically the same, so that the top of the pulse voltage output can be flat, thereby achieving the purpose of compensating for the top drop of the output high-voltage pulse.

[0037] like Figure 7 As shown, it is a schematic diagram of the output high-voltage pulse with top drop and the corresponding compensated high-voltage pulse. The uncompensated pulse on the left side of the present application is the pulse directly output by the energy storage capacitor C1, and the high-voltage pulse on the right side is output with a flat top after compensation; its compensation method is that the energy storage capacitor on the left side is output after the discharge switch and transformer. For the uncompensated high-voltage pulse, the pulse width is between the start time T1 and the end time T2 of the pulse discharged by the energy storage capacitor C1. Between the pulse width T1-T2, the pulse amplitude is reduced from the voltage V1 to V2, which is the reason for the top drop; in order to achieve the high voltage output of the transformer The top of the pulse is flat. Between the moments T1 and T2, the voltage V1 of the first half of the high-voltage pulse is first clipped to an amplitude of V2 by means of negative pressure offsetting. That is, the amplitude is offset by negative pressure superposition to make its regional amplitude V3. Similarly, in the second half of the pulse, the amplitude V2 is superimposed to V3 by means of positive pressure superposition in the same phase. In this way, the output high-voltage pulse amplitude is stabilized near the voltage V3 by means of peak clipping and valley filling, and a stable and flat pulse top is achieved to output a high-voltage pulse. This can be achieved by controlling the numerical value of the negative or positive pressure and the corresponding superposition timing.

[0038] In order to achieve the compensation of the output high-voltage pulse by superimposing negative and positive voltages, this scheme is designed with a compensation capacitor circuit, which compensates the discharge voltage of the energy storage capacitor of the solid-state high-voltage pulse modulator with negative or positive voltage through the compensation capacitor circuit, and realizes the top-down compensation by controlling the positive and negative voltages of the compensation capacitor to compensate the energy storage capacitor.

[0039] like Figure 1 As shown, it is a schematic diagram after the compensation capacitor circuit is installed in the solid-state pulse modulator circuit, wherein the compensation capacitor circuit includes a compensation switch S2, a compensation capacitor C2 and an inductor L1, wherein the negative electrode of the energy storage capacitor C1 of the solid-state pulse modulator is connected to the negative electrode of the compensation capacitor C2; a grounding point is drawn between the energy storage capacitor C1 and the compensation capacitor C2 and grounded; the positive electrode of the compensation capacitor C2 is connected to the second pin on the primary side of the transformer T1 of the solid-state pulse modulator; the positive electrode of the compensation capacitor C2 is connected to the negative electrode of the capacitor C2 through the compensation switch S2 and the inductor L1 connected in series in sequence; and the compensation of the top drop of the output high-voltage pulse is achieved by controlling the voltage of the compensation capacitor C2, controlling the opening and closing timing of the compensation switch S2, and the discharge timing of the solid-state pulse modulator.

[0040] like Figure 2 The top drop compensation circuit of a solid-state high-voltage pulse modulator designed in this embodiment is shown. The top drop compensation circuit is the above-mentioned compensation capacitor circuit. The top compensation circuit includes a compensation switch S2, a compensation capacitor C2 and an inductor L1, wherein the negative electrode of the energy storage capacitor C1 of the solid-state pulse modulator is connected to the negative electrode of the compensation capacitor C2, and a grounding point is drawn between the energy storage capacitor C1 and the compensation capacitor C2 and grounded; the positive electrode of the compensation capacitor C2 is connected to the second pin on the primary side of the transformer T1 of the solid-state pulse modulator; the positive electrode of the compensation capacitor C2 is connected to the negative electrode of the capacitor C2 through the compensation switch S2 and the inductor L1 connected in series in sequence; the compensation of the top drop of the output high-voltage pulse is achieved by controlling the voltage of the compensation capacitor C2, controlling the opening and closing timing of the compensation switch S2 and the discharge timing of the solid-state pulse modulator. The compensation capacitor C2 is charged by the compensation power supply G2. The compensation power supply G2, the compensation capacitor C2, the compensation switch S2 and the inductor L1 are all integrated on a printed circuit board and reserved with input and output terminals, and the input and output terminals are used to connect to the energy storage power supply C1 and the transformer T1. The droop compensation circuit can be applied to the pulse modulator to perform compensation control on the output high-voltage pulse, wherein the compensation capacitor C2 and the resonant inductor L1 form an LC series resonant circuit, and cooperate with C1, C2, S1 and T1 to form a dischargeable circuit. The effect of compensating the droop can be achieved by controlling the compensation switch S2 and the timing control of the discharge switch S1 in the discharge circuit.

[0041] A solid-state high-voltage pulse modulator with droop compensation is formed by applying the droop compensation circuit to the solid-state high-voltage pulse modulator. Figure 1As shown, it includes an energy storage capacitor C1, a discharge switch S1, a transformer T1, a compensation capacitor C2, a compensation switch S2, and an inductor L1; the main charging source G1 charges the energy storage capacitor G1; the positive electrode of the energy storage capacitor C1 is connected to the first terminal of the primary side of the transformer T1 through the discharge switch S1; the negative electrode of the energy storage capacitor C1 is connected to the negative electrode of the compensation capacitor C2, and a grounding point is drawn between the negative electrode of the energy storage capacitor C1 and the negative electrode of the compensation capacitor C1 and grounded; the positive electrode of the compensation capacitor C2 is connected to the negative electrode of the compensation capacitor C2 through the compensation switch S1 and the inductor L1 connected in series in sequence; the positive electrode of the compensation capacitor C2 is connected to the second terminal of the primary side of the transformer T1; the secondary side of the transformer T1 is used to output high-voltage pulses.

[0042] The compensation capacitor C2 is charged by the compensation power supply G2, which is a low-voltage switching power supply. The energy storage capacitor C1 is charged by the main charging source G1; the power supplies G1 and G2 charge the capacitors C1 and C2, and at the same time, it is necessary to ensure that C1 and C2 have different polarities, and the voltage of the capacitor C2 is lower than the voltage of C1.

[0043] Compensation switches S2 and S1 are semiconductor device switches. Due to low voltage and small resonant current, conventional devices such as MOS tubes and IGBTs can be used, which are low in cost and sufficient in supply.

[0044] The compensation capacitor C2 is a low-voltage film capacitor, and its capacitance and voltage are determined according to the energy storage capacitor and the requirements for the top drop compensation effect;

[0045] The resonant inductor L1 is a conventional high-frequency inductor wound with a ferrite core, which is small in size and low in price;

[0046] The compensation power supply G2 is a low-voltage switching power supply. The output voltage of the power supply can be flexibly adjusted according to the voltage of the solid-state high-voltage pulse modulator charging power supply. Due to its low output voltage and small power, it is small in size, low in price and sufficient in supply.

[0047] like Figure 1 As shown, it is a schematic diagram of a top drop compensation circuit of a solid-state high-voltage pulse modulator provided in an embodiment of the present invention. For the convenience of explanation, only the part related to the embodiment of the present invention is shown. The circuit includes:

[0048] The positive pole of the energy storage capacitor C1 is connected to 1 of the discharge switch S1, and the negative pole of C1 is connected to the negative pole of the compensation capacitor C2, which is the grounding point; 2 of S1 is connected to 1 of the primary winding of the pulse transformer T1, and the primary winding 2 of the pulse transformer T1 is connected to the positive pole of C2, the secondary winding 3 is connected to 1 of the load R, and the secondary winding 4 is connected to 2 of R; the positive pole of C2 is connected to 2 of the compensation switch S2, and 1 of S2 is connected to 2 of the resonant inductor L1; 1 of the resonant inductor L1 is connected to the negative pole of the compensation capacitor C2; the positive output of the main charging source G1 is connected to the positive pole of C1, and the negative output is connected to the negative pole of C1; the positive output of the compensation power supply G2 is connected to the positive pole of C2, and the negative output is connected to the negative pole of C2.

[0049] In the above circuit, the main charging source G1, energy storage capacitor C1, discharge switch S1, pulse transformer T1 and load R form the high-voltage discharge circuit of the original solid-state high-voltage pulse modulator. The compensation power supply G2, compensation capacitor C2, resonant inductor L1 and compensation switch S2 form the top drop compensation circuit, which is a series resonant circuit. The series resonant circuit formed by the compensation capacitor and the compensation capacitor voltage change diagram are shown in the figure below. Figure 2 shown.

[0050] The working principle of compensating for the top drop in the present invention includes: based on the discharge circuit of the solid-state high-voltage pulse modulator, the present invention designs and introduces a top drop compensation circuit. The top drop compensation circuit is mainly an LC series resonant circuit, in which the compensation capacitor is connected in series with the energy storage capacitor, and a compensation power supply is used to pre-charge the compensation capacitor with a lower voltage, and its polarity is opposite to that of the energy storage capacitor. During operation, the compensation switch in the LC series resonant circuit is first turned on, so that the voltage on the compensation capacitor gradually changes from negative to positive under the series resonance condition; after a certain delay, the discharge switch is turned on, and the negative voltage of the compensation capacitor is used to reduce the voltage in the first half of the discharge pulse; and in the second half of the pulse waveform, the voltage on the compensation capacitor changes from negative to positive under the action of series resonance, and at this time, its positive voltage is used to raise the voltage in the second half of the pulse waveform, thereby achieving the effect of "peak shaving and valley filling", thereby achieving compensation for the top drop of the pulse waveform. Specifically, in combination with the attached Figure 1 The circuit principle introduction in the following sections includes:

[0051] First, use the main charging source G1 and the compensation power source G2 to charge the energy storage capacitor C1 and the compensation capacitor C2 to their respective set voltages, and then stop charging. The compensation switch S2 is turned on by the trigger signal Tr2. At this time, the compensation capacitor C2 and the resonant inductor L1 form an LC series resonant circuit. The voltage on the capacitor C2 gradually decreases to zero and then reverses. After S2 is turned on, the discharge switch S1 is turned on by the trigger signal Tr1 after a certain delay. At this time, C1, C2, S1 and T1 form a dischargeable circuit, and because of the existence of L1, the discharge current will not pass through the L1 circuit. In this way, the resonant circuit composed of C2 and L1 works at the same time as the discharge circuit. By adjusting the delay between Tr1 and Tr2 (see Appendix Figure 3 ), the capacitor C2 can be in a negative voltage state in the first half of the pulse waveform and in a positive voltage state in the second half of the pulse waveform, thereby achieving the effect of "peak shaving and valley filling" on the pulse waveform (see attached Figure 4 By adjusting the delay between Tr1 and Tr2 and the charging voltage of the compensation capacitor, the top drop of the pulse waveform can be perfectly compensated (see Appendix Figure 5 ). According to the top drop phenomenon of the output high-voltage pulse of the pulse modulator, this scheme calibrates the charging voltage of the compensation capacitor C2 and the delay between the trigger pulse signals Tr1 and Tr2 of the switches S1 and S2 by means of a pre-calibration test. After the parameters are calibrated, the compensation of the top drop of the output high-voltage pulse can be achieved by controlling the same parameters in actual applications, and a high-voltage pulse with a flat top can be output.

[0052] In the present invention, the devices used in the compensation circuit are all low-voltage, low-power devices, which is very conducive to modular design. Figure 6 As shown in the figure, the compensation power supply, compensation capacitor, compensation switch, and resonant inductor are all integrated and welded on a printed circuit board to form an independent module, which is convenient for integrated installation and batch production. The module has flexible installation methods. It can be directly fixed on the energy storage capacitor terminals using its input and output terminals, or supported and fixed using the printed circuit board fixing holes. It can be flexibly adjusted according to needs.

[0053] The use of the above compensation circuit to compensate for the top drop of the solid-state high-voltage pulse modulator and the solid-state pulse modulator formed thereby have the following significant advantages:

[0054] 1. It is suitable for pulse top drop compensation under various voltages and pulse widths. By adjusting the voltage of the compensation capacitor and the delay time between the compensation switch and the discharge switch, the compensation of the pulse top drop can be completed quickly and conveniently with good results.

[0055] 2. The devices used in the compensation circuit are all low-voltage, low-power devices, which are small in size, low in price, and sufficient in supply. They have little impact on the size and cost of the system and are easy to implement.

[0056] 3. The circuit of this invention can be conveniently integrated into a small module, which is very conducive to integrated installation, debugging and batch production.

[0057] Obviously, the specific implementation of the present invention is not limited to the above-mentioned methods. As long as various non-substantial improvements are made using the method concept and technical solution of the present invention, they are all within the protection scope of the present invention.

Claims

1. A method for compensating a droop of a solid-state high-voltage pulse modulator, characterized in that: The method includes: when the solid-state high-voltage pulse modulator pulse discharge starts, negative pressure is superimposed on the front of the discharge pulse, thereby reducing the amplitude of the front of the discharge pulse; after the pulse discharge reaches a set time threshold, positive pressure is superimposed on the rear of the discharge pulse, thereby raising the amplitude of the rear of the discharge pulse; and the top of the output high-voltage pulse is flat by setting the time threshold and the corresponding negative and positive pressure values.

2. A method for compensating a droop of a solid-state high-voltage pulse modulator as claimed in claim 1, characterized in that: The discharge voltage of the energy storage capacitor of the solid-state high-voltage pulse modulator is compensated with negative or positive pressure through the compensation capacitor circuit, and the droop compensation is realized by controlling the positive and negative pressure of the compensation capacitor to compensate the timing of the energy storage capacitor.

3. The method for compensating the droop of a solid-state high-voltage pulse modulator according to claim 1, characterized in that: The compensation capacitor circuit includes a compensation switch S2, a compensation capacitor C2 and an inductor L1, wherein the negative electrode of the energy storage capacitor C1 of the solid-state pulse modulator is connected to the negative electrode of the compensation capacitor C2; a grounding point is drawn between the energy storage capacitor C1 and the compensation capacitor C2 and grounded; the positive electrode of the compensation capacitor C2 is connected to the second pin on the primary side of the transformer T1 of the solid-state pulse modulator; the positive electrode of the compensation capacitor C2 is connected to the negative electrode of the capacitor C2 through the compensation switch S2 and the inductor L1 connected in series in sequence; and the compensation of the top drop of the output high-voltage pulse is achieved by controlling the voltage of the compensation capacitor C2, controlling the opening and closing timing of the compensation switch S2, and the discharge timing of the solid-state pulse modulator.

4. A droop compensation circuit for a solid-state high-voltage pulse modulator, characterized in that: The top compensation circuit includes a compensation switch S2, a compensation capacitor C2 and an inductor L1, wherein the negative electrode of the energy storage capacitor C1 of the solid-state pulse modulator is connected to the negative electrode of the compensation capacitor C2, and a grounding point is drawn between the energy storage capacitor C1 and the compensation capacitor C2 and grounded; the positive electrode of the compensation capacitor C2 is connected to the second pin on the primary side of the transformer T1 of the solid-state pulse modulator; the positive electrode of the compensation capacitor C2 is connected to the negative electrode of the capacitor C2 through the compensation switch S2 and the inductor L1 connected in series in sequence; and the compensation of the top drop of the output high-voltage pulse is achieved by controlling the voltage of the compensation capacitor C2, controlling the opening and closing timing of the compensation switch S2, and the discharge timing of the solid-state pulse modulator.

5. The droop compensation circuit of a solid-state high-voltage pulse modulator as claimed in claim 4, characterized in that: The compensation capacitor C2 is charged by the compensation power supply G2.

6. A droop compensation circuit for a solid-state high-voltage pulse modulator as claimed in claim 4 or 5, characterized in that: The compensation power supply G2, compensation capacitor C2, compensation switch S2 and inductor L1 are all integrated on a printed circuit board and reserved with input and output terminals, and the input and output terminals are used to connect to the energy storage power supply C1 and the transformer T1.

7. A solid-state high-voltage pulse modulator with droop compensation, comprising a storage capacitor C1, a discharge switch S1, and a transformer T1, characterized in that: The modulator also includes a compensation capacitor C2, a compensation switch S2, and an inductor L1; the main charging source G1 charges the energy storage capacitor G1; the positive electrode of the energy storage capacitor C1 is connected to the first terminal of the primary side of the transformer T1 via the discharge switch S1; the negative electrode of the energy storage capacitor C1 is connected to the negative electrode of the compensation capacitor C2, and a grounding point is drawn between the negative electrode of the energy storage capacitor C1 and the negative electrode of the compensation capacitor C1 and grounded; the positive electrode of the compensation capacitor C2 is connected to the negative electrode of the compensation capacitor C2 via the compensation switch S1 and the inductor L1 connected in series in sequence; the positive electrode of the compensation capacitor C2 is connected to the second terminal of the primary side of the transformer T1; the secondary side of the transformer T1 is used to output high-voltage pulses.

8. A solid-state high-voltage pulse modulator with droop compensation as claimed in claim 7, characterized in that: The compensation capacitor C2 is charged by a compensation power supply G2, and the compensation power supply G2 is a low-voltage switching power supply.

9. A solid-state high-voltage pulse modulator with droop compensation as claimed in claim 7 or 8, characterized in that: The compensation switch S2 is a semiconductor device switch.

10. A solid-state high-voltage pulse modulator with droop compensation as claimed in claim 6 or 7, characterized in that: When the solid-state high-voltage pulse modulator is working, first, the main charging source G1 and the compensation power source G2 charge the energy storage capacitor C1 and the compensation capacitor C2 with their respective set voltages, and then stop charging. After the charging is completed, the polarities of the energy storage capacitor C1 and the compensation capacitor C2 are opposite; the compensation switch S2 is turned on by the trigger signal Tr2, at which time the compensation capacitor C2 and the resonant inductor L1 form an LC series resonant circuit, and the voltage on the capacitor C2 gradually decreases to zero and then reverses; after the compensation switch S2 is turned on by the trigger signal Tr2, the discharge switch S1 is turned on by the trigger signal Tr1 after a delay of a set time, at which time C1, C2, S1 and T1 form a discharge circuit, and the resonant circuit composed of C2 and L1 works simultaneously with the discharge circuit; by adjusting the delay between the trigger signals Tr1 and Tr2, the capacitor C2 is in a negative voltage state in the first half of the pulse waveform and in a positive voltage state in the second half of the pulse waveform, so that the voltage of the compensation capacitor C2 compensates the pulse waveform for the top drop.

Images