Display substrate

Abstract

A display substrate comprises a driving circuit substrate, a plurality of first electrodes, a pixel defining layer and a luminescent material layer, the driving circuit substrate comprises a plurality of pixel driving circuits and a protective insulating layer, and the protective insulating layer comprises a plurality of first via holes exposing the output ends of the pixel driving circuits. The plurality of first electrodes are electrically connected with the output ends of the plurality of pixel driving circuits through the plurality of first via holes respectively; the pixel defining layer comprises a plurality of sub-pixel openings respectively exposing the plurality of first electrodes and at least one partition structure arranged on the pixel defining layer; the light-emitting material layer is at least located in the multiple sub-pixel openings, the pixel defining layer comprises a first pixel defining sub-layer and a second pixel defining sub-layer, and the width of the second pixel defining sub-layer is larger than that of the first pixel defining sub-layer. The problem of transverse electrical crosstalk between adjacent sub-pixels in the display substrate is avoided, so that the display substrate has a better display effect.

Description

[0001] This application is a divisional application of the Chinese patent application with application number 202180003640.6, which entered the national stage of the PCT international application PCT / CN2021 / 133886 filed on November 29, 2021. Technical Field

[0002] An embodiment of the present disclosure relates to a display substrate. Background Art

[0003] Silicon-based micro-display organic light-emitting display panels have advantages such as miniaturization and high pixel density (Pixel Per Inch, PPI), and have gradually become the focus of attention in the display field. Silicon-based micro-display organic light-emitting display panels can be used in virtual reality (VR) technology and augmented reality (AR) technology, for example, to achieve excellent display effects. Summary of the invention

[0004] At least one embodiment of the present disclosure provides a display substrate having a plurality of sub-pixels arranged in an array, and including a driving circuit substrate, a plurality of first electrodes, a pixel defining layer and a light-emitting material layer, wherein the driving circuit substrate includes a plurality of pixel driving circuits for the plurality of sub-pixels and a protective insulating layer covering the plurality of pixel driving circuits, wherein the protective insulating layer includes a plurality of first vias exposing output ends of the plurality of pixel driving circuits, and the plurality of first electrodes are arranged on the driving circuit substrate and are electrically connected to the output ends of the plurality of pixel driving circuits through the plurality of first vias respectively; the pixel defining layer is at least arranged on a side of the plurality of first electrodes away from the driving circuit substrate, including a plurality of sub-pixel openings respectively exposing the plurality of first electrodes and at least one partition structure arranged on the pixel defining layer; the light-emitting material layer is arranged on a side of the pixel defining layer away from the driving circuit substrate and is at least located in the plurality of sub-pixel openings, wherein the pixel defining layer includes a first pixel defining sublayer and a second pixel defining sublayer, the second pixel defining sublayer being arranged on a side of the first pixel defining sublayer away from the driving circuit substrate, and the width of the second pixel defining sublayer is greater than the width of the first pixel defining sublayer.

[0005] For example, in the display substrate provided in at least one embodiment of the present disclosure, the protective insulating layer has a flat structure in an area other than the first via hole at the position of the at least one partition structure.

[0006] For example, in the display substrate provided by at least one embodiment of the present disclosure, the sidewall of each of the at least one partition structure has a first recess.

[0007] For example, in the display substrate provided by at least one embodiment of the present disclosure, at the position of the at least one partition structure, the first pixel defining sublayer is retracted relative to the second pixel defining sublayer to form the first recess.

[0008] For example, in the display substrate provided by at least one embodiment of the present disclosure, the width of the second pixel defining sublayer is smaller than the width between adjacent first electrodes.

[0009] For example, in the display substrate provided in at least one embodiment of the present disclosure, the first pixel defining sublayer includes an inorganic insulating material, and the second pixel defining sublayer includes an inorganic insulating material or a metal oxide material.

[0010] For example, in the display substrate provided by at least one embodiment of the present disclosure, the thickness of the first pixel defining sublayer is greater than the thickness of the second pixel defining sublayer.

[0011] For example, in the display substrate provided in at least one embodiment of the present disclosure, the at least one partition structure includes a plurality of first partition structures, the plurality of first partition structures respectively surround the plurality of sub-pixel openings, and the first recesses of the plurality of first partition structures respectively face the plurality of sub-pixel openings.

[0012] For example, in the display substrate provided by at least one embodiment of the present disclosure, the distance between the surface of the first pixel defining sublayer close to the driving circuit substrate and the driving circuit substrate is greater than the distance between the surfaces of the multiple first electrodes away from the driving circuit substrate and the driving circuit substrate.

[0013] For example, in the display substrate provided in at least one embodiment of the present disclosure, the at least one partition structure further includes a plurality of second partition structures, and the plurality of second partition structures are respectively arranged between two adjacent first partition structures among the plurality of first partition structures.

[0014] For example, in the display substrate provided by at least one embodiment of the present disclosure, the distance between the multiple first partition structures and the driving circuit substrate is equal to the distance between the multiple second partition structures and the driving circuit substrate; or the distance between the multiple first partition structures and the driving circuit substrate is greater than the distance between the multiple second partition structures and the driving circuit substrate.

[0015] For example, in the display substrate provided by at least one embodiment of the present disclosure, the second pixel defining sublayer has a first slope angle on the side walls of the multiple first partition structures, and the first slope angle is 30°-75°; the second pixel defining sublayer has a second slope angle on the side walls of the multiple second partition structures, and the second slope angle is 30°-80°.

[0016] For example, in the display substrate provided by at least one embodiment of the present disclosure, the slope angle of the first pixel defining sublayer on the sidewalls of the plurality of first partition structures is greater than the slope angle of the second pixel defining sublayer on the sidewalls of the plurality of first partition structures.

[0017] For example, in the display substrate provided by at least one embodiment of the present disclosure, the light-emitting material layer is disconnected at the first recess, the light-emitting material layer includes a first portion for emitting light and a second portion not used for emitting light, the light-emitting material layer is disconnected at the position of the second portion, and the slope angle of the first portion is greater than the slope angle of the second portion at the disconnected position.

[0018] For example, in the display substrate provided by at least one embodiment of the present disclosure, the depth of the first recess in the direction parallel to the surface of the base substrate is greater than the thickness of the first pixel defining sublayer and the second pixel defining sublayer in the direction perpendicular to the surface of the base substrate.

[0019] For example, in the display substrate provided in at least one embodiment of the present disclosure, the thickness of the light-emitting material layer is greater than the thickness of the first pixel defining sublayer and greater than the thickness of the second pixel defining sublayer.

[0020] For example, in the display substrate provided in at least one embodiment of the present disclosure, the light-emitting material layer also includes a third slope portion away from the disconnection position, and the slope angle of the third slope portion is smaller than the slope angle of the first portion close to the disconnection position, and smaller than the slope angle of the second portion close to the disconnection position.

[0021] For example, in the display substrate provided by at least one embodiment of the present disclosure, the pixel defining layer includes a fourth slope portion at a position corresponding to the third slope portion, and the slope angle of the fourth slope portion is greater than the slope angle of the third slope portion.

[0022] For example, in the display substrate provided by at least one embodiment of the present disclosure, the slope angle of the fourth slope portion is smaller than the slope angle of the first portion near the disconnection position.

[0023] For example, in the display substrate provided by at least one embodiment of the present disclosure, the slope angle of the fourth slope portion is smaller than the slope angle of the second slope portion close to the disconnection position.

[0024] For example, the display substrate provided by at least one embodiment of the present disclosure further includes a first auxiliary electrode layer which is arranged on a side of the first pixel defining sublayer close to the driving circuit substrate and is exposed by the plurality of second partition structures.

[0025] For example, in the display substrate provided by at least one embodiment of the present disclosure, the first pixel defining sublayer covers the edge of the first auxiliary electrode layer.

[0026] For example, in the display substrate provided by at least one embodiment of the present disclosure, the width of the first auxiliary electrode layer is greater than the depth of the first recess in a direction parallel to the plate surface of the base substrate.

[0027] For example, in the display substrate provided in at least one embodiment of the present disclosure, the at least one partition structure includes a plurality of second partition structures, and the plurality of second partition structures are respectively arranged between the plurality of first electrodes.

[0028] For example, in the display substrate provided by at least one embodiment of the present disclosure, the distance between the surface of the first pixel defining sublayer away from the driving circuit substrate and the driving circuit substrate is smaller than the distance between the surface of the multiple first electrodes away from the driving circuit substrate and the driving circuit substrate.

[0029] For example, the display substrate provided by at least one embodiment of the present disclosure also includes: a first auxiliary electrode layer arranged on a side of the first pixel defining sublayer close to the driving circuit substrate and exposed by the multiple second partition structures; and / or a second auxiliary electrode layer arranged on a side of the second pixel defining sublayer away from the driving circuit substrate.

[0030] For example, in the display substrate provided in at least one embodiment of the present disclosure, the first pixel defining sublayer is indented by 10 nm-200 nm relative to the second pixel defining sublayer.

[0031] For example, in the display substrate provided in at least one embodiment of the present disclosure, the sidewall of each of the plurality of second partition structures further has a second recess, and the second recess is arranged on a side of the first recess away from the driving circuit substrate.

[0032] For example, in the display substrate provided by at least one embodiment of the present disclosure, the pixel defining layer also includes a third pixel defining sublayer and a fourth pixel defining sublayer which are stacked, wherein the third pixel defining sublayer is arranged on a side of the second pixel defining sublayer away from the driving circuit substrate, and the fourth pixel defining sublayer is arranged on a side of the third pixel defining sublayer away from the driving circuit substrate, and at the positions of the multiple second partition structures, the third pixel defining sublayer is retracted relative to the fourth pixel defining sublayer to form the second recess.

[0033] For example, in the display substrate provided in at least one embodiment of the present disclosure, the light-emitting material layer includes at least one charge generation layer or hole injection layer.

[0034] For example, the display substrate provided by at least one embodiment of the present disclosure also includes: a first auxiliary electrode layer arranged on the side of the first pixel defining sublayer close to the driving circuit substrate and exposed by the multiple second partition structures; and / or a second auxiliary electrode layer arranged on the side of the second pixel defining sublayer away from the driving circuit substrate; and / or a third auxiliary electrode layer arranged on the side of the fourth pixel defining sublayer away from the driving circuit substrate.

[0035] For example, in the display substrate provided in at least one embodiment of the present disclosure, the material of the first auxiliary electrode layer and / or the second auxiliary electrode layer and / or the third auxiliary electrode layer includes at least one of Al, Ti, TiN, Ag, Mo, ITO and IZO.

[0036] For example, in the display substrate provided in at least one embodiment of the present disclosure, the second pixel defining sublayer is disconnected by a first distance at the position of the first notch, and the fourth pixel defining sublayer is disconnected by a second distance at the position of the second notch; the second distance is greater than the first distance by 100nm-500nm.

[0037] For example, the display substrate provided by at least one embodiment of the present disclosure also includes: a first auxiliary electrode layer arranged on the side of the first pixel defining sublayer close to the driving circuit substrate and exposed by the multiple second partition structures, wherein the width of the first auxiliary electrode layer is greater than the first distance.

[0038] For example, in the display substrate provided in at least one embodiment of the present disclosure, the first pixel defining sublayer is 50nm-200nm inward relative to the second pixel defining sublayer; the third pixel defining sublayer is 50nm-200nm inward relative to the fourth pixel defining sublayer.

[0039] For example, in the display substrate provided by at least one embodiment of the present disclosure, the first auxiliary electrode and at least part of the plurality of first electrodes are in the same layer and are spaced apart from each other.

[0040] For example, the display substrate provided by at least one embodiment of the present disclosure further includes: a second electrode layer, which is arranged on a side of the light-emitting material layer away from the driving circuit substrate and is located at least in the plurality of sub-pixel openings, wherein the second electrode layer is continuously arranged.

[0041] For example, in the display substrate provided by at least one embodiment of the present disclosure, the second electrode layer corresponds to the first part at the disconnected position and the position of the third slope, respectively including a fifth slope and a sixth slope, the slope angle of the fifth slope is smaller than the slope angle of the first part at the disconnected position, and the slope angle of the sixth slope is smaller than the slope angle of the third slope.

[0042] For example, in the display substrate provided by at least one embodiment of the present disclosure, the light-emitting material layer is a flat structure in the first portion between the disconnection position and the third slope portion, and the second electrode layer is a flat structure between the fifth slope portion and the sixth slope portion.

[0043] For example, the display substrate provided by at least one embodiment of the present disclosure further includes: a light extraction layer, which is arranged on a side of the second electrode layer away from the driving circuit substrate, wherein the refractive index of the light extraction layer is 1.3 to 1.7.

[0044] For example, in the display substrate provided in at least one embodiment of the present disclosure, the material of the light extraction layer includes at least one of LiF, SiOx and Al2O3. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure.

[0046] Figure 1A is a cross-sectional schematic diagram of a display substrate;

[0047] Figure 1B is another cross-sectional schematic diagram of a display substrate;

[0048] Figure 2 A schematic plan view of a display substrate provided for at least one embodiment of the present disclosure;

[0049] Figure 3 for Figure 2 A schematic cross-sectional view of a display substrate along line MM;

[0050] Figure 4A-Figure 24 Schematic diagrams of various structures of partition structures in a display substrate provided for at least one embodiment of the present disclosure;

[0051] Fig.25 for Figure 2 A schematic cross-sectional view of another part of the display substrate along line MM;

[0052] Figure 26-Figure 28 Schematic diagrams of various structures of light-emitting devices in a display substrate provided by at least one embodiment of the present disclosure;

[0053] Fig.29 A schematic plan view of a plurality of sub-pixels in a display substrate provided for at least one embodiment of the present disclosure; and

[0054] Fig.30 A partial cross-sectional view of a display substrate provided in at least one embodiment of the present disclosure. DETAILED DESCRIPTION

[0055] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0056] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0057] Micro OLED is a silicon-based display device. Due to the excellent electrical properties and extremely small device size of silicon-based devices, it is conducive to achieving high integration. For example, Figure 1A A schematic cross-sectional view of a silicon-based display substrate is shown. Figure 1A As shown, the silicon-based display substrate includes a driving circuit substrate 10 and a plurality of light-emitting devices 50 and other structures.

[0058] For example, the silicon-based display substrate includes a plurality of sub-pixels arranged in an array, each sub-pixel includes a light-emitting device 50 and a driving circuit 20 disposed in a driving circuit substrate 10, and the driving circuit 20 is configured to drive the light-emitting device 50 to emit light. The light-emitting device 50 includes an anode 51, a light-emitting material layer 52, and a cathode 53, and the anode 21 is connected to the driving circuit 20 through a through hole in the insulating layer 30. A pixel defining layer 40 is disposed on the anode 51, and the pixel defining layer 40 has a plurality of sub-pixel openings, each of which exposes the anode 51 of a light-emitting device 50, thereby defining the light-emitting area of ​​the light-emitting device 50, that is, defining the effective light-emitting area of ​​the sub-pixel, that is, the area outside the positive projection of the pixel defining layer 40 on the anode 51.

[0059] For example, Figure 1B Another cross-sectional schematic diagram of a silicon-based display substrate is shown. Figure 1BAs shown, the driving circuit 20 includes a driving transistor T1 and a connecting electrode 70. The driving transistor T1 includes a source electrode S, a drain electrode D and a semiconductor layer M, the semiconductor layer M is located between the source electrode S and the drain electrode D, and one of the source electrode S and the drain electrode D (here, the drain electrode D) is electrically connected to the anode 51 through the connecting electrode 70. The semiconductor layer M is, for example, a channel region formed between the source electrode S and the drain electrode D.

[0060] For example, Figure 1B As shown, the driving transistor T1 also includes a gate electrode G, and the gate electrode G, the source electrode S and the drain electrode D correspond to three electrode connection parts respectively. For example, the gate electrode G is electrically connected to the gate electrode connection part 10g, the source electrode S is electrically connected to the source electrode connection part 10s, and the drain electrode D is electrically connected to the drain electrode connection part 10d. For example, the drain electrode D of the driving transistor T1 is electrically connected to the connection electrode 70 through the drain electrode connection part 10d, and the gate electrode G and the source electrode S are electrically connected to the scan line and the power line through the gate electrode connection part 10g and the source electrode connection part 10s respectively. When the scan line provides an on signal, the driving transistor T1 is in an on state, and the electrical signal provided by the power line can be transmitted to the anode 51 through the drain electrode D, the drain electrode connection part 102d and the connection electrode 70 of the driving transistor T1. Due to the voltage difference formed between the anode 51 and the cathode 53, an electric field is formed between the two, and the light-emitting material layer 52 emits light under the action of the electric field.

[0061] For example, Figure 1A and Figure 1B As shown, the silicon-based display substrate may further include an encapsulation layer 60 disposed on the light-emitting device 50 and a color filter 70 disposed on the encapsulation layer 60. The encapsulation layer 60 may encapsulate and protect the light-emitting device 50, and may also play a flattening role to provide a flat surface. For example, the light-emitting device 50 of each sub-pixel may emit white light, and at this time, the color of the color filter 70 disposed on the light-emitting device 50 of each sub-pixel is different, such as red, green, and blue, so as to achieve full-color display; or, the light-emitting device 50 of each sub-pixel may emit light of different colors, such as red, green, and blue, respectively, and at this time, the color of the color filter 70 disposed on the light-emitting device 50 of each sub-pixel is the same as the color of the light emitted by the light-emitting device 50, so as to improve the color purity of the light emitted by the light-emitting device 50.

[0062] The inventors of the present disclosure discovered during research that in the above-mentioned display substrate, due to the high sub-pixel density (for example, greater than 3000PPI), the spacing between adjacent sub-pixels is small, and the light-emitting material layers 52 of multiple light-emitting devices 50 are usually arranged continuously. There are usually functional layers with high carrier mobility in the light-emitting material layers 52, which can easily cause lateral electrical crosstalk between sub-pixels. For example, when the blue sub-pixel is lit, the red sub-pixel and the green sub-pixel will also be exposed, causing color mixing, which reduces the color gamut of the display device, thereby affecting the display effect of the display substrate.

[0063] At least one embodiment of the present disclosure provides a display substrate, which has a plurality of sub-pixels arranged in an array, and includes a driving circuit substrate, a plurality of first electrodes, a pixel defining layer, and a light-emitting material layer. The driving circuit substrate includes a plurality of pixel driving circuits for a plurality of sub-pixels and a protective insulating layer covering the plurality of pixel driving circuits, the protective insulating layer includes a plurality of first vias exposing the output ends of the plurality of pixel driving circuits, the plurality of first electrodes are arranged on the driving circuit substrate, and are electrically connected to the output ends of the plurality of pixel driving circuits through the plurality of first vias respectively. The pixel defining layer is at least arranged on one side of the plurality of first electrodes away from the driving circuit substrate, including a plurality of sub-pixel openings respectively exposing the plurality of first electrodes and at least one partition structure arranged on the pixel defining layer. The light-emitting material layer is arranged on one side of the pixel defining layer away from the driving circuit substrate and is at least located in the plurality of sub-pixel openings, the pixel defining layer includes a first pixel defining sub-layer and a second pixel defining sub-layer arranged in a stacked manner, the second pixel defining sub-layer is arranged on one side of the first pixel defining sub-layer away from the driving circuit substrate, and the width of the second pixel defining sub-layer is greater than the width of the first pixel defining sub-layer.

[0064] In the above-mentioned display substrate provided by at least one embodiment of the present disclosure, the light-emitting material layers of the light-emitting devices of adjacent sub-pixels will be disconnected at the position of the partition structure, so that no lateral electrical crosstalk problem will occur between adjacent sub-pixels, thereby avoiding the color mixing phenomenon between adjacent sub-pixels, and further improving the display effect of the display substrate.

[0065] The display substrate provided by the embodiments of the present disclosure is described in detail below through several specific embodiments.

[0066] At least one embodiment of the present disclosure provides a display substrate. Figure 2 shows a schematic plan view of the display substrate, Figure 3 Shows Figure 2 Schematic diagram of the cross-section of the display substrate along line MM.

[0067] For example, Figure 2 and Figure 3As shown, the display substrate has a display area AA and a peripheral area NA surrounding the display area AA, and the display substrate also has a plurality of sub-pixels P arranged in an array, and the plurality of sub-pixels P are arranged in the display area AA. Each sub-pixel P includes a pixel driving circuit and a light-emitting device, and the pixel driving circuit is configured to drive the light-emitting device to achieve display. For example, the light-emitting device can be a full fluorescent light-emitting device, a full phosphorescent light-emitting device, or a hybrid light-emitting device combining fluorescent light-emitting and phosphorescent light-emitting, and the embodiments of the present disclosure are not limited to this.

[0068] For example, Figure 3 As shown, the display substrate includes a driving circuit substrate 110, a plurality of first electrodes 130, a pixel defining layer 140, and a light-emitting material layer. The driving circuit substrate 110 includes a plurality of pixel driving circuits 120 for a plurality of sub-pixels P and a protective insulating layer 112 covering the plurality of pixel driving circuits 120. The protective insulating layer 112 includes a plurality of first via holes 112A exposing the output terminals 121 of the plurality of pixel driving circuits 120. The plurality of first electrodes 130 are disposed on the driving circuit substrate 110 and are electrically connected to the output terminals 121 of the plurality of pixel driving circuits 120 through the plurality of first via holes 112A, respectively.

[0069] For example, Figure 3 As shown, the pixel driving circuit 120 may include a driving transistor and a connecting electrode, etc. For details, see Figure 1B The related descriptions thereof are not repeated here. The light emitting device includes an anode, a cathode, and a light emitting material layer between the anode and the cathode, and the first electrode 130 is implemented as an anode of the light emitting device, for example. For example, a connecting electrode 122 is formed in the first via hole 112A, and the first electrode 130 is connected to the pixel driving circuit 120 through the connecting electrode 122. For example, the connecting electrode 122 can be made of a metal material or alloy material such as tungsten, copper, titanium, aluminum or molybdenum.

[0070] For example, Figure 3 As shown, the pixel defining layer 140 is disposed at least on one side of the multiple first electrodes 130 away from the driving circuit substrate, and includes multiple sub-pixel openings 141 that respectively expose the multiple first electrodes 130 to limit the light-emitting area of ​​the sub-pixel P. For example, the pixel defining layer 140 also includes at least one partition structure 142 disposed on the pixel defining layer 140.

[0071] For example, in some examples, the partition structure 142 may be located on the first electrode 130, in some examples, the partition structure 142 may be located between adjacent first electrodes 130, and in some examples, at least one partition structure 142 includes a plurality of partition structures 142, some of which are located on the first electrode 130 and some of which are located between adjacent first electrodes 130. Figure 3 In the example shown, the partition structure 142 is located between adjacent first electrodes 130 .

[0072] For example, Figure 3 As shown, the light emitting material layer 150 is disposed on a side of the pixel defining layer 140 away from the driving circuit substrate 110 and is at least located in a plurality of sub-pixel openings 141 . For example, at least a portion of the light emitting material layer 150 is disconnected at the location of the partition structure 142 .

[0073] For example, in some examples, the entire light-emitting material layer 150 is disconnected at the location of the partition structure 142, or, in some examples, at least the functional layer with higher carrier mobility (such as a hole injection layer or a charge generation layer, which will be described in detail later) in the light-emitting material layer 150 is disconnected at the location of the partition structure 142. As a result, there will be no lateral electrical crosstalk problem between adjacent sub-pixels in the display substrate, thereby improving the display brightness and display contrast of the display substrate, thereby improving the display effect of the display substrate.

[0074] For example, in the embodiment of the present disclosure, the partition structure 142 may have various forms to achieve the above-mentioned effect of disconnecting at least part of the light-emitting material layer 150. For example, Figure 4A-Figure 24 Schematic diagrams of various structures of the partition structure 142 are exemplarily shown. These structures can be used to partition, for example, a luminescent material layer 150 having different functional layers.

[0075] For example, Figure 4A-Figure 24 As shown, the sidewall of each partition structure 142 has a first notch 142A, so as to facilitate at least a portion of the light emitting material layer 150 to be disconnected at the location of the partition structure 142 .

[0076] For example, in some embodiments, Figure 4A and Figure 4B As shown, the pixel defining layer 140 includes a first pixel defining sublayer 1401 and a second pixel defining sublayer 1402 which are stacked. The second pixel defining sublayer 1402 is arranged on a side of the first pixel defining sublayer 1401 away from the driving circuit substrate 110. For example, a width 1402D of the second pixel defining sublayer 1402 is greater than a width 1401D of the first pixel defining sublayer 1401, thereby forming a structure similar to a half "I" shape at the position of the partition structure 142.

[0077] For example, the thickness of the light emitting material layer 150 is greater than the thickness of the first pixel defining sublayer 1401 and greater than the thickness of the second pixel defining sublayer 1402 .

[0078] For example, in some examples, such as Figure 4A and Figure 4BAs shown, at the location of the partition structure 142 , the first pixel defining sublayer 1401 is retracted relative to the second pixel defining sublayer 1402 to form a first notch 142A.

[0079] For example, in some embodiments, the protective insulating layer 112 is a flat structure in the area at the location of the partition structure 142 except for the first via hole 112A, which is beneficial to the formation of the partition structure 142 and the structural stability.

[0080] For example, in some embodiments, the width 1402D of the second pixel defining sublayer 1402 is smaller than the width between adjacent first electrodes 130 , eg, the edge of the second pixel defining sublayer 1402 covers the edge of the adjacent first electrode 130 .

[0081] For example, Figure 4A As shown, the pixel defining layer 140 may further include a pixel defining sublayer 1405, and the first pixel defining sublayer 1401 is disposed on a side of the pixel defining sublayer 1405 away from the driving circuit substrate 110. For example, the first pixel defining sublayer 1401 is also retracted relative to the pixel defining sublayer 1405, thereby forming a first notch 142A.

[0082] For example, in some embodiments, the luminescent material layer 150 includes a stack of multiple functional layers, such as a luminescent layer and multiple auxiliary luminescent layers for auxiliary luminescent layers, and the thickness may be 50nm-500nm, such as 200nm, 300nm or 400nm.

[0083] For example, in some examples, such as Fig.26 As shown, the light-emitting material layer 150 includes a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a first light-emitting layer EML1, an exciton control layer ECL, a second light-emitting layer EML2, a third light-emitting layer EML3, a hole blocking layer HBL, an electron transport layer ETL and an electron injection layer EIL which are stacked in sequence, or the light-emitting material layer 150 includes at least part of the above-mentioned multiple functional layers, the partition structure 142 can be adopted as follows Figure 4A In the structure shown, for the convenience of description, the light-emitting material layer 150 is referred to as the first light-emitting material layer.

[0084] For example, in some embodiments, the first pixel defining sublayer 1401 may include an inorganic insulating material, such as silicon oxide, silicon nitride, or silicon oxynitride, etc., and the second pixel defining sublayer 1402 may include an inorganic insulating material or a metal oxide material, the inorganic insulating material includes silicon oxide, silicon nitride, or silicon oxynitride, etc., and the metal oxide material includes titanium oxide or aluminum oxide, etc. The pixel defining sublayer 1405 may include an inorganic insulating material or a metal oxide material, the inorganic insulating material includes silicon oxide, silicon nitride, or silicon oxynitride, etc., and the metal oxide material includes titanium oxide or aluminum oxide, etc. For example, in some embodiments, the thickness of the pixel defining sublayer 1405 may be 5nm to 50nm, the thickness of the first pixel defining sublayer 1401 may be 3nm to 500nm, and the thickness of the second pixel defining sublayer 1402 may be 0.5nm to 100nm.

[0085] In the embodiment of the present disclosure, when the second pixel defining sublayer 1402 is made of metal oxide material, the metal oxide can have higher etching accuracy, for example, the etching rate and etching degree of the metal oxide are easy to control during the preparation process, so it is easy to form the desired structure.

[0086] For example, in Figure 4A In the example, when the partition structure 142 is used to partition the first light-emitting material layer, the second pixel defining sublayer 1402, the first pixel defining sublayer 1401 and the pixel defining sublayer 1405 can respectively use silicon oxide, silicon nitride and silicon oxide or respectively use aluminum oxide, silicon nitride and silicon oxide. For example, the sum of the thicknesses of the second pixel defining sublayer 1402 and the first pixel defining sublayer 1401 is greater than or equal to 10nm and less than or equal to 30nm. For example, in some examples, the thicknesses H2, H1 and H3 of the second pixel defining sublayer 1402, the first pixel defining sublayer 1401 and the pixel defining sublayer 1405 are respectively 10nm, 10nm and 2nm or respectively 10nm, 10nm and 5nm. The retraction distance L1 of the first pixel defining sublayer 1401 relative to the second pixel defining sublayer 1402 is 10nm-100nm, for example, 50nm, etc.

[0087] For example, in some other embodiments, the thickness H1 of the first pixel defining sublayer 1401 may be greater than the thickness H2 of the second pixel defining sublayer 1402 , thereby facilitating the isolation of the thicker light emitting material layer 150 .

[0088] For example, in some examples, such as Fig. 27As shown, the light-emitting material layer 150 may include a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a first light-emitting layer EML1, a second light-emitting layer EML2, an electron transport layer ETL, an N-type charge generation layer N-CGL, a P-type charge generation layer P-CGL, a hole transport layer HTL, an electron blocking layer EBL, a third light-emitting layer EML3, an electron transport layer ETL and an electron injection layer EIL, or include at least part of the above multiple functional layers (for example, including an N-type charge generation layer and a P-type charge generation layer). In this case, the partition structure 142 may also be configured as follows: Figure 4A In the structure shown, for the convenience of description, the light-emitting material layer 150 is referred to as the second light-emitting material layer.

[0089] For example, in Figure 4A In the example, when the partition structure 142 is used to partition the second light-emitting material layer, the second pixel-defining sublayer 1402, the first pixel-defining sublayer 1401 and the pixel-defining sublayer 1405 can respectively use silicon oxide, silicon nitride and silicon oxide or respectively use aluminum oxide, silicon nitride and silicon oxide. For example, the sum of the thicknesses of the second pixel-defining sublayer 1402 and the first pixel-defining sublayer 1401 is greater than or equal to 10nm and less than or equal to 100nm. For example, the thicknesses H2, H1 and H3 of the second pixel-defining sublayer 1402, the first pixel-defining sublayer 1401 and the pixel-defining sublayer 1405 are 20nm, 60nm and 20nm respectively. The retraction distance L1 of the first pixel-defining sublayer 1401 relative to the second pixel-defining sublayer 1402 is 50nm-200nm, for example, 100nm or 150nm, etc.

[0090] For example, in some embodiments, Figure 4A As shown, the at least one partition structure 142 includes a plurality of first partition structures 143 , the plurality of first partition structures 143 respectively surround the plurality of sub-pixel openings 141 , and the first recesses 142A of the plurality of first partition structures 143 respectively face the plurality of sub-pixel openings 141 .

[0091] For example, Figure 5 Another schematic diagram of the first partition structure 143 is shown. Figure 5 As shown, in some embodiments, the distance H1 between the surface of the first pixel defining sublayer 1401 close to the driving circuit substrate 110 and the driving circuit substrate 110 is greater than the distance H2 between the surfaces of the plurality of first electrodes 130 far from the driving circuit substrate 110 and the driving circuit substrate 110. For example, in this example, the pixel defining sublayer 1405 has a greater thickness, which can flatten the area between adjacent first electrodes 130 to increase the distance between the first partition structure 143 and the driving circuit substrate 110.

[0092] For example, Figure 5As shown, the pixel defining sublayer 1405 has a height D1 , which may be 80 nm-150 nm, such as 100 nm, to planarize the area between adjacent first electrodes 130 .

[0093] For example, Figure 5 The partition structure 142 shown can also be used to separate the first light-emitting material layer and the second light-emitting material layer, and the thickness and the retraction distance of the first pixel defining sublayer 1401 and the second pixel defining sublayer 1402 can also refer to the above embodiment and will not be repeated here.

[0094] For example, Figure 6 Another schematic diagram of the partition structure 142 is shown. Figure 6 As shown, in some embodiments, at least one partition structure 142 further includes a plurality of second partition structures 144, and the plurality of second partition structures 144 are respectively arranged between two adjacent first partition structures 143 among the plurality of first partition structures 143. For example, the second partition structure 144 is an inverted-cut structure. For example, in the second partition structure 144, the retracted distance of the first pixel defining sublayer 1401 relative to the second pixel defining sublayer 1402 may be equal to, greater than, or less than the retracted distance of the first pixel defining sublayer 1401 relative to the second pixel defining sublayer 1402 in the first partition structure 143. The second partition structure 144 may enhance the partition effect of the partition structure 142.

[0095] For example, in some embodiments, Figure 6 As shown, the distance between the plurality of first partition structures 143 and the driving circuit substrate 110 is equal to the distance between the plurality of second partition structures 144 and the driving circuit substrate 110, that is, the first partition structures 143 and the second partition structures 144 are at substantially the same height; or, in other embodiments, as Figure 7 As shown, the distance between the plurality of first partition structures 143 and the driving circuit substrate 110 is greater than the distance between the plurality of second partition structures 144 and the driving circuit substrate 110. For example, the second partition structures 144 are located between adjacent first electrodes 130, and the first partition structures 143 are located on a side of the first electrode 130 away from the driving circuit substrate 110, and are shown as being above the first electrode 130 in the figure.

[0096] For example, in some embodiments, Figure 7 As shown, the second pixel defining layer 1402 has a first slope angle a on the side walls of the plurality of first partition structures 143, and the first slope angle a can be 30°-75°, for example, 40°, 50° or 60°, etc.; the second pixel defining layer 1402 has a second slope angle b on the side walls of the plurality of second partition structures 144, and the second slope angle b can be 30°-80°, for example, 45°, 55° or 65°, etc.

[0097] For example, in some embodiments, Figure 7 As shown, the slope angle c of the first pixel defining sublayer 1401 on the sidewalls of the plurality of first partition structures 143 is greater than the slope angle a of the second pixel defining sublayer 1402 on the sidewalls of the plurality of first partition structures 143 .

[0098] For example, refer to Figure 3 The light-emitting material layer 150 is disconnected at the first notch 142A, the light-emitting material layer 150 includes a first portion 1501 for emitting light and a second portion 1502 not for emitting light, the light-emitting material layer 150 is disconnected at the position of the second portion 1502, and the slope angle d of the first portion 1501 is greater than the slope angle e of the second portion 1502 at the disconnected position.

[0099] For example, refer to Figure 4A , the depth L1 of the first recess 142A in the direction parallel to the plate surface of the base substrate 110 is greater than the thickness H1 and H2 of the first pixel defining sublayer 1401 and the second pixel defining sublayer 1402 in the direction perpendicular to the plate surface of the base substrate 110. Thus, the partition structure 142 can fully achieve the partitioning function at the first recess 142A.

[0100] For example, in some embodiments, Fig.30 The scanning electron microscope image of the display substrate in this example is shown. Fig.10 As shown, the light-emitting material layer 150 is disconnected at the first recess 142A, and the first portion of the light-emitting material layer 150 for emitting light has a first slope PO1 at the disconnected position, and the slope angle of the first slope PO1 is d, and the second portion of the light-emitting material layer 150 not for emitting light has a second slope PO2 at the disconnected position, and the slope angle of the second slope PO2 is e.

[0101] For example, the light emitting material layer 150 includes a charge generation layer CGL, and the charge generation layer CGL is disconnected at the first notch 142A. For example, the light emitting material layer 150 also includes a third slope portion PO3 away from the disconnection position (marked at the charge generation layer CGL for clarity of illustration), and the slope angle f of the third slope portion PO3 is smaller than the slope angle d of the first portion near the disconnection position, and smaller than the slope angle e of the second portion near the disconnection position.

[0102] For example, at a position corresponding to the third slope portion PO3, the pixel defining layer includes a fourth slope portion PO4, and the slope angle g of the fourth slope portion PO4 is greater than the slope angle f of the third slope portion PO3. For example, the slope angle g of the fourth slope portion PO4 is less than the slope angle d of the first portion near the disconnection position. For example, the slope angle g of the fourth slope portion PO4 is less than the slope angle e of the second portion at the disconnection position.

[0103] For example, in some embodiments, Figure 8 and Fig. 9 As shown, the display substrate may further include a first auxiliary electrode layer 201 disposed on a side of the first pixel defining sublayer 1401 close to the driving circuit substrate 110 and exposed by a plurality of second partition structures 144. The first auxiliary electrode layer 201 may shield the electric field interference that may be generated between the adjacent first electrodes 130 or between the first electrode 130 and other circuits in the display substrate, thereby improving the display effect of the display substrate. For example, in the preparation process of the display substrate, the first auxiliary electrode layer 201 may also serve as an etching stop layer for blocking the etchant from etching the functional layer below the first auxiliary electrode layer 201 when the partition structure 142 is formed by etching.

[0104] For example, the first pixel defining sublayer 1401 covers the edge of the first auxiliary electrode layer 201. For example, the width W3 of the first auxiliary electrode layer 201 (refer to Fig.16 ) is greater than the depth L1 of the first recess 142A in the direction parallel to the plate surface of the base substrate 110. Thus, the first auxiliary electrode layer 201 can fully realize the functions of preventing electric field interference and etching blocking.

[0105] For example, Figure 6-Figure 9 The partition structure 142 shown can also be used to separate the first light-emitting material layer and the second light-emitting material layer, and the thickness and the retraction distance of the first pixel defining sublayer 1401 and the second pixel defining sublayer 1402 can also refer to the above embodiment and will not be repeated here.

[0106] For example, in some embodiments, Fig.10 As shown, the partition structure 142 may also include only the second partition structure 144 , for example, include a plurality of second partition structures 144 , and the plurality of second partition structures 144 are respectively disposed between the plurality of first electrodes 130 .

[0107] For example, Fig.10 As shown, the distance D3 between the surface of the first pixel defining sublayer 1401 away from the driving circuit substrate 110 and the driving circuit substrate 110 is less than the distance D2 between the surface of the plurality of first electrodes 130 away from the driving circuit substrate 110 and the driving circuit substrate 110. For example, in some examples, the thicknesses H2, H1, and H3 of the second pixel defining sublayer 1402, the first pixel defining sublayer 1401, and the pixel defining sublayer 1405 are 20 nm, 70 nm, and 10 nm, respectively, or 20 nm, 60 nm, and 20 nm, respectively.

[0108] For example, Fig.10 As shown, the retracted distance L1 of the first pixel defining sublayer 1401 relative to the second pixel defining sublayer 1402 may be 10 nm-200 nm, such as 50 nm-200 nm, such as 150 nm.

[0109] For example, in some embodiments, Fig.11 As shown, the display substrate may further include a first auxiliary electrode layer 201 disposed on a side of the first pixel defining sublayer 1401 close to the driving circuit substrate 110 and exposed by the plurality of second partition structures 144 .

[0110] For example, in some embodiments, Fig.12 As shown, the display substrate may further include a second auxiliary electrode layer 202 disposed on a side of the second pixel defining sublayer 1402 away from the driving circuit substrate 110 .

[0111] For example, in some embodiments, the display substrate may simultaneously have a first auxiliary electrode layer 201 arranged on the side of the first pixel defining sublayer 1401 close to the driving circuit substrate 110 and exposed by multiple second partition structures 144, and a second auxiliary electrode layer 202 arranged on the side of the second pixel defining sublayer 1402 away from the driving circuit substrate 110.

[0112] In the embodiment of the present disclosure, at least one auxiliary electrode layer may be provided at different positions of the partition structure 142 to shield the electric field interference that may be generated between adjacent first electrodes 130 or between the first electrode 130 and other circuits in the display substrate, thereby improving the display effect of the display substrate.

[0113] For example, Figure 10-12 The partition structure 142 shown can also be used to separate the first light-emitting material layer and the second light-emitting material layer, and the thickness and the inner retraction distance of the first pixel defining sublayer 1401 and the second pixel defining sublayer 1402 can also refer to the above Fig.10 The description will not be repeated here.

[0114] For example, in some embodiments, the partition structure 142 / the second partition structure 144 may have Fig.13 The structure shown, for example, in Fig.13 In the example of the second pixel defining sublayer 1402 and the first pixel defining sublayer 1401, the second pixel defining sublayer 1402 and the first pixel defining sublayer 1401 have corresponding protruding portions at the position of the first auxiliary electrode layer 201. In this example, the thicknesses H2, H1 and H3 of the second pixel defining sublayer 1402, the first pixel defining sublayer 1401 and the pixel defining sublayer 1405 may be 20 nm, 60 nm and 20 nm, respectively. For example, the retraction distance of the first pixel defining sublayer 1401 relative to the second pixel defining sublayer 1402 may be 10 nm-200 nm, such as 50 nm-200 nm, such as 150 nm, etc. The thickness of the first auxiliary electrode layer 201 may be 20 nm.

[0115] For example, in other embodiments, Fig.14As shown, in addition to the first notch 142A, the sidewall of each second partition structure 144 may also have a second notch 142B, and the second notch 142B is arranged on a side of the first notch 142A away from the driving circuit substrate 110. The second partition structure 144 having the second notch 142B can partition a thicker light-emitting material layer 150 having more functional layers.

[0116] For example, Fig.14 As shown, the pixel defining layer 140 also includes a third pixel defining sublayer 1403 and a fourth pixel defining sublayer 1404 which are stacked. The third pixel defining sublayer 1403 is arranged on a side of the second pixel defining sublayer 1402 away from the driving circuit substrate 110, and the fourth pixel defining sublayer 1404 is arranged on a side of the third pixel defining sublayer 1403 away from the driving circuit substrate 110. At the position of the plurality of second partition structures 144, the third pixel defining sublayer 1403 is retracted relative to the fourth pixel defining sublayer 1404 to form a second recess 142B.

[0117] For example, the partition structure having the first notch 142A and the second notch 142B may be used to partition the light emitting material layer 150 having more functional layers. In this case, the light emitting material layer 150 may include at least one CGL (CGL).

[0118] For example, in some embodiments, Fig.28 As shown, the light-emitting material layer 150 may include a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a first light-emitting layer EML1, an electron transport layer ETL, an N-type charge generation layer N-CGL, a P-type charge generation layer P-CGL, a hole transport layer HTL, an electron blocking layer EBL, a second light-emitting layer EML2, an electron transport layer ETL, an N-type charge generation layer N-CGL, a P-type charge generation layer P-CGL, a hole transport layer HTL, an electron blocking layer EBL, a third light-emitting layer EML3, an electron transport layer ETL and an electron injection layer EIL, or includes at least part of the above-mentioned multiple functional layers (for example, a stack of two N-type charge generation layers and a P-type charge generation layer), the partition structure 142 may be formed as follows. Fig.14 In the structure shown with the first notch 142A and the second notch 142B, for the convenience of description, the light-emitting material layer 150 is referred to as a third light-emitting material layer.

[0119] For example, in some embodiments, the third pixel defining sublayer 1403 may include an inorganic insulating material, such as silicon oxide, silicon nitride, or silicon oxynitride, and the fourth pixel defining sublayer 1404 includes an inorganic insulating material or a metal oxide material, the inorganic insulating material includes silicon oxide, silicon nitride, or silicon oxynitride, and the metal oxide material includes titanium oxide or aluminum oxide.

[0120] For example, in Fig.14 In the example, the sum of the thicknesses of the fourth pixel defining sublayer 1404 and the third pixel defining sublayer 1403 is greater than or equal to 10nm and less than or equal to 100nm, and the sum of the thicknesses of the fourth pixel defining sublayer 1404, the third pixel defining sublayer 1403, the second pixel defining sublayer 1402 and the first pixel defining sublayer 1401 is greater than or equal to 150nm and less than or equal to 300nm.

[0121] For example, in some examples, the fourth pixel defining sublayer 1404, the third pixel defining sublayer 1403, the second pixel defining sublayer 1402, the first pixel defining sublayer 1401, and the pixel defining sublayer 1405 may be made of silicon oxide, silicon nitride, silicon oxide, silicon nitride, and silicon oxide, or aluminum oxide, silicon nitride, aluminum oxide, silicon nitride, and silicon oxide, respectively. For example, the thickness of the fourth pixel defining sublayer 1404, the third pixel defining sublayer 1403, the second pixel defining sublayer 1402, the first pixel defining sublayer 1401, and the pixel defining sublayer 1405 may be 20 nm, 60 nm, 20 nm, 80 nm, and 20 nm, respectively, or 20 nm, 70 nm, 20 nm, 50 nm, and 20 nm, respectively. For example, the retracted distance L2 of the third pixel defining sublayer 1403 relative to the fourth pixel defining sublayer 1404 can be 50nm-200nm, such as 150nm, and the retracted distance L3 of the first pixel defining sublayer 1401 relative to the second pixel defining sublayer 1402 can also be 50nm-200nm, such as 150nm.

[0122] For example, in some embodiments, the second partition structure 144 may also have Fig.15 The structure shown is compared to Fig.14 The structure shown in Fig.15 , the pixel defining sublayer 1405 has a smaller width, while the fourth pixel defining sublayer 1404, the third pixel defining sublayer 1403, the second pixel defining sublayer 1402, and the first pixel defining sublayer 1401 have corresponding protruding portions at the pixel defining sublayer 1405. At this time, the thicknesses of the fourth pixel defining sublayer 1404, the third pixel defining sublayer 1403, the second pixel defining sublayer 1402, the first pixel defining sublayer 1401, and the pixel defining sublayer 1405 may be 20 nm, 60 nm, 20 nm, 80 nm, and 20 nm, respectively, and the inward distance L2 of the third pixel defining sublayer 1403 relative to the fourth pixel defining sublayer 1404 may be 50 nm-200 nm, for example, 150 nm, and the inward distance L3 of the first pixel defining sublayer 1401 relative to the second pixel defining sublayer 1402 may also be 50 nm-200 nm, for example, 150 nm.

[0123] For example, in some embodiments, Fig.16 As shown, the display substrate may further include a first auxiliary electrode layer 201 disposed on a side of the first pixel defining sublayer 1401 close to the driving circuit substrate 110 and exposed by the plurality of second partition structures 144 .

[0124] For example, Fig.17 and 18 As shown, the display substrate may further include a second auxiliary electrode layer 202 disposed on a side of the second pixel defining sublayer 1402 away from the driving circuit substrate 110 .

[0125] For example, Fig.19 and Fig. 20 As shown, the display substrate may further include a third auxiliary electrode layer 203 disposed on a side of the fourth pixel defining sublayer 1404 away from the driving circuit substrate 110. Fig. 20 In the embodiment, the fourth pixel defining sublayer 1404 has a recessed portion 1404A, and the third auxiliary electrode layer 203 can be arranged in the recessed portion 1404A, and its surface is flush with the surface of the fourth pixel defining sublayer 1404, thereby reducing the overall thickness of the third auxiliary electrode layer 203 and the second partition structure 144.

[0126] For example, in some embodiments, the display substrate may also include two or three of the first auxiliary electrode layer 201, the second auxiliary electrode layer 202 and the third auxiliary electrode layer 203. For example, Fig.21 An example is shown in which the display substrate has both the first auxiliary electrode layer 201 and the third auxiliary electrode layer 203. Fig. 22 An example is shown in which the display substrate has a first auxiliary electrode layer 201 and a second auxiliary electrode layer 202 at the same time. Fig.23 An example is shown in which the display substrate has both the second auxiliary electrode layer 202 and the third auxiliary electrode layer 203. Fig.24 An example is shown in which the display substrate has the first auxiliary electrode layer 201 , the second auxiliary electrode layer 202 , and the third auxiliary electrode layer 203 at the same time.

[0127] For example, the material of the first auxiliary electrode layer 201 and / or the second auxiliary electrode layer 202 and / or the third auxiliary electrode layer 203 may include at least one of Al, Ti, TiN, Ag, Mo, ITO and IZO. The materials of the first auxiliary electrode layer 201, the second auxiliary electrode layer 202 and the third auxiliary electrode layer 203 may be the same or different. For example, the thickness of the first auxiliary electrode layer 201 and / or the second auxiliary electrode layer 202 and / or the third auxiliary electrode layer 203 may be 5nm-100nm, such as 20nm, 30nm, 40nm or 50nm. The auxiliary electrode layer with the above arrangement can have a better effect of preventing electric field interference.

[0128] For example, in some embodiments, Figure 14-Figure 24 As shown, in the embodiment with the first notch 142A and the second notch 142B, refer to Fig.16 The second pixel defining sublayer 1402 is disconnected by a first distance W1 at the position of the first notch 142A, and the fourth pixel defining sublayer 1404 is disconnected by a second distance W2 at the position of the second notch 142B, the second distance W2 is greater than the first distance W1, and the difference between the second distance W2 and the first distance W1 is 100nm-500nm, such as 150nm, 250nm or 350nm, etc. This helps the first notch 142A disconnect a portion of the light-emitting material layer, and the second notch 142B disconnect another portion of the light-emitting material layer.

[0129] For example, in the embodiment of the present disclosure, when the display substrate further includes a first auxiliary electrode layer 201 disposed on a side of the first pixel defining sublayer 1401 close to the driving circuit substrate 110 and exposed by the plurality of second partition structures 144, Fig.16 , the width W3 of the first auxiliary electrode layer 201 is greater than the first distance W1, so as to fully achieve the effect of preventing electric field interference.

[0130] In the embodiment of the present disclosure, since the hole injection layer HIL and the charge generation layer N-CGL and P-CGL in the light-emitting material layer have high carrier mobility, when the light-emitting material layer 150 includes Fig.26 When the structure shown in FIG. 1 or a similar structure is used, since the functional layers with higher carrier mobility are fewer and the overall thickness is smaller, the structure shown in FIG. 1 is preferably a structure having a lower carrier mobility than the structure having a lower carrier mobility. Figure 4A to Figure 13 The partition structure 142 having only the first notch 142A can disconnect the functional layer with higher carrier mobility, thereby avoiding the crosstalk between adjacent sub-pixels.

[0131] For example, when the light emitting material layer 150 includes Fig. 27 When the structure shown in FIG. 1 or a similar structure is used, since the functional layers with higher carrier mobility are relatively more and the overall thickness is relatively thick, the following can be used: Figure 4A to Figure 11 The partition structure 142 having only the first recess 142A needs to select the appropriate thickness of the first pixel defining sublayer 1401 and the second first pixel defining sublayer 1402 constituting the first recess 142A. Alternatively, the following method may be used: Figure 14-Figure 25 The partition structure 142 having the first notch 142A and the second notch 142B can disconnect the functional layer with higher carrier mobility and avoid crosstalk between adjacent sub-pixels.

[0132] For example, when the light emitting material layer 150 includes Fig.28When the structure shown in FIG. 1 or a similar structure is used, since there are more functional layers with higher carrier mobility and the overall thickness is thicker, the following can be used: Figure 14-Figure 25 The partition structure 142 having the first notch 142A and the second notch 142B can fully disconnect the functional layer with higher carrier mobility and avoid crosstalk between adjacent sub-pixels.

[0133] Of course, in some embodiments, Figure 4A to Figure 11 The partition structure 142 shown having only the first recess 142A can also be used to partition Fig.28 The luminescent material layer shown, Figure 14-Figure 25 The partition structure 142 shown with the first recess 142A and the second recess 142B can also be used to partition Fig.26 The luminescent material layer shown only needs to achieve the corresponding isolation function.

[0134] For example, Figure 3 The display substrate shown includes Fig.24 The partition structure shown in FIG. 1 is a structure in which the light emitting material layer 150 includes, for example, Fig.28 The structure shown in FIG. 1 or a similar structure. Figure 3 As shown, the light-emitting material layer 150 includes a plurality of parts 151-155, part 151 may include a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a first light-emitting layer EML1 and an electron transport layer ETL, part 152 includes an N-type charge generation layer N-CGL and a P-type charge generation layer P-CGL, part 153 may include a hole transport layer HTL, an electron blocking layer EBL, a second light-emitting layer EML2 and an electron transport layer ETL, part 154 may include an N-type charge generation layer N-CGL and a P-type charge generation layer P-CGL, part 155 may include a hole transport layer HTL, an electron blocking layer EBL, a third light-emitting layer EML3, an electron transport layer ETL and an electron injection layer EIL. At this time, the first notch 142A is used to separate part 151 and part 152, and the second notch 142B is used to separate part 153 and part 154. Since part 155 does not have a functional layer with a high carrier mobility, it may not be disconnected, as shown in FIG. Figure 3 As shown, or, in some other examples, portion 155 may also be disconnected by partition structure 142, which is not limited in the embodiments of the present disclosure.

[0135] For example, Fig.29 FIG. 1 shows a schematic plan view of a plurality of sub-pixels in a display substrate. Fig.29As shown, in some embodiments, the sub-pixel opening 141 may be polygonal, such as a hexagonal shape, and the partition structure 142 is disposed around the sub-pixel opening 141. For example, the notch of the first partition structure 143 faces the sub-pixel opening 141, and the notch of the second partition structure 144 faces away from the sub-pixel opening 141. Both the first partition structure 143 and the second partition structure 144 can achieve the effect of disconnecting the light-emitting material layer 150.

[0136] For example, in some embodiments, Fig.25 As shown, the first auxiliary electrode layer 201 may be provided in the same layer as at least part of the plurality of first electrodes 130 and spaced apart from each other.

[0137] In the embodiments of the present disclosure, "same-layer arrangement" means that two functional layers or structural layers are in the same layer and formed of the same material in the hierarchical structure of the display substrate, that is, in the preparation process, the two functional layers or structural layers can be formed of the same material layer and can be formed into the required pattern and structure through the same composition process. This can simplify the preparation method of the display substrate.

[0138] Partition structures such as Fig.25 As shown, in some embodiments, the first electrode 130 may include a first sub-electrode layer 131 and a second sub-electrode layer 132 that are stacked. The first sub-electrode layer 131 may be used as a reflective electrode to reflect the light emitted by the light-emitting material layer formed thereon, so as to improve the light extraction efficiency of the light-emitting device. For example, the material of the first sub-electrode layer 131 may include a metal material or alloy material with high reflectivity such as titanium, molybdenum, aluminum or silver, and the thickness may be 10nm-300nm, such as 50nm, 75nm or 100nm. For example, the second sub-electrode layer 132 has a higher work function and light transmittance, and the material of the second sub-electrode layer 132 may include a transparent metal oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), gallium zinc oxide (GZO), etc., and the thickness may be 10nm-300nm, such as 20nm, 50nm or 100nm. Thus, the light reflected by the first sub-electrode layer 131 can pass through the second sub-electrode layer 132 almost without loss, so as to improve the light extraction efficiency and light brightness of the light-emitting device.

[0139] For example, in some examples, the first electrode 130 may also include more sub-electrode layers, such as a bonding sub-electrode layer between the first sub-electrode layer 131 and the second sub-electrode layer 132 and a connecting sub-electrode layer between the first sub-electrode layer 131 and the driving circuit substrate 110 (not shown in the figure), and the bonding sub-electrode layer may be made of a material such as TiN that can enhance the bonding between the first sub-electrode layer 131 and the second sub-electrode layer 132, and the connecting sub-electrode layer may include a material with a low contact resistance such as titanium. The embodiments of the present disclosure do not limit the specific structure of the first electrode 130.

[0140] For example, in some examples, the first auxiliary electrode layer 201 may be provided in the same layer as the second sub-electrode layer 132 to simplify the manufacturing process of the display substrate.

[0141] In the embodiment of the present disclosure, the first auxiliary electrode layer 201 can play a role of etching cutoff when preparing the second partition structure 144, thereby avoiding over-etching when forming the second partition structure 144 by etching; in addition, the first auxiliary electrode layer 201 can also be electrically connected to other circuits to achieve the effects of drainage and signal interference prevention.

[0142] For example, Figure 3 As shown, the display substrate may further include a second electrode layer 160 , which is disposed on a side of the light-emitting material layer 150 away from the driving circuit substrate 110 and at least located in a plurality of sub-pixel openings 141 . For example, the second electrode layer 160 may serve as a cathode of the light-emitting device.

[0143] For example, in some examples, the second electrode layer 160 can be continuously provided, so that the light-emitting devices of the plurality of sub-pixels on the display substrate can obtain substantially the same voltage from the second electrode layer 160. Alternatively, in other examples, the second electrode layer 160 can also be disconnected at the location of the partition structure 142. For example, the material of the second electrode layer 160 can be a metal material or alloy material such as lithium, aluminum, magnesium, silver, or a metal oxide material such as IZO. For example, in one example, the second electrode layer 160 can include a stack of a MgAg alloy layer and an IZO layer.

[0144] For example, Fig.30 As shown, the second electrode layer 160 includes a fifth slope portion PO5 and a sixth slope portion PO6 corresponding to the first part at the disconnected position and the position of the third slope portion PO3, respectively. The slope angle i of the fifth slope portion PO5 is smaller than the slope angle d of the first part at the disconnected position, and the slope angle h of the sixth slope portion PO6 is smaller than the slope angle f of the third slope portion PO3.

[0145] For example, the light emitting material layer 150 is a flat structure between the first portion at the disconnected position (ie, the position of the first slope PO1) and the third slope PO3, and the second electrode layer 160 is a flat structure between the fifth slope PO5 and the sixth slope PO6. Fig.30 The two dashed lines show the range.

[0146] For example, in some embodiments, Figure 3As shown, the display substrate may further include a light extraction layer 170, which is disposed on a side of the second electrode layer 160 away from the driving circuit substrate 110, and the refractive index of the light extraction layer 170 is 1.3 to 1.7, such as 1.5. The light extraction layer 170 may improve the light extraction efficiency of the light emitting device, thereby improving the display brightness of the display substrate, or having lower power consumption when the display substrate has the same display brightness.

[0147] For example, in some embodiments, the material of the light extraction layer 170 includes at least one of LiF, SiOx and Al2O3, and the thickness may be 10nm to 200nm, such as 30nm, 50nm or 100nm.

[0148] For example, in some embodiments, Figure 3 As shown, an encapsulation layer 180 may be formed on the second electrode layer. For example, the encapsulation layer 180 may be a composite encapsulation layer of an organic encapsulation layer 181 and an inorganic encapsulation layer 182. The organic encapsulation layer 181 may be made of an organic material such as polyimide or resin, and the inorganic encapsulation layer 182 may be made of an inorganic material such as silicon oxide, silicon nitride or silicon oxynitride. For example, in some examples, the encapsulation layer 180 may also include a stack of more organic encapsulation layers and inorganic encapsulation layers 182. Figure 3 The figure only shows one organic encapsulation layer 181 and one inorganic encapsulation layer 182 as an example, and the embodiment of the present disclosure does not limit the specific form of the encapsulation layer 180.

[0149] For example, in some embodiments, Figure 3 As shown, a color filter layer 190 may also be provided on the encapsulation layer 180, and the color filter layer 190 includes a plurality of color filters, and two color filters 191 and 192 are shown in the figure as examples. For example, each color filter is respectively provided corresponding to the light-emitting area of ​​the light-emitting device of the sub-pixel. For example, a plurality of color filters can transmit light of different colors respectively. For example, in some examples, the light-emitting device of each sub-pixel can emit white light, in which case the color of the color filter provided on the light-emitting device of each sub-pixel can be red, green, blue, etc., respectively, thereby realizing full-color display; or, the light-emitting device of each sub-pixel can respectively emit light of different colors, such as red, green, blue, etc., in which case the color of the color filter provided on the light-emitting device of each sub-pixel is the same as the color of the light emitted by the light-emitting device, thereby improving the color purity of the light emitted by the light-emitting device.

[0150] For example, the color filter may be at least one of a resin material filter, a fluorescent dye filter, and a quantum dot filter, which is not limited in the embodiments of the present disclosure.

[0151] For example, in some embodiments, Figure 3 As shown, a lens layer 210 may also be provided on the color filter layer 190. The lens layer 210 may be a continuous structure formed on the entire surface, or include a plurality of lenses 211 corresponding to different sub-pixels (as shown in the figure), which are used to refract the light emitted by each sub-pixel to make the light emitting effect of the entire display substrate more uniform. For example, in some examples, the lens 211 may be a convex lens. For example, the lens 211 may adopt a single-layer or multi-layer structure. When a multi-layer structure is adopted, the refractive index of each layer increases from the inside to the outside in the lens 211. The shape of the lens 211 may be spherical, cylindrical, prismatic, etc. The embodiments of the present disclosure do not limit the specific form of the lens layer 210.

[0152] For example, in the embodiments of the present disclosure, Figure 3 As shown, the driving circuit substrate 10 can be formed by using a silicon-based substrate 111 and using semiconductor manufacturing technology to form various functional layers on the silicon-based substrate 111. For example, the above-mentioned preparation process of the driving circuit substrate 10 can be completed in a wafer factory. Therefore, the display substrate provided in the embodiment of the present disclosure can be formed by directly forming a first electrode 130, a pixel defining layer 140, a light-emitting material layer 150, a second electrode layer 160 and other structures on the driving circuit substrate 10, and the preparation process is simple. In addition, since the manufacturing process of the silicon-based driving circuit substrate is mature and the performance is stable, it is suitable for making highly integrated micro-display devices. Therefore, the display substrate provided in the embodiment of the present disclosure can be a silicon-based micro-organic light-emitting diode display substrate, for example, it can be used in virtual reality (VR) display devices, augmented reality (AR) display devices, mobile phones, televisions and other display devices. At this time, the display device can have a higher resolution, for example, greater than 500PPI, for example, a resolution greater than 3000PPI. Alternatively, in some embodiments, the driving circuit substrate 10 can also be a glass substrate, for example, for glass-based high-resolution display products of different sizes such as televisions and mobile phones.

[0153] There are a few points to note:

[0154] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to the general design.

[0155] (2) For the sake of clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness of layers or regions is exaggerated or reduced, that is, these drawings are not drawn according to the actual scale. It is understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element or there may be intermediate elements.

[0156] (3) In the absence of conflict, the embodiments of the present disclosure and the features therein may be combined with each other to obtain new embodiments.

[0157] The above are only specific implementations of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and the protection scope of the present disclosure shall be based on the protection scope of the claims.

Claims

1. A display substrate having a plurality of sub-pixels arranged in an array, and comprising: Drive circuit board, A plurality of first electrodes are arranged on the driving circuit substrate, a pixel defining layer, at least disposed on a side of the plurality of first electrodes away from the driving circuit substrate, comprising a plurality of sub-pixel openings respectively exposing the plurality of first electrodes, a light emitting material layer, disposed on a side of the pixel defining layer away from the driving circuit substrate and at least located in the plurality of sub-pixel openings, The second electrode layer is arranged on a side of the light emitting material layer away from the driving circuit substrate. The pixel defining layer includes a fourth slope, the fourth slope connects the first flat area and the second flat area of ​​the pixel defining layer, the second electrode layer includes a third flat area at a position corresponding to the first flat area, and the width of the third flat area is smaller than the width of the first flat area.

2. The display substrate according to claim 1, wherein: The pixel defining layer includes a first pixel defining sublayer and a second pixel defining sublayer. The second pixel defining sublayer is arranged on a side of the first pixel defining sublayer away from the driving circuit substrate. The first pixel defining sublayer is retracted relative to the second pixel defining sublayer to form a first recess.

3. The display substrate according to claim 2, wherein: The second electrode layer forms a fifth slope portion in the area where the first notch is located, and the slope angle of the fifth slope is greater than the slope angle of the fourth slope portion.

4. The display substrate according to claim 3, wherein: The second electrode layer further includes a sixth slope portion, and the sixth slope portion corresponds to the area where the fourth slope portion is located.

5. The display substrate according to claim 4, wherein: The slope angle of the sixth slope portion is smaller than the slope angle of the fourth slope portion.

6. The display substrate according to claim 4 or 5, wherein: The slope angle of the sixth slope portion is smaller than the slope angle of the fifth slope portion.

7. The display substrate according to any one of claims 2 to 5, wherein: The pixel defining layer further includes another pixel defining sublayer, which is disposed on a side of the first pixel defining sublayer close to the driving circuit substrate, and has a width greater than that of the second pixel defining sublayer.

8. The display substrate according to claim 7, wherein: The thickness of the another pixel-defining sublayer is greater than the thickness of the second pixel-defining sublayer.

9. The display substrate according to any one of claims 2 to 5, wherein: A thickness of the first pixel-defining sublayer is greater than a thickness of the second pixel-defining sublayer.

10. The display substrate according to any one of claims 2 to 5, wherein: The sum of the thicknesses of the second pixel defining sublayer and the first pixel defining sublayer is greater than or equal to 10 nm and less than or equal to 100 nm.

11. The display substrate according to any one of claims 2 to 5, wherein: The first pixel defining sublayer is indented by 10 nm-200 nm relative to the second pixel defining sublayer.

12. The display substrate according to claim 7, wherein: The second pixel defining sublayer, the first pixel defining sublayer and the another pixel defining sublayer are respectively made of silicon oxide, silicon nitride and silicon oxide.

13. The display substrate according to claim 4, wherein: The light-emitting material layer includes a first sub-light-emitting material layer, the first sub-light-emitting material layer includes a third slope portion at the first recess, and includes a first slope portion at the fourth slope portion.

14. The display substrate according to claim 13, wherein: The slope angle of the sixth slope portion is smaller than the slope angle of the third slope portion.

15. The display substrate according to claim 13 or 14, wherein: The first sub-light emitting material layer includes a charge generating layer or a hole injecting layer.

16. The display substrate according to any one of claims 2 to 5, wherein: The pixel definition layer further includes a third pixel definition sublayer and a fourth pixel definition sublayer which are stacked. The third pixel defining sublayer is disposed on a side of the second pixel defining sublayer away from the driving circuit substrate, and the fourth pixel defining sublayer is disposed on a side of the third pixel defining sublayer away from the driving circuit substrate. The third pixel defining sublayer is retracted relative to the fourth pixel defining sublayer to form the second notch.

17. The display substrate according to claim 16, wherein: The second pixel defining sublayer is disconnected at a first distance at the location of the first notch, and the fourth pixel defining sublayer is disconnected at a second distance at the location of the second notch; The second distance is greater than the first distance by 100 nm-500 nm.

18. The display substrate according to claim 16, further comprising: A first auxiliary electrode layer disposed on a side of the first pixel defining sublayer close to the driving circuit substrate; and / or A second auxiliary electrode layer disposed on a side of the second pixel defining sublayer away from the driving circuit substrate; and / or A third auxiliary electrode layer is disposed on a side of the fourth pixel defining sublayer away from the driving circuit substrate.

19. The display substrate according to any one of claims 2 to 5, wherein: The light-emitting material layer is disconnected at the first notch, the light-emitting material layer includes a first portion for emitting light and a second portion not for emitting light, the light-emitting material layer is disconnected at the position of the second portion, and a slope angle of the first portion is greater than a slope angle of the second portion at the disconnected position.

20. The display substrate according to claim 19, wherein: The depth of the first recess in a direction parallel to the plane of the base substrate is greater than the thickness of the first pixel defining sublayer and the second pixel defining sublayer in a direction perpendicular to the plane of the base substrate.

Images