Tracker circuit, tracker module, and voltage supply method

By introducing filter and capacitor switching mechanisms into the tracker circuit, multiple discrete voltage degradation problems supplied to the power amplifier are solved, and the stability of the power supply voltage and power additional efficiency are improved.

CN119213687APending Publication Date: 2024-12-27MURATA MFG CO LTD
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Patent Information

Application Number
CN202380040854.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-05-18
Filing Date
2023-04-18
Publication Date
2024-12-27

AI Technical Summary

Technical Problem

In the prior art, the multiple discrete voltages supplied to the power amplifier have deterioration, which affects efficiency.

Method used

A tracker circuit is designed, including a first switching circuit to generate a plurality of discrete voltages, from which the second switching circuit is selected and output to an amplifier, the filter circuit is connected between the second switching circuit and the amplifier, and passes through a third switching circuit A capacitor and a switch are added between the voltage supply path and the ground line, and the on and off of the capacitor is switched to suppress deterioration.

Benefits of technology

The deterioration characteristics of multiple discrete voltages on the power amplifier are effectively suppressed, and the stability of the power supply voltage and power added efficiency are improved.

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Abstract

A tracker circuit (1) is provided with: a first switching circuit (for example, a preregulator circuit (10) and a switched capacitor circuit (20)) configured so as to generate a plurality of discrete voltages on the basis of an input voltage; a second switching circuit (for example, a power supply modulation circuit (30)) configured to select at least one voltage from among the plurality of generated discrete voltages and output the selected voltage to the power amplifier (2); a filter circuit (40) connected between the second switching circuit and the power amplifier (2); and a third switching circuit (for example, an APT switching circuit (70)) including a capacitor (C71) and a switch (S81) connected in series between a voltage supply path (P1) between the filter circuit (40) and the power amplifier (2) and a ground.
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Description

Technical Field

[0001] The invention relates to a tracker circuit, a tracker module and a voltage supply method. Background Art

[0002] In recent years, the power added efficiency (PAE) has been improved by applying an envelope tracking (ET) mode to a power amplifier circuit. Patent document 1 discloses a technology related to a digital ET mode for supplying a plurality of discrete voltages.

[0003] Patent Document 1: U.S. Patent No. 9755672

[0004] However, in the above-mentioned conventional technology, a plurality of discrete voltages supplied to the amplifier may deteriorate. Summary of the invention

[0005] Therefore, the present invention provides a tracker circuit, a tracker module, and a voltage supply method capable of suppressing degradation of a plurality of discrete voltages supplied to an amplifier.

[0006] A tracker circuit of one embodiment of the present invention comprises: a first switching circuit, configured to generate multiple discrete voltages based on an input voltage; a second switching circuit, configured to select at least one voltage from the generated multiple discrete voltages and output it to an amplifier; a filter circuit, connected between the second switching circuit and the amplifier; and a third switching circuit, including a capacitor and a switch connected in series between a voltage supply path between the filter circuit and the amplifier and a ground line.

[0007] A tracker module according to one embodiment of the present invention comprises: a module substrate having a first main surface and a second main surface opposite to each other; an external connection terminal provided on the module substrate; a first switch circuit configured to be arranged on the module substrate and to generate a plurality of discrete voltages based on an input voltage; a second switch circuit configured to be arranged on the module substrate and to select at least one voltage from the generated plurality of discrete voltages and output it to an amplifier via the external connection terminal; a filter circuit configured on the module substrate and connected between the second switch circuit and the external connection terminal; and a third switch circuit configured on the module substrate and comprising a capacitor and a switch connected in series, the third switch circuit being connected between a voltage supply path between the filter circuit and the external connection terminal and a ground line.

[0008] A voltage supply method according to one embodiment of the present invention generates a plurality of discrete voltages based on an input voltage, selects at least one voltage from the generated plurality of discrete voltages, filters the selected at least one voltage, switches a voltage supply path for supplying the at least one filtered voltage to an amplifier to be connected to and disconnected from a ground line via a capacitor, and supplies the at least one filtered voltage to the amplifier via the voltage supply path.

[0009] According to the tracker circuit and the like of one aspect of the present invention, it is possible to suppress degradation of characteristics of a plurality of discrete voltages supplied to an amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1A This is a graph showing an example of transition of the power supply voltage in the average power tracking (APT: Average Power Tracking) mode.

[0011] Figure 1B This is a graph showing an example of the transition of the power supply voltage in the analog envelope tracking (A-ET: Analog Envelope Tracking) mode.

[0012] Figure 1C This is a graph showing an example of transition of the power supply voltage in the digital envelope tracking (D-ET: Digital Envelope Tracking) mode.

[0013] Figure 2 It is a circuit configuration diagram of a communication device according to an embodiment.

[0014] Figure 3 It is a circuit configuration diagram of a pre-regulator circuit, a switched capacitor circuit, a power supply modulation circuit (supply modulator), a filter circuit, and an APT switch circuit according to an embodiment.

[0015] Figure 4 It is a circuit configuration diagram of a digital control circuit according to an embodiment.

[0016] Figure 5 : is a flowchart showing a voltage supply method of a tracker circuit according to an embodiment.

[0017] Figure 6 Yes means Figure 5 The detailed flowchart of step S107 is shown in FIG.

[0018] Figure 7 is a top view of a tracker module according to an embodiment.

[0019] Figure 8 is a top view of a tracker module according to an embodiment.

[0020] Fig. 9 is a cross-sectional view of a tracker module according to an embodiment.

[0021] Fig.10 It is a circuit configuration diagram of an APT switch circuit according to a modified example.

[0022] Fig.11 This is a circuit configuration diagram of a communication device according to another embodiment. DETAILED DESCRIPTION

[0023] Hereinafter, the embodiments of the present invention will be described in detail using the accompanying drawings. In addition, the embodiments described below all show general or specific examples. The values, shapes, materials, components, configurations of components, and connection methods shown in the following embodiments are examples and do not limit the present invention.

[0024] In addition, each figure is a schematic diagram that appropriately emphasizes, omits, or adjusts the ratio in order to illustrate the present invention, and is not necessarily strictly illustrated, and may differ from the actual shape, positional relationship, and ratio. In each figure, the same reference numeral is sometimes added to substantially the same structure, and repeated descriptions are omitted or simplified.

[0025] In the following figures, the x-axis and the y-axis are axes that are orthogonal to each other on a plane parallel to the main surface of the module substrate. Specifically, when the module substrate has a rectangular shape in a plan view, the x-axis is parallel to the first side of the module substrate, and the y-axis is parallel to the second side of the module substrate that is orthogonal to the first side. In addition, the z-axis is an axis perpendicular to the main surface of the module substrate, and its positive direction indicates the upward direction, and its negative direction indicates the downward direction.

[0026] In the circuit structure of the present invention, "connection" includes not only direct connection through connection terminals and / or wiring conductors, but also electrical connection via other circuit elements. "Connection between A and B" means connection between A and B and both A and B, and means a path connected in series between A and B. "Path between A and B" means a path formed by a conductor that electrically connects A and B.

[0027] In the component configuration of the present invention, "components are configured on a substrate" includes components configured on the main surface of a substrate, and components configured inside a substrate. "Components are configured on the main surface of a substrate" includes not only the case where components are configured to contact the main surface of a substrate, but also the case where components are not in contact with the main surface but are configured above the main surface (for example, components are stacked on other components configured to contact the main surface). In addition, "components are configured on the main surface of a substrate" may also include components configured in recesses formed on the main surface. "Components are configured inside a substrate" includes not only the case where components are encapsulated in a module substrate, but also the case where all components are configured between the two main surfaces of a substrate but part of the components are not covered by the substrate, and the case where only part of the components are configured inside a substrate.

[0028] In addition, in the component configuration of the present invention, "a top view of the module substrate" means observing an object by orthogonally projecting it onto the xy plane from the positive side of the z-axis. "A overlaps with B when viewed from above" means that at least a portion of the area of ​​A orthogonally projected onto the xy plane overlaps with at least a portion of the area of ​​B orthogonally projected onto the xy plane. In addition, "A is configured between B and C" means that at least one of the multiple line segments connecting an arbitrary point in B and an arbitrary point in C passes through A.

[0029] In addition, in the component configuration of the present invention, "A and B are adjacently configured" means that A and B are close to each other, and specifically means that there are no other circuit components in the space opposite to A and B. In other words, "A and B are adjacently configured" means that any of the multiple line segments from any point on the surface of A opposite to B along the normal direction of the surface to B does not pass through circuit components other than A and B. Here, circuit components refer to components including active components and / or passive components. In other words, circuit components include active components including transistors or diodes, and passive components including inductors, converters, capacitors or resistors, but do not include electrical mechanical components including terminals, connectors or wiring.

[0030] In the present invention, a "terminal" refers to a point where a conductor in an element ends. In addition, when the resistance of the path between elements is sufficiently low, the terminal can be interpreted not only as a single point but also as an arbitrary point on the path between elements or the entire path.

[0031] In addition, phrases such as "parallel" and "perpendicular" that indicate the relationship between elements, phrases such as "rectangular" that indicate the shape of an element, and numerical ranges do not necessarily have strict meanings but also include substantially equivalent ranges, such as errors of several %.

[0032] First, as a technique for efficiently amplifying high-frequency signals, a tracking mode for supplying a power amplifier with a power supply voltage dynamically adjusted over time based on the high-frequency signal will be described. The tracking mode refers to a mode for dynamically adjusting the power supply voltage applied to the power amplifier circuit. There are several types of tracking modes, but here, reference is made to the following. Figure 1A to Figure 1C The average power tracking (APT: Average Power Tracking) mode and the envelope tracking (ET: Envelope Tracking) mode (including the analog ET mode and the digital ET mode) are explained. Figure 1A to Figure 1C In FIG. 1 , the horizontal axis represents time and the vertical axis represents voltage. In addition, the thick solid line represents the power supply voltage and the thin solid line (waveform) represents the modulation signal.

[0033] Figure 1A : is a graph showing an example of the transition of the power supply voltage in the APT mode. In the APT mode, the power supply voltage is changed to a plurality of discrete voltage levels in units of one frame based on the average power.

[0034] A frame is a unit that constitutes a high-frequency signal (modulated signal). For example, in 5GNR (5th Generation New Radio) and LTE (Long Term Evolution), a frame contains ten subframes, each of which contains multiple time slots, and each time slot consists of multiple symbols. The subframe length is 1ms and the frame length is 10ms.

[0035] In addition, a mode in which the voltage level is varied in units of one frame or larger than one frame based on average power is called an APT mode, and is distinguished from a mode in which the voltage level is varied in units smaller than one frame (e.g., a subframe, a time slot, or a symbol). For example, a mode in which the voltage level is varied in units of a symbol is called a symbol power tracking (SPT: Symbol Power Tracking) mode, and is distinguished from the APT mode.

[0036] Figure 1B : is a graph showing an example of the change of the power supply voltage in the analog ET mode. In the analog ET mode, the envelope of the modulation signal is tracked by continuously changing the power supply voltage based on the envelope signal.

[0037] The envelope signal is a signal representing the envelope of the modulation signal. The envelope value is, for example, represented by (I 2 +Q 2 ). Here, (I, Q) represents a constellation point. A constellation point refers to a point on a constellation diagram that represents a signal modulated by digital modulation. For example, (I, Q) is determined based on transmission information, such as by BBIC.

[0038] Figure 1C : is a graph showing an example of the transition of the power supply voltage in the digital ET mode. In the digital ET mode, the power supply voltage is varied to a plurality of discrete voltage levels within one frame based on the envelope signal to track the envelope of the modulation signal.

[0039] (Implementation Method)

[0040] The following is a description of the implementation. The communication device 8 of the present embodiment can be used to provide wireless connection. For example, the communication device 8 can be installed in a user terminal (UE: User Equipment) in a cellular network such as a mobile phone, a smart phone, a tablet computer, a wearable device, etc. In other examples, the communication device 8 can be installed to provide wireless connection to IoT (Internet of Things) sensor equipment, medical / health equipment, cars, unmanned aerial vehicles (UAV: Unmanned Aerial Vehicle) (so-called drones), and unmanned guided vehicles (AGV: Automated Guided Vehicle). In other examples, the communication device 8 can also be installed to provide wireless connection through a wireless access point or a wireless hotspot.

[0041] [1.1 Circuit Structure of Communication Device 8]

[0042] First, refer to Figure 2 The circuit configuration of the communication device 8 will be described. Figure 2 FIG. 8 is a circuit diagram of the communication device 8 of this embodiment. Figure 2 As shown, the communication device 8 of the present embodiment includes a tracker circuit 1 , a high-frequency circuit 6 , an RFIC (Radio Frequency Integrated Circuit) 5 , and an antenna 7 .

[0043] The tracker circuit 1 can selectively adjust the power supply voltage V based on the digital ET mode ET And the power supply voltage V based on APT mode APT The power amplifier 2 included in the high frequency circuit 6 is supplied. In the digital ET mode, at least one voltage is selected from a plurality of discrete voltages in units smaller than one frame based on the envelope signal. On the other hand, in the APT mode, at least one voltage is selected from a plurality of discrete voltages in units of one frame based on the average power.

[0044] In addition, Figure 2 In the embodiment, the tracker circuit 1 supplies a power supply voltage to one power amplifier 2, but different power supply voltages may be supplied to a plurality of power amplifiers.

[0045] like Figure 2As shown, the tracker circuit 1 includes a pre-regulator circuit 10 , a switched capacitor circuit 20 , a power modulation circuit 30 , a filter circuit 40 , a DC power supply 50 , and a digital control circuit 60 .

[0046] The pre-regulator circuit 10 includes a power inductor and a switch. The power inductor is an inductor used for stepping up and / or stepping down a direct current (DC: Direct Current) voltage. The power inductor is configured in series on the DC path. In addition, the power inductor can also be connected (configured in parallel) between the DC path and the ground. The pre-regulator circuit 10 can use the power inductor to convert the input voltage into a first voltage. Such a pre-regulator circuit 10 is also called a magnetic regulator or a DC / DC converter.

[0047] The switched capacitor circuit 20 includes a plurality of capacitors and a plurality of switches, and can generate a plurality of discrete second voltages according to the first voltage from the pre-regulator circuit 10. The plurality of discrete voltages respectively have a plurality of discrete voltage levels. The switched capacitor circuit 20 is also called a switched-capacitor voltage ladder circuit.

[0048] Such a pre-regulator circuit 10 and a switched capacitor circuit 20 are examples of a first switching circuit, and are configured to generate a plurality of discrete voltages based on an input voltage.

[0049] The power supply modulation circuit 30 is an example of a second switching circuit, and is configured to modulate the power supply voltage by selecting at least one voltage from a plurality of second voltages generated in the switched capacitor circuit 20 and outputting it to the power amplifier 2. The modulated power supply voltage is supplied to the power amplifier 2 via the voltage supply path P1. The power supply modulation circuit 30 is controlled based on the digital control signal.

[0050] The filter circuit 40 is connected between the power supply modulation circuit 30 and the power amplifier 2. The filter circuit 40 is a pulse shaping network, and is configured to filter the signal (second voltage) from the power supply modulation circuit 30.

[0051] The DC power source 50 can supply a DC voltage to the pre-regulator circuit 10. As the DC power source 50, for example, a rechargeable battery can be used, but the present invention is not limited thereto.

[0052] The digital control circuit 60 can control the pre-regulator circuit 10 , the switched capacitor circuit 20 , the power modulation circuit 30 , and the APT switch circuit 70 based on the digital control signal from the RFIC 5 .

[0053] The APT switch circuit 70 is an example of a third switch circuit, and is connected between the voltage supply path P1 between the filter circuit 40 and the power amplifier 2 and the ground.

[0054] In addition, the tracker circuit 1 may not include at least one of the pre-regulator circuit 10, the switched capacitor circuit 20, the power modulation circuit 30, the filter circuit 40, the DC power supply 50, the digital control circuit 60, and the APT switch circuit 70. For example, the tracker circuit 1 may not include the DC power supply 50. In addition, any combination of the pre-regulator circuit 10, the switched capacitor circuit 20, the power modulation circuit 30, the filter circuit 40, and the APT switch circuit 70 may be integrated into a single circuit.

[0055] The high frequency circuit 6 is configured to transmit a high frequency signal between the antenna 7 and the RFIC 5. The high frequency circuit 6 includes a power amplifier 2, a filter 3, and a PA (Power Amplifier) ​​control circuit 4.

[0056] In this embodiment, the high-frequency signal is a wireless communication signal in a communication network constructed using a radio access technology (RAT) and may be a signal in a frequency band less than 6 GHz or a millimeter wave signal.

[0057] In addition, millimeter wave signals generally refer to signals in the range of 30 to 300 GHz, but can also be signals in the range of 24.25 to 52.6 GHz (FR (Frequency Region) 2 in 5GNR).

[0058] Examples of communication systems include a 5GNR (5th Generation New Radio) system, an LTE (Long Term Evolution) system, and a WLAN (Wireless Local Area Network) system.

[0059] The power amplifier 2 is connected between the RFIC 5 and the filter 3. The power amplifier 2 is also connected to the tracker circuit 1 and the PA control circuit 4. The power amplifier 2 can amplify the high-frequency signal received from the RFIC 5 using the voltage received from the tracker circuit 1.

[0060] The filter 3 is connected between the power amplifier 2 and the antenna 7. The filter 3 has a passband including a frequency band for transmitting high-frequency signals. The frequency band for transmitting high-frequency signals is predefined by standardization organizations such as 3GPP (registered trademark) (3rd Generation Partnership Project) and IEEE (Institute of Electrical and Electronics Engineers).

[0061] The PA control circuit 4 can control the power amplifier 2. Specifically, the PA control circuit 4 can supply a bias control signal to the power amplifier 2.

[0062] RFIC5 is an example of a signal processing circuit that processes a high-frequency signal. Specifically, RFIC5 performs signal processing on an input transmission signal by up-conversion, etc., and supplies the high-frequency transmission signal generated by the signal processing to the power amplifier 2. In addition, RFIC5 has a control unit that controls the tracker circuit 1. In addition, part or all of the functions of the control unit of RFIC5 can also be installed outside RFIC5.

[0063] also, Figure 2 The circuit configuration of the high-frequency circuit 6 shown is an example and is not limited thereto. For example, the high-frequency circuit 6 may include a plurality of filters corresponding to a plurality of frequency bands and may include a switch for switching the plurality of filters.

[0064] The antenna 7 transmits a high-frequency signal input from the power amplifier 2 via the filter 3. The antenna 7 may not be included in the communication device 8.

[0065] also, Figure 2 The circuit structure of the communication device 8 shown is an example and is not limited thereto. For example, the communication device 8 may also include a baseband signal processing circuit that performs signal processing using an intermediate frequency band that is lower in frequency than the high-frequency signal transmitted by the high-frequency circuit 6. In addition, for example, the communication device 8 may also include a receiving path. In this case, a low-noise amplifier and a filter may also be connected to the receiving path.

[0066] [1.2 Circuit structure of tracker circuit 1]

[0067] Next, refer to Figure 3 as well as Figure 4 The circuit configurations of the pre-regulator circuit 10 , the switched capacitor circuit 20 , the power supply modulation circuit 30 , the filter circuit 40 , the digital control circuit 60 , and the APT switch circuit 70 included in the tracker circuit 1 will be described. Figure 31 is a circuit configuration diagram of the pre-regulator circuit 10 , the switched capacitor circuit 20 , the power supply modulation circuit 30 , the filter circuit 40 , and the APT switch circuit 70 according to the present embodiment. Figure 4 2 is a circuit configuration diagram of the digital control circuit 60 according to the present embodiment.

[0068] also, Figure 3 as well as Figure 4 The circuit configuration is an example, and the pre-regulator circuit 10, the switched capacitor circuit 20, the power modulation circuit 30, the filter circuit 40, the digital control circuit 60, and the APT switch circuit 70 can be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of each circuit provided below should not be interpreted in a limiting sense.

[0069] [1.2.1 Circuit Structure of Switched Capacitor Circuit 20]

[0070] First, the circuit structure of the switched capacitor circuit 20 is described. Figure 3 As shown, the switched capacitor circuit 20 includes capacitors C11 to C16, capacitors C10, C20, C30 and C40, switches S11 to S14, S21 to S24, S31 to S34, and S41 to S44. Energy and charge are input from the pre-regulator circuit 10 to the switched capacitor circuit 20 at nodes N1 to N4, and are led out from the switched capacitor circuit 20 to the power supply modulation circuit 30 at nodes N1 to N4.

[0071] The capacitors C11 to C16 function as flying capacitors (also called cross-circuit capacitors). In other words, each capacitor C11 to C16 is used to step up or step down the first voltage supplied from the pre-regulator circuit 10. More specifically, the capacitors C11 to C16 move charges between the capacitors C11 to C16 and the nodes N1 to N4 to maintain voltages V1 to V4 (voltages relative to the ground potential) that satisfy V1: V2: V3: V4 = 1: 2: 3: 4 at the four nodes N1 to N4. The voltages V1 to V4 correspond to a plurality of second voltages each having a plurality of discrete voltage levels.

[0072] The capacitor C11 has two electrodes. One of the two electrodes of the capacitor C11 is connected to one end of the switch S11 and one end of the switch S12. The other of the two electrodes of the capacitor C11 is connected to one end of the switch S21 and one end of the switch S22.

[0073] The capacitor C12 has two electrodes. One of the two electrodes of the capacitor C12 is connected to one end of the switch S21 and one end of the switch S22. The other of the two electrodes of the capacitor C12 is connected to one end of the switch S31 and one end of the switch S32.

[0074] The capacitor C13 has two electrodes. One of the two electrodes of the capacitor C13 is connected to one end of the switch S31 and one end of the switch S32. The other of the two electrodes of the capacitor C13 is connected to one end of the switch S41 and one end of the switch S42.

[0075] The capacitor C14 has two electrodes. One of the two electrodes of the capacitor C14 is connected to one end of the switch S13 and one end of the switch S14. The other of the two electrodes of the capacitor C14 is connected to one end of the switch S23 and one end of the switch S24.

[0076] The capacitor C15 has two electrodes. One of the two electrodes of the capacitor C15 is connected to one end of the switch S23 and one end of the switch S24. The other of the two electrodes of the capacitor C15 is connected to one end of the switch S33 and one end of the switch S34.

[0077] The capacitor C16 has two electrodes. One of the two electrodes of the capacitor C16 is connected to one end of the switch S33 and one end of the switch S34. The other of the two electrodes of the capacitor C16 is connected to one end of the switch S43 and one end of the switch S44.

[0078] The group of capacitors C11 and C14 , the group of capacitors C12 and C15 , and the group of capacitors C13 and C16 can be charged and discharged complementarily by repeating the first stage and the second stage.

[0079] Specifically, in the first stage, switches S12, S13, S22, S23, S32, S33, S42, and S43 are turned on. As a result, for example, one of the two electrodes of capacitor C12 is connected to node N3, the other of the two electrodes of capacitor C12 and one of the two electrodes of capacitor C15 are connected to node N2, and the other of the two electrodes of capacitor C15 is connected to node N1.

[0080] On the other hand, in the second phase, switches S11, S14, S21, S24, S31, S34, S41, and S44 are turned on. As a result, for example, one of the two electrodes of capacitor C15 is connected to node N3, the other of the two electrodes of capacitor C15 and one of the two electrodes of capacitor C12 are connected to node N2, and the other of the two electrodes of capacitor C12 is connected to node N1.

[0081] By repeating the first and second stages, for example, when one of the capacitors C12 and C15 is charged by the node N2, the other of the capacitors C12 and C15 can be discharged to the capacitor C30. In other words, the capacitors C12 and C15 can be charged and discharged complementarily.

[0082] The group of capacitors C11 and C14 and the group of capacitors C13 and C16 can also be charged and discharged complementarily similarly to the group of capacitors C12 and C15 by repeating the first stage and the second stage.

[0083] The capacitors C10 , C20 , C30 , and C40 function as smoothing capacitors, respectively. In other words, the capacitors C10 , C20 , C30 , and C40 are used to hold and smooth the voltages V1 to V4 at the nodes N1 to N4 , respectively.

[0084] The capacitor C10 is connected between the node N1 and the ground. Specifically, one of the two electrodes of the capacitor C10 is connected to the node N1. On the other hand, the other of the two electrodes of the capacitor C10 is connected to the ground.

[0085] The capacitor C20 is connected between the nodes N2 and N1. Specifically, one of the two electrodes of the capacitor C20 is connected to the node N2. On the other hand, the other of the two electrodes of the capacitor C20 is connected to the node N1.

[0086] The capacitor C30 is connected between the nodes N3 and N2. Specifically, one of the two electrodes of the capacitor C30 is connected to the node N3. On the other hand, the other of the two electrodes of the capacitor C30 is connected to the node N2.

[0087] The capacitor C40 is connected between the nodes N4 and N3. Specifically, one of the two electrodes of the capacitor C40 is connected to the node N4. On the other hand, the other of the two electrodes of the capacitor C40 is connected to the node N3.

[0088] The switch S11 is connected between one of the two electrodes of the capacitor C11 and the node N3. Specifically, one end of the switch S11 is connected to one of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S11 is connected to the node N3.

[0089] The switch S12 is connected between one of the two electrodes of the capacitor C11 and the node N4. Specifically, one end of the switch S12 is connected to one of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S12 is connected to the node N4.

[0090] The switch S21 is connected between one of the two electrodes of the capacitor C12 and the node N2. Specifically, one end of the switch S21 is connected to one of the two electrodes of the capacitor C12 and the other of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S21 is connected to the node N2.

[0091] The switch S22 is connected between one of the two electrodes of the capacitor C12 and the node N3. Specifically, one end of the switch S22 is connected to one of the two electrodes of the capacitor C12 and the other of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S22 is connected to the node N3.

[0092] The switch S31 is connected between the other of the two electrodes of the capacitor C12 and the node N1. Specifically, one end of the switch S31 is connected to the other of the two electrodes of the capacitor C12 and one of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S31 is connected to the node N1.

[0093] The switch S32 is connected between the other of the two electrodes of the capacitor C12 and the node N2. Specifically, one end of the switch S32 is connected to the other of the two electrodes of the capacitor C12 and one of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S32 is connected to the node N2. In other words, the other end of the switch S32 is connected to the other end of the switch S21.

[0094] The switch S41 is connected between the other of the two electrodes of the capacitor C13 and the ground line. Specifically, one end of the switch S41 is connected to the other of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S41 is connected to the ground line.

[0095] The switch S42 is connected between the other of the two electrodes of the capacitor C13 and the node N1. Specifically, one end of the switch S42 is connected to the other of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S42 is connected to the node N1. In other words, the other end of the switch S42 is connected to the other end of the switch S31.

[0096] The switch S13 is connected between one of the two electrodes of the capacitor C14 and the node N3. Specifically, one end of the switch S13 is connected to one of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S13 is connected to the node N3. In other words, the other end of the switch S13 is connected to the other end of the switch S11 and the other end of the switch S22.

[0097] The switch S14 is connected between one of the two electrodes of the capacitor C14 and the node N4. Specifically, one end of the switch S14 is connected to one of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S14 is connected to the node N4. In other words, the other end of the switch S14 is connected to the other end of the switch S12.

[0098] The switch S23 is connected between one of the two electrodes of the capacitor C15 and the node N2. Specifically, one end of the switch S23 is connected to one of the two electrodes of the capacitor C15 and the other of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S23 is connected to the node N2. In other words, the other end of the switch S23 is connected to the other end of the switch S21 and the other end of the switch S32.

[0099] The switch S24 is connected between one of the two electrodes of the capacitor C15 and the node N3. Specifically, one end of the switch S24 is connected to one of the two electrodes of the capacitor C15 and the other of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S24 is connected to the node N3. In other words, the other end of the switch S24 is connected to the other end of the switch S11, the other end of the switch S22, and the other end of the switch S13.

[0100] The switch S33 is connected between the other of the two electrodes of the capacitor C15 and the node N1. Specifically, one end of the switch S33 is connected to the other of the two electrodes of the capacitor C15 and one of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S33 is connected to the node N1. In other words, the other end of the switch S33 is connected to the other end of the switch S31 and the other end of the switch S42.

[0101] The switch S34 is connected between the other of the two electrodes of the capacitor C15 and the node N2. Specifically, one end of the switch S34 is connected to the other of the two electrodes of the capacitor C15 and one of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S34 is connected to the node N2. In other words, the other end of the switch S34 is connected to the other end of the switch S21, the other end of the switch S32, and the other end of the switch S23.

[0102] The switch S43 is connected between the other of the two electrodes of the capacitor C16 and the ground line. Specifically, one end of the switch S43 is connected to the other of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S43 is connected to the ground line.

[0103] The switch S44 is connected between the other of the two electrodes of the capacitor C16 and the node N1. Specifically, one end of the switch S44 is connected to the other of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S44 is connected to the node N1. In other words, the other end of the switch S44 is connected to the other end of the switch S31, the other end of the switch S42, and the other end of the switch S33.

[0104] The switches of the first group including switches S12, S13, S22, S23, S32, S33, S42 and S43 and the switches of the second group including switches S11, S14, S21, S24, S31, S34, S41 and S44 are switched on and off complementarily based on the control signal S2. Specifically, in the first stage, the switches of the first group are turned on, and the switches of the second group are turned off. Conversely, in the second stage, the switches of the first group are turned off, and the switches of the second group are turned on.

[0105] For example, in one of the first stage and the second stage, the capacitors C10 to C40 are charged from the capacitors C11 to C13, and in the other of the first stage and the second stage, the capacitors C10 to C40 are charged from the capacitors C14 to C16. In other words, the capacitors C10 to C40 are always charged from the capacitors C11 to C13 or the capacitors C14 to C16, so even if the current flows from the nodes N1 to N4 to the power supply modulation circuit 30 at a high speed, the nodes N1 to N4 can be replenished with charges at a high speed, so the potential fluctuation of the nodes N1 to N4 can be suppressed.

[0106] By operating in this way, the switched capacitor circuit 20 can maintain approximately equal voltages at both ends of each of the capacitors C10, C20, C30, and C40. Specifically, at the four nodes labeled V1 to V4, voltages V1 to V4 (voltages relative to the ground potential) that satisfy V1: V2: V3: V4 = 1: 2: 3: 4 are maintained. The voltage levels of the voltages V1 to V4 correspond to a plurality of discrete voltage levels that can be supplied to the power modulation circuit 30 through the switched capacitor circuit 20.

[0107] In addition, the voltage ratio (V1:V2:V3:V4) is not limited to (1:2:3:4). For example, the voltage ratio (V1:V2:V3:V4) may be (1:2:4:8).

[0108] in addition, Figure 3 The structure of the switched capacitor circuit 20 shown is an example and is not limited thereto. Figure 3 In the embodiment, the switched capacitor circuit 20 is configured to supply voltages of four discrete voltage levels, but is not limited thereto. The switched capacitor circuit 20 may also be configured to supply voltages of any number of discrete voltage levels or more. For example, when supplying voltages of two discrete voltage levels, the switched capacitor circuit 20 may include at least capacitors C12 and C15, and switches S21 to S24, and S31 to S34.

[0109] [1.2.2 Circuit Structure of Power Supply Modulation Circuit 30]

[0110] Next, the circuit structure of the power supply modulation circuit 30 is described. The power supply modulation circuit 30 is connected to the digital control circuit 60. Figure 3 As shown, the power modulation circuit 30 includes input terminals 131 to 134 , switches S51 to S54 , and an output terminal 130 .

[0111] The output terminal 130 is connected to the filter circuit 40. The output terminal 130 is a terminal for supplying a power supply voltage selected from the voltages V1 to V4 to the power amplifier 2 via the filter circuit 40.

[0112] The input terminals 131 to 134 are respectively connected to the nodes N4 to N1 of the switched capacitor circuit 20. The input terminals 131 to 134 are terminals for receiving the voltages V4 to V1 from the switched capacitor circuit 20.

[0113] The switch S51 is connected between the input terminal 131 and the output terminal 130. Specifically, the switch S51 has a terminal connected to the input terminal 131 and a terminal connected to the output terminal 130. In this connection structure, the switch S51 can switch the connection and non-connection between the input terminal 131 and the output terminal 130 by switching on / off according to the control signal S3.

[0114] The switch S52 is connected between the input terminal 132 and the output terminal 130. Specifically, the switch S52 has a terminal connected to the input terminal 132 and a terminal connected to the output terminal 130. In this connection structure, the switch S52 can switch the connection and non-connection between the input terminal 132 and the output terminal 130 by switching on / off according to the control signal S3.

[0115] The switch S53 is connected between the input terminal 133 and the output terminal 130. Specifically, the switch S53 has a terminal connected to the input terminal 133 and a terminal connected to the output terminal 130. In this connection structure, the switch S53 can switch the connection and non-connection between the input terminal 133 and the output terminal 130 by switching on / off according to the control signal S3.

[0116] The switch S54 is connected between the input terminal 134 and the output terminal 130. Specifically, the switch S54 has a terminal connected to the input terminal 134 and a terminal connected to the output terminal 130. In this connection structure, the switch S54 can switch the connection and non-connection between the input terminal 134 and the output terminal 130 by switching on / off according to the control signal S3.

[0117] The switches S51 to S54 are controlled to be exclusively turned on. In other words, only one of the switches S51 to S54 is turned on, and the rest of the switches S51 to S54 are turned off. Thus, the power supply modulation circuit 30 can output one voltage selected from the voltages V1 to V4.

[0118] also, Figure 3 The structure of the power modulation circuit 30 shown is an example and is not limited thereto. In particular, the switches S51 to S54 may have any structure as long as they can select any one of the four input terminals 131 to 134 to be connected to the output terminal 130. For example, the power modulation circuit 30 may also include a switch connected between the switches S51 to S53 and the switch S54 and the output terminal 130. For another example, the power modulation circuit 30 may also include a switch connected between the switches S51 and S52 and the switches S53 and S54 and the output terminal 130.

[0119] Furthermore, when voltages of two discrete voltage levels are supplied from the switched capacitor circuit 20 , the power modulation circuit 30 only needs to include at least two of the switches S51 to S54 .

[0120] [1.2.3 Circuit Structure of Pre-regulator Circuit 10]

[0121] First, the structure of the pre-regulator circuit 10 is described. Figure 3 As shown, the pre-regulator circuit 10 includes an input terminal 110 , an output terminal 111 , inductor connection terminals 115 and 116 , switches S61 , S62 , S71 , and S72 , a power inductor L71 , and a capacitor C61 .

[0122] The input terminal 110 is an input terminal for a DC voltage. In other words, the input terminal 110 is a terminal for receiving an input voltage from the DC power supply 50 .

[0123] The output terminal 111 is an output terminal of the voltage V4. In other words, the output terminal 111 is a terminal for supplying the voltage V4 to the switched capacitor circuit 20. The output terminal 111 is connected to the node N4 of the switched capacitor circuit 20.

[0124] The inductor connection terminal 115 is connected to one end of the power inductor L71 , and the inductor connection terminal 116 is connected to the other end of the power inductor L71 .

[0125] The switch S71 is connected between the input terminal 110 and one end of the power inductor L71. Specifically, the switch S71 has a terminal connected to the input terminal 110 and a terminal connected to one end of the power inductor L71 via the inductor connection terminal 115. In this connection structure, the switch S71 can switch the connection and non-connection between the input terminal 110 and one end of the power inductor L71 by switching on / off based on the control signal S1.

[0126] The switch S72 is connected between one end of the power inductor L71 and the ground line. Specifically, the switch S72 has a terminal connected to one end of the power inductor L71 via the inductor connection terminal 115, and a terminal connected to the ground line. In this connection structure, the switch S72 can switch the connection and non-connection between one end of the power inductor L71 and the ground line by switching on / off based on the control signal S1.

[0127] The switch S61 is connected between the other end of the power inductor L71 and the output terminal 111. Specifically, the switch S61 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116, and a terminal connected to the output terminal 111. In this connection structure, the switch S61 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 111 by switching on / off based on the control signal S1.

[0128] The switch S62 is connected between the other end of the power inductor L71 and the ground line. Specifically, the switch S62 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116, and a terminal connected to the ground line. In this connection structure, the switch S62 can switch the connection and non-connection between the other end of the power inductor L71 and the ground line by switching on / off based on the control signal S1.

[0129] One of the two electrodes of the capacitor C61 is connected to the switch S61 and the output terminal 111. The other of the two electrodes of the capacitor C61 is connected to the ground. In addition, the capacitor C61 may not be included in the pre-regulator circuit 10.

[0130] The pre-regulator circuit 10 configured in this manner can supply electric charge to the switched capacitor circuit 20 via the output terminal 111 .

[0131] In addition, although the pre-regulator circuit 10 is a buck-boost converter in the present embodiment, it may be a buck converter or a boost converter. For example, when the pre-regulator circuit 10 is a buck converter, the pre-regulator circuit 10 may not include switches S61 and S62. For another example, when the pre-regulator circuit 10 is a boost converter, the pre-regulator circuit 10 may not include switches S71 and S72.

[0132] [1.2.4 Circuit Structure of Filter Circuit 40]

[0133] Next, the circuit structure of the filter circuit 40 is described. In the present embodiment, the filter circuit 40 has a low-pass response, is configured to filter the voltage received via the input terminal 140, and output the filtered voltage to the output terminal 141. Specifically, Figure 3 As shown, the filter circuit 40 includes inductors L51 to L53 , capacitors C51 and C52 , a resistor R51 , and an input terminal 140 .

[0134] The input terminal 140 is an input terminal for a voltage selected by the power modulation circuit 30. In other words, the input terminal 140 is a terminal for receiving a voltage selected from a plurality of voltages V1 to V4.

[0135] Output terminal 141 is the power supply voltage V ET / V APT In other words, the output terminal 141 is a terminal for supplying a power supply voltage to the power amplifier 2.

[0136] The inductors L51 to L53, the capacitors C51 and C52, and the resistor R51 form a low-pass filter. Thus, the filter circuit 40 can reduce high-frequency components included in the power supply voltage.

[0137] also, Figure 3 The structure of the filter circuit 40 shown is an example and is not limited thereto. For example, the filter circuit 40 may not include the inductor L53 and the resistor R51. For another example, the filter circuit 40 may include an inductor connected to one of the two electrodes of the capacitor C51, or may include an inductor connected to one of the two electrodes of the capacitor C52. In addition, the filter circuit 40 may also be partially or completely composed of parasitic reactance and / or parasitic resistance. The parasitic reactance, for example, includes the inductance and / or capacitance of the metal trace connecting the two nodes. In addition, the parasitic resistance, for example, includes the resistance of the metal trace connecting the two nodes.

[0138] [1.2.5 Circuit structure of APT switch circuit 70]

[0139] Next, the circuit structure of the APT switch circuit 70 is described. Figure 3 As shown, the APT switch circuit 70 includes a capacitor C71 and a switch S81 connected in series.

[0140] The capacitor C71 functions as a so-called bypass capacitor and can drop the noise component of the signal flowing through the voltage supply path P1 to the ground. One end of the capacitor C71 is connected to the voltage supply path P1, and the other end of the capacitor C71 is connected to the switch S81.

[0141] The switch S81 is connected between the capacitor C71 and the ground line. Specifically, the switch S81 includes a terminal connected to the other end of the capacitor C71 and a terminal connected to the ground line. In this connection structure, the switch S81 can switch between connecting and disconnecting the voltage supply path P1 through the capacitor C71 and the ground line by switching on / off according to the control signal S4.

[0142] In addition, the switch S81 may not be switched on / off instantaneously. For example, the switch S81 may be turned on slowly. Thus, a change in the power supply voltage (eg, a voltage drop) caused by the turning on of the switch S81 can be suppressed.

[0143] [1.2.6 Circuit structure of digital control circuit 60]

[0144] Next, the circuit structure of the digital control circuit 60 is described. Figure 4 As shown, the digital control circuit 60 includes a first controller 61 , a second controller 62 , and control terminals 601 to 604 .

[0145] The first controller 61 is capable of processing the source synchronous digital control signal received from the RFIC5 via the control terminals 601 and 602 to generate control signals S1, S2 and S4. The control signal S1 is a signal for controlling the on / off of switches S61, S62, S71 and S72 included in the pre-regulator circuit 10. The control signal S2 is a signal for controlling the on / off of switches S11 to S14, S21 to S24, S31 to S34 and S41 to S44 included in the switch capacitor circuit 20. The control signal S4 is a signal for controlling the on / off of switch S81 included in the APT switch circuit 70. In addition, a feedback signal for controlling the pre-regulator circuit 10 may also be input into the first controller 61.

[0146] In addition, the digital control signal processed in the first controller 61 is not limited to the source synchronous digital control signal. For example, the first controller 61 may also process the clock embedded digital control signal. In addition, the first controller 61 may also generate a control signal for controlling the power modulation circuit 30.

[0147] In addition, although in the present embodiment, a set of clock signals and data signals are used as digital control signals for the pre-regulator circuit 10, the switched capacitor circuit 20, and the APT switch circuit 70, the present invention is not limited thereto. For example, a set of clock signals and data signals may be used separately as digital control signals for the pre-regulator circuit 10, the switched capacitor circuit 20, and the APT switch circuit 70.

[0148] The second controller 62 processes the digital control level (DCL) signals (DCL1, DCL2) received from the RFIC5 via the control terminals 603 and 604 to generate the control signal S3. The DCL signals (DCL1, DCL2) are generated based on the envelope signal or average power of the high frequency signal by the RFIC5. The control signal S3 is a signal for controlling the on / off of the switches S51 to S54 included in the power modulation circuit 30.

[0149] The DCL signals (DCL1, DCL2) are each a one-bit signal. Voltages V1 to V4 are represented by a combination of two one-bit signals. For example, V1, V2, V3, and V4 are represented by "00", "01", "10", and "11", respectively. Gray code can also be used to express voltage levels.

[0150] In addition, although in the present embodiment, two digital control level signals are used for the control of the power modulation circuit 30, the number of digital control level signals is not limited thereto. For example, one or three or more digital control level signals may be used according to the number of voltage levels that can be selected by each power modulation circuit 30. In addition, the digital control signal used for the control of the power modulation circuit 30 is not limited to the digital control level signal.

[0151] [1.3 Voltage supply method]

[0152] Next, refer to Figure 5 as well as Figure 6 A method of supplying voltage to the power amplifier 2 in the tracker circuit 1 configured as described above will be described. Figure 5 : is a flowchart showing the voltage supply method according to the present embodiment. Figure 6 Yes means Figure 5 The detailed flowchart of step S107 is shown in FIG.

[0153] The pre-regulator circuit 10 and the switched capacitor circuit 20 generate a plurality of discrete voltages (second voltages) from an input voltage input from the DC power supply 50 based on the control signals S1 and S2 ( S101 ).

[0154] The power modulation circuit 30 selects at least one voltage from a plurality of discrete voltages based on the control signal S3 (S103). For example, when the control signal S3 is based on the digital ET mode, a plurality of discrete voltages are selected within one frame of the high frequency signal. For another example, when the control signal S3 is based on the APT mode, a voltage is selected in units of one frame of the high frequency signal.

[0155] The filter circuit 40 filters the voltage selected by the power modulation circuit 30 (S105). ET / V APT The contained high frequency noise is attenuated.

[0156] The APT switch circuit 70 switches between connecting / disconnecting the voltage supply path P1 to the ground line via the capacitor C71 (S107). Figure 6 As shown, when at least one voltage is selected based on the APT mode (APT of S1071), the switch S81 connected between the capacitor C71 and the ground line is turned on (S1072). On the other hand, when at least one voltage is selected based on the digital ET mode (D-ET of S1071), the switch S81 connected between the capacitor C71 and the ground line is not turned on (S1073). For example, the digital control circuit 60 can receive a signal indicating the mode from RFIC5 and control the conduction (on) / non-conduction (off) of the switch S81 based on the information. For another example, the digital control circuit 60 can also receive a signal indicating the on / off of the switch S81 from RFIC5.

[0157] Finally, the tracker circuit 1 supplies the filtered voltage to the power amplifier 2 via the voltage supply path P1 ( S109 ).

[0158] [1.4 Component Configuration of Tracker Module 100]

[0159] Next, as an example of implementing the tracker circuit 1 configured as above, refer to Figure 7 to Figure 9 A tracker module 100 is described in which a pre-regulator circuit 10, a switched capacitor circuit 20, a power modulation circuit 30, a filter circuit 40, and an APT switch circuit 70 are installed. In addition, although the power inductor L71 included in the pre-regulator circuit 10 is not arranged on the module substrate 90 in this installation example, it can also be arranged on the module substrate 90.

[0160] Figure 7 1 is a top view of tracker module 100 according to the present embodiment. Figure 8 1 is a plan view of the tracker module 100 according to the present embodiment, and is a view showing the main surface 90 b side of the module substrate 90 as viewed from the positive side along the z-axis. Fig. 9 2 is a cross-sectional view of tracker module 100 according to the present embodiment. Fig. 9 The cross sections of the tracker module 100 are respectively Figure 7 as well as Figure 8 Section on line IX-IX.

[0161] In addition, Figure 7 to Figure 9 In FIG. 9 , a portion of wiring connecting a plurality of circuit components arranged on the module substrate 90 is omitted. Figure 7 as well as Figure 8 In the figure, the resin member 91 covering the plurality of circuit components and the surface shielding electrode layer 92 covering the resin member 91 are omitted. Figure 7 In FIG. 1 , shaded blocks represent arbitrary circuit components that are not essential to the present invention.

[0162] The tracker module 100 includes Figure 2 In addition to the multiple circuit components of active elements and passive elements included in the pre-regulator circuit 10, switch capacitor circuit 20, power supply modulation circuit 30, filter circuit 40, and APT switch circuit 70 shown, it also has a module substrate 90, a resin component 91, a shielding electrode layer 92, and multiple pad electrodes 150.

[0163] The module substrate 90 has main surfaces 90a and 90b facing each other. The main surfaces 90a and 90b are examples of the first main surface and the second main surface, respectively. Through-hole conductors 90c, wiring 90d, and ground electrode layers 90e are formed in the module substrate 90 and on the main surface 90a. Figure 7 as well as Figure 8 In the embodiment, the module substrate 90 has a rectangular shape in a plan view, but is not limited to this shape.

[0164] As the module substrate 90, for example, a low temperature co-fired ceramic (LTCC: Low Temperature Co-fired Ceramics) substrate or a high temperature co-fired ceramic (HTCC: High Temperature Co-fired Ceramics) substrate having a stacked structure of multiple dielectric layers, a component-embedded substrate, a substrate having a redistribution layer (RDL: Redistribution Layer), or a printed circuit substrate can be used, but it is not limited to these substrates.

[0165] The integrated circuit 80 , capacitors C10 to C16 , C20 , C30 , C40 , C51 , C52 , C61 , and C71 , inductors L51 to L53 , a resistor R51 , and a resin member 91 are arranged on the main surface 90 a .

[0166] The integrated circuit 80 includes a PR switch section 80a, an SC switch section 80b, an SM switch section 80c, and an APT switch section 80d. The PR switch section 80a includes switches S61, S62, S71, and S72. The SC switch section 80b includes switches S11 to S14, S21 to S24, S31 to S34, and S41 to S44. The SM switch section 80c includes switches S51 to S54. The APT switch section 80d includes a switch S81.

[0167] In addition, although Figure 7 In the embodiment, the PR switch section 80a, the SC switch section 80b, the SM switch section 80c, and the APT switch section 80d are included in one integrated circuit 80, but are not limited thereto. For example, the PR switch section 80a and the SC switch section 80b may be included in one integrated circuit, and the SM switch section 80c and the APT switch section 80d may be included in another integrated circuit. For another example, the SC switch section 80b, the SM switch section 80c, and the APT switch section 80d may be included in one integrated circuit, and the PR switch section 80a may be included in another integrated circuit. For another example, the PR switch section 80a, the SM switch section 80c, and the APT switch section 80d may be included in one integrated circuit, and the SC switch section 80b may be included in another integrated circuit. For another example, the PR switch section 80a, the SC switch section 80b, the SM switch section 80c, and the APT switch section 80d may be independently included in four integrated circuits. In addition, a plurality of integrated circuits can be manufactured at different process technology nodes.

[0168] In addition, although Figure 7 In the embodiment, the integrated circuit 80 has a rectangular shape in a plan view of the module substrate 90 , but is not limited to this shape.

[0169] The integrated circuit 80 can be formed using, for example, CMOS (Complementary Metal Oxide Semiconductor), and specifically, can be manufactured by an SOI (Silicon on Insulator) process. The integrated circuit 80 is not limited to CMOS.

[0170] Capacitors C10 to C16, C20, C30, C40, C51, C52, C61, and C71 are mounted as chip capacitors. A chip capacitor refers to a surface mount device (SMD: Surface Mount Device) constituting a capacitor. In addition, the mounting of multiple capacitors is not limited to chip capacitors. For example, a part or all of the multiple capacitors may be included in an integrated passive device (IPD: Integrated Passive Device), or may be included in an integrated circuit 80.

[0171] Inductors L51 to L53 are mounted as chip inductors, respectively. A chip inductor refers to an SMD that constitutes an inductor. In addition, mounting of a plurality of inductors is not limited to chip inductors. For example, a plurality of inductors may also be included in an IPD.

[0172] The resistor R51 is mounted as a chip resistor. A chip resistor refers to an SMD that constitutes a resistor. In addition, the mounting of the resistor R51 is not limited to a chip resistor. For example, the resistor R51 may also be included in an IPD.

[0173] The plurality of capacitors, the plurality of inductors, and the plurality of resistors arranged on the main surface 90 a are grouped by circuit and arranged around the integrated circuit 80 .

[0174] Specifically, when the module substrate 90 is viewed from above, the capacitor C61 included in the pre-regulator circuit 10 is arranged in a region on the main surface 90a sandwiched between a straight line along the left side of the integrated circuit 80 and a straight line along the left side of the module substrate 90. Thus, the group of circuit components included in the pre-regulator circuit 10 is arranged near the PR switch section 80a in the integrated circuit 80.

[0175] When the module substrate 90 is viewed from above, the group of capacitors C10 to C16, C20, C30, and C40 included in the switched capacitor circuit 20 is arranged in an area on the main surface 90a sandwiched between a straight line along the upper side of the integrated circuit 80 and a straight line along the upper side of the module substrate 90, and an area on the main surface 90a sandwiched between a straight line along the right side of the integrated circuit 80 and a straight line along the right side of the module substrate 90. Thus, the group of circuit components included in the switched capacitor circuit 20 is arranged near the SC switch section 80b in the integrated circuit 80. In other words, the SC switch section 80b is arranged at a position closer to the switched capacitor circuit 20 than each of the PR switch section 80a and the SM switch section 80c.

[0176] In a plan view of the module substrate 90, the group of capacitors C51 and C52, inductors L51 to L53, and resistor R51 included in the filter circuit 40 is arranged in a region on the main surface 90a sandwiched between a straight line along the lower side of the integrated circuit 80 and a straight line along the lower side of the module substrate 90. Thus, the group of circuit components included in the filter circuit 40 is arranged at a position close to the SM switch section 80c in the integrated circuit 80. In other words, the SM switch section 80c is arranged at a position closer to the filter circuit 40 than the PR switch section 80a and the SC switch section 80b.

[0177] At least a portion of the filter circuit 40 is connected to the same side (in the Figure 7 Specifically, at least one of the circuit components included in the filter circuit 40 (in Figure 7 In the embodiment, capacitor C51, inductor L51 and inductor L53 are arranged adjacent to the lower side of integrated circuit 80.

[0178] The capacitor C71 included in the APT switch circuit 70 is arranged adjacent to the integrated circuit 80 and connected to the integrated circuit 80 via the wiring 90d. In addition, the capacitor C71 is arranged adjacent to the inductor L53 included in the filter circuit 40. In addition, when the module substrate 90 is viewed from above, at least a portion of the capacitor C71 overlaps at least a portion of the pad electrode 150 that functions as the output terminal 141. The capacitor C71 is connected to the pad electrode 150 that functions as the output terminal 141 via the through-hole conductor 90c.

[0179] A plurality of pad electrodes 150 are arranged on the main surface 90b. Figure 2 In addition to the input terminal 110, inductor connection terminals 115 and 116, output terminal 141, and control terminals 601 to 604 shown, it also functions as a plurality of external connection terminals including a ground terminal. The plurality of pad electrodes 150 are electrically connected to the plurality of electronic components arranged on the main surface 90a via through-hole conductors formed in the module substrate 90. Copper electrodes can be used as the plurality of pad electrodes 150, but are not limited to this. For example, solder electrodes can also be used as the plurality of pad electrodes. In addition, a plurality of bump electrodes or a plurality of columnar electrodes can be used as the plurality of external connection terminals instead of the plurality of pad electrodes 150.

[0180] Resin member 91 covers main surface 90a and at least a portion of the plurality of electronic components on main surface 90a. Resin member 91 has a function of ensuring reliability such as mechanical strength and moisture resistance of the plurality of electronic components on main surface 90a. Tracker module 100 may not include resin member 91.

[0181] The shielding electrode layer 92 is an example of a metal layer, for example, a metal thin film formed by a sputtering method. The shielding electrode layer 92 is formed to cover the surface (top and side) of the resin member 91. The shielding electrode layer 92 is connected to the ground line to suppress the intrusion of external noise into the electronic components constituting the tracker module 100, and the noise generated in the tracker module 100 from interfering with other modules or other devices. In addition, the tracker module 100 may not include the shielding electrode layer 92.

[0182] also, Figure 7 to Figure 9 The structure of the tracker module 100 shown is an example and is not limited thereto. For example, a part of the capacitor and the inductor arranged on the main surface 90a may be formed in the module substrate 90. In addition, a part of the capacitor and the inductor arranged on the main surface 90a may not be included in the tracker module 100, and may not be arranged on the module substrate 90.

[0183] [1.5 Effects, etc.]

[0184] As described above, the tracker circuit 1 of the present embodiment comprises: a first switching circuit (e.g., a pre-regulator circuit 10 and a switching capacitor circuit 20), configured to generate a plurality of discrete voltages based on an input voltage; a second switching circuit (e.g., a power supply modulation circuit 30), configured to select at least one voltage from the generated plurality of discrete voltages and output it to the power amplifier 2; a filter circuit 40, connected between the second switching circuit and the power amplifier 2; and a third switching circuit (e.g., an APT switching circuit 70), including a capacitor C71 and a switch S81 connected in series between a voltage supply path P1 and a ground line between the filter circuit 40 and the power amplifier 2.

[0185] According to this, the voltage supply path P1 can be connected to the ground line and disconnected via the capacitor C71 by the switch S81. Therefore, the on / off of the bypass capacitor can be switched according to the characteristics of the power supply voltage supplied to the power amplifier 2 via the voltage supply path P1. For example, when the voltage is supplied in the APT mode, the power supply voltage V APT The stability of the transmission signal is improved, thereby improving the quality of the transmission signal. For example, when the voltage is supplied in the digital ET mode, the power supply voltage V can be suppressed by connecting the voltage supply path P1 to the ground line without passing through the capacitor C71. ETThe tracking performance of the power amplifier 2 is reduced, thereby improving the PAE. And, accordingly, the third switch circuit is connected between the filter circuit 40 and the power amplifier 2. Therefore, the influence of the resistance of the filter circuit 40 on the power amplifier 2 can be reduced, the design of the filter circuit 40 can be made easier, and the degradation of the characteristics of the power amplifier 2 caused by the filter circuit 40 can be suppressed. In addition, according to this, the tracker circuit 1 includes the third switch circuit. Therefore, it is easy to synchronize the switching timing of the on / off of the switch S81 with the switching timing of the tracking mode, and the reduction in the stability or tracking performance of the power supply voltage caused by the delay in the control of the switch S81 can be suppressed.

[0186] For example, in the tracker circuit 1 of the present embodiment, the switch S81 may be connected between the capacitor C71 and the ground.

[0187] Thus, one end of the switch S81 is connected to the ground line. Therefore, the switch S81 can be easily integrated with other switches and the like, which can contribute to miniaturization of the tracker circuit 1.

[0188] In addition, for example, in the tracker circuit 1 of the present embodiment, when at least one voltage is selected based on the APT mode, the switch S81 of the third switch circuit may connect the voltage supply path P1 to the ground via the capacitor C71; and when at least one voltage is selected based on the digital ET mode, the switch S81 of the third switch circuit may connect the voltage supply path P1 to the ground without connecting the capacitor C71.

[0189] According to this, when supplying voltage in the APT mode, the power supply voltage V can be increased by connecting the voltage supply path P1 to the ground via the capacitor C71. APT On the other hand, when the voltage is supplied in the digital ET mode, the power supply voltage V can be suppressed by connecting the voltage supply path P1 to the ground line without passing through the capacitor C71. ET The reduction of tracking performance leads to an increase in PAE.

[0190] For example, in the tracker circuit 1 of this embodiment, the filter circuit 40 may include inductors L51 to L53 and capacitors C51 and C52, and the electrostatic capacitance of the capacitor C71 of the third switch circuit may be larger than the electrostatic capacitance of the capacitor C51 or C52 of the filter circuit.

[0191] According to this, the capacitor C71 having a relatively large electrostatic capacitance can be connected between the voltage supply path P1 and the ground line, so the stability of the power supply voltage can be further improved.

[0192] In addition, the tracker module 100 of the present embodiment includes: a module substrate 90 having main surfaces 90a and 90b facing each other; an output terminal 141 provided on the module substrate 90; a first switch circuit (for example, a pre-regulator circuit 10 and a switch capacitor circuit 20) configured to be arranged on the module substrate 90 and to generate a plurality of discrete voltages based on an input voltage; a second switch circuit (for example, a power modulation circuit 30) configured to be arranged on the module substrate 90 and to select at least one voltage from the generated plurality of discrete voltages and output it to the power amplifier 2 via the output terminal 141; a filter circuit 40 configured on the module substrate 90 and connected between the second switch circuit and the output terminal 141; and a third switch circuit (for example, an APT switch circuit 70) configured on the module substrate 90 and including a capacitor C71 and a switch S81 connected in series, the third switch circuit being connected between a voltage supply path P1 between the filter circuit 40 and the output terminal 141 and a ground line.

[0193] According to this, the voltage supply path P1 can be connected to the ground line and disconnected via the capacitor C71 by the switch S81. Therefore, the on / off of the bypass capacitor can be switched according to the characteristics of the power supply voltage supplied to the power amplifier 2 via the voltage supply path P1. For example, when the voltage is supplied in the APT mode, the power supply voltage V APT The stability of the transmission signal is improved, thereby improving the quality of the transmission signal. For example, when the voltage is supplied in the digital ET mode, the power supply voltage V can be suppressed by connecting the voltage supply path P1 to the ground line without passing through the capacitor C71. ET The tracking performance of the power amplifier 2 is reduced and the PAE is improved. In addition, accordingly, the third switch circuit is connected between the filter circuit 40 and the power amplifier 2. Therefore, the influence of the resistance of the filter circuit 40 on the power amplifier 2 can be reduced, the design of the filter circuit 40 can be made easier, and the degradation of the characteristics of the power amplifier 2 caused by the filter circuit 40 can be suppressed. In addition, according to this, the tracker module 100 includes the third switch circuit. Therefore, it is easy to synchronize the switching timing of the on / off of the switch S81 with the switching timing of the tracking mode, and the reduction in the stability or tracking performance of the power supply voltage caused by the delay in the control of the switch S81 can be suppressed.

[0194] For example, in the tracker module 100 of the present embodiment, the switch S81 may be connected between the capacitor C71 and the ground.

[0195] One end of the switch S81 is connected to the ground line. Therefore, the switch S81 can be easily integrated with other switches and the like, which can contribute to the miniaturization of the tracker module 100.

[0196] For example, in the tracker module 100 of the present embodiment, when at least one voltage is selected based on the APT mode, the switch S81 of the third switch circuit may connect the voltage supply path P1 to the ground via the capacitor C71; and when at least one voltage is selected based on the digital ET mode, the switch S81 of the third switch circuit may connect the voltage supply path P1 to the ground without connecting the capacitor C71.

[0197] According to this, when supplying voltage in the APT mode, the power supply voltage V can be increased by connecting the voltage supply path P1 to the ground via the capacitor C71. APT On the other hand, when the voltage is supplied in the digital ET mode, the power supply voltage V can be suppressed by connecting the voltage supply path P1 to the ground line without passing through the capacitor C71. ET The reduction of tracking performance leads to an increase in PAE.

[0198] For example, in the tracker module 100 of the present embodiment, the filter circuit 40 may include inductors L51 to L53 and capacitors C51 and C52 , and the capacitance of the capacitor C71 of the third switch circuit may be larger than the capacitance of the capacitor C51 or C52 of the filter circuit 40 .

[0199] According to this, the capacitor C71 having a relatively large electrostatic capacitance can be connected between the voltage supply path P1 and the ground line, so the stability of the power supply voltage can be further improved.

[0200] For example, in the tracker module 100 of the present embodiment, the second switch circuit may include switches S51 to S54 , and the switches S51 to S54 of the second switch circuit and the switch S81 of the third switch circuit may be included in one integrated circuit 80 .

[0201] According to this, since the switches S51 to S54 of the second switch circuit and the switch S81 of the third switch circuit are integrated into one integrated circuit 80 , it is possible to contribute to miniaturization of the tracker module 100 .

[0202] For example, in the tracker module 100 of the present embodiment, the integrated circuit 80 may be disposed on the main surface 90 a , and the capacitor C71 of the third switch circuit may be disposed adjacent to the integrated circuit 80 on the main surface 90 a .

[0203] According to this, the capacitor C71 is arranged adjacent to the integrated circuit 80 including the switch S81. Therefore, the wiring 90d connecting the capacitor C71 and the switch S81 can be further shortened, and the resistance, especially the inductance, of the wiring 90d can be reduced. As a result, the characteristic degradation of the capacitor C71 caused by the increase in the resistance of the wiring 90d can be suppressed, and the stability of the power supply voltage based on the capacitor C71 can be further improved.

[0204] For example, in the tracker module 100 of the present embodiment, the filter circuit 40 may include the inductors L51 to L53 and the capacitors C51 and C52 arranged on the main surface 90a, and the capacitor C71 of the third switch circuit may be arranged adjacent to the inductor L53 of the filter circuit 40 on the main surface 90a.

[0205] Accordingly, the capacitor C71 is disposed adjacent to the inductor L53 of the filter circuit 40. Therefore, the wiring connecting the capacitor C71 and the inductor L53 can be further shortened, and the resistance of the wiring, especially the inductance, can be reduced. As a result, the characteristic degradation of the capacitor C71 caused by the increase in the resistance of the wiring can be suppressed, and the stability of the power supply voltage based on the capacitor C71 can be further improved.

[0206] For example, in the tracker module 100 of the present embodiment, the output terminal 141 may be disposed on the main surface 90 b , and at least a portion of the capacitor C71 of the third switch circuit may overlap at least a portion of the output terminal 141 when the module substrate 90 is viewed from above.

[0207] According to this, it is possible to shorten the wiring length between the capacitor C71 and the output terminal 141, which are respectively arranged on the mutually opposing main surfaces 90a and 90b of the module substrate 90. Therefore, it is possible to reduce the resistance of the wiring, especially the inductance, and suppress the degradation of the characteristics of the capacitor C71 caused by the increase in the resistance of the wiring, thereby further improving the stability of the power supply voltage based on the capacitor C71.

[0208] In addition, the voltage supply method of the present embodiment generates a plurality of discrete voltages based on an input voltage (S101), selects at least one voltage from the generated plurality of discrete voltages (S103), filters the selected at least one voltage (S105), switches and connects a voltage supply path P1 for supplying the at least one filtered voltage to the power amplifier 2 to the ground via capacitor C71 (S107), and supplies the at least one filtered voltage to the power amplifier 2 via the voltage supply path P1 (S109).

[0209] According to this, the voltage supply path P1 for supplying at least one voltage after filtering to the power amplifier 2 is switched to be connected to the ground line and connected to the ground line via the capacitor C71. Therefore, the on / off switching of the bypass capacitor can be switched according to the characteristics of the power supply voltage supplied to the power amplifier 2 via the voltage supply path P1. For example, when the voltage is supplied in the APT mode, the power supply voltage V APT The stability of the transmission signal is improved, thereby improving the quality of the transmission signal. For example, when the voltage is supplied in the digital ET mode, the power supply voltage V can be suppressed by connecting the voltage supply path P1 to the ground line without passing through the capacitor C71. ET The reduction of tracking performance leads to an increase in PAE.

[0210] For example, in the power supply voltage supply method of the present embodiment, in the switching between connecting and disconnecting the above-mentioned voltage supply path to the ground via the capacitor (S107), when at least one voltage is selected based on the APT mode (APT of S1071), the switch S81 connected in series with the capacitor C71 between the voltage supply path P1 and the ground is turned on (S1072), and when at least one voltage is selected based on the digital ET mode (D-ET of S1071), the switch S81 is not turned on (S1073).

[0211] According to this, the voltage supply path P1 for supplying at least one voltage after filtering to the power amplifier 2 via the capacitor C71 can be switched between connection and disconnection with the ground line by the switch S81 .

[0212] (Variation Example)

[0213] A modified example of the above embodiment will be described below. This modified example is different from the above embodiment mainly in that the capacitor of the APT switch circuit can be discharged. The APT switch circuit of this modified example will be described below with reference to the drawings.

[0214] Fig.10 is a circuit diagram of the APT switch circuit 70A of this modification. Fig.10 As shown, the APT switch device 70A of the present modification is an example of a third switch circuit, and includes a switch S82 in addition to the capacitor C71 and the switch S81.

[0215] The switch S82 is connected in parallel with the capacitor C71 between the path P1 and the switch S81. Specifically, the switch S82 includes a terminal connected to one end of the capacitor C71 and a terminal connected to the other end of the capacitor C71. In this connection structure, the switch S82 can switch the connection and non-connection of one end and the other end of the capacitor C71 by switching on / off according to the control signal S4. For example, when the switch S81 is off, the capacitor C71 is discharged by turning on the switch S82.

[0216] In addition, the switch S82 may not be switched on / off instantly. For example, the switch S82 may be turned on slowly. Thus, the change in the power supply voltage caused by the turning on of the switch S82 can be suppressed.

[0217] (Other Embodiments)

[0218] The tracker circuit, tracker module, and voltage supply method of the present invention are described above based on the embodiments, but the tracker circuit, tracker module, and voltage supply method of the present invention are not limited to the above embodiments. Other embodiments implemented by combining any constituent elements in the above embodiments, modified examples obtained by implementing various modifications that can be conceived by those skilled in the art to the above embodiments without departing from the gist of the present invention, and various devices in which the above tracker circuit is built-in are also included in the present invention.

[0219] For example, in the circuit configurations of the various circuits of the above embodiments, other circuit elements and wirings may be inserted between the paths connecting the circuit elements and signal paths disclosed in the drawings. For example, an impedance matching circuit may be inserted between the power amplifier 2 and the filter 3.

[0220] In addition, in the above embodiment, the tracker circuit supplies voltage to one power amplifier, but it may also supply voltage to multiple power amplifiers. In this case, the same voltage may be supplied to the multiple power amplifiers, or different voltages may be supplied. For example, in the case of supplying different voltages to two power amplifiers, Fig.11 As shown, the tracker circuit 1 may also include a pre-regulator circuit 10, a switched capacitor circuit 20, two power supply modulation circuits 30 connected to the switched capacitor circuit 20, two filter circuits 40 respectively connected to the two power supply modulation circuits 30, and two APT switch circuits 70 respectively connected to the two filter circuits 40. Accordingly, the pre-regulator circuit 10 and the switched capacitor circuit 20 can be shared by two power amplifiers 2, and an increase in the number of components can be suppressed.

[0221] In addition, in the above-mentioned embodiment, a plurality of discrete voltages are supplied from the switched capacitor circuit to the power modulation circuit, but the present invention is not limited thereto. For example, a plurality of voltages may be supplied from a plurality of DCDC converters, respectively. In addition, when the voltage levels of the plurality of discrete voltages are equally spaced, it is preferred to use a switched capacitor circuit, which is effective for miniaturization of the tracker module.

[0222] In the above embodiment, four discrete voltages are supplied, but the number of discrete voltages is not limited to 4. For example, PAE can be improved as long as the plurality of discrete voltages includes at least a voltage corresponding to the maximum output power and a voltage corresponding to the output power with the highest generation frequency.

[0223] In the above embodiment, the plurality of circuit components of the tracker circuit 1 are arranged on the main surface 90a of the module substrate, but they may be arranged on both the main surfaces 90a and 90b. In this case, for example, the integrated circuit 80 may be arranged on the main surface 90b.

[0224] In addition, in the above-mentioned embodiment, the control of the APT switch circuit 70 is described by taking the two tracking modes of the APT mode and the digital ET mode as examples, but the tracking modes that the tracker circuit 1 can cope with are not limited to the APT mode and the digital ET mode. For example, the tracker circuit 1 can also cope with the SPT mode and the digital ET mode. In this case, the APT switch circuit 70 can also make the switch S81 conductive (that is, turned on) in the SPT mode, and make the switch S81 non-conductive (that is, turned off) in the digital ET mode. Thus, the stability of the power supply voltage in the SPT mode can be improved, and the reduction in the tracking performance of the power supply voltage in the digital ET mode can be suppressed. For another example, the tracker circuit 1 can also cope with the APT mode and the SPT mode. In this case, the APT switch circuit 70 can also make the switch S81 conductive in the SPT mode, and make the switch S81 non-conductive in the SPT mode. Thus, the stability of the power supply voltage in the APT mode can be improved, and the reduction in the tracking performance of the power supply voltage in the SPT mode can be suppressed.

[0225] Features of the tracker circuit, the tracker module, and the voltage supply method described based on the above-mentioned embodiments are described below.

[0226] <1> A tracker circuit comprising:

[0227] A first switch circuit configured to generate a plurality of discrete voltages based on an input voltage;

[0228] A second switch circuit is configured to select at least one voltage from the generated plurality of discrete voltages and output the selected voltage to the amplifier;

[0229] a filter circuit connected between the second switch circuit and the amplifier; and

[0230] The third switch circuit includes a capacitor and a switch connected in series between a voltage supply path and a ground line, wherein the voltage supply path is between the filter circuit and the amplifier.

[0231] <2> According to the tracker circuit described in <1>,

[0232] In the third switch circuit, the switch is connected between the capacitor and a ground line.

[0233] <3> According to the tracker circuit described in <1> or <2>,

[0234] When the at least one voltage is selected based on the APT mode or the SPT mode, the switch of the third switch circuit connects the voltage supply path to the ground via the capacitor.

[0235] When the at least one voltage is selected based on the digital ET mode, the switch of the third switch circuit connects the voltage supply path to the ground without the capacitor.

[0236] <4> A tracker circuit according to any one of <1> to <3>,

[0237] The filter circuit includes an inductor and a capacitor.

[0238] The electrostatic capacitance of the capacitor of the third switch circuit is larger than the electrostatic capacitance of the capacitor of the filter circuit.

[0239] <5> A tracker module, comprising:

[0240] The module substrate has a first main surface and a second main surface facing each other;

[0241] External connection terminals are provided on the module substrate;

[0242] A first switch circuit is configured to be disposed on the module substrate and to generate a plurality of discrete voltages based on an input voltage;

[0243] A second switch circuit is configured to be arranged on the module substrate, select at least one voltage from the generated plurality of discrete voltages, and output it to the amplifier via the external connection terminal;

[0244] a filter circuit, disposed on the module substrate and connected between the second switch circuit and the external connection terminal; and

[0245] The third switch circuit is disposed on the module substrate and includes a capacitor and a switch connected in series.

[0246] The third switch circuit is connected between a voltage supply path between the filter circuit and the external connection terminal and a ground line.

[0247] <6> According to the tracker module described in <5>,

[0248] In the third switch circuit, the switch is connected between the capacitor and a ground line.

[0249] <7> The tracker module according to <5> or <6>,

[0250] When the at least one voltage is selected based on the APT mode or the SPT mode, the switch of the third switch circuit connects the voltage supply path to the ground via the capacitor.

[0251] When the at least one voltage is selected based on the digital ET mode, the switch of the third switch circuit connects the voltage supply path to the ground without the capacitor.

[0252] <8> The tracker module according to any one of <5> to <7>,

[0253] The filter circuit includes an inductor and a capacitor.

[0254] The electrostatic capacitance of the capacitor of the third switch circuit is larger than the electrostatic capacitance of the capacitor of the filter circuit.

[0255] <9> A tracker module according to any one of <5> to <8>,

[0256] The second switch circuit comprises a switch,

[0257] The switch of the second switch circuit and the switch of the third switch circuit are included in one integrated circuit.

[0258] <10> According to the tracker module described in <9>,

[0259] The integrated circuit is arranged on the first main surface.

[0260] The capacitor of the third switch circuit is arranged on the first main surface adjacent to the integrated circuit.

[0261] <11> The tracker module according to any one of <5> to <10>,

[0262] The filter circuit includes an inductor and a capacitor arranged on the first main surface.

[0263] The capacitor of the third switch circuit is arranged adjacent to at least one of the inductor of the filter circuit and the capacitor on the first main surface.

[0264] <12> A tracker module according to any one of <5> to <11>,

[0265] The external connection terminal is arranged on the second main surface.

[0266] At least a portion of the capacitor of the third switch circuit overlaps with at least a portion of the external connection terminal in a plan view of the module substrate.

[0267] <13> A voltage supply method,

[0268] Generate multiple discrete voltages based on the input voltage.

[0269] Selecting at least one voltage from the generated plurality of discrete voltages,

[0270] filtering the selected at least one voltage,

[0271] Switching to make the noise component contained in the at least one voltage after filtering fall to the ground or not fall to the ground,

[0272] The at least one voltage after filtering is supplied to the amplifier via a voltage supply path.

[0273] <14> According to the voltage supply method described in <13>,

[0274] In switching between connecting and disconnecting the voltage supply path to the ground via the capacitor,

[0275] When the at least one voltage is selected based on the APT mode or the SPT mode, a switch connected in series with the capacitor between the voltage supply path and the ground line is turned on,

[0276] When the at least one voltage is selected based on the digital ET mode, the switch is not turned on.

[0277] The present invention can be widely used in communication devices such as mobile phones as a tracker circuit for supplying voltage to a power amplifier.

[0278] Description of Reference Numerals

[0279] 1…tracker circuit, 2…power amplifier, 3…filter, 4…PA control circuit, 5…RFIC, 6…high frequency circuit, 7…antenna, 8…communication device, 10…pre-regulator circuit, 20…switched capacitor circuit, 30…power supply modulation circuit, 40…filter circuit, 50…DC power supply, 60…digital control circuit, 61…first controller, 62…second controller, 70, 70A…APT switch circuit, 80…integrated circuit, 80a…PR switch section, 80b…SC switch section, 80c…SM switch section, 80d…APT switch section, 90…module substrate, 90a, 90b…main surface, 90c…through-hole conductor, 90d…wiring, 90e…ground electrode layer, 91…resin component, 92…shield electrode layer, 100…tracker module, 110, 131, 132, 133, 134, 140…input terminal, 111, 130, 14 1…output terminal, 115, 116…inductor connection terminal, 150…pad electrode, 601, 602, 603, 604…control terminal, C10, C11, C12, C13, C14, C15, C16, C20, C30, C40, C51, C52, C61, C71…capacitor, L51, L52, L53…inductor, L71…power inductor, N1, N2, N3, N4…node , P1…voltage supply path, R51…resistance, S1, S2, S3, S4…control signal, S11, S12, S13, S14, S21, S22, S23, S24, S31, S32, S33, S34, S41, S42, S43, S44, S51, S52, S53, S54, S61, S62, S71, S72, S81…switch, V1, V2, V3, V4…voltage, V ET 、V APT …supply voltage.

Claims

1. A tracker circuit, wherein: have: A first switch circuit configured to generate a plurality of discrete voltages based on an input voltage; A second switch circuit is configured to select at least one voltage from the generated plurality of discrete voltages and output the selected voltage to the amplifier; a filter circuit connected between the second switch circuit and the amplifier; and The third switch circuit includes a capacitor and a switch connected in series between a voltage supply path and a ground line, wherein the voltage supply path is between the filter circuit and the amplifier.

2. The tracker circuit according to claim 1, wherein: In the third switch circuit, the switch is connected between the capacitor and a ground line.

3. The tracker circuit according to claim 1 or 2, wherein: When the at least one voltage is selected based on the APT mode or the SPT mode, the switch of the third switch circuit connects the voltage supply path to the ground via the capacitor. When the at least one voltage is selected based on the digital ET mode, the switch of the third switch circuit connects the voltage supply path to the ground without the capacitor.

4. The tracker circuit according to any one of claims 1 to 3, wherein: The filter circuit includes an inductor and a capacitor. The electrostatic capacitance of the capacitor of the third switch circuit is larger than the electrostatic capacitance of the capacitor of the filter circuit.

5. A tracker module, wherein: have: The module substrate has a first main surface and a second main surface facing each other; External connection terminals are provided on the module substrate; A first switch circuit is configured to be disposed on the module substrate and to generate a plurality of discrete voltages based on an input voltage; A second switch circuit is configured to be arranged on the module substrate, select at least one voltage from the generated plurality of discrete voltages, and output it to the amplifier via the external connection terminal; a filter circuit, disposed on the module substrate and connected between the second switch circuit and the external connection terminal; and The third switch circuit is disposed on the module substrate and includes a capacitor and a switch connected in series. The third switch circuit is connected between a voltage supply path between the filter circuit and the external connection terminal and a ground line.

6. The tracker module of claim 5, wherein: In the third switch circuit, the switch is connected between the capacitor and a ground line.

7. The tracker module according to claim 5 or 6, wherein: When the at least one voltage is selected based on the APT mode or the SPT mode, the switch of the third switch circuit connects the voltage supply path to the ground via the capacitor. When the at least one voltage is selected based on the digital ET mode, the switch of the third switch circuit connects the voltage supply path to the ground without the capacitor.

8. The tracker module according to any one of claims 5 to 7, wherein: The filter circuit includes an inductor and a capacitor. The electrostatic capacitance of the capacitor of the third switch circuit is larger than the electrostatic capacitance of the capacitor of the filter circuit.

9. The tracker module according to any one of claims 5 to 8, wherein: The second switch circuit comprises a switch, The switch of the second switch circuit and the switch of the third switch circuit are included in one integrated circuit.

10. The tracker module of claim 9, wherein: The integrated circuit is arranged on the first main surface. The capacitor of the third switch circuit is arranged on the first main surface adjacent to the integrated circuit.

11. The tracker module according to any one of claims 5 to 10, wherein: The filter circuit includes an inductor and a capacitor arranged on the first main surface. The capacitor of the third switch circuit is arranged adjacent to at least one of the inductor of the filter circuit and the capacitor on the first main surface.

12. The tracker module according to any one of claims 5 to 11, wherein: The external connection terminal is arranged on the second main surface. At least a portion of the capacitor of the third switch circuit overlaps with at least a portion of the external connection terminal in a plan view of the module substrate.

13. A voltage supply method, wherein: Generate multiple discrete voltages based on the input voltage. Selecting at least one voltage from the generated plurality of discrete voltages, Filtering the selected at least one voltage switching between connecting and disconnecting a voltage supply path for supplying the at least one voltage after filtering to the amplifier via a capacitor to a ground line, The at least one voltage after filtering is supplied to an amplifier via the voltage supply path.

14. The voltage supply method according to claim 13, wherein: In switching between connecting and disconnecting the voltage supply path to the ground via the capacitor, When the at least one voltage is selected based on the APT mode or the SPT mode, a switch connected in series with the capacitor between the voltage supply path and the ground line is turned on, When the at least one voltage is selected based on the digital ET mode, the switch is not turned on.

Citation Information

Patent Citations

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