Filter, preparation method thereof and electronic equipment

Abstract

The invention provides a filter, a preparation method thereof and electronic equipment, and belongs to the technical field of passive devices. The filter comprises a dielectric substrate, at least one inductor and at least one capacitor, wherein the at least one inductor and the at least one capacitor are integrated on the dielectric substrate; the filter further comprises a first auxiliary function layer arranged on the side, away from the second conductive structure of the inductor, of the dielectric substrate. The first auxiliary functional layer is provided with a first accommodating part and a second accommodating part which penetrate through the first auxiliary functional layer in the thickness direction; the first containing part is filled with a first pole plate of the capacitor, the second containing part is filled with a first conductive structure of the inductor, and the surfaces, away from the dielectric substrate, of the first pole plate and the first conductive structure are flush with the surface, away from the dielectric substrate, of the first auxiliary function layer.

Description

Filter and preparation method thereof, and electronic equipment Technical Field

[0001] The present disclosure belongs to the technical field of passive devices, and particularly relates to a filter, a preparation method thereof, and an electronic device. Background Art

[0002] The contemporary consumer electronics industry is rapidly evolving, with mobile communication terminals, particularly 5G phones, experiencing rapid growth. Mobile phones are required to process an increasing number of signal frequency bands, and the number of RF chips required is also increasing. Consumer-favored mobile phone designs are increasingly trending towards miniaturization, thinness, and longer battery life. Traditional mobile phones often feature a large number of discrete components on RF PCBs, such as resistors, capacitors, inductors, and filters. These components suffer from large size, high power consumption, numerous solder joints, and significant parasitic parameter variation, making them difficult to meet future demands. The interconnection and matching between RF chips require integrated passive components that are compact, high-performance, and highly consistent. Currently, the integrated passive components on the market are primarily based on Si (silicon) and GaAs (gallium arsenide) substrates. Si-based integrated passive components offer the advantage of low cost, but inherent trace impurities (poor insulation) in Si lead to high microwave loss and mediocre performance. GaAs-based integrated passive components offer excellent performance but are expensive.

[0003] Summary of the Invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art and provides a filter and a preparation method thereof, and an electronic device.

[0005] An embodiment of the present disclosure provides a filter comprising a dielectric substrate, at least one inductor and at least one capacitor integrated on the dielectric substrate; the dielectric substrate having a first connecting via extending through the dielectric substrate along its thickness; the inductor comprising a first conductive structure, a second conductive structure, and a first connecting electrode; the first conductive structure and the second conductive structure being located on opposite sides of the dielectric substrate along its thickness; the first connecting electrode being disposed within the first connecting via, the first conductive structure being electrically connected to the second conductive structure via the first connecting electrode to form a coil structure of the inductor; the capacitor comprising a first electrode plate and a second electrode plate; the first electrode plate being disposed on the same layer as the first conductive structure, and the second electrode plate being located on a side of the first electrode plate facing away from the dielectric substrate;

[0006] The filter further includes a first auxiliary functional layer disposed on a side of the dielectric substrate facing away from the second conductive structure; the first auxiliary functional layer has a first accommodating portion and a second accommodating portion extending through the first auxiliary functional layer along its thickness; the first electrode is filled in the first accommodating portion, the first conductive structure is filled in the second accommodating portion, and surfaces of the first electrode and the first conductive structure facing away from the dielectric substrate are both flush with a surface of the first auxiliary functional layer facing away from the dielectric substrate.

[0007] Wherein, the material of the first auxiliary functional layer is an inorganic insulating material.

[0008] Wherein, the first auxiliary functional layer and the dielectric substrate are an integrally formed structure.

[0009] The filter further includes a second auxiliary functional layer disposed on a side of the dielectric substrate facing away from the first conductive structure; the second auxiliary functional layer has a third accommodating portion extending through the dielectric substrate along its thickness direction, the second conductive structure fills the third accommodating portion, and a surface of the second conductive structure facing away from the dielectric substrate is flush with a surface of the second auxiliary functional layer facing away from the electrode plate of the dielectric substrate.

[0010] Wherein, the material of the second auxiliary functional layer is an inorganic insulating material.

[0011] Wherein, the second auxiliary functional layer and the dielectric substrate are an integrally formed structure.

[0012] A first interlayer dielectric layer is provided between the layer where the first electrode plate is located and the layer where the second electrode plate is located; the filter further includes a third auxiliary functional layer located on a side of the first interlayer dielectric layer facing away from the dielectric substrate; the third auxiliary functional layer has a fourth accommodating portion extending through the thickness direction thereof, the second electrode plate is filled in the fourth accommodating portion, and the second electrode plate faces away from the surface of the dielectric substrate and is flush with the surface of the third auxiliary functional layer facing away from the dielectric substrate.

[0013] The filter further includes a second interlayer dielectric layer arranged on a side of the second plate of the capacitor facing away from the dielectric substrate, and a second connecting electrode and a third connecting electrode arranged on a side of the second interlayer dielectric layer facing away from the dielectric substrate; the second connecting electrode is electrically connected to the inductor through a second connecting via; and the third connecting electrode is electrically connected to the second plate of the capacitor through a third connecting via.

[0014] A first protective layer and a first planarization layer are sequentially provided on the side of the second connection electrode and the third connection electrode facing away from the dielectric substrate; the first connection pad is electrically connected to the second connection electrode through a fourth connection via, and the second connection pad is electrically connected to the third connection electrode through a fifth connection via; and the fourth connection via and the fifth connection via both penetrate the first protective layer and the first planarization layer.

[0015] Wherein, the filter further includes a second protection layer and a second planarization layer which are sequentially arranged on a side of the second conductive structure away from the dielectric substrate.

[0016] Wherein, the dielectric substrate includes a glass substrate.

[0017] An embodiment of the present disclosure provides a method for manufacturing a filter, comprising: providing a dielectric substrate, and integrating at least one inductor and at least one capacitor on the dielectric substrate; wherein the step of integrating at least one inductor and at least one capacitor on the dielectric substrate comprises:

[0018] Providing a dielectric substrate, wherein the dielectric substrate has a first connecting via hole penetrating along a thickness direction thereof;

[0019] forming a first auxiliary functional layer on the dielectric substrate, wherein the first auxiliary functional layer has a first accommodating portion and a second accommodating portion extending through the first auxiliary functional layer in a thickness direction thereof;

[0020] A first connection electrode of the inductor is formed in the first connection via, and a first conductive film layer is formed on a side of the dielectric substrate facing away from the first auxiliary layer. The first conductive film layer is polished flat by CMP to form a first conductive structure of the inductor and a first electrode plate of the capacitor. A second conductive structure of the inductor is formed on a side of the dielectric substrate facing away from the first conductive structure. The first conductive structure is electrically connected to the second conductive structure via the first connection electrode to form a coil structure of the inductor. The first electrode plate is filled in the first accommodating portion, and the first conductive structure is filled in the second accommodating portion. Surfaces of the first electrode plate and the first conductive structure facing away from the dielectric substrate are both flush with a surface of the first auxiliary functional layer facing away from the dielectric substrate.

[0021] Wherein, the material of the first auxiliary functional layer is an inorganic insulating material.

[0022] Wherein, the first auxiliary functional layer and the dielectric substrate are an integrally formed structure.

[0023] The filter preparation method further includes forming a second auxiliary functional layer on a side of the dielectric substrate facing away from the first conductive structure; the second auxiliary functional layer has a third accommodating portion extending through the dielectric substrate along its thickness direction, the second conductive structure fills the third accommodating portion, and a surface of the second conductive structure facing away from the dielectric substrate is flush with a surface of the second auxiliary functional layer facing away from the electrode plate of the dielectric substrate.

[0024] Wherein, the material of the second auxiliary functional layer is an inorganic insulating material.

[0025] Wherein, the second auxiliary functional layer and the dielectric substrate are an integrally formed structure.

[0026] The forming of the capacitor further includes sequentially forming a first interlayer dielectric layer and a second electrode plate on the layer where the first electrode plate is located; and before forming the second electrode plate, further includes:

[0027] The filter further includes a third auxiliary functional layer located on a side of the first interlayer dielectric layer facing away from the dielectric substrate; the third auxiliary functional layer has a fourth accommodating portion extending through the third auxiliary functional layer along its thickness direction, the second electrode plate is filled in the fourth accommodating portion, and the second electrode plate faces away from the surface of the dielectric substrate and is flush with the surface of the third auxiliary functional layer facing away from the dielectric substrate.

[0028] The filter preparation method further includes: forming a second interlayer dielectric layer on the side of the second plate of the capacitor facing away from the dielectric substrate, and forming a second connecting electrode and a third connecting electrode on the side of the second interlayer dielectric layer facing away from the dielectric substrate; the second connecting electrode is electrically connected to the inductor through a second connecting via; and the third connecting electrode is electrically connected to the second plate of the capacitor through a third connecting via.

[0029] A first protective layer and a first planarization layer are sequentially formed on the side of the second connection electrode and the third connection electrode facing away from the dielectric substrate; the first connection pad is electrically connected to the second connection electrode through a fourth connection via, and the second connection pad is electrically connected to the third connection electrode through a fifth connection via; and the fourth connection via and the fifth connection via both penetrate the first protective layer and the first planarization layer.

[0030] The filter preparation method further includes sequentially forming a second protective layer and a second planarization layer on a side of the second conductive structure away from the dielectric substrate.

[0031] Wherein, the dielectric substrate includes a glass substrate.

[0032] An embodiment of the present disclosure provides an electronic device, comprising any of the filters described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] FIG1 is a top view of an inductor according to an embodiment of the present disclosure.

[0034] FIG2 is a filter circuit diagram.

[0035] FIG3 is a cross-sectional view of a filter according to an embodiment of the present disclosure.

[0036] FIG4 is a schematic diagram of an intermediate product formed in step S11 of the method for preparing a filter according to the first example of an embodiment of the present disclosure.

[0037] FIG5 is a schematic diagram of an intermediate product formed in step S12 of the method for preparing a filter according to the first example of an embodiment of the present disclosure.

[0038] FIG6 is a schematic diagram of an intermediate product formed in step S13 of the method for preparing a filter according to the first example of an embodiment of the present disclosure.

[0039] FIG7 is a schematic diagram of an intermediate product formed in step S14 of the method for preparing the first example filter according to an embodiment of the present disclosure.

[0040] FIG8 is a schematic diagram of an intermediate product formed in step S15 of the method for preparing a filter according to the first example of an embodiment of the present disclosure.

[0041] FIG9 is a schematic diagram of an intermediate product formed in step S16 of the method for preparing the first example filter according to an embodiment of the present disclosure.

[0042] FIG10 is a schematic diagram of an intermediate product formed in step S17 of the method for preparing the first example filter according to an embodiment of the present disclosure.

[0043] FIG11 is a schematic diagram of an intermediate product formed in step S18 of the method for preparing the first example filter according to an embodiment of the present disclosure.

[0044] FIG12 is a schematic diagram of an intermediate product formed in step S19 of the method for preparing the first example filter according to an embodiment of the present disclosure.

[0045] FIG13 is a schematic diagram of an intermediate product formed in step S110 of the method for preparing a filter according to the first example of an embodiment of the present disclosure.

[0046] FIG14 is a schematic diagram of an intermediate product formed in step S111 of the method for preparing a filter according to the first example of an embodiment of the present disclosure.

[0047] FIG15 is a cross-sectional view of a second example filter according to an embodiment of the present disclosure.

[0048] FIG16 is a cross-sectional view of a dielectric substrate of a second example of a filter according to an embodiment of the present disclosure.

[0049] FIG17 is a cross-sectional view of a filter according to a third example of an embodiment of the present disclosure.

[0050] FIG18 is a cross-sectional view of a dielectric substrate of a filter according to a third example of an embodiment of the present disclosure.

[0051] FIG19 is a cross-sectional view of a filter according to a fourth example of an embodiment of the present disclosure.

[0052] FIG20 is a cross-sectional view of a filter according to a fifth example of an embodiment of the present disclosure. DETAILED DESCRIPTION

[0053] In order to enable those skilled in the art to better understand the technical solution of the present invention, the present invention is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0054] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by people with ordinary skills in the field to which this disclosure belongs. The words "first", "second" and similar words used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one", "an" or "the" do not indicate a quantity limitation, but rather indicate the existence of at least one. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0055] Figure 1 is a top view of an inductor according to an embodiment of the present disclosure. Referring to Figure 1 , each first conductive structure 21 of the inductor extends along a first direction and is arranged side by side along a second direction. Each second conductive structure 22 of the inductor extends along a third direction and is arranged side by side along the second direction. The first, second, and third directions are all different directions. In this embodiment, the first and second directions are perpendicular to each other, and the first and third directions intersect and are arranged non-perpendicularly. Of course, the extension directions of the first and second conductive structures 21, 22 can also be interchanged, and remain within the scope of the present embodiment. Furthermore, in this embodiment, an inductor comprising N first conductive structures 21 and N-1 second conductive structures 22 is used as an example, where N ≥ 2 and N is an integer. The first and second ends of each first conductive structure 21 at least partially overlap with the orthographic projection of a first connecting via on the first dielectric substrate. Furthermore, the first and second ends of each first conductive structure 21 correspond to different first connecting vias, meaning that the orthographic projections of two first connecting vias on the first dielectric substrate at least partially overlap. At this time, the first end of the i-th second conductive structure 22 of the inductor is connected to the first end of the i-th first conductive structure 21 and the second end of the i+1-th first conductive structure 21 through the first connecting electrode 11 in the first connecting via to form an inductor coil, where 1≤i≤N-1, and i is an integer.

[0056] It should be noted that the first lead end 23 is connected to the second end of the first first conductive structure 21 of the inductor coil, and the second lead end 24 is connected to the first end of the Nth first conductive structure 21. Furthermore, the first lead end 23 and the second lead end 24 can be provided on the same layer as the second conductive structure 22 and made of the same material. In this case, the first lead end 23 can be connected to the second end of the first first conductive structure 21 via the first connection electrode 11, and correspondingly, the second lead end 24 can be connected to the first end of the Nth first conductive structure 21 via the first connection via 11.

[0057] Figure 2 is a diagram of a filter circuit. As shown in Figure 2 , the filter circuit includes two inductors, a capacitor, and a resistor. For ease of understanding, the two inductors are referred to as the first inductor L1 and the second inductor L2. Continuing with Figure 2 , the first lead end of the first inductor L1 is connected to the first end of the resistor R, the second lead end of the first inductor is connected to the second plate of the capacitor C, the first lead end of the second inductor L2 is connected to the first end of the resistor R, and the second lead end of the second inductor L2 is connected to the first plate of the capacitor C.

[0058] It should be noted that the resistor R can be implemented by a wire, or a high-resistance material such as indium tin oxide (ITO) or nickel-chromium (NiCr) alloy. In the embodiments of the present disclosure, the formation of the resistor R is not limited, and the following mainly introduces the capacitor and inductor.

[0059] Figure 3 is a cross-sectional view of a filter according to an embodiment of the present disclosure. As shown in Figure 3, the present disclosure provides a filter comprising a dielectric substrate 10, and at least one inductor and at least one capacitor integrated on the dielectric substrate 10. The dielectric substrate 10 has a first connection via 101 extending through its thickness. The dielectric substrate 10 includes a first surface and a second surface disposed opposite each other along its thickness. The inductor comprises a first conductive structure 21 disposed on the first surface of the dielectric substrate 10, a second conductive structure 22 disposed on the second surface of the dielectric substrate 10, and a first connection electrode 11 located within the first connection via 101. The first conductive structure 21 is electrically connected to the second conductive structure 22 via the first connection electrode 11 to form a coil structure. The first plate 31 of the capacitor is disposed on the same layer as the first conductive structure 21 of the inductor and is made of the same material. For example, the first conductive structure 21 of the inductor is formed by electroplating a first seed layer, while the first plate 31 of the capacitor is obtained by processing the first seed layer. The second plate 32 of the capacitor is located on the side of the first plate 31 facing away from the dielectric substrate 10, and a first interlayer dielectric layer 4 is provided between the first plate 31 and the second plate 32, serving as the capacitor's dielectric layer. Specifically, a first auxiliary functional layer 100 is provided on the first surface of the dielectric substrate 10 in the disclosed embodiment. The first auxiliary functional layer 100 has a first accommodating portion 1001 and a second accommodating portion 1002 extending through the thickness of the first plate 31 of the capacitor, and the first conductive structure 21 of the inductor fills the second accommodating portion 1002. The first plate 31 and the first conductive structure 21, facing away from the surface of the dielectric substrate 10, are both flush with the surface of the first auxiliary functional layer 100 facing away from the dielectric substrate 10.

[0060] It should be noted that, in the embodiment of the present disclosure, the first conductive structure 21 of the inductor and the first electrode 31 of the capacitor are obtained by electroplating the first seed layer and then performing CMP polishing treatment as an example.

[0061] In the embodiment of the present disclosure, since the first auxiliary functional layer 100 is formed on the first surface of the dielectric substrate 10, and the first auxiliary functional layer 100 has a first accommodating portion 1001 and a second accommodating portion 1002 extending along its thickness direction, a first conductive film layer can be formed after the first auxiliary functional layer 100 is formed, and the first conductive film layer is used as a first seed layer. The first seed layer is then electroplated. At this time, the first seed layer fills the first accommodating portion 1001 and the second accommodating portion 1002 and protrudes from the first accommodating portion 1001 and the second accommodating portion 1002. Finally, based on the first auxiliary functional layer 100 as a reference, the first seed layer (the surface of the first seed layer is rough) is polished by CMP to form the first electrode 31 of the capacitor and the first conductive structure 21 of the inductor. In this case, the surface of the first electrode 31 of the capacitor is flat, and the subsequently formed first interlayer dielectric layer 4 and the second electrode plate 32 are also relatively flat, thereby effectively improving the uniformity of the capacitor.

[0062] In some examples, not only is the first auxiliary functional layer 100 formed on the first surface of the dielectric substrate 10, but a second auxiliary functional layer 200 can also be formed on the second surface of the dielectric substrate 10. The second auxiliary functional layer 200 has a third accommodating portion 2001 extending through its thickness. The second conductive structure 22 of the inductor is filled in the third accommodating portion 2001, and the surface of the second conductive structure 22 facing away from the dielectric substrate 10 is flush with the surface of the second auxiliary functional layer 200 facing away from the plate of the dielectric substrate 10. Since the second conductive structure 22 of the inductor is generally formed by patterning a second seed layer capacitor, the surface of the conventionally formed second conductive structure 22 of the inductor is rough, affecting the uniformity of the inductor. However, when the second auxiliary functional layer 200 is formed on the second surface of the dielectric substrate 10, the second seed layer can be subjected to a CMP polishing process based on the second auxiliary functional layer 200, thereby making the surface of the second conductive structure 22 of the inductor smooth, thereby improving the uniformity of the inductor.

[0063] In some examples, not only the first auxiliary functional layer 100 and the second auxiliary functional layer 200 described above may be provided, but a third auxiliary functional layer 300 may also be formed on the side of the first interlayer dielectric layer 4 facing away from the dielectric substrate 10. The third auxiliary functional layer 300 has a fourth accommodating portion extending through its thickness. The second electrode plate 32 is filled in the fourth accommodating portion, and the surface of the second electrode plate 32 facing away from the dielectric substrate 10 is flush with the surface of the third auxiliary functional layer 300 facing away from the dielectric substrate 10. In this case, a third conductive film layer is formed on the side of the third auxiliary functional layer 300 facing away from the dielectric substrate 10. The third conductive film layer is then smoothed by CMP using the third auxiliary functional layer 300 as a reference to form the second electrode plate 32 of the capacitor. The surface of the second electrode plate 32 formed in this manner is flat, thereby ensuring smoothness of subsequent film layers.

[0064] The filter in the embodiment of the present disclosure is described in detail below with reference to specific examples and a method for preparing the filter in the specific examples.

[0065] Example 1: As shown in Figure 3, the filter includes a dielectric substrate 10, at least one inductor, and at least one capacitor integrated on the dielectric substrate 10. The dielectric substrate 10 has a first connection via 101 extending through its thickness. The dielectric substrate 10 includes a first surface and a second surface disposed opposite each other along its thickness. The inductor includes a first conductive structure 21 disposed on the first surface of the dielectric substrate 10, a second conductive structure 22 disposed on the second surface of the dielectric substrate 10, and a first connection electrode 11 disposed within the first connection via 101. The first conductive structure 21 is electrically connected to the second conductive structure 22 via the first connection electrode 11 to form a coil structure. The first plate 31 of the capacitor is disposed on the same layer as the first conductive structure 21 of the inductor and is made of the same material. The second plate 32 of the capacitor is located on the side of the first plate 31 facing away from the dielectric substrate 10. A first interlayer dielectric layer 4 is disposed between the first plate 31 and the second plate 32, serving as the capacitor's dielectric layer. A first auxiliary functional layer 100 is disposed on the first surface of the dielectric substrate 10. The first auxiliary functional layer 100 has a first accommodating portion 1001 and a second accommodating portion 1002 extending through its thickness. The first plate 31 of the capacitor fills the first accommodating portion 1001, and the first conductive structure 21 of the inductor fills the second accommodating portion 1002. The surfaces of the first plate 31 and the first conductive structure 21 facing away from the dielectric substrate 10 are both flush with the surface of the first auxiliary functional layer 100 facing away from the dielectric substrate 10. A second interlayer dielectric layer 5 is disposed on the side of the second plate 32 of the capacitor facing away from the dielectric substrate 10. A second connecting electrode 6261 and a third connecting electrode are disposed on the side of the second interlayer dielectric layer 5 facing away from the dielectric substrate 10. The second connecting electrode 6261 is electrically connected to the inductor through a second connecting via 51; the third connecting electrode is electrically connected to the second plate 32 of the capacitor through a third connecting via 52. The second connecting via 51 penetrates the first interlayer dielectric layer 4, the first auxiliary functional layer 100, and the second interlayer dielectric layer 5; the third connecting electrode penetrates the second interlayer dielectric layer 5. First and second connecting pads 91 and 92 are provided on the first protective layer 7 and the first planarizing layer 8 on the side of the second connecting electrode 6261 and the second connecting electrode 6261 facing away from the dielectric substrate 10, and on the side of the first planarizing layer 8 facing away from the dielectric substrate 10. The first connecting pad 91 is electrically connected to the second connecting electrode 6261 through a fourth connecting via 81, and the second connecting pad 92 is electrically connected to the third connecting electrode through a fifth connecting via 82. The fourth and fifth connecting vias 81 and 82 both penetrate the first protective layer 7 and the first planarizing layer 8. A second protective layer 110 and a second planarizing layer 120 are provided sequentially on the side of the second conductive structure 22 facing away from the dielectric substrate 10.

[0066] In some examples, the dielectric substrate 10 is made of a glass substrate, and the thickness of the glass substrate is about 0.25 mm to 0.3 mm.

[0067] In some examples, the materials of the first auxiliary functional layer 100, the first interlayer dielectric layer 4, and the second interlayer dielectric layer 5 can all be inorganic insulating layers, for example, inorganic insulating layers formed of silicon nitride (SiNx), or inorganic insulating layers formed of silicon oxide (SiO2), or a stacked combination of SiNx inorganic insulating layers and SiO2 inorganic insulating layers.

[0068] In some examples, the material of the first conductive structure 21 , the second conductive structure 22 , the first connection electrode 11 , the second connection electrode 6261 , and the third connection electrode includes, but is not limited to, copper.

[0069] In some examples, the first connection pad 91 and the second connection pad 92 may be solder balls.

[0070] In some examples, the first protective layer 7 is used to prevent water and oxygen from corroding devices formed on the first surface of the dielectric substrate 10, and the second protective layer 110 is used to prevent water and oxygen from corroding devices formed on the second surface of the dielectric substrate 10. The thickness of the first protective layer 7 and the second protective layer 110 are both between 0.4 μm and 0.6 μm; the materials of the first protective layer 7 and the second protective layer 110 can both be inorganic insulating materials. For example, the first protective layer 7 and the second protective layer 110 can be inorganic insulating layers formed of silicon nitride (SiNx), or inorganic insulating layers formed of silicon oxide (SiO2), or a stacked combination of several SiNx inorganic insulating layers and SiO2 inorganic insulating layers. The materials of the first planarization layer 8 and the second planarization layer 120 can both include organic insulating materials, such as resin materials such as polyimide, epoxy resin, acrylic, polyester, photoresist, polyacrylate, polyamide, siloxane, etc. For another example, the organic insulating material includes an elastic material, such as urethane, thermoplastic polyurethane (TPU), etc.

[0071] Next, the preparation method of the first example filter is described, wherein FIG4 is a schematic diagram of the intermediate product formed by step S11 of the preparation method of the first example filter of the embodiment of the present disclosure; FIG5 is a schematic diagram of the intermediate product formed by step S12 of the preparation method of the first example filter of the embodiment of the present disclosure; FIG6 is a schematic diagram of the intermediate product formed by step S13 of the preparation method of the first example filter of the embodiment of the present disclosure; FIG7 is a schematic diagram of the intermediate product formed by step S14 of the preparation method of the first example filter of the embodiment of the present disclosure; FIG8 is a schematic diagram of the intermediate product formed by step S15 of the preparation method of the first example filter of the embodiment of the present disclosure; FIG9 is a schematic diagram of the intermediate product formed by step S16 of the preparation method of the first example filter of the embodiment of the present disclosure; Figure 10 is a schematic diagram of the intermediate product formed by step S17 of the first example filter preparation method of the embodiment of the present disclosure; Figure 11 is a schematic diagram of the intermediate product formed by step S18 of the first example filter preparation method of the embodiment of the present disclosure; Figure 12 is a schematic diagram of the intermediate product formed by step S19 of the first example filter preparation method of the embodiment of the present disclosure; Figure 13 is a schematic diagram of the intermediate product formed by step S110 of the first example filter preparation method of the embodiment of the present disclosure; Figure 14 is a schematic diagram of the intermediate product formed by step S111 of the first example filter preparation method of the embodiment of the present disclosure. The method may specifically include the following steps:

[0072] S11. Provide a dielectric substrate 10. The dielectric substrate 10 includes a first surface and a second surface opposite to each other along its thickness direction. The dielectric substrate 10 has a first connecting via 101 extending through its thickness direction, as shown in FIG4 .

[0073] In some examples, the dielectric substrate 10 includes, but is not limited to, a glass substrate. In the presently disclosed embodiments, a glass substrate is used as an example. Various methods can be used to fabricate the first connecting vias 101 on the dielectric substrate 10, including sandblasting, photosensitive glass etching, focused discharge etching, plasma etching, laser ablation, electrochemical etching, and laser-induced etching. Different methods have different advantages and disadvantages and applicable scopes. For example, the sandblasting method offers the advantage of a simple process. This method produces first connecting vias 101 with a larger aperture, but is only suitable for fabricating first connecting vias 101 with an aperture greater than 200 μm. The photosensitive glass etching method offers the advantage of a simple process and the ability to fabricate high-density, high-aspect-ratio first connecting vias 101. The focused discharge etching method offers the advantage of a high hole-forming speed. Plasma etching produces first connecting vias with low sidewall roughness. Laser ablation offers the advantage of being able to fabricate high-density, high-aspect-ratio first connecting vias 101 with high roughness. The advantages of the electrochemical method are low cost, simple equipment, fast hole-forming rate, and a larger diameter of the first connecting via 101. The advantage of the laser induced etching method is the fast hole-forming rate, the ability to produce high-density, high-aspect-ratio first connecting vias, and no damage to the inside of the through-hole. The disadvantage is that the laser equipment is expensive. Here, laser induced etching is taken as an example, and the laser induced etching method is used to make a rear through-hole on the back. First, a laser is used to induce modification of the position where the first connecting via 101 is to be made, and then a wet etching method is used to make the through-hole. Since the rear through-hole can only be made by a single-sided etching method, the resulting hole can only be an inverted tapered hole. For the laser induced etching drilling method, this single-sided etched inverted tapered hole is a typical feature of the rear through-hole on the back of the first connecting via 101.

[0074] S12 , forming a first connection electrode 11 in the first connection via hole 101 , as shown in FIG. 5 .

[0075] In some examples, in step S12, an auxiliary film layer is formed by a method including but not limited to magnetron sputtering, and then a fifth conductive film layer is continuously sputtered, and the fifth conductive film layer is used as a seed layer, and the seed layer is electroplated. After the electroplating is completed, the excess electroplated copper on the second surface is removed by chemical mechanical polishing (CMP) to form a first connection electrode 11 that fills the first connection via 101.

[0076] The auxiliary film layer serves to enhance the adhesion of the five conductive film layers. Materials for the auxiliary film layer include, but are not limited to, titanium (Ti), while materials for the five conductive film layers include, but are not limited to, copper (Cu). The thickness of the auxiliary film layer ranges from approximately 10 nm to 300 nm, while the thickness of the five conductive film layers ranges from approximately 30 nm to 100 nm.

[0077] S13 , forming a second conductive structure 22 on the first surface of the dielectric substrate 10 , as shown in FIG6 .

[0078] In some examples, step S13 may include: forming a second auxiliary film layer and a second conductive film layer on the second surface of a dielectric substrate 10 using a method including but not limited to magnetron sputtering, the second conductive film layer serving as a second seed layer, and then electroplating the second seed layer, wherein the thickness of the second seed layer after electroplating is generally greater than 5 μm, and then patterning to form the second conductive structure 22 of the inductor.

[0079] The second auxiliary film layer can be a molybdenum (Mo) or nickel (Ni) alloy layer with a thickness of approximately 0.03 μm to 0.05 μm; the second conductive film layer can be a copper (Cu) layer with a thickness of approximately 0.3 μm to 0.5 μm. The second auxiliary film layer is provided to enhance the adhesion of the third conductive film layer.

[0080] S14 , using a standard process such as PECVD to sequentially deposit and form a second protective layer 110 and a second planarization layer 120 , as shown in FIG7 .

[0081] The second protective layer 110 is used to prevent water and oxygen from corroding the devices formed on the first surface of the dielectric substrate 10. The thickness of the second protective layer 110 is 0.4 μm to 0.6 μm. The thickness of the second planarization layer 120 is greater than 2 μm.

[0082] S15 , turning over the dielectric substrate 10 , and forming a first auxiliary functional layer 100 on the first surface of the dielectric substrate 10 . The first auxiliary functional layer 100 has a first accommodating portion 1001 and a second accommodating portion 1002 penetrating along a thickness direction thereof, as shown in FIG8 .

[0083] In some examples, step S15 may include depositing a first auxiliary functional layer 100 using a standard process such as PECVD, and etching to form a first receiving portion 1001 and a second receiving portion 1002. The thickness of the first auxiliary functional layer 100 is approximately 2 to 5 μm, which is the same as the thickness of the first conductive structure 21 of the inductor and the first plate 31 of the capacitor to be formed.

[0084] S16 , forming the first electrode 31 of the capacitor and the first conductive structure 21 of the inductor in the first receiving portion 1001 and the second receiving portion 1002 of the first auxiliary layer, respectively, as shown in FIG9 .

[0085] In some examples, step S16 may include forming a first auxiliary film layer and a first conductive film layer in sequence by means of, but not limited to, magnetron sputtering, using the first conductive film layer as a first seed layer, electroplating the first seed layer, and then CMP-polishing the electroplated first seed layer, leaving only the metal material located in the first accommodating portion 1001 and the second accommodating portion 1002, forming the first electrode 31 of the capacitor and the first conductive structure 21 of the inductor.

[0086] The auxiliary film layer serves to enhance the adhesion of the first conductive film layer. Materials for the first auxiliary film layer include, but are not limited to, titanium (Ti), and materials for the first conductive film layer include, but are not limited to, copper (Cu). The thickness of the first auxiliary film layer is approximately 50 nm to 150 nm, and the thickness of the first conductive film layer is approximately 200 nm to 500 nm.

[0087] S17 , forming a first interlayer dielectric layer 4 on the side of the first conductive structure 21 of the inductor and the first electrode plate 31 of the capacitor facing away from the dielectric substrate 10 , as shown in FIG10 .

[0088] In some examples, step S17 may adopt a standard process such as plasma enhanced chemical vapor deposition (PECVD) to deposit and form the first interlayer dielectric layer 4 .

[0089] S18 , forming a second plate 32 of the capacitor on the side of the first interlayer dielectric layer 4 facing away from the dielectric substrate 10 , as shown in FIG11 .

[0090] In some examples, step S18 may include sequentially depositing a first sub-film layer, a second sub-film layer, and a third sub-film layer using methods including but not limited to magnetron sputtering, spin-coating photoresist on the surface of the third sub-film layer facing away from the dielectric substrate 10, exposing the surface using a corresponding mask, causing the photoresist irradiated with ultraviolet light to denature, and then developing the denatured photoresist to remove the denatured photoresist, and then etching away the copper in the area not protected by the photoresist using a copper etching solution to form a second electrode 32 including a first sub-structure, a second sub-structure, and a third sub-structure arranged in a stacked manner.

[0091] Among them, the first sub-film layer can be a molybdenum (Mo), nickel (Ni), titanium (Ti) alloy layer with a thickness of about 0.03μm to 0.05μm; the second sub-film layer can be a copper (Cu) layer with a thickness of about 0.3μm to 0.5μm; the third sub-film layer can be a Mo, Ni, Ti alloy layer with a thickness of about 0.02μm to 0.05μm.

[0092] S19. A second interlayer dielectric layer 5 is formed on the side of the second plate 32 of the capacitor facing away from the dielectric substrate 10. A second connecting via 51 is formed that penetrates the first interlayer dielectric layer 4 and the second interlayer dielectric layer 5, and a third connecting via 52 is formed that penetrates the second interlayer dielectric layer 5, as shown in FIG12 .

[0093] In some examples, step S19 may include using a standard process such as PECVD to deposit and form a second interlayer dielectric layer 5, and forming a second connecting via 51 passing through the first interlayer dielectric layer 4, the first auxiliary functional layer 100 and the second interlayer dielectric layer 5 by dry etching, as well as a third connecting via 52 passing through the second interlayer dielectric layer 5.

[0094] S110 , forming a second connecting electrode 6261 and a third connecting electrode on a side of the second interlayer dielectric layer 5 facing away from the dielectric substrate 10 , as shown in FIG. 13 .

[0095] In some examples, step S110 may include sequentially forming a third auxiliary film layer and a fourth conductive film layer on a side of the second interlayer dielectric layer 5 facing away from the dielectric substrate 10 using a method including but not limited to magnetron sputtering, using the second conductive film layer as a second seed layer, electroplating the second seed layer, and then patterning the electroplated second conductive film layer and the second auxiliary film layer to form a second connecting electrode 6261 and a third connecting electrode. The second connecting electrode 6261 is connected to the inductor via a second connecting via 51, and the third connecting electrode is connected to the second plate 32 of the capacitor via a third connecting via 52.

[0096] The third auxiliary film layer can be a molybdenum (Mo) or nickel (Ni) alloy layer with a thickness of approximately 0.03 μm to 0.05 μm; the fourth conductive film layer can be a copper (Cu) layer with a thickness of approximately 0.3 μm to 0.5 μm. The third auxiliary film layer is provided to enhance the adhesion of the fourth conductive film layer.

[0097] S111. On the side of the second connection electrode 6261 and the third connection electrode facing away from the dielectric substrate 10, a first protective layer 7 and a first planarization layer 8 are sequentially deposited and formed. A fourth connection via 81 and a fifth connection via 82 are formed through the first protection layer 7 and the first planarization layer 8 by an etching process, as shown in FIG14 .

[0098] The first protective layer 7 is used to prevent water and oxygen from corroding devices formed on the first surface of the dielectric substrate 10. The thickness of the first protective layer 7 is 0.4 μm to 0.6 μm; the thickness of the first planarization layer 8 is greater than 2 μm.

[0099] S112 , forming a first connection pad 91 and a second connection pad 92 ; the first connection pad 91 is connected to the second connection electrode 6261 through the fourth connection via 81 , and the second connection pad 92 is connected to the third connection electrode through the fifth connection via 82 , as shown in FIG. 3 .

[0100] The preparation of the filter according to the embodiment of the present disclosure is now completed.

[0101] Second Example: Figure 15 is a cross-sectional view of a filter according to the second example of the embodiment of the present disclosure; Figure 16 is a cross-sectional view of the dielectric substrate 10 of the filter according to the second example of the embodiment of the present disclosure. As shown in Figures 15 and 16, the structure of this filter is substantially the same as that of the first example, except that in this example, the first auxiliary functional layer 100 and the dielectric substrate 10 are integrally formed. Specifically, the material of the first auxiliary functional layer 100 is glass-based. In other words, the dielectric substrate 10 comprises a first portion, a second portion, and a third portion stacked in sequence from its first surface to its second surface. The third portion of the dielectric substrate 10 serves as the first auxiliary functional layer 100. The third portion of the dielectric substrate 10 comprises a first accommodating portion 1001 and a second accommodating portion 1002 extending through its thickness. The first plate 31 of the capacitor is placed in the first accommodating portion 1001, and the first conductive structure 21 of the inductor is placed in the second accommodating portion 1002. In addition, since the first conductive structure 21 of the inductor needs to be electrically connected to the second conductive structure 22 through the first connection electrode 11 provided in the first connection via 101, it can be understood that the orthographic projections of the second accommodating portion 1002 and the first connection via 101 on the plane where the first surface of the dielectric substrate 10 is located at least partially overlap.

[0102] The remaining structures of the filter in the second example can adopt the same structure as that of the first example, so they will not be repeated here.

[0103] Third Example: Figure 17 is a cross-sectional view of a filter according to the third example of the present disclosure; Figure 18 is a cross-sectional view of the dielectric substrate 10 of the filter according to the third example of the present disclosure. As shown in Figures 17 and 18, this example has a substantially identical structure to the second example, differing only in that it includes not only a first auxiliary functional layer 100 integrally formed with the dielectric substrate 10, but also a second auxiliary functional layer 200 integrally formed with the dielectric substrate 10. The second auxiliary functional layer 200 has a third accommodating portion 2001, and the second conductive structure 22 of the inductor is filled in the second accommodating portion 1002. In other words, the material of the second auxiliary functional layer is glass-based. In other words, the dielectric substrate 10 comprises a first portion, a second portion, and a third portion stacked in sequence from its first surface to its second surface. The first portion of the dielectric substrate 10 serves as the second auxiliary functional layer 200, and the third portion serves as the first auxiliary functional layer 100. The first portion of the dielectric substrate 10 has a third accommodating portion 2001 extending through its thickness. The third portion of the dielectric substrate 10 has a first accommodating portion 1001 and a second accommodating portion 1002 extending through the dielectric substrate 10. The first plate 31 of the capacitor is housed in the first accommodating portion 1001, the first conductive structure 21 of the inductor is housed in the second accommodating portion 1002, and the second conductive structure 22 of the inductor is housed in the third accommodating portion 2001. Furthermore, since the first conductive structure 21 of the inductor is electrically connected to the second conductive structure 22 via the first connection electrode 11 disposed within the first connection via 101, it is understood that the orthographic projections of the second accommodating portion 1002 and the first connection via 101 on the plane of the first surface of the dielectric substrate 10 at least partially overlap, and the orthographic projections of the third accommodating portion 2001 and the first connection via 101 on the plane of the first surface of the dielectric substrate 10 at least partially overlap.

[0104] The remaining structures of the filter in the third example can adopt the same structure as that of the second example, so they will not be repeated here.

[0105] Fourth Example: FIG19 is a cross-sectional view of a filter according to the fourth example of the presently disclosed embodiment. As shown in FIG19 , the filter structure of this example is substantially identical to that of the first example, differing only in that a third auxiliary functional layer 300 is formed on the side of the first interlayer dielectric layer 4 facing away from the dielectric substrate 10. The third auxiliary functional layer 300 has a fourth accommodating portion extending through its thickness. The second electrode 32 is filled in the fourth accommodating portion, and the surface of the second electrode 32 facing away from the dielectric substrate 10 is flush with the surface of the third auxiliary functional layer 300 facing away from the dielectric substrate 10. In this case, a third conductive film layer is formed on the side of the third auxiliary functional layer 300 facing away from the dielectric substrate 10. The third conductive film layer is then smoothed using CMP, using the third auxiliary functional layer 300 as a reference, to form the second electrode 32 of the capacitor. The surface of the second electrode 32 formed at this point is flat, thus ensuring smoothness of subsequent film layers.

[0106] The remaining structures of the filter in the fourth example can adopt the same structure as that of the first example, so they will not be repeated here.

[0107] Fifth Example: FIG20 is a cross-sectional view of a filter according to the fifth example of the presently disclosed embodiment. As shown in FIG20 , the filter structure of this example is substantially identical to that of the third example, differing only in that a third auxiliary functional layer 300 is formed on the side of the first interlayer dielectric layer 4 facing away from the dielectric substrate 10. The third auxiliary functional layer 300 has a fourth accommodating portion extending through its thickness. The second electrode 32 is filled in the fourth accommodating portion, and the surface of the second electrode 32 facing away from the dielectric substrate 10 is flush with the surface of the third auxiliary functional layer 300 facing away from the dielectric substrate 10. In this case, a third conductive film layer is formed on the side of the third auxiliary functional layer 300 facing away from the dielectric substrate 10. The third conductive film layer is then smoothed by CMP using the third auxiliary functional layer 300 as a reference to form the second electrode 32 of the capacitor. The surface of the second electrode 32 formed at this time is flat, thereby ensuring the smoothness of subsequent film layers.

[0108] The remaining structures of the filter in the fifth example can adopt the same structure as that of the third example, so they will not be repeated here.

[0109] An embodiment of the present disclosure provides an electronic device, which may include any of the above filters.

[0110] It will be understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present invention, and the present invention is not limited thereto. Those skilled in the art will appreciate that various modifications and improvements can be made without departing from the spirit and substance of the present invention, and such modifications and improvements are also considered to be within the scope of protection of the present invention.

Claims

1. A filter, comprising a dielectric substrate, at least one inductor and at least one capacitor integrated on the dielectric substrate; the dielectric substrate has a first connecting via hole penetrating along the thickness direction thereof; the inductor comprises a first conductive structure, a second conductive structure and a first connecting electrode; the first conductive structure and the second conductive structure are respectively located at two opposite sides of the dielectric substrate along the thickness direction thereof; the first connecting electrode is arranged in the first connecting via hole, and the first conductive structure is electrically connected to the second conductive structure through the first connecting electrode to form a coil structure of the inductor; the capacitor comprises a first electrode plate and a second electrode plate; the first electrode plate and the first conductive structure are arranged in the same layer, and the second electrode plate is located on a side of the first electrode plate away from the dielectric substrate; The filter also includes a first auxiliary functional layer arranged on a side of the dielectric substrate away from the second conductive structure; the first auxiliary functional layer has a first accommodating portion and a second accommodating portion penetrating along the thickness direction thereof; the first pole plate is filled in the first accommodating portion, the first conductive structure is filled in the second accommodating portion, and the surfaces of the first pole plate and the first conductive structure away from the dielectric substrate are both flush with the surface of the first auxiliary functional layer away from the dielectric substrate.

2. The filter according to claim 1, wherein The material of the first auxiliary functional layer is an inorganic insulating material.

3. The filter according to claim 1, wherein The first auxiliary functional layer and the dielectric substrate are an integrally formed structure.

4. The filter according to claim 1, wherein It also includes a second auxiliary functional layer arranged on a side of the dielectric substrate away from the first conductive structure; the second auxiliary functional layer has a third accommodating portion penetrating along its thickness direction, the second conductive structure fills the third accommodating portion, and the surface of the second conductive structure away from the dielectric substrate is flush with the surface of the second auxiliary functional layer away from the electrode plate of the dielectric substrate.

5. The filter according to claim 4, wherein: The material of the second auxiliary functional layer is an inorganic insulating material.

6. The filter according to claim 4, wherein: The second auxiliary functional layer and the dielectric substrate are integrally formed.

7. The filter according to any one of claims 1 to 6, wherein: A first interlayer dielectric layer is arranged between the layer where the first electrode plate is located and the layer where the second electrode plate is located; the filter also includes a third auxiliary functional layer located on the side of the first interlayer dielectric layer away from the dielectric substrate; the third auxiliary functional layer has a fourth accommodating portion penetrating along the thickness direction thereof, the second electrode plate is filled in the fourth accommodating portion, and the surface of the second electrode plate away from the dielectric substrate is flush with the surface of the third auxiliary functional layer away from the dielectric substrate.

8. The filter according to any one of claims 1 to 6, wherein: It also includes a second interlayer dielectric layer arranged on the side of the second plate of the capacitor away from the dielectric substrate, and a second connecting electrode and a third connecting electrode arranged on the side of the second interlayer dielectric layer away from the dielectric substrate; the second connecting electrode is electrically connected to the inductor through a second connecting via; and the third connecting electrode is electrically connected to the second plate of the capacitor through a third connecting via.

9. The filter according to claim 8, wherein: A first protective layer and a first planarization layer are sequentially arranged on the side of the second connection electrode and the third connection electrode away from the dielectric substrate; the first connection pad is electrically connected to the second connection electrode through a fourth connection via, and the second connection pad is electrically connected to the third connection electrode through a fifth connection via; the fourth connection via and the fifth connection via both penetrate the first protective layer and the first planarization layer.

10. The filter according to any one of claims 1 to 6, wherein: The invention also includes a second protection layer and a second planarization layer which are sequentially arranged on a side of the second conductive structure away from the dielectric substrate.

11. The filter according to any one of claims 1 to 6, wherein: The dielectric substrate includes a glass substrate.

12. A method for preparing a filter, comprising: A dielectric substrate is provided, and at least one inductor and at least one capacitor are integrated on the dielectric substrate; wherein the step of integrating at least one inductor and at least one capacitor on the dielectric substrate comprises: Providing a dielectric substrate, wherein the dielectric substrate has a first connecting via hole penetrating along a thickness direction thereof; forming a first auxiliary functional layer on the dielectric substrate, wherein the first auxiliary functional layer has a first accommodating portion and a second accommodating portion extending through the first accommodating portion in a thickness direction thereof; A first connection electrode of the inductor is formed in the first connection via hole, and a first conductive film layer is formed on a side of the dielectric substrate away from the first auxiliary layer; the first conductive film layer is polished by CMP to form a first conductive structure of the inductor and a first electrode plate of the capacitor, and a second conductive structure of the inductor is formed on a side of the dielectric substrate away from the first conductive structure; the first conductive structure is electrically connected to the second conductive structure through the first connection electrode to form a coil structure of the inductor, the first electrode plate is filled in the first accommodating portion, the first conductive structure is filled in the second accommodating portion, and surfaces of the first electrode plate and the first conductive structure away from the dielectric substrate are both flush with a surface of the first auxiliary functional layer away from the dielectric substrate.

13. The method for preparing a filter according to claim 12, wherein: The material of the first auxiliary functional layer is an inorganic insulating material.

14. The method for preparing a filter according to claim 12, wherein: The first auxiliary functional layer and the dielectric substrate are an integrally formed structure.

15. The method for preparing a filter according to claim 12, wherein: The method further includes forming a second auxiliary functional layer on a side of the dielectric substrate away from the first conductive structure; the second auxiliary functional layer has a third accommodating portion penetrating along a thickness direction thereof, the second conductive structure fills the third accommodating portion, and a surface of the second conductive structure away from the dielectric substrate is flush with a surface of the second auxiliary functional layer away from the electrode plate of the dielectric substrate.

16. The method for preparing a filter according to claim 15, wherein: The material of the second auxiliary functional layer is an inorganic insulating material.

17. The method for preparing a filter according to claim 15, wherein: The second auxiliary functional layer and the dielectric substrate are integrally formed.

18. The method for preparing a filter according to any one of claims 12 to 17, wherein: Forming the capacitor further includes sequentially forming a first interlayer dielectric layer and a second electrode plate on the layer where the first electrode plate is located; and before forming the second electrode plate, further includes: The filter further comprises a third auxiliary functional layer located on a side of the first interlayer dielectric layer away from the dielectric substrate; the third auxiliary functional layer has a fourth accommodating portion penetrating along its thickness direction, the second electrode plate is filled in the fourth accommodating portion, and the second electrode plate is away from the dielectric substrate. The surface of the board is flush with the surface of the third auxiliary functional layer facing away from the dielectric substrate.

19. The method for preparing a filter according to any one of claims 12 to 17, wherein: Also includes: A second interlayer dielectric layer is formed on the side of the second plate of the capacitor away from the dielectric substrate, and a second connecting electrode and a third connecting electrode are formed on the side of the second interlayer dielectric layer away from the dielectric substrate; the second connecting electrode is electrically connected to the inductor through a second connecting via; and the third connecting electrode is electrically connected to the second plate of the capacitor through a third connecting via.

20. The method for preparing a filter according to any one of claim 19, wherein: A first protective layer and a first planarization layer are sequentially formed on the side of the second connection electrode and the third connection electrode away from the dielectric substrate; the first connection pad is electrically connected to the second connection electrode through a fourth connection via, and the second connection pad is electrically connected to the third connection electrode through a fifth connection via; the fourth connection via and the fifth connection via both penetrate the first protective layer and the first planarization layer.

21. The method for preparing a filter according to any one of claims 12 to 17, wherein: The method also includes sequentially forming a second protection layer and a second planarization layer on a side of the second conductive structure away from the dielectric substrate.

22. The method for preparing a filter according to any one of claims 12 to 17, wherein: The dielectric substrate includes a glass substrate.

23. An electronic device comprising the filter according to any one of claims 1 to 11.

Images