Optical switches and optical link switching chips

Abstract

The present application relates to an optical switch and an optical link switching chip. The optical switch comprises: a substrate, a first insulating layer and a phase shifting layer; the phase shifting layer comprises a cross waveguide, a first optical splitter, a first PIN phase shifter, a second optical splitter and a second PIN phase shifter, the first PIN phase shifter comprises a first positive doping region, a first single-mode interferometer and a first negative doping region, the second PIN phase shifter comprises a second positive doping region, a second single-mode interferometer and a second negative doping region, the first single-mode interferometer and the second single-mode interferometer are ridge waveguides, and the ridge waveguides are at least partially intrinsic semiconductors; the first PIN phase shifter and the second PIN phase shifter are used to switch the switch state; when the optical switch is in the closed state, the ridge waveguide allows the incident light to exit after passing through the first PIN phase shifter, and when the optical switch is in the open state, the ridge waveguide allows the incident light to exit after passing through the second PIN phase shifter. The present application can increase the switching speed of the optical switch, reduce optical loss, and increase the spectral bandwidth to hundreds of nanometers.

Description

Technical Field

[0001] The present invention relates to the technical field of optical communications, and in particular to an optical switch and an optical link switching chip. Background Art

[0002] In the related technology, silicon optical switches are mainly based on the thermo-optical effect, and often include micro-ring resonators. This modulation method has a very slow rate, resulting in the switching time of the optical switch being at least tens of microseconds. Moreover, the modulation bandwidth is low and the loss is large, which cannot meet the demand. Summary of the invention

[0003] The purpose of the present application is to provide an optical switch and an optical link switching chip, which can increase the switching speed of the optical switch, reduce optical loss, and increase the spectral bandwidth to hundreds of nanometers.

[0004] According to a first aspect of an embodiment of the present application, there is provided an optical switch, comprising: a substrate, a first insulating layer and a phase shifting layer;

[0005] The first insulating layer is located on the substrate, and the phase shift layer is located on a side of the first insulating layer away from the substrate;

[0006] The phase shift layer includes a cross waveguide, a first switch unit, and a second switch unit; the first end of the cross waveguide is used for light input, the second end of the cross waveguide is connected to the first end of the first switch unit, the second end of the first switch unit is used for light output, the third end of the first switch unit is connected to the third end of the second switch unit, the third end of the first switch unit is used for light output, the third end of the second switch unit is used for light input, the second end of the second switch unit is used for light input, the first end of the second switch unit is connected to the third end of the cross waveguide, and the fourth end of the cross waveguide is used for light output;

[0007] The first switch unit includes a first optical splitter, a first PIN phase shifter, a second optical splitter, and a second PIN phase shifter;

[0008] The first PIN phase shifter includes a first positive doping region, a first single-mode interferometer, and a first negative doping region, and the first single-mode interferometer is arranged between the first positive doping region and the first negative doping region; the second PIN phase shifter includes a second positive doping region, a second single-mode interferometer, and a second negative doping region, and the second single-mode interferometer is arranged between the second positive doping region and the second negative doping region;

[0009] The first single-mode interferometer and the second single-mode interferometer are ridge waveguides, and at least a portion of the ridge waveguides are intrinsic semiconductors; the first PIN phase shifter and the second PIN phase shifter are used to switch the on state and the off state of the optical switch;

[0010] The second switch unit has the same physical structure as the first switch unit;

[0011] The first end of the first optical splitter of the first switch unit is connected to the second end of the cross waveguide for inputting light, the first end of the first optical splitter of the first switch unit is the first end of the first switch unit, the second end of the first optical splitter of the first switch unit is connected to the first positive doping region of the first PIN phase shifter of the first switch unit for outputting light, the third end of the first optical splitter of the first switch unit is connected to the second positive doping region of the second PIN phase shifter of the first switch unit for outputting light, the first end of the second optical splitter of the first switch unit is connected to the first negative doping region of the first PIN phase shifter of the first switch unit for inputting light, the second end of the second optical splitter of the first switch unit is connected to the second negative doping region of the second PIN phase shifter of the first switch unit for inputting light, the fourth end of the second optical splitter of the first switch unit is used for outputting light, and the fourth end of the second optical splitter of the first switch unit is the second end of the first switch unit;

[0012] The third end of the second optical splitter of the first switch unit is the third end of the first switch unit, the third end of the second optical splitter of the second switch unit is the third end of the second switch unit, the third end of the second optical splitter of the second switch unit is connected to the third end of the second optical splitter of the first switch unit for inputting light, the fourth end of the second optical splitter of the second switch unit is the second end of the second switch unit, the second end of the second optical splitter of the second switch unit is connected to the second negatively doped region of the second PIN phase shifter of the second switch unit for outputting light, and the fourth end of the second optical splitter of the second switch unit is the second end of the second switch unit. The first end of the second optical splitter of the second switch unit is connected to the first negatively doped region of the first PIN phase shifter of the second switch unit for outputting light, the third end of the first optical splitter of the second switch unit is connected to the second positively doped region of the second PIN phase shifter of the second switch unit for inputting light, the second end of the first optical splitter of the second switch unit is connected to the first positively doped region of the first PIN phase shifter of the second switch unit for inputting light, the first end of the first optical splitter of the second switch unit is connected to the third end of the cross waveguide for outputting light, and the first end of the first optical splitter of the second switch unit is the first end of the second switch unit;

[0013] When the optical switch is in a closed state, the ridge waveguide allows incident light to pass through the first PIN phase shifter and then be emitted; when the optical switch is in an open state, the ridge waveguide allows incident light to pass through the second PIN phase shifter and then be emitted.

[0014] In one embodiment, the ridge-type waveguide includes a first wing, a ridge, and a second wing, the first wing is located between the ridge and the first positively doped region, the second wing is located between the ridge and the first negatively doped region, the height of the first wing is the same as the height of the second wing, and the height of the first wing is less than the height of the ridge.

[0015] In one embodiment, the ridge, the first wing, and the second wing are all intrinsic semiconductors.

[0016] In one embodiment, the first positively doped region is a heavily positively doped region, and the first negatively doped region is a heavily negatively doped region;

[0017] The first wing is a shallow positive doped region, and the second wing is a shallow negative doped region;

[0018] The doping concentration of the first positively doped region is greater than the doping concentration of the first wing, and the doping concentration of the first negatively doped region is greater than the doping concentration of the second wing.

[0019] In one embodiment, the doping concentration of the first positive doping region and the doping concentration of the first negative doping region are both greater than 10 18 cm -3 The doping concentration of the first wing portion and the doping concentration of the second wing portion are respectively less than 10 18 cm -3 .

[0020] In one embodiment, the optical switch further comprises a second insulating layer, a first electrode, a second electrode, an electric heating element, a first conductive part and a second conductive part;

[0021] The second insulating layer is located on a side of the phase-shifting layer away from the first insulating layer, and the first electrode and the second electrode are located on a side of the second insulating layer away from the first insulating layer;

[0022] The second insulating layer is provided with a first through hole and a second through hole; the first conductive portion is located in the first through hole, and the first conductive portion is used to connect the first electrode and the first positive doping region; the second conductive portion is located in the second through hole, and the second conductive portion is used to connect the second electrode and the first negative doping region;

[0023] The electric heating element is used to heat the ridge waveguide, and the electric heating element is configured as a heating electrode, and the heating electrode can be configured at any position above or on the side of any one of the first PIN phase shifter and the second PIN phase shifter;

[0024] When the heating electrode is arranged above any one of the first PIN phase shifter and the second PIN phase shifter, the heating electrode is located on a side of the second insulating layer away from the first insulating layer and between the first electrode and the second electrode, and the projection of the heating electrode on the two insulating layers is located within the projection of the ridge waveguide on the two insulating layers.

[0025] In one embodiment, the electric heating element is configured as a doped resistor, and the doped resistor includes a first doped resistor and a second doped resistor, the first doped resistor is arranged between the first positive doping region and the first wing, and the second doped resistor is arranged between the first negative doping region and the second wing, and the first doped resistor and the second doped resistor are independently energized.

[0026] In one embodiment, the material of the first electrode is metal, the material of the second electrode is metal, and the material of the heating electrode is titanium nitride.

[0027] In one implementation, the optical switch further includes a first air wall, wherein the first air wall surrounds the first PIN phase shifter or the second PIN phase shifter.

[0028] In one embodiment, the optical switch further comprises a second air wall, a cantilever arm and an air bottom groove;

[0029] The second air wall surrounds the first PIN phase shifter or the second PIN phase shifter, the cantilever arm is located between the first insulating layer and the phase shift layer, and is located in the second air wall, the air bottom groove is opened on the substrate and is located between the first insulating layer and the substrate, and the second air wall is connected to the air bottom groove.

[0030] In one embodiment, the material of the substrate is silicon; the material of the first insulating layer and the material of the second insulating layer are silicon dioxide respectively; and the material of the intrinsic semiconductor is silicon.

[0031] In one embodiment, the ridge waveguide is a thermo-optical phase shifter.

[0032] According to a second aspect of an embodiment of the present application, an optical link switching chip is provided, comprising an optical switch having M rows and N columns, N optical input ports and M optical output ports, where M is a positive integer and N is a positive integer, and the optical switch is the aforementioned optical switch;

[0033] For the N optical switches in the first row, the first ends of the cross waveguides of the optical switches are respectively connected to the N light incident ports in a one-to-one correspondence;

[0034] For the optical switches in the j1th column, the fourth ends of the second optical splitters of the second switch units of the optical switches are respectively connected to the fourth ends of the cross waveguides of the optical switches in the j1+1th column; the value range of j1 is 1 to N-1;

[0035] For the optical switch in the j2th column, the fourth end of the second optical splitter of the first switch unit of the optical switch in the ith row is connected to the first end of the cross waveguide of the optical switch in the i+1th row, where i ranges from 1 to M and j2 ranges from 1 to N;

[0036] For the optical switches in the first column, the fourth ends of the cross waveguides of the optical switches are connected to the M optical output ports in a one-to-one correspondence.

[0037] In one embodiment, each of the optical switches further includes: a first optical power monitoring device and a second optical power monitoring device, wherein the first optical power monitoring device is used to monitor the power of the outgoing light passing through the third end of the first switch unit, and the second optical power monitoring device is used to detect the power of the light emitted from the second switch unit.

[0038] In one embodiment, the optical switch in the Mth row further includes a third optical power monitoring device, which is located at the fourth end of the second optical splitter of the first switch unit and is used to detect the power of the output light passing through the fourth end of the second optical splitter of the first switch unit.

[0039] In one implementation, the third optical power monitoring device is located at an exit port of a fourth end of the second optical splitter of the first switch unit.

[0040] In one embodiment, the first optical power monitoring device includes a first photodetector and a third optical splitter, one end of the third optical splitter is close to the third end of the second optical splitter of the first switch unit and there may be a gap, and the other end is connected to the first photodetector;

[0041] The second optical power monitoring device includes a second photodetector and a fourth optical splitter. One end of the fourth optical splitter is close to the first end of the first optical splitter of the second switch unit with a gap therebetween, and the other end is connected to the second photodetector.

[0042] In one embodiment, the material of the first photodetector includes Si, Ge or InP;

[0043] The material of the second photodetector includes Si, Ge or InP.

[0044] Compared with the prior art, the beneficial effects of the present application are as follows: since the optical switch includes a substrate, a first insulating layer and a phase shift layer, the phase shift layer includes a cross waveguide, a first switch unit and a second switch unit, the second switch unit has the same physical structure as the first switch unit, the first switch unit includes a first optical splitter, a first PIN phase shifter, a second optical splitter and a second PIN phase shifter, the first PIN phase shifter includes a first positive doping region, a first single-mode interferometer and a first negative doping region, the first single-mode interferometer is arranged between the first positive doping region and the first negative doping region, the second PIN phase shifter includes a second positive doping region, a second single-mode interferometer and a second negative doping region, the second single-mode interferometer is arranged between the second positive doping region and the second negative doping region, the first single-mode interferometer and the second single-mode interferometer are ridge waveguides, and the ridge waveguides are at least partially intrinsic semiconductors. When the optical switch is in a closed state, the intrinsic semiconductor is not doped, and no additional loss is caused due to the carrier absorption effect. Moreover, the first positive doping region and the first negative doping region are located on both sides of the first single-mode interferometer, the first positive doping region, the first single-mode interferometer and the first negative doping region form a first PIN phase shifter, the second positive doping region and the second negative doping region are located on both sides of the second single-mode interferometer, the second positive doping region, the second single-mode interferometer and the second negative doping region form a second PIN phase shifter, the first PIN phase shifter and the second PIN phase shifter are used to switch the on state and the off state of the optical switch, and the on state and the off state of the optical switch can be quickly switched to improve the switching speed of the optical switch. When the optical switch is in the off state, the ridge waveguide allows the incident light to be emitted after passing through the first PIN phase shifter, and when the optical switch is in the on state, the ridge waveguide allows the incident light to be emitted after passing through the second PIN phase shifter. In this way, when multiple optical switches are used to form an optical switch array, it can be realized that when the optical switch array is in the on state, only one optical switch in the optical switch array is in the on state. Since optical loss is introduced only when the optical switch is in the on state, the loss of the optical switch array can be greatly reduced, which is conducive to using optical switches to realize large switches. Moreover, since the optical switch does not use a microring resonator, the spectral bandwidth can be increased to hundreds of nanometers. In summary, the technical solution of the present application can increase the switching speed of the optical switch, reduce the optical loss of the optical switch, and increase the spectral bandwidth to hundreds of nanometers. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1A The diagram is a schematic diagram of the structure of an optical link switching chip according to an exemplary embodiment.

[0046] Figure 1B yes Figure 1A A partial enlarged view of part A in FIG.

[0047] Figure 2 The figure is a schematic diagram showing the structure of an optical switch according to an exemplary embodiment.

[0048] Figure 3 The figure is a schematic diagram showing the structure of an optical switch according to an exemplary embodiment.

[0049] Figure 4 is a schematic structural diagram of an optical switch according to another exemplary embodiment.

[0050] Figure 5 is a schematic structural diagram of an optical switch according to another exemplary embodiment.

[0051] Fig. 6A and Figure 6B is a schematic structural diagram of an optical switch according to another exemplary embodiment.

[0052] Figure 7 is a schematic structural diagram of an optical switch according to another exemplary embodiment.

[0053] Figure 8 is a schematic structural diagram of an optical switch according to another exemplary embodiment.

[0054] Fig.9A and Fig. 9B is a schematic structural diagram of an optical switch according to another exemplary embodiment.

[0055] Fig.10 is a schematic structural diagram of an optical switch according to another exemplary embodiment.

[0056] Fig.11A and 11B is a schematic structural diagram of an optical switch according to another exemplary embodiment.

[0057] The reference numerals are as follows:

[0058] 11. Optical switch;

[0059] 21. substrate; 22. first insulating layer; 23. phase shift layer; 24. second insulating layer; 25. first electrode; 26. second electrode; 27. first conductive part; 28. second conductive part; 29. ​​doped resistor; 291. first doped resistor; 292. second doped resistor; 20. heating electrode;

[0060] 111, Crossed waveguide;

[0061] 112, a first switch unit; 1121, a first optical splitter; 1122, a first PIN phase shifter; 1123, a second PIN phase shifter; 1124, a second optical splitter;

[0062] 11221, first positive doping region; 11222, first single-mode interferometer; 11223, first negative doping region;

[0063] 11231, second positive doping region; 11232, second single-mode interferometer; 11233, second negative doping region;

[0064] 21122, first wing; 31122, spine; 41122, second wing;

[0065] 113. A second switch unit;

[0066] 114. A first optical power monitoring device;

[0067] 115. A second optical power monitoring device;

[0068] 116. A third optical power monitoring device;

[0069] 31. First air wall; 41. Second air wall; 51. Cantilever arm; 61. Air bottom trough. DETAILED DESCRIPTION

[0070] Unless otherwise defined, the technical terms or scientific terms used in this specification and claims shall have the usual meanings understood by persons with ordinary skills in the technical field to which the invention belongs. The specific embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be noted that in the specific description of these embodiments, in order to provide a concise description, it is impossible for this specification to provide a detailed description of all the features of the actual embodiments. Without departing from the spirit and scope of the present invention, those skilled in the art may modify and replace the embodiments of the present invention, and the resulting embodiments are also within the scope of protection of the present invention.

[0071] In order to solve the technical problems existing in the prior art, the present application proposes an optical switch and an optical link switching chip, which can improve the switching speed, reduce optical loss and increase the spectral bandwidth.

[0072] An embodiment of the present application provides an optical link switching chip. The optical link switching chip can be applied to an optical communication system. Figure 1A The optical link switching chip may include an optical switch 11 with M rows and N columns, N optical input ports IN1, IN2, IN3, and M optical output ports OUT1, OUT2, OUT3. M is a positive integer, and N is a positive integer.

[0073] In this embodiment, an example is given where M is 3 and N is 3. The optical link switching chip may include 3 rows and 3 columns of optical switches 11, 3 optical input ports IN1, IN2, IN3, and 3 optical output ports OUT1, OUT2, OUT3.

[0074] Before introducing the optical link switching chip, the optical switch 11 is first introduced.

[0075] In this embodiment, if Figure 1A and Figure 1B As shown, the optical switch 11 includes a cross waveguide 111, a first switch unit 112 and a second switch unit 113. The first switch unit 112 includes a first optical splitter 1121, a first PIN phase shifter 1122, a second PIN phase shifter 1123 and a second optical splitter 1124. The first PIN phase shifter 1122 includes a first positive doping region 11221, a first single-mode interferometer 11222 and a first negative doping region 11223. The first single-mode interferometer 11222 is arranged at the first positive doping region 11221. doped region 11221 and the first negatively doped region 11223; the second PIN phase shifter 1123 includes a second positively doped region 11231, a second single-mode interferometer 11232, and a second negatively doped region 11233, and the second single-mode interferometer 11232 is arranged between the second positively doped region 11231 and the second negatively doped region 11233; the second switch unit 113 has the same physical structure as the first switch unit 112, and the first switch unit 112 and the second switch unit 113 are arranged side by side.

[0076] In this embodiment, the second switch unit 113 and the first switch unit 112 of the optical switch 11 are axially symmetrically distributed.

[0077] In this embodiment, it should be particularly noted that the functional designs of the first spectrometer 1121 and the second spectrometer 1124 are symmetrical, and the incident end and the output end are interchangeable, that is, the incident end of the first spectrometer 1121 can also be used as the output end, the output end of the first spectrometer 1121 can also be used as the incident end, the incident end of the second spectrometer 1124 can also be used as the output end, and the output end of the second spectrometer 1124 can also be used as the incident end.

[0078] In this embodiment, the first optical splitter 1121 can be a one-to-two optical splitter, for example, a 1x2MMI, a Y-type splitter, and a trifurcated coupler, and the second optical splitter 1124 can be a two-to-two optical splitter, for example, a 2x2MMI, a directional coupler, and an adiabatic directional coupler.

[0079] In this embodiment, the first end of the cross waveguide 111 serves as an input port for the light source to enter, the second end of the cross waveguide 111 is opposite to the first end of the cross waveguide 111, the first end 1`` of the first optical splitter 1121 of the first switch unit 112 is connected to the second end of the cross waveguide 111 for inputting light, the first end 1`` of the first optical splitter 1121 of the first switch unit 112 is the first end 1 of the first switch unit, the second end 2`` of the first optical splitter 1121 of the first switch unit 112 is connected to the first positively doped region 11221 of the first PIN phase shifter 1122 of the first switch unit 112 for outputting light, and the third end 3`` of the first optical splitter 1121 of the first switch unit 112 is connected to the first positively doped region 11221 of the first PIN phase shifter 1122 of the first switch unit 112 The first switch unit 112 is connected to the second positively doped region 11231 of the second PIN phase shifter 1123 of the first switch unit 112 for outputting light, the first end 1` of the second optical splitter 1124 of the first switch unit 112 is connected to the first negatively doped region 11223 of the first PIN phase shifter 1122 of the first switch unit 112 for inputting light, the second end 2` of the second optical splitter 1124 of the first switch unit 112 is connected to the second negatively doped region 11233 of the second PIN phase shifter 1123 of the first switch unit 112 for inputting light, the fourth end 4` of the second optical splitter 1124 of the first switch unit 112 is used for outputting light, and the fourth end 4`` of the second optical splitter 1124 of the first switch unit 112 is the second end 2 of the first switch unit.

[0080] The third end 3' of the second optical splitter 1124 of the first switch unit 112 is the third end 3 of the first switch unit, the third end 3' of the second optical splitter 1124 of the second switch unit 113 is the third end 3 of the second switch unit, the third end 3' of the second optical splitter 1124 of the second switch unit 113 is connected to the third end 3' of the second optical splitter 1124 of the first switch unit 112 for inputting light, the fourth end 4' of the second optical splitter 1124 of the second switch unit 113 is used for inputting light, the fourth end 4' of the second optical splitter 1124 of the second switch unit 113 is the second end 2 of the second switch unit, the second end 2' of the second optical splitter 1124 of the second switch unit 113 is connected to the second negatively doped region 11233 of the second PIN phase shifter 1123 of the second switch unit 113 for outputting light, and the The first end 1` is connected to the first negatively doped region 11223 of the first PIN phase shifter 1122 of the second switch unit 113 for outputting light, the third end 3`` of the first optical splitter 1121 of the second switch unit 113 is connected to the second positively doped region 11231 of the second PIN phase shifter 1123 of the second switch unit 113 for inputting light, the second end 2`` of the first optical splitter 1121 of the second switch unit 113 is connected to the first positively doped region 11221 of the first PIN phase shifter 1122 of the second switch unit 113 for inputting light, the first end 1`` of the first optical splitter 1121 of the second switch unit 113 is connected to the third end of the cross waveguide 111 for outputting light, the first end 1`` of the first optical splitter 1121 of the second switch unit 113 is the first end 1 of the second switch unit; the fourth end of the cross waveguide 111 is used as an output port for light source output.

[0081] In this embodiment, the first PIN phase shifter 1122 and the second PIN phase shifter 1123 are used to switch the on state and the off state of the optical switch 11. In this embodiment, the switching speed of the optical switch 11 can be increased to nanosecond level, which greatly improves the switching speed of the optical switch 11.

[0082] In this embodiment, the first single-mode interferometer 11222 and the second single-mode interferometer 11232 are ridge waveguides (Rib waveguides), and the ridge waveguides are at least partially intrinsic semiconductors. The ridge waveguides are single-mode waveguides.

[0083] When the optical switch 11 is in the closed state, the ridge waveguide allows the incident light to pass through the first PIN phase shifter 1122 and then be emitted.

[0084] When the optical switch 11 is in an on state, the ridge waveguide allows the incident light to pass through the second PIN phase shifter 1123 and then be emitted.

[0085] In this embodiment, if Figure 1B and Figure 2 As shown, the optical switch 11 includes: a substrate 21, a first insulating layer 22, a phase shifting layer 23, a second insulating layer 24, a first electrode 25, a second electrode 26, an electric heating element (not shown in the figure), a first conductive part 27 and a second conductive part 28. Figure 2 for Figure 1A Section view along section line AA.

[0086] In this embodiment, if Figure 2 As shown, the substrate 21 is used to support components thereon. The material of the substrate 21 may be silicon, but is not limited thereto.

[0087] In this embodiment, if Figure 2 As shown, the first insulating layer 22 is located on the substrate 21 , and the material of the first insulating layer 22 may be silicon dioxide, but is not limited thereto.

[0088] In this embodiment, if Figure 1B , Figure 2 and Figure 5 As shown, the phase shift layer 23 is located on a side of the first insulating layer 22 away from the substrate 21. The cross waveguide 111, the first switch unit 112 and the second switch unit 113 are arranged on the phase shift layer 23.

[0089] In this embodiment, the ridge waveguide is an intrinsic semiconductor, and the material is silicon (Si). When the optical switch 11 is in the off state, the intrinsic semiconductor is not doped, and no additional loss is caused by the carrier absorption effect.

[0090] like Figure 2 As shown, the ridge waveguide includes a first wing 21122, a ridge 31122 and a second wing 41122, the first wing 21122 is located between the ridge 31122 and the first positively doped region 11221, the second wing 41122 is located between the ridge 31122 and the first negatively doped region 11223, the height of the first wing 21122 is the same as the height of the second wing 41122, and the height of the first wing 21122 is less than the height of the ridge 31122.

[0091] In this embodiment, the ridge 31122 , the first wing 21122 , and the second wing 41122 are all intrinsic semiconductors.

[0092] In this embodiment, the first positive doping region 11221 is a heavily positive doping region, and the first negative doping region 11223 is a heavily negative doping region. The doping concentration of the first positive doping region 11221 and the doping concentration of the first negative doping region 11223 are both greater than 10 18 cm -3 .

[0093] In this embodiment, if Figure 1B, Figure 2 and Figure 5 As shown, the second insulating layer 24 is located on a side of the phase shift layer 23 away from the first insulating layer 22. The material of the second insulating layer 24 may be silicon dioxide, but is not limited thereto.

[0094] In this embodiment, if Figure 2 As shown, the first electrode 25 and the second electrode 26 are located on a side of the second insulating layer 24 away from the first insulating layer 22 .

[0095] In this embodiment, if Figure 2 As shown, a first through hole (not shown) and a second through hole (not shown) are provided on the second insulating layer 24. The first conductive portion 27 is located in the first through hole, and the first conductive portion 27 is used to connect the first electrode 25 and the first positive doping region 11221. The second conductive portion 28 is located in the second through hole, and the second conductive portion 28 is used to connect the second electrode 26 and the first negative doping region 11223.

[0096] In this embodiment, the material of the first electrode 25 is metal, and the material of the second electrode 26 is metal.

[0097] Since silicon is a temperature-sensitive material, changes in the ambient temperature will change the refractive index of silicon. At this time, the ambient temperature can be controlled by heating the electric heating element to offset the impact of the ambient temperature change on the device. When the working environment temperature changes, the optical loss on the optical link switching chip does not change significantly.

[0098] In one embodiment, the electric heating element may be a heating electrode 20, and the heating electrode 20 may be disposed at any position above or on the side of any one of the first PIN phase shifter 1122 and the second PIN phase shifter 1123. When the heating electrode 20 is disposed above any one of the first PIN phase shifter 1122 and the second PIN phase shifter 1123, the heating electrode 20 is located on a side of the second insulating layer 24 away from the first insulating layer 22, and is located between the first electrode 25 and the second electrode 26, and the projection of the heating electrode 20 on the second insulating layer 24 is located within the projection of the ridge waveguide on the second insulating layer 24. For example, as Figure 3 As shown, the heating electrode 20 is located between the first electrode 25 and the second electrode 26, and the projection of the heating electrode 20 on the second insulating layer 24 is located within the projection of the ridge waveguide on the second insulating layer 24. The heating electrode 20 is used to heat the ridge waveguide. The material of the heating electrode 20 is titanium nitride.

[0099] In one embodiment, the electric heating element can be a doped resistor 29, such as Figure 4As shown, the doped resistor 29 generally includes a first doped resistor 291 and a second doped resistor 292. The first doped resistor 291 is arranged between the first positive doped region 11221 and the first wing 21122, and the second doped resistor 292 is arranged between the first negative doped region 11223 and the second wing 41122. The first doped resistor 291 and the second doped resistor 292 are energized independently, which also plays a role in offsetting the influence of changes in external ambient temperature on the device.

[0100] In this way, when a plurality of optical switches 11 are used to form an optical switch 11 array (for example, the optical switch 11 array of 3 rows and 3 columns described above), it can be realized that when the optical switch 11 array is in the on state, only one optical switch in the optical switch 11 array is in the on state. Since optical loss is introduced only when the optical switch 11 is in the on state, and when the optical switch 11 is in the off state, no carrier absorption loss is introduced. Therefore, the loss of the optical switch 11 array can be greatly reduced, which is conducive to realizing large switches using the optical switch 11. For example, it is possible to expand the size of the optical switch 11 array from 2*2 to large switches such as 200*200 and 500*500.

[0101] The fast switching of the switch state of the optical switch 11 between the on state and the off state requires the use of the first PIN phase shifter 1122. The characteristic point is that in the off state, the middle area of ​​the ridge waveguide is not doped, and no additional loss is caused by the carrier absorption effect. The first positive doping region 11221 connected to the first electrode 25 and the first negative doping region 11223 connected to the second electrode 26 are heavily doped. After the first electrode 25 and the second electrode 26 are energized, a positive voltage is applied to the first positive doping region 11221, and a negative voltage is applied to the first negative doping region 11223, the carriers move to the middle, so that the refractive index of the ridge waveguide decreases. After the conditions for the on state of the optical switch 11 are met, the on state of the optical switch 11 is reached.

[0102] Since the optical switch 11 does not use a microring resonator, the spectral bandwidth can be increased to hundreds of nanometers.

[0103] The optical switch 11 is introduced above, and the optical link switching chip is introduced below.

[0104] like Figure 1A As shown, the optical link switching chip includes 3 rows and 3 columns of optical switches 11, the first row ROW1, the second row ROW2 and the third row ROW3 are arranged from bottom to top, and the first column COL1, the second column COL2 and the third column COL3 are arranged from left to right.

[0105] like Figure 1AAs shown, for the three optical switches 11 in the first row ROW1, the first ends of the cross waveguides 111 of the three optical switches 11 are connected to the three optical incident ports IN1, IN2, and IN3 in a one-to-one correspondence. For example, the first end of the cross waveguide 111 of the optical switch 11 in the first row ROW1 and the first column COL1 is connected to the optical incident port IN1, the first end of the cross waveguide 111 of the optical switch 11 in the first row ROW1 and the second column COL2 is connected to the optical incident port IN2, and the first end of the cross waveguide 111 of the optical switch 11 in the first row ROW1 and the third column COL3 is connected to the optical incident port IN3.

[0106] For the optical switches 11 in the j1th column, the fourth ends 4' of the second optical splitters 1124 of the second switch units 113 of the three optical switches 11 are respectively connected to the fourth ends of the cross waveguides 111 of the three optical switches 11 in the j1+1th column; the value range of j1 is 1 to 2. For example, the fourth end 4' of the second optical splitter 1124 of the second switch unit 113 of the optical switch 11 in the 1st row ROW1 and the 1st column COL1 is connected to the fourth end of the cross waveguide 111 of the optical switch 11 in the 1st row ROW1 and the 2nd column COL1, and the fourth end 4' of the second optical splitter 1124 of the second switch unit 113 of the optical switch 11 in the 1st row ROW1 and the 2nd column COL2 is connected to the fourth end of the cross waveguide 111 of the optical switch 11 in the 1st row ROW1 and the 3rd column COL3.

[0107] For the optical switch 11 in the j2th column, the fourth end 4' of the second optical splitter 1124 of the first switch unit 112 of the optical switch 11 in the ith row is connected to the first end of the cross waveguide 111 of the optical switch 11 in the i+1th row, where i is in the range of 1 to 3, and j2 is in the range of 1 to 3. For example, the fourth end 4' of the second optical splitter 1124 of the first switch unit 112 of the optical switch 11 in the 1st row ROW1 and the 1st column COL1 is connected to the first end of the cross waveguide 111 of the optical switch 11 in the 2nd row ROW2 and the 1st column COL1, and the fourth end 4' of the second optical splitter 1124 of the first switch unit 112 of the optical switch 11 in the 2nd row ROW1 and the 1st column COL1 is connected to the first end of the cross waveguide 111 of the optical switch 11 in the 3rd row ROW3 and the 1st column COL1.

[0108] For the optical switch 11 in the first column COL1, the fourth end of the cross waveguide 111 of the optical switch 11 is connected to the three optical output ports OUT1, OUT2, and OUT3 in a one-to-one correspondence. For example, the fourth end of the cross waveguide 111 of the optical switch 11 in the first row ROW1 and the first column COL1 is connected to the optical output port OUT1, the fourth end of the cross waveguide 111 of the optical switch 11 in the second row ROW2 and the first column COL1 is connected to the optical output port OUT2, and the fourth end of the cross waveguide 111 of the optical switch 11 in the third row ROW3 and the first column COL1 is connected to the optical output port OUT3.

[0109] In this embodiment, the optical input ports IN1, IN2, and IN3 are respectively used to input three paths of light, and the optical output ports OUT1, OUT2, and OUT3 are respectively used to output three paths of light. When the optical link switching chip is in the on state, only one optical switch 11 needs to be in the on state, and the other optical switches 11 are in the off state. For example, when the light incident from the optical input port IN3 needs to be emitted from the optical output port OUT2, only the optical switch 11 in the second row ROW1 and the third column COL3 can be in the on state, and the other optical switches 11 are in the off state.

[0110] At this time, the light incident from the optical incident port IN3 will pass through the first end of the cross waveguide 111 of the optical switch 11 of the first row ROW1 and the third column COL3, and then pass through the second end of the cross waveguide 111 of the optical switch 11 to enter the first end 1'' of the first optical splitter 1121 of the optical switch 11, and then pass through the second end 2'' of the first optical splitter 1121 to reach the first positive doping region 11221 of the first switch unit of the optical switch 11, and then pass through the first single-mode interferometer 11222 of the first switch unit of the optical switch 11 and pass through the first negative doping region 1 1223 reaches the first end 1' of the second optical splitter 1124 of the first switch unit of the optical switch 11, then passes through the first end of the cross waveguide 111 of the optical switch 11 in the second row ROW1 and the third column COL3, and then passes through the second end of the cross waveguide 111 of the optical switch 11 to enter the first end 1'' of the first optical splitter 1121 of the optical switch 11. Since the optical switch 11 in the second row ROW1 and the third column COL3 is in the on state, the light passes through the third end 3'' of the first optical splitter 1121 to the first switch unit of the optical switch 11. The optical switch 1100 passes through the second positive doping region 11231, then passes through the second single-mode interferometer 11232 of the first switch unit of the optical switch 11, and then passes through the second negative doping region 11233 to reach the second end 2' of the second optical splitter 1124 of the first switch unit of the optical switch 11, and then passes through the third end 3' of the second optical splitter 1124 of the first switch unit of the optical switch 11 to reach the third end 3' of the second optical splitter 1124 of the second switch unit, and then passes through the second end 2' of the second optical splitter 1124 of the second switch unit of the optical switch 11 to reach the second end 2' of the second optical splitter 1124 of the second switch unit The negatively doped region 11233, then passes through the second single-mode interferometer 11232 of the second switch unit of the optical switch 11, and then passes through the second positively doped region 11231 to reach the third end 3'' of the first optical splitter 1121 of the second switch unit of the optical switch 11, and then passes through the first end 1'' of the first optical splitter 1121 to reach the third end of the cross waveguide 111 of the optical switch 11, and then passes through the fourth end of the cross waveguide 111 to reach the fourth end 4' of the second optical splitter 1124 of the second switch unit of the optical switch 11 in the second row ROW1 and the second column COL3;

[0111] Then, it passes through the first end 1' of the second optical splitter 1124 of the second switch unit of the optical switch 11 to reach the first negatively doped region 11223 of the second switch unit of the optical switch 11, then passes through the first single-mode interferometer 11222 of the second switch unit of the optical switch 11 and then passes through the first positively doped region 11221 to reach the second end 2'' of the first optical splitter 1121 of the second switch unit of the optical switch 11, then passes through the first end 1'' of the first optical splitter 1121 to reach the third end of the cross waveguide 111 of the optical switch 11, and then passes through the fourth end of the cross waveguide 111 to reach the fourth end 4' of the second optical splitter 1124 of the second switch unit of the optical switch 11 in the second row ROW1 and the first column COL3;

[0112] Then, the light passes through the first end 1' of the second optical splitter 1124 of the second switch unit of the optical switch 11 to reach the first negatively doped region 11223 of the second switch unit of the optical switch 11, passes through the first single-mode interferometer 11222 of the second switch unit of the optical switch 11, passes through the first positively doped region 11221 to reach the second end 2'' of the first optical splitter 1121 of the second switch unit of the optical switch 11, passes through the first end 1'' of the first optical splitter 1121 to reach the third end of the cross waveguide 111 of the optical switch 11, and then passes through the fourth end of the cross waveguide 111 of the optical switch 11 to be emitted from the optical output port OUT2. Since optical loss is introduced only when the optical switch 11 is in the on state, the optical link switching chip of this embodiment only turns on one optical switch, thus greatly reducing the loss of the optical switch 11 array, which is conducive to realizing large-scale switching using the optical switch 11.

[0113] In this embodiment, if Figure 1A As shown, each optical switch 11 further includes a first optical power monitoring device 114 and a second optical power monitoring device 115. The first optical power monitoring device 114 is used to monitor the power of the light emitted from the third end 3 of the first switch unit 112, and the second optical power monitoring device 115 is used to detect the power of the light emitted from the second switch unit 113. The first optical power monitoring device 114 is used to monitor the light output state of the second PIN phase shifter 1123 of the first switch unit, and the second optical power monitoring device 115 is used to monitor the light output state of the second switch unit 113, that is, the first optical power monitoring device 114 and the second optical power monitoring device 115 are used to monitor the switch state of the optical switch 11.

[0114] In this embodiment, if Figure 1A As shown, the third row ROW3 optical switch 11 also includes a third optical power monitoring device 116, which is located at the fourth end 4' exit port of the second optical splitter 1124 of the first switch unit 112 of the third row ROW3 optical switch 11, and is used to detect the power of the output light of the fourth end 4'' of the second optical splitter.

[0115] In this embodiment, if Figure 1A As shown, for the first optical power monitoring device 114 of the optical switches 11 in the first to third rows, the first optical power monitoring device 114 includes a first photodetector P1 and a first optical splitter S1, one end of the first optical splitter S1 is close to the third end 3' of the second optical splitter 1124 of the first switch unit 112 of the optical switch 11 and there may be a gap, and the other end is connected to the first photodetector P1. The first optical splitter S1 can use the evanescent wave coupling principle to couple a small portion of light (generally less than 5% of the light emitted from the third end 3' of the second optical splitter 1124 of the first switch unit 112 of the optical switch 11) from the third end 3' of the second optical splitter 1124 of the first switch unit 112 of the optical switch 11, and then detect the optical power through the first photodetector P1. The first photodetector P1 can absorb and detect the light incident therein.

[0116] In other embodiments, the first optical power monitoring device 114 is not limited to the above-mentioned first photodetector P1 and the third optical splitter S1. For example, one end of the third optical splitter S1 can be in contact with the third end of the second optical splitter 1124 of the first switch unit 112 of the optical switch 11, and the other end is connected to the first photodetector P1.

[0117] For the second optical power monitoring device 115 of the optical switches 11 in the first to third rows, the second optical power monitoring device 115 includes a second photodetector P2 and a fourth optical splitter S2. One end of the fourth optical splitter S2 is close to the first end 1'' of the first optical splitter 1121 of the second switch unit 113 of the optical switch 11 with a gap, and the other end is connected to the second photodetector P2. The fourth optical splitter S2 can use the evanescent wave coupling principle to couple a small portion of light (generally less than 5% of the light emitted from the first end 1'' of the first optical splitter 1121 of the second switch unit 113 of the optical switch 11) from the first end 1'' of the first optical splitter 1121 of the second switch unit 113 of the optical switch 11, and then detect the optical power through the second photodetector P2. The second photodetector P2 can absorb and detect the light incident therein.

[0118] In this embodiment, the material of the first photodetector P1 may include Si. In other embodiments, the material of the first photodetector P1 may include Ge or InP.

[0119] In this embodiment, the material of the second photodetector P2 includes Si. In other embodiments, the material of the second photodetector P2 may include Ge or InP.

[0120] In this embodiment, since the first single-mode interferometer 11222 and the second single-mode interferometer 11232 are ridge waveguides, the ridge waveguides are at least partially intrinsic semiconductors. When the optical switch 11 is in the off state, the intrinsic semiconductors are not doped, and no additional losses are caused by the carrier absorption effect. Moreover, when the optical switch 11 is in a closed state, the ridge waveguide allows light incident from the first end 1'' of the first optical splitter 1121 to be emitted from the fourth end 4' of the second optical splitter 1124, and light incident from the fourth end 4' of the second optical splitter 1124 to be emitted from the first end 1'' of the first optical splitter 1121, that is, the light passes through the first PIN phase shifter 1122; when the optical switch 11 is in an open state, the ridge waveguide allows light incident from the first end 1'' of the first optical splitter 1121 to be emitted from the third end 3' of the second optical splitter 1124, and light incident from the third end 3' of the second optical splitter 1124 to be emitted from the first end 1'' of the first optical splitter 1121, that is, the light passes through the second PIN phase shifter 1123. In this way, when the optical switch 11 array is in the on state, only one optical switch 11 in the optical switch 11 array is in the on state. Since optical loss is introduced only when the optical switch 11 is in the on state, the loss of the optical switch 11 array can be greatly reduced, which is conducive to realizing large-scale switching using the optical switch 11. In summary, the technical solution of the present application can improve the switching speed of the optical switch 11 and reduce the optical loss of the optical switch 11.

[0121] Another exemplary embodiment of the present application also provides an optical link switching chip. Figure 5 As shown, in this embodiment, Figure 3 On the basis of the illustrated embodiment, the optical switch 11 further includes a first air wall 31, and the first air wall 31 surrounds the first PIN phase shifter 1122. The first air wall 31 is located on the first insulating layer 22, the phase shifting layer 23, the second insulating layer 24 and a portion of the substrate 21. The first air wall 31 is used for heat insulation, which reduces the heat loss when the heating electrode 20 heats the ridge waveguide, and can increase the modulation efficiency of the heating electrode 20. Similarly, the first air wall 31 can also be arranged around the second PIN phase shifter 1123 and the ridge waveguide.

[0122] Another exemplary embodiment of the present application also provides an optical link switching chip. Fig. 6A and Figure 6B As shown, in this embodiment, Figure 3 Based on the embodiment shown, the optical switch 11 further includes a second air wall 41, a cantilever arm 51 and an air bottom groove 61. Fig. 6A is a cross-sectional view of a position other than the cantilever arm 51, Figure 6B It is a cross-sectional view at the position of the cantilever arm 51.

[0123] The second air wall 41 surrounds the first PIN phase shifter 1122 and the ridge waveguide. Similarly, the second air wall 41 can also surround the second PIN phase shifter 1123. The cantilever arm 51 is located on the first insulating layer 22, the phase shifting layer 23 and the second insulating layer 24, and is located in the second air wall 41. The cantilever arm 51 is used to support the first PIN phase shifter 1122, the ridge waveguide, the first electrode 25, the second electrode 26, the heating electrode 20 and the second insulating layer 24.

[0124] The air bottom groove 61 is opened on the substrate 21 and is located between the first insulating layer 22 and the substrate 21 . The second air wall 41 is connected to the air bottom groove 61 .

[0125] In this embodiment, the second air wall 41 and the air bottom groove 61 are used for heat insulation, which reduces the heat loss when the heating electrode 20 heats the ridge waveguide, and can increase the modulation efficiency of the heating electrode 20.

[0126] Another exemplary embodiment of the present application also provides an optical link switching chip. Figure 7 As shown, in this embodiment, the first positive doping region 11221 is a heavily positive doping region, and the first negative doping region 11223 is a heavily negative doping region. The first wing 21122 is a shallow positive doping region, and the second wing 41122 is a shallow negative doping region. The doping concentration of the first positive doping region 11221 is greater than the doping concentration of the first wing 21122, and the doping concentration of the first negative doping region 11223 is greater than the doping concentration of the second wing 41122.

[0127] In this embodiment, the doping concentration of the first positive doping region 11221 and the doping concentration of the first negative doping region 11223 are respectively greater than 10 18 cm -3 The doping concentration of the first wing 21122 and the doping concentration of the second wing 41122 are less than 10 18 cm -3 .

[0128] In this embodiment, since the first wing 21122 and the second wing 41122 of the ridge waveguide are lightly doped, the modulation efficiency and bandwidth of the first PIN phase shifter 1122 and the second PIN phase shifter 1123 can be increased.

[0129] It should be noted that shallow doping at the periphery of the ridge waveguide can increase the modulation efficiency and bandwidth of the first PIN phase shifter 1122 . However, the doping concentration and area must be strictly controlled to ensure that the absorption loss caused by doping is within a low level range.

[0130] Another exemplary embodiment of the present application also provides an optical link switching chip. Figure 8 As shown, in this embodiment, Figure 7On the basis of the illustrated embodiment, the optical switch 11 further includes a first air wall 31, and the first air wall 31 surrounds the first PIN phase shifter 1122. Similarly, the first air wall 31 can also be arranged around the second PIN phase shifter 1123. The first air wall 31 is located at the first insulating layer 22, the phase shift layer 23, the second insulating layer 24 and a part of the substrate 21. The first air wall 31 is used for heat insulation, reducing the heat loss when the heating electrode 20 heats the ridge waveguide, and can increase the modulation efficiency of the heating electrode 20.

[0131] Another exemplary embodiment of the present application also provides an optical link switching chip. Fig.9A and Fig. 9B As shown, in this embodiment, Figure 7 On the basis of the illustrated embodiment, the optical switch 11 further includes a second air wall 41 , a cantilever arm 51 and an air bottom groove 61 .

[0132] The second air wall 41 surrounds the first PIN phase shifter 1122. Similarly, the second air wall 41 can also be disposed around the second PIN phase shifter 1123. The cantilever arm 51 is located at the first insulating layer 22, the phase shifting layer 23 and the second insulating layer 24, and is located in the second air wall 41. The cantilever arm 51 is used to support the first PIN phase shifter 1122, the ridge waveguide, the first electrode 25, the second electrode 26, the heating electrode 20 and the second insulating layer 24.

[0133] The air bottom groove 61 is opened on the substrate 21 and is located between the first insulating layer 22 and the substrate 21 . The second air wall 41 is connected to the air bottom groove 61 .

[0134] In this embodiment, the second air wall 41 and the air bottom groove 61 are used for heat insulation, which reduces the heat loss when the heating electrode 20 heats the ridge waveguide, and can increase the modulation efficiency of the heating electrode 20.

[0135] Another exemplary embodiment of the present application also provides an optical link switching chip. Fig.10 As shown, in this embodiment, Figure 4 On the basis of the illustrated embodiment, the optical switch 11 further includes a first air wall 31, and the first air wall 31 surrounds the first PIN phase shifter 1122. Similarly, the first air wall 31 can also be arranged around the second PIN phase shifter 1123. The first air wall 31 is located at the first insulating layer 22, the phase shift layer 23, the second insulating layer 24 and a portion of the substrate 21. The first air wall 31 is used for heat insulation, reducing the heat loss when the doped resistor 29 heats the ridge waveguide, and can increase the modulation efficiency of the doped resistor 29.

[0136] Another exemplary embodiment of the present application also provides an optical link switching chip. Fig.11A and Fig. 11B As shown, in this embodiment, Figure 4 On the basis of the illustrated embodiment, the optical switch 11 further includes a second air wall 41 , a cantilever arm 51 and an air bottom groove 61 .

[0137] The second air wall 41 surrounds the first PIN phase shifter 1122. Similarly, the second air wall 41 can also be disposed around the second PIN phase shifter 1123. The cantilever arm 51 is located at the first insulating layer 22, the phase shifting layer 23 and the second insulating layer 24, and is located in the second air wall 41. The cantilever arm 51 is used to support the first PIN phase shifter 1122, the ridge waveguide, the first electrode 25, the second electrode 26, the heating electrode 20 and the second insulating layer 24.

[0138] The air bottom groove 61 is opened on the substrate 21 and is located between the first insulating layer 22 and the substrate 21 . The second air wall 41 is connected to the air bottom groove 61 .

[0139] In this embodiment, the second air wall 41 and the air bottom groove 61 are used for heat insulation, which reduces the heat loss when the heating electrode 20 heats the ridge waveguide, and can increase the modulation efficiency of the heating electrode 20.

[0140] Another exemplary embodiment of the present application further provides an optical switch 11. Figure 2 and Figure 5 As shown, the optical switch 11 includes: a substrate 21, a first insulating layer 22, a phase shifting layer 23, a second insulating layer 24, a first electrode 25, a second electrode 26 and an electric heating element (not shown in the figure).

[0141] The first insulating layer 22 is located on the substrate 21, the phase shift layer 23 is located on the side of the first insulating layer 22 away from the substrate 21, and the second insulating layer 24 is located on the side of the phase shift layer 23 away from the first insulating layer 22. The first electrode 25 and the second electrode 26 are located on the side of the second insulating layer 24 away from the first insulating layer 22. The first electrode 25 is electrically connected to the first positive doping region 11221, and the second electrode 26 is electrically connected to the first negative doping region 11223. The electric heating element is used to heat the ridge waveguide, and the electric heating element can be a heating electrode 20, such as Figure 3 As shown, the heating electrode 20 can be set at any position on the side of the first PIN phase shifter 1122; a doped resistor 29 can also be used, such as Figure 4 As shown, the doped resistor 29 generally includes a first doped resistor 291 and a second doped resistor 292. The first doped resistor 291 is arranged between the first positively doped region 11221 and one wing of the ridge waveguide, and the second doped resistor 292 is arranged between the first negatively doped region 11223 and the other wing of the ridge waveguide. The first doped resistor 291 and the second doped resistor 292 are energized independently, which also plays a role in offsetting the impact of changes in external ambient temperature on the device.

[0142] Reference Figure 1B, Figure 2 and Figure 5 The phase shift layer 23 includes a cross waveguide 111, a first switch unit 112 and a second switch unit 113. The first switch unit 112 includes a first optical splitter 1121, a first PIN phase shifter 1122, a second optical splitter 1124 and a second PIN phase shifter 1123. The second switch unit 113 has the same physical structure as the first switch unit 112, and the first switch unit 112 and the second switch unit 113 are arranged side by side. The second switch unit 113 of the optical switch 11 is axially symmetrically distributed with the first switch unit 112. The first PIN phase shifter 1122 includes a first positively doped region 11221, a first single-mode interferometer 11222, and a first negatively doped region 11223, and the first single-mode interferometer 11222 is arranged between the first positively doped region 11221 and the first negatively doped region 11223; the second PIN phase shifter 1123 includes a second positively doped region 11231, a second single-mode interferometer 11232, and a second negatively doped region 11233, and the second single-mode interferometer 11232 is arranged between the second positively doped region 11231 and the second negatively doped region 11233.

[0143] In this embodiment, it should be particularly noted that the functional designs of the first spectrometer 1121 and the second spectrometer 1124 are symmetrical, and the incident end and the output end are interchangeable, that is, the incident end of the first spectrometer 1121 can also be used as the output end, the output end of the first spectrometer 1121 can also be used as the incident end, the incident end of the second spectrometer 1124 can also be used as the output end, and the output end of the second spectrometer 1124 can also be used as the incident end.

[0144] In this embodiment, the first optical splitter 1121 may be a 1x2 MMI, a Y-type splitter, or a trident coupler, and the second optical splitter 1124 may be a 2x2 MMI, a directional coupler, or an adiabatic directional coupler.

[0145] In this embodiment, the first end of the cross waveguide 111 serves as an input port for the light source to enter, the second end of the cross waveguide 111 is opposite to the first end of the cross waveguide 111, the first end 1`` of the first optical splitter 1121 of the first switch unit 112 is connected to the second end of the cross waveguide 111 for inputting light, the first end 1`` of the first optical splitter 1121 of the first switch unit 112 is the first end 1 of the first switch unit, the second end 2`` of the first optical splitter 1121 of the first switch unit 112 is connected to the first positively doped region 11221 of the first PIN phase shifter 1122 of the first switch unit 112 for outputting light, and the third end 3`` of the first optical splitter 1121 of the first switch unit 112 is connected to the first positively doped region 11221 of the first PIN phase shifter 1122 of the first switch unit 112 The first switch unit 112 is connected to the second positively doped region 11231 of the second PIN phase shifter 1123 of the first switch unit 112 for outputting light, the first end 1` of the second optical splitter 1124 of the first switch unit 112 is connected to the first negatively doped region 11223 of the first PIN phase shifter 1122 of the first switch unit 112 for inputting light, the second end 2` of the second optical splitter 1124 of the first switch unit 112 is connected to the second negatively doped region 11233 of the second PIN phase shifter 1123 of the first switch unit 112 for inputting light, the fourth end 4` of the second optical splitter 1124 of the first switch unit 112 is used for outputting light, and the fourth end 4`` of the second optical splitter 1124 of the first switch unit 112 is the second end 2 of the first switch unit.

[0146] The third end 3' of the second optical splitter 1124 of the first switch unit 112 is the third end 3 of the first switch unit, the third end 3' of the second optical splitter 1124 of the second switch unit 113 is the third end 3 of the second switch unit, the third end 3' of the second optical splitter 1124 of the second switch unit 113 is connected to the third end 3' of the second optical splitter 1124 of the first switch unit 112 for inputting light, the fourth end 4' of the second optical splitter 1124 of the second switch unit 113 is used for inputting light, the fourth end 4' of the second optical splitter 1124 of the second switch unit 113 is the second end 2 of the second switch unit, the second end 2' of the second optical splitter 1124 of the second switch unit 113 is connected to the second negatively doped region 11233 of the second PIN phase shifter 1123 of the second switch unit 113 for outputting light, and the The first end 1` is connected to the first negatively doped region 11223 of the first PIN phase shifter 1122 of the second switch unit 113 for outputting light, the third end 3`` of the first optical splitter 1121 of the second switch unit 113 is connected to the second positively doped region 11231 of the second PIN phase shifter 1123 of the second switch unit 113 for inputting light, the second end 2`` of the first optical splitter 1121 of the second switch unit 113 is connected to the first positively doped region 11221 of the first PIN phase shifter 1122 of the second switch unit 113 for inputting light, the first end 1`` of the first optical splitter 1121 of the second switch unit 113 is connected to the third end of the cross waveguide 111 for outputting light, the first end 1`` of the first optical splitter 1121 of the second switch unit 113 is the first end 1 of the second switch unit; the fourth end of the cross waveguide 111 is used as an output port for light source output.

[0147] In this embodiment, the first PIN phase shifter 1122 and the second PIN phase shifter 1123 are used to switch the on state and the off state of the optical switch 11. In this embodiment, the switching speed of the optical switch 11 can be increased to nanosecond level, which greatly improves the switching speed of the optical switch 11.

[0148] In this embodiment, the first single-mode interferometer 11222 and the second single-mode interferometer 11232 are ridge waveguides (Rib waveguides), and the ridge waveguides are at least partially intrinsic semiconductors. The ridge waveguides are single-mode waveguides.

[0149] When the optical switch 11 is in the closed state, the ridge waveguide allows the incident light to pass through the first PIN phase shifter 1122 and then be emitted.

[0150] When the optical switch 11 is in an on state, the ridge waveguide allows the incident light to pass through the second PIN phase shifter 1123 and then be emitted.

[0151] In one embodiment, Figure 5 As shown, in Figure 3 Based on the embodiment shown, the optical switch 11 further includes a first air wall 31 , and the first air wall 31 surrounds the first PIN phase shifter 1122 . Similarly, the first air wall 31 can also be disposed around the second PIN phase shifter 1123 .

[0152] In one embodiment, Fig. 6A and Figure 6B As shown, in Figure 3 On the basis of the illustrated embodiment, the optical switch 11 further includes a second air wall 41 , a cantilever arm 51 and an air bottom groove 61 .

[0153] The second air wall 41 surrounds the first PIN phase shifter 1122. Similarly, the second air wall 41 can also be disposed around the second PIN phase shifter 1123. The cantilever arm 51 is located between the first insulating layer 22 and the phase shifting layer 23, and is located in the second air wall 41. The air bottom groove 61 is opened on the substrate 21, and is located between the first insulating layer 22 and the substrate 21. The second air wall 41 is connected to the air bottom groove 61.

[0154] In one embodiment, Figure 7 As shown, the first positive doping region 11221 is a heavily positive doping region, and the first negative doping region 11223 is a heavily negative doping region. The first wing 21122 is a shallow positive doping region, and the second wing 41122 is a shallow negative doping region. The doping concentration of the first positive doping region 11221 is greater than the doping concentration of the first wing 21122, and the doping concentration of the first negative doping region 11223 is greater than the doping concentration of the second wing 41122.

[0155] The doping concentration of the first positive doping region 11221 and the doping concentration of the first negative doping region 11223 are respectively greater than 10 18 cm -3 The doping concentration of the first wing 21122 and the doping concentration of the second wing 41122 are less than 10 18 cm -3 .

[0156] In one embodiment, Figure 8 As shown, in Figure 7 Based on the embodiment shown, the optical switch 11 further includes a first air wall 31. The first air wall 31 surrounds the first PIN phase shifter 1122. Similarly, the first air wall 31 can also be disposed around the second PIN phase shifter 1123.

[0157] In one embodiment, as shown in FIG. 9 , Figure 7 On the basis of the illustrated embodiment, the optical switch 11 further includes a second air wall 41 , a cantilever arm 51 and an air bottom groove 61 .

[0158] The second air wall 41 surrounds the first PIN phase shifter 1122. Similarly, the second air wall 41 can also be disposed around the second PIN phase shifter 1123. The cantilever arm 51 is located between the first insulating layer 22 and the phase shifting layer 23 and in the second air wall 41. The air bottom groove 61 is opened on the substrate 21 and is located between the first insulating layer 22 and the substrate 21. The second air wall 41 is connected to the air bottom groove 61.

[0159] In one embodiment, Fig.10 As shown, in Figure 4 Based on the embodiment shown, the optical switch 11 further includes a first air wall 31. The first air wall 31 surrounds the first PIN phase shifter 1122. Similarly, the first air wall 31 can also be disposed around the second PIN phase shifter 1123.

[0160] In one embodiment, Fig.11A and Fig. 11B As shown, in Figure 4 On the basis of the illustrated embodiment, the optical switch 11 further includes a second air wall 41 , a cantilever arm 51 and an air bottom groove 61 .

[0161] The second air wall 41 surrounds the first PIN phase shifter 1122 and the ridge waveguide. Similarly, the second air wall 41 can also be disposed around the second PIN phase shifter 1123. The cantilever arm 51 is located between the first insulating layer 22 and the phase shift layer 23 and is located in the second air wall 41. The air bottom groove 61 is opened on the substrate 21 and is located between the first insulating layer 22 and the substrate 21. The second air wall 41 is connected to the air bottom groove 61.

[0162] The technical solution provided in the present application can increase the switching speed of the optical switch 11 to the nanosecond level, increase the spectral bandwidth to the hundred-nanometer level, and control the optical loss on the optical link switching chip to an ultra-low level.

[0163] In the present invention, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance. The term "plurality" refers to two or more than two, unless otherwise clearly defined.

[0164] The above description of the embodiments is to facilitate those of ordinary skill in the art to understand and apply the present application. It is obvious that those familiar with the art can easily make various modifications to these embodiments and apply the general principles described herein to other embodiments without having to pay creative labor. Therefore, the present application is not limited to the embodiments herein, and improvements and modifications made by those skilled in the art based on the contents disclosed in the present application without departing from the scope and spirit of the present application are within the scope of the present application.

Claims

1. An optical switch, characterized in that: include: A substrate (21), a first insulating layer (22) and a phase shift layer (23); The first insulating layer (22) is located on the substrate (21), and the phase shift layer (23) is located on a side of the first insulating layer (22) away from the substrate (21); The phase shift layer (23) comprises a cross waveguide (111), a first switch unit (112) and a second switch unit (113); the first end of the cross waveguide (111) is used for light input, the second end of the cross waveguide (111) is connected to the first end of the first switch unit, the second end of the first switch unit (112) is used for light output, the third end of the first switch unit (112) is connected to the third end of the second switch unit (113), the third end of the first switch unit (112) is used for light output, the third end of the second switch unit (113) is used for light input, the second end of the second switch unit (113) is used for light input, the first end of the second switch unit (113) is connected to the third end of the cross waveguide (111), and the fourth end of the cross waveguide (111) is used for light output; The first switch unit (112) comprises a first optical splitter (1121), a first PIN phase shifter (1122), a second optical splitter (1124) and a second PIN phase shifter (1123); The first PIN phase shifter (1122) comprises a first positive doping region (11221), a first single-mode interferometer (11222) and a first negative doping region (11223), wherein the first single-mode interferometer (11222) is arranged between the first positive doping region (11221) and the first negative doping region (11223); the second PIN phase shifter (1123) comprises a second positive doping region (11231), a second single-mode interferometer (11232) and a second negative doping region (11233), wherein the second single-mode interferometer (11232) is arranged between the second positive doping region (11231) and the second negative doping region (11233); The first single-mode interferometer (11222) and the second single-mode interferometer (11232) are ridge waveguides, and at least part of the ridge waveguides are intrinsic semiconductors; the first PIN phase shifter (1122) and the second PIN phase shifter (1123) are used to switch the optical switch (11) between an on state and an off state; The second switch unit (113) has the same physical structure as the first switch unit (112); The first end of the first optical splitter (1121) of the first switch unit (112) is connected to the second end of the cross waveguide (111) for inputting light, the first end of the first optical splitter (1121) of the first switch unit (112) is the first end of the first switch unit (112), the second end of the first optical splitter (1121) of the first switch unit (112) is connected to the first positive doping region (11221) of the first PIN phase shifter (1122) of the first switch unit (112) for outputting light, and the third end of the first optical splitter (1121) of the first switch unit (112) is connected to the second positive doping region (11231) of the second PIN phase shifter (1123) of the first switch unit (112). ) is connected to output light, a first end of the second optical splitter (1124) of the first switch unit (112) is connected to the first negatively doped region (11223) of the first PIN phase shifter (1122) of the first switch unit (112) is connected to input light, a second end of the second optical splitter (1124) of the first switch unit (112) is connected to the second negatively doped region (11233) of the second PIN phase shifter (1123) of the first switch unit (112) is connected to input light, a fourth end of the second optical splitter (1124) of the first switch unit (112) is used to output light, and the fourth end of the second optical splitter (1124) of the first switch unit (112) is the second end of the first switch unit (112); The third end of the second optical splitter (1124) of the first switch unit (112) is the third end of the first switch unit, the third end of the second optical splitter (1124) of the second switch unit (113) is the third end of the second switch unit (113), the third end of the second optical splitter (1124) of the second switch unit (113) is connected to the third end of the second optical splitter (1124) of the first switch unit (112) for inputting light, the fourth end of the second optical splitter (1124) of the second switch unit (113) is used for inputting light, the fourth end of the second optical splitter (1124) of the second switch unit (113) is the second end of the second switch unit, the second end of the second optical splitter (1124) of the second switch unit (113) is connected to the second negatively doped region (11233) of the second PIN phase shifter (1123) of the second switch unit (113) for outputting light, and the second switch unit (113) The first end of the second optical splitter (1124) of the second switch unit (113) is connected to the first negatively doped region (11223) of the first PIN phase shifter (1122) of the second switch unit (113) for outputting light, the third end of the first optical splitter (1121) of the second switch unit (113) is connected to the second positively doped region (11231) of the second PIN phase shifter (1123) of the second switch unit (113) for inputting light, the second end of the first optical splitter (1121) of the second switch unit (113) is connected to the first positively doped region (11221) of the first PIN phase shifter (1122) of the second switch unit (113) for inputting light, the first end of the first optical splitter (1121) of the second switch unit (113) is connected to the third end of the cross waveguide (111) for outputting light, and the first end of the first optical splitter (1121) of the second switch unit (113) is the first end of the second switch unit; When the optical switch (11) is in a closed state, the ridge waveguide allows incident light to pass through the first PIN phase shifter (1122) and then be emitted; when the optical switch (11) is in an open state, the ridge waveguide allows incident light to pass through the second PIN phase shifter (1123) and then be emitted.

2. The optical switch according to claim 1, wherein: The ridge-type waveguide includes a first wing (21122), a ridge (31122) and a second wing (41122), wherein the first wing (21122) is located between the ridge (31122) and the first positively doped region (11221), and the second wing (41122) is located between the ridge (31122) and the first negatively doped region (11223), and the height of the first wing (21122) is the same as the height of the second wing (41122), and the height of the first wing (21122) is less than the height of the ridge (31122).

3. The optical switch according to claim 2, wherein: The ridge (31122), the first wing (21122) and the second wing (41122) are all intrinsic semiconductors.

4. The optical switch according to claim 2, wherein: The first positive doping region (11221) is a heavily positive doping region, and the first negative doping region (11223) is a heavily negative doping region; The first wing (21122) is a shallow positive doping region, and the second wing (41122) is a shallow negative doping region; The doping concentration of the first positively doped region (11221) is greater than the doping concentration of the first wing (21122), and the doping concentration of the first negatively doped region (11223) is greater than the doping concentration of the second wing (41122).

5. The optical switch according to claim 2, wherein: The doping concentration of the first positive doping region (11221) and the doping concentration of the first negative doping region (11223) are respectively greater than 10 18 cm -3 , the doping concentration of the first wing (21122) and the doping concentration of the second wing (41122) are respectively less than 10 18 cm -3 .

6. The optical switch according to claim 2, characterized in that: It also includes a second insulating layer (24), a first electrode (25), a second electrode (26), an electric heating element, a first conductive part (27) and a second conductive part (28); The second insulating layer (24) is located on a side of the phase shift layer (23) away from the first insulating layer (22), and the first electrode (25) and the second electrode (26) are located on a side of the second insulating layer (24) away from the first insulating layer (22); The second insulating layer (24) is provided with a first through hole and a second through hole; the first conductive portion (27) is located in the first through hole, and the first conductive portion (27) is used to connect the first electrode (25) and the first positively doped region (11221); the second conductive portion (28) is located in the second through hole, and the second conductive portion (28) is used to connect the second electrode (26) and the first negatively doped region (11223); The electric heating element is used to heat the ridge waveguide, the electric heating element is configured as a heating electrode (20), and the heating electrode (20) can be arranged at any position above or on the side of any one of the first PIN phase shifter (1122) and the second PIN phase shifter (1123); When the heating electrode (20) is arranged above any one of the first PIN phase shifter and the second PIN phase shifter (1123), the heating electrode (20) is located on the side of the second insulating layer (24) away from the first insulating layer (22), and is located between the first electrode (25) and the second electrode (26), and the projection of the heating electrode (20) on the second insulating layer (24) is located within the projection of the ridge waveguide on the second insulating layer (24).

7. The optical switch according to claim 6, characterized in that: The electric heating element is configured as a doped resistor (29), and the doped resistor (29) comprises a first doped resistor (291) and a second doped resistor (292), the first doped resistor (291) being disposed between the first positive doped region (11221) and the first wing (21122), the second doped resistor (292) being disposed between the first negative doped region (11223) and the second wing (41122), and the first doped resistor (291) and the second doped resistor (292) are energized independently of each other.

8. The optical switch according to claim 6, wherein: The material of the first electrode (25) is metal, the material of the second electrode (26) is metal, and the material of the heating electrode (20) is titanium nitride.

9. The optical switch according to claim 1, wherein: The invention also includes a first air wall (31), wherein the first air wall (31) surrounds the first PIN phase shifter (1122) or the second PIN phase shifter (1123).

10. The optical switch according to claim 1, wherein: It also includes a second air wall (41), a cantilever arm (51) and an air bottom groove (61); The second air wall (41) surrounds the first PIN phase shifter (1122) or the second PIN phase shifter (1123); the cantilever arm (51) is located between the first insulating layer (22) and the phase shift layer (23), and is located in the second air wall (41); the air bottom groove (61) is opened on the substrate (21), and is located between the first insulating layer (22) and the substrate (21); the second air wall (41) is connected to the air bottom groove (61).

11. The optical switch according to claim 6, wherein: The material of the substrate (21) is silicon; the material of the first insulating layer (22) and the material of the second insulating layer (24) are respectively silicon dioxide; and the material of the intrinsic semiconductor is silicon.

12. The optical switch according to claim 1, wherein: The ridge waveguide is a thermo-optical phase shifter.

13. An optical link switching chip, characterized in that: An optical switch (11) comprising M rows and N columns, N light input ports and M light output ports, M is a positive integer, N is a positive integer, and the optical switch (11) is the optical switch (11) according to any one of claims 1 to 12; For the N optical switches (11) in the first row, the first ends of the cross waveguides (111) of the optical switches (11) are respectively connected to the N light incident ports in a one-to-one correspondence; For the optical switches (11) in the j1th column, the fourth ends of the second optical splitting devices (1124) of the second switch units (113) of the optical switches (11) are respectively connected to the fourth ends of the cross waveguides (111) of the optical switches (11) in the j1+1th column; the value range of j1 is 1 to N-1; For the optical switch (11) in the j2th column, the fourth end of the second optical splitter (1124) of the first switch unit (112) of the optical switch (11) in the ith row is connected to the first end of the cross waveguide (111) of the optical switch (11) in the i+1th row, where i ranges from 1 to M and j2 ranges from 1 to N; For the optical switches (11) in the first column, the fourth ends of the cross waveguides (111) of the optical switches (11) are connected to the M optical output ports in a one-to-one correspondence.

14. The optical link switching chip according to claim 13, characterized in that: Each of the optical switches (11) further comprises: a first optical power monitoring device (114) and a second optical power monitoring device (115), wherein the first optical power monitoring device (114) is used to monitor the power of the light emitted through the third end of the first switch unit, and the second optical power monitoring device (115) is used to detect the power of the light emitted from the second switch unit (113).

15. The optical link switching chip according to claim 14, characterized in that: The optical switch (11) in the Mth row further comprises a third optical power monitoring device (116), which is located at the fourth end of the second optical splitter (1124) of the first switch unit (112) and is used to detect the power of the outgoing light passing through the fourth end of the second optical splitter (1124) of the first switch unit.

16. The optical link switching chip according to claim 15, characterized in that: The third optical power monitoring device (116) is located at the exit of the fourth end of the second optical splitter (1124) of the first switch unit (112).

17. The optical link switching chip according to claim 14, characterized in that: The first optical power monitoring device (114) comprises a first photodetector and a third optical splitter, one end of the third optical splitter is close to the third end of the second optical splitter (1124) of the first switch unit (112) with a gap therebetween, and the other end is connected to the first photodetector; The second optical power monitoring device (115) comprises a second photodetector and a fourth optical splitter, one end of the fourth optical splitter is close to the first end of the first optical splitter (1121) of the second switch unit (113) with a gap, and the other end is connected to the second photodetector.

18. The optical link switching chip according to claim 17, characterized in that: The material of the first photodetector includes Si, Ge or InP; The material of the second photodetector includes Si, Ge or InP.

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