Pixel driving circuit and display panel

Abstract

The application discloses a pixel driving circuit and a display panel. The display panel comprises a first pixel driving unit, a second pixel driving unit and a third pixel driving unit; the first pixel driving unit comprises a first light emitting element having a first anode; the second pixel driving unit comprises a second light emitting element having a second anode; the third pixel driving unit comprises a third light emitting element having a third anode; wherein the light emitting colors of the first light emitting element, the second light emitting element and the third light emitting element are different from each other, the first anode is configured with a first anode initialization signal, the second anode is configured with a second anode initialization signal, the third anode is configured with a third anode initialization signal, and the voltage values of at least two of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal are different.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a pixel driving circuit and a display panel. BACKGROUND

[0002] With the continuous development of display technology, people have higher and higher requirements for display panels, especially the display quality. However, the use performance of the existing display panel still needs to be improved. SUMMARY

[0003] In order to solve the above problems or other problems, the embodiments of the present application provide the following technical solutions:

[0004] A pixel driving circuit, the pixel driving circuit at least comprises:

[0005] A first pixel driving unit, the first pixel driving unit comprises a first light emitting element, the first light emitting element has a first anode;

[0006] A second pixel driving unit, the second pixel driving unit comprises a second light emitting element, the second light emitting element has a second anode;

[0007] A third pixel driving unit, the third pixel driving unit comprises a third light emitting element, the third light emitting element has a third anode;

[0008] Among them, the light emitting color of the first light emitting element, the second light emitting element and the third light emitting element is different, the first anode is configured with a first anode initialization signal, the second anode is configured with a second anode initialization signal, the third anode is configured with a third anode initialization signal, the voltage value of at least two of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal is different.

[0009] Optionally, the voltage values of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal are different.

[0010] Optionally, when the first light emitting element, the second light emitting element and the third light emitting element display at a first brightness, the first anode is configured with the first anode initialization signal, the second anode is configured with the second anode initialization signal, and the third anode is configured with the third anode initialization signal.

[0011] when the first light emitting element, the second light emitting element and the third light emitting element display at a second brightness, the first anode, the second anode and the third anode are configured a common initialization signal, the first brightness is less than the second brightness, voltage values of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal are all greater than a voltage value of the common initialization signal;

[0012] Preferably, the first light emitting element has a first cathode, the second light emitting element has a second cathode, the third light emitting element has a third cathode, the first cathode, the second cathode and the third cathode are configured a cathode signal, the cathode signal is multiplexed as the common initialization signal;

[0013] Preferably, at least two of the first cathode, the second cathode and the third cathode are configured the cathode signal with different voltage values;

[0014] Preferably, the first cathode, the second cathode and the third cathode are configured the cathode signal with different voltage values.

[0015] Correspondingly, the embodiment of the present application further provides a display panel, comprising the pixel driving circuit as described in any embodiment of the present application, and the display panel further comprises:

[0016] a switch circuit, coupled with the pixel driving circuit, and connected with a common initialization signal, the first anode initialization signal, the second anode initialization signal and the third anode initialization signal, the switch circuit is configured to be controlled by at least a first control signal, and when the first light emitting element, the second light emitting element and the third light emitting element display at a first brightness, the first anode, the second anode and the third anode are respectively configured the first anode initialization signal, the second anode initialization signal and the third anode initialization signal, and when the first light emitting element, the second light emitting element and the third light emitting element display at a second brightness, the first anode, the second anode and the third anode are respectively configured the common initialization signal;

[0017] wherein the first brightness is less than the second brightness, voltage values of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal are all greater than a voltage value of the common initialization signal.

[0018] Optionally, the switch circuit is further configured to configure the common initialization signal, the first anode initialization signal, the second anode initialization signal and the third anode initialization signal under control of a second control signal, the switch circuit comprising a plurality of signal selection units coupled with the first anode, the second anode and the third anode respectively, each of the signal selection units comprising:

[0019] a first transistor, a gate of the first transistor being connected to the first control signal, a first terminal of the first transistor being connected to the common initialization voltage, a second terminal of the first transistor being coupled with a corresponding one of the first anode, the second anode and the third anode;

[0020] a second transistor, a gate of the second transistor being connected to the second control signal, a first terminal of the second transistor being connected to a corresponding one of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal, a second terminal of the second transistor being coupled with the corresponding one of the first anode, the second anode and the third anode;

[0021] Preferably, the first transistor and the second transistor are transistors of the same channel type, the second control signal is a second level when the first control signal is a first level, the first level and the second level being different.

[0022] Preferably, the first transistor and the second transistor are transistors of different channel types, the first control signal is multiplexed as the second control signal.

[0023] Optionally, the display panel further comprises:

[0024] a light-emitting functional layer, a part of the first light-emitting element, a part of the second light-emitting element and a part of the third light-emitting element being disposed in the light-emitting functional layer;

[0025] an isolation layer for isolating the first light-emitting element, the second light-emitting element and the third light-emitting element, the isolation layer comprising at least a first initialization signal isolation column, a second initialization signal isolation column and a third initialization signal isolation column;

[0026] wherein the first initialization signal isolation column is coupled with the first anode and configured with the first anode initialization signal, the second initialization signal isolation column is coupled with the second anode and configured with the second anode initialization signal, and the third initialization signal isolation column is coupled with the third anode and configured with the third anode initialization signal.

[0027] Optionally, the display panel further comprises a cathode layer disposed on one side of the light-emitting functional layer, and the isolation layer further comprises a first cathode isolation column, a second cathode isolation column, and a third cathode isolation column, wherein:

[0028] The first light-emitting element has a first cathode, the second light-emitting element has a second cathode, and the third light-emitting element has a third cathode, the first cathode, the second cathode, and the third cathode are electrically isolated and disposed in the cathode layer;

[0029] The first cathode isolation column is coupled with the first cathode and configured with a first cathode signal, the second cathode isolation column is coupled with the second cathode and configured with a second cathode signal, and the third cathode isolation column is coupled with the third cathode and configured with a third cathode signal.

[0030] Preferably, the voltage values of at least two of the first cathode signal, the second cathode signal, and the third cathode signal are different.

[0031] Preferably, the voltage values of the first cathode signal, the second cathode signal, and the third cathode signal are different.

[0032] Optionally, the pixel driving circuit comprises a plurality of first pixel driving units, a plurality of second pixel driving units, and a plurality of third pixel driving units, wherein:

[0033] The first anodes in each of the first pixel driving units are coupled through the same first initial signal isolation column, the second anodes in each of the second pixel driving units are coupled through the same second initial signal isolation column, and the third anodes in each of the third pixel driving units are coupled through the same third initial signal isolation column.

[0034] Preferably, the plurality of first pixel driving units are arranged in a plurality of columns, the plurality of second pixel driving units are arranged in a plurality of columns, and the plurality of third pixel driving units are arranged in a plurality of columns, wherein the first anodes in each of the first pixel driving units in the same column are coupled through the same first initial signal isolation column, the second anodes in each of the second pixel driving units in the same column are coupled through the same second initial signal isolation column, and the third anodes in each of the third pixel driving units in the same column are coupled through the same third initial signal isolation column.

[0035] Optionally, the pixel driving circuit comprises a plurality of first pixel driving units, a plurality of second pixel driving units, and a plurality of third pixel driving units, wherein:

[0036] The first cathodes in each of the first pixel driving units are coupled through a same first cathode isolation column, the second cathodes in each of the second pixel driving units are coupled through a same second cathode isolation column, and the third cathodes in each of the third pixel driving units are coupled through a same third cathode isolation column.

[0037] Preferably, the first pixel driving units are arranged into multiple columns, the second pixel driving units are arranged into multiple columns, and the third pixel driving units are arranged into multiple columns, wherein the first cathodes in each of the first pixel driving units of a same column are coupled through a same first cathode isolation column, the second cathodes in each of the second pixel driving units of the same column are coupled through a same second cathode isolation column, and the third cathodes in each of the third pixel driving units of the same column are coupled through a same third cathode isolation column.

[0038] Optionally, the display panel has a display area and a frame area arranged adjacently, the pixel driving circuit is located in the display area, and the switch circuit is located in the frame area.

[0039] Preferably, the display panel at least includes:

[0040] A first initial signal bus is located in the frame area, and each of the first initial signal isolation columns is coupled with the first initial signal bus.

[0041] A second initial signal bus is located in the frame area, and each of the second initial signal isolation columns is coupled with the second initial signal bus.

[0042] A third initial signal bus is located in the frame area, and each of the third initial signal isolation columns is coupled with the third initial signal bus.

[0043] Preferably, the first pixel driving units are arranged into multiple columns, the second pixel driving units are arranged into multiple columns, and the third pixel driving units are arranged into multiple columns, the columns extend along a first direction, the first initial signal bus, the second initial signal bus, and the third initial signal bus extend along a second direction, and the first direction and the second direction have an included angle.

[0044] Preferably, the first direction is perpendicular to the second direction.

[0045] Preferably, the display panel further includes:

[0046] A first cathode bus is located in the frame area, and each of the first cathode isolation columns is coupled with the first cathode bus.

[0047] A second cathode bus is located in the frame area, and each of the second cathode isolation columns is coupled to the second cathode bus.

[0048] A third cathode bus is located in the frame area, and each of the third cathode isolation columns is coupled to the third cathode bus.

[0049] Preferably, the first pixel driving units are arranged in multiple columns, the second pixel driving units are arranged in multiple columns, and the third pixel driving units are arranged in multiple columns, the columns extend along a first direction, and the first cathode bus, the second cathode bus and the third cathode bus extend along a second direction, the first direction and the second direction have an included angle.

[0050] Preferably, the first direction is perpendicular to the second direction.

[0051] The first anode is configured with a first anode initialization signal, the second anode is configured with a second anode initialization signal, and the third anode is configured with a third anode initialization signal, and the voltage values of at least two of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal are different, so that the anode initialization voltage is matched with the light emitting element of different colors, so that the light emitting elements have the same starting speed, and the phenomenon that the chroma deviates from the specification when the first frame is switched from a black picture to a white picture is improved, the color trailing is improved, and the display effect is improved.

[0052] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0053] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0054] Figure 1 A schematic diagram of a pixel driving circuit provided by an embodiment of the present application is shown in the figure.

[0055] Figure 2 A schematic diagram of a circuit in a display panel provided by an embodiment of the present application is shown in the figure.

[0056] Figure 3 Another schematic diagram of a circuit in a display panel provided by an embodiment of the present application is shown in the figure.

[0057] Figure 4A circuit schematic diagram in a display panel provided by an embodiment of the present application;

[0058] Figure 5 A circuit schematic diagram in a display panel provided by an embodiment of the present application;

[0059] Figure 6 A circuit schematic diagram in a display panel provided by an embodiment of the present application;

[0060] Figure 7 A structure schematic diagram of a display panel provided by an embodiment of the present application;

[0061] Figure 8 For Figure 7 A cross-sectional structure schematic diagram of a first pixel driving unit along A-B in the display panel;

[0062] Figure 9 A local structure schematic diagram of a display panel provided by an embodiment of the present application;

[0063] Figure 10 A structure schematic diagram of another display panel provided by an embodiment of the present application;

[0064] Figure 11 A cross-sectional structure schematic diagram of another display panel provided by an embodiment of the present application;

[0065] Figure 12 And Figure 13 A structure schematic diagram formed in each step of a preparation method of a display panel provided by an embodiment of the present application. DETAILED DESCRIPTION

[0066] In order to make the personnel in the technical field better understand the present application scheme, the technical scheme in the embodiments of the present application will be described clearly and completely in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by the person skilled in the art without creative labor should belong to the scope of protection of the present application.

[0067] It is to be understood that the terminology "first", "second", and the like used throughout this specification and the accompanying drawings is merely used for distinguishing between similar objects, and does not necessarily imply a particular order or a particular spatial or temporal sequence. It should be understood that the use of such terminology herein is only intended to more particularly emphasize certain features of the embodiments of the present application and not to limit the scope of the present application. Moreover, it is to be understood that the terminology "comprising", "having", "including", and / or "containing" visited herein, is to be interpreted in an inclusive sense as opposed to an exclusive sense, so that items listed to contain, consist of, and / or include items do not, without further restriction, preclude the existence of additional identical items. Additionally, it is to be understood that any term "et al." used herein is to be interpreted as meaning "and the like".

[0068] The present inventors have found that, in some embodiments, the same anode initialization voltage is configured for different color light emitting elements in the pixel driving circuit, which results in a color shift when the display panel switches from a black picture to a white picture in the first frame, and thus, the human eye perceives a ghosting color shift problem.

[0069] Embodiments of the present application provide a pixel driving circuit. Figure 1 A schematic diagram of a pixel driving circuit provided by embodiments of the present application is shown in FIG. 1. Figure 1 The pixel driving circuit includes at least:

[0070] A first pixel driving unit 100 includes a first light emitting element 120 having a first anode;

[0071] A second pixel driving unit 400 includes a second light emitting element 420 having a second anode;

[0072] A third pixel driving unit 300 includes a third light emitting element 320 having a third anode;

[0073] The first light emitting element 120, the second light emitting element 420, and the third light emitting element 320 have different light emitting colors, the first anode is configured with a first anode initialization signal R_Vref, the second anode is configured with a second anode initialization signal G_Vref, and the third anode is configured with a third anode initialization signal B_Vref, and the voltage values of at least two of the first anode initialization signal R_Vref, the second anode initialization signal G_Vref, and the third anode initialization signal B_Vref are different.

[0074] In this way, the anode initialization voltage can be matched to the light emitting elements of different colors, so that the light emitting elements have the same light-on speed, which is beneficial to improve the phenomenon that the chroma deviates from the standard when the first frame is switched from a black picture to a white picture, improve the trailing color deviation, and thus improve the display effect.

[0075] In an embodiment of the present application, optionally, the first anode initialization signal R_Vref is different from the second anode initialization signal G_Vref and the third anode initialization signal B_Vref.

[0076] In another embodiment of the present application, optionally, the second anode initialization signal G_Vref is different from the first anode initialization signal R_Vref and the third anode initialization signal B_Vref.

[0077] In another embodiment of the present application, optionally, the third anode initialization signal B_Vref is different from the first anode initialization signal R_Vref and the second anode initialization signal G_Vref.

[0078] In another embodiment of the present application, optionally, the voltage values of the first anode initialization signal R_Vref, the second anode initialization signal G_Vref and the third anode initialization signal B_Vref are different from each other.

[0079] In actual application, the voltage values of the first anode initialization signal R_Vref, the second anode initialization signal G_Vref and the third anode initialization signal B_Vref can be determined according to the light-on voltages of the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320. The specific principle is as follows:

[0080] For example, the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320 are red light emitting element R, green light emitting element G and blue light emitting element B respectively, the light-on voltage of the red light emitting element R is V_R, the light-on voltage of the green light emitting element G is V_G, the light-on voltage of the blue light emitting element B is V_B, and V_R>V_G>V_B. That is, the light-on voltage of the red light emitting element R is greater than that of the green light emitting element G, and the light-on voltage of the green light emitting element G is greater than that of the blue light emitting element B.

[0081] In one embodiment, the whole display panel adopts the same anode initialization voltage Vref_COM, so in the light-emitting stage, the red light-emitting element R is lit after the voltage is raised by V_R-Vref_COM, the green light-emitting element G is lit after the voltage is raised by V_G-Vref_COM, and the blue light-emitting element B is lit after the voltage is raised by V_B-Vref_COM. Since V_R>V_G>V_B, V_R-Vref_COM>V_G-Vref_COM>V_B-Vref_COM. Under the action of the driving current, the blue light-emitting element B is lit first, the green light-emitting element G is lit second, and the red light-emitting element R is lit last, thus the problem of chromaticity deviation from the specification occurs.

[0082] In the embodiments of the present application, the anode initialization voltages of the light-emitting elements of different colors are different, specifically, the red light-emitting element R is written with the first anode initialization signal R_Vref, the green light-emitting element G is written with the second anode initialization signal G_Vref, and the blue light-emitting element B is written with the third anode initialization signal B_Vref, and R_Vref>G_Vref>B_Vref. Then in the light-emitting stage, the red light-emitting element R is lit after the voltage is raised by V_R-R_Vref, the green light-emitting element G is lit after the voltage is raised by V_G-G_Vref, and the blue light-emitting element B is lit after the voltage is raised by V_B-B_Vref. Since V_R>V_G>V_B and R_Vref>G_Vref>B_Vref, compared with the related art, V_R-R_Vref, V_G-G_Vref, and V_B-B_Vref are closer, and by selecting appropriate R_Vref, G_Vref, and B_Vref, V_R-R_Vref, V_G-G_Vref, and V_B-B_Vref can be made to be equal. Under the action of the driving current, the lighting time of the blue light-emitting element B, the green light-emitting element G, and the red light-emitting element R tends to be equal, thus the problem of chromaticity deviation from the specification is improved, the color cast is improved, and the display effect is improved.

[0083] It should be noted that in the above embodiments, the starting light-emitting voltage of the red light-emitting element R is greater than that of the green light-emitting element G, and the starting light-emitting voltage of the green light-emitting element G is greater than that of the blue light-emitting element B, which is used as an example for illustration, but is not a limitation of the present application. In actual application, the starting light-emitting voltage of the light-emitting element is also related to the capacitance of the light-emitting element, the material of the device, and other factors, and the size relationship of the starting light-emitting voltage of each light-emitting element cannot be generalized. However, the setting mode of the light-emitting element of the same color is usually the same, so the starting light-emitting voltage of the light-emitting element of the same color is the same.

[0084] On the basis of the above embodiments, the embodiments of the present application also provide an optimized technical solution to reduce the power consumption of the driving chip. Specifically:

[0085] When the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320 display at the first brightness, the first anode is configured with the first anode initialization signal R_Vref, the second anode is configured with the second anode initialization signal G_Vref, and the third anode is configured with the third anode initialization signal B_Vref.

[0086] When the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320 display at the second brightness, the first anode, the second anode and the third anode are configured with a common initialization signal, the first brightness is less than the second brightness, and the voltage value of the first anode initialization signal R_Vref, the voltage value of the second anode initialization signal G_Vref and the voltage value of the third anode initialization signal B_Vref are all greater than the voltage value of the common initialization signal.

[0087] Still taking the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320 as the red light emitting element R, the green light emitting element G and the blue light emitting element B respectively as an example, the driving method of the embodiment of the application is described:

[0088] When displaying the second brightness (high brightness), the first anode, the second anode and the third anode are configured with a common initialization signal Vref_COM, the first pixel driving unit 100 initializes the anode of the first light emitting element 120 with the common initialization voltage Vref_COM, the second pixel driving unit 400 initializes the anode of the second light emitting element 420 with the common initialization voltage Vref_COM, and the third pixel driving unit 300 initializes the anode of the third light emitting element 320 with the common initialization voltage Vref_COM. As known from the foregoing analysis, under the action of the driving current, the blue light emitting element B is first lighted, followed by the green light emitting element G, and finally the red light emitting element R, and there will be a problem of chroma deviation out of specification. However, when displaying high brightness, the driving current is large, and the charging speed of the anode voltage of each light emitting element 120 is very fast, and the starting speed of the red light emitting element R, the green light emitting element G and the blue light emitting element B is also very fast, and the human eye cannot perceive the trailing color deviation caused by the difference in anode charging rate. At the same time, the driving chip does not need to provide three different anode initialization voltages, thus, it is beneficial to reduce the power consumption of the driving chip.

[0089] And the embodiment of the present application sets the voltage value of the first anode initialization signal R_Vref, the voltage value of the second anode initialization signal G_Vref and the voltage value of the third anode initialization signal B_Vref all greater than the voltage value of the common initialization signal, shortens the difference between the initialization voltage and the starting voltage of the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320, is beneficial to shorten the time of each light emitting element from the initialization voltage to the starting voltage, and further improves the display effect.

[0090] On the basis of the above embodiments, optionally, the first light emitting element 120 has a first cathode, the second light emitting element 420 has a second cathode, and the third light emitting element 320 has a third cathode, and the first cathode, the second cathode and the third cathode are configured with a cathode signal, and the cathode signal is multiplexed as a common initialization signal Vref_COM. In this way, the driving chip can save the setting of the common initialization signal Vref_COM, thereby reducing the power consumption.

[0091] In addition, when displaying the second brightness (high brightness), only the cathode signal is used to provide the common initialization signal Vref_COM, thereby reducing the power consumption of the driving chip. Further, in an embodiment, in order to reduce the difference in starting speed when displaying low brightness, the anode initialization voltage is a voltage value adjustable according to brightness. Specifically, when displaying high brightness, the anode initialization voltage is low; when displaying low brightness, the anode initialization voltage is high. In this way, to some extent, the problem of low brightness trailing color cast can be improved, but the improvement effect is not good; in addition, the cathode voltage in this embodiment cannot be multiplexed as the anode initialization voltage. Therefore, compared with this embodiment, the embodiment of the present application not only can improve the problem of low brightness trailing color cast, but also can reduce the power consumption of the driving chip.

[0092] When displaying the first brightness (low brightness), the first anode is configured with the first anode initialization signal R_Vref, the second anode is configured with the second anode initialization signal G_Vref, and the third anode is configured with the third anode initialization signal B_Vref. Under the action of the driving current, the lighting time of the blue light emitting element B, the green light emitting element G and the red light emitting element R tends to be equal, thereby improving the problem of chroma deviation out of specification, improving trailing color cast and improving display effect.

[0093] Continuing to refer to Figure 1 On the basis of the above embodiments, optionally, the first cathode is configured with a first cathode signal R_ELVSS, the second cathode is configured with a second cathode signal G_ELVSS, and the third cathode is configured with a third cathode signal B_ELVSS. Wherein:

[0094] The voltage values of at least two of the first cathode signal R_ELVSS, the second cathode signal G_ELVSS and the third cathode signal B_ELVSS are different.

[0095] As a supplement to the foregoing embodiments, the embodiment of the present application sets the voltage values of at least two of the first cathode signal R_ELVSS, the second cathode signal G_ELVSS and the third cathode signal B_ELVSS to be different, so as to compensate for the voltage difference existing in the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320, thereby balancing the efficiencies of the first pixel driving unit 100, the second pixel driving unit 400 and the third pixel driving unit 300 and improving the uniformity of the display panel.

[0096] On the basis of the foregoing embodiments, optionally, the voltage of the second cathode signal G_ELVSS is different from the voltages of the first cathode signal R_ELVSS and the third cathode signal B_ELVSS; or the voltage of the first cathode signal R_ELVSS is different from the voltages of the second cathode signal G_ELVSS and the third cathode signal B_ELVSS; or the voltage of the third cathode signal B_ELVSS is different from the voltages of the first cathode signal R_ELVSS and the second cathode signal G_ELVSS; or the voltage values of the first cathode signal R_ELVSS, the second cathode signal G_ELVSS and the third cathode signal B_ELVSS are all different.

[0097] Continuing to refer to Figure 1 On the basis of the foregoing embodiments, optionally, the first pixel driving unit 100 has a first anode initialization module 110, the first anode initialization signal R_Vref is written to the first anode of the first light emitting element 120 through the first anode initialization module 110; the second anode initialization signal G_Vref is written to the first anode of the second light emitting element 420 through the second anode initialization module 410; and the third anode initialization signal B_Vref is written to the first anode of the third light emitting element 320 through the third anode initialization module 310.

[0098] On the basis of the foregoing embodiments, optionally, each anode initialization module includes a transistor, which can be referred to as an anode initialization transistor, the first end of the anode initialization transistor is connected to the corresponding anode initialization signal, and the second end of the anode initialization transistor is electrically connected to the anode of the light emitting element. In this way, the circuit structure is simple and easy to implement.

[0099] In other embodiments, each anode initialization module can also include other transistors, which are not limited by the present application.

[0100] On the basis of the above-mentioned embodiments, optionally, the first pixel driving unit 100 further comprises a first driving module 130, the second pixel driving unit 400 further comprises a second driving module 430, and the third pixel driving unit 300 further comprises a third driving module 330. Each driving module comprises a transistor, which is referred to as a driving transistor, and the driving transistor is configured to provide a driving current to the corresponding light emitting element.

[0101] The embodiment of the present application also provides a display panel comprising the pixel driving circuit according to any of the embodiments of the present application, and has corresponding beneficial effects. Figure 2 A circuit schematic diagram in a display panel is provided in the embodiment of the present application. Referring to Figure 2 , the display panel further comprises:

[0102] The switch circuit 200 is coupled with the pixel driving circuit and is connected to the common initialization signal Vref_COM, the first anode initialization signal R_Vref, the second anode initialization signal G_Vref and the third anode initialization signal B_Vref. The switch circuit 200 is configured to be controlled by at least the first control signal, and when the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320 display at the first brightness, the first anode initialization signal R_Vref, the second anode initialization signal G_Vref and the third anode initialization signal B_Vref are configured to the first anode, the second anode and the third anode respectively, and when the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320 display at the second brightness, the common initialization signal Vref_COM is configured to the first anode, the second anode and the third anode respectively.

[0103] The first brightness is less than the second brightness, and the voltage value of the first anode initialization signal R_Vref, the voltage value of the second anode initialization signal G_Vref and the voltage value of the third anode initialization signal B_Vref are all greater than the voltage value of the common initialization signal Vref_COM.

[0104] Continuously referring to Figure 2 In an embodiment of the present application, optionally, the switch circuit 200 comprises a plurality of input ends 201 and a plurality of output ends 202, the plurality of input ends 201 are connected to the first anode initialization signal R_Vref, the second anode initialization signal G_Vref, the third anode initialization signal B_Vref and the common initialization voltage Vref_COM respectively, and the plurality of output ends 202 are electrically connected with the first pixel driving unit 100, the second pixel driving unit 400 and the third pixel driving unit 300 respectively.

[0105] In the above-mentioned embodiments, there are various setting modes of the switch circuit 200, and several of them will be described below, but not as a limitation to the present application.

[0106] Figure 3 Another circuit schematic diagram in a display panel is provided for an embodiment of the present application. Referring to FIG. 2, the display panel includes a plurality of pixel driving units 100, a plurality of signal selection units 200, and a plurality of light emitting elements 300. Figure 3 In an embodiment of the present application, optionally, the switch circuit 200 is controlled by the first control signal Vref_SW1 and the second control signal Vref_SW2 to configure the common initialization signal Vref_COM, the first anode initialization signal R_Vref, the second anode initialization signal G_Vref, and the third anode initialization signal B_Vref. The switch circuit 200 includes a plurality of signal selection units coupled to the first anode, the second anode, and the third anode, respectively. Each signal selection unit includes:

[0107] a first transistor, a gate of the first transistor being connected to the first control signal, a first terminal of the first transistor being connected to the common initialization voltage, and a second terminal of the first transistor being connected to a corresponding one of the first anode, the second anode, and the third anode;

[0108] a second transistor, a gate of the second transistor being connected to the second control signal, a first terminal of the second transistor being connected to a corresponding one of the first anode initialization signal R_Vref, the second anode initialization signal G_Vref, and the third anode initialization signal B_Vref, and a second terminal of the second transistor being connected to a corresponding one of the first anode, the second anode, and the third anode.

[0109] For example, still taking the first light emitting element 120, the second light emitting element 420, and the third light emitting element 320 as the red light emitting element R, the green light emitting element G, and the blue light emitting element B, respectively, each signal selection unit is the red signal selection unit 210_R, the green signal selection unit 210_G, and the blue signal selection unit 210_B, respectively.

[0110] The red signal selection unit 210_R includes the first transistor T1_R and the red second transistor T2_R. The gate of the first transistor T1_R is connected to the first control signal Vref_SW1, the first terminal of the first transistor T1_R is connected to the common initialization voltage, and the second terminal of the first transistor T1_R is electrically connected to the first pixel driving unit 100, so that the first transistor T1_R provides the common initialization voltage to the red light emitting element R.

[0111] The gate of the red second transistor T2_R is connected to the second control signal Vref_SW2, the second terminal of the red second transistor T2_R is connected to the first anode initialization signal R_Vref of the red light emitting element R, and the second terminal of the red second transistor T2_R is electrically connected to the first pixel driving unit 100, so that the red second transistor T2_R provides the first anode initialization signal R_Vref to the red light emitting element R.

[0112] The green signal selection unit 210_G comprises a second transistor T1_G and a green second transistor T2_G. The gate of the second transistor T1_G is connected to the first control signal Vref_SW1, the first end of the second transistor T1_G is connected to the common initialization voltage, and the second end of the second transistor T1_G is electrically connected to the second pixel driving unit 400, so that the second transistor T1_G provides the common initialization voltage to the green light emitting element G.

[0113] The gate of the green second transistor T2_G is connected to the second control signal Vref_SW2, the second end of the green second transistor T2_G is connected to the second anode initialization signal G_Vref of the green light emitting element G, and the second end of the green second transistor T2_G is electrically connected to the second pixel driving unit 400, so that the green second transistor T2_G provides the second anode initialization signal G_Vref to the green light emitting element G.

[0114] The blue signal selection unit 210_B comprises a third transistor T1_B and a blue second transistor T2_B. The gate of the third transistor T1_B is connected to the first control signal Vref_SW1, the first end of the third transistor T1_B is connected to the common initialization voltage, and the second end of the third transistor T1_B is electrically connected to the third pixel driving unit 300, so that the third transistor T1_B provides the common initialization voltage to the blue light emitting element B.

[0115] The gate of the blue second transistor T2_B is connected to the second control signal Vref_SW2, the second end of the blue second transistor T2_B is connected to the third anode initialization signal B_Vref of the blue light emitting element B, and the second end of the blue second transistor T2_B is electrically connected to the third pixel driving unit 300, so that the blue second transistor T2_B provides the third anode initialization signal B_Vref to the blue light emitting element B.

[0116] Continuing to refer to Figure 3 On the basis of the above-mentioned embodiments, optionally, the first transistor and the second transistor are transistors of the same channel type, when the first control signal is at a first level, the second control signal is at a second level, and the first level and the second level are different. For example, when the first level is a high level, the second level is a low level; or, when the first level is a low level, the second level is a high level.

[0117] Preferably, the first transistor and the second transistor are transistors of different channel types, and the first control signal is multiplexed as the second control signal.

[0118] Continuing to refer to Figure 3In an embodiment of the present application, optionally, the voltage values of at least two of the first anode initialization signal R_Vref, the second anode initialization signal G_Vref and the third anode initialization signal B_Vref are different, and the common initialization voltages corresponding to the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320 are different; wherein the first cathode signal R_ELVSS is multiplexed as the common initialization voltage of the first light emitting element 120; the second cathode signal G_ELVSS is multiplexed as the common initialization voltage of the second light emitting element 420; and the third cathode signal B_ELVSS is multiplexed as the common initialization voltage of the third light emitting element 320.

[0119] In this way, different anode initialization voltages can be set for different cathode voltages, further improving the accuracy of anode initialization of each light emitting element, thereby further improving the display effect.

[0120] Exemplarily, the driving method of the pixel driving circuit is as follows:

[0121] When displaying the second brightness (high brightness), the first control signal Vref_SW1 controls the first transistor T1_R, the second transistor T1_G and the third transistor T1_B to be turned on, and the second control signal Vref_SW2 controls the red second transistor T2_R, the green second transistor T2_G and the blue second transistor T2_B to be turned off. The first transistor T1_R transmits the first cathode signal R_ELVSS to the first anode initialization module 110, and uses the first cathode signal R_ELVSS to initialize the red light emitting element R; the second transistor T1_G transmits the second cathode signal G_ELVSS to the second anode initialization module 410, and uses the second cathode signal G_ELVSS to initialize the green light emitting element G; and the third transistor T1_B transmits the third cathode signal B_ELVSS to the third anode initialization module 310, and uses the third cathode signal B_ELVSS to initialize the blue light emitting element B.

[0122] When the first luminance (low luminance) is displayed, the first control signal Vref_SW1 controls the first transistor T1_R, the second transistor T1_G and the third transistor T1_B to be off, and the second control signal Vref_SW2 controls the red second transistor T2_R, the green second transistor T2_G and the blue second transistor T2_B to be on. The red second transistor T2_R transmits the first anode initialization signal R_Vref to the first anode initialization module 110, and the red light emitting element R is initialized by using the first anode initialization signal R_Vref; the green second transistor T2_G transmits the second anode initialization signal G_Vref to the second anode initialization module 410, and the green light emitting element G is initialized by using the second anode initialization signal G_Vref; and the blue second transistor T2_B transmits the third anode initialization signal B_Vref to the third anode initialization module 310, and the blue light emitting element B is initialized by using the third anode initialization signal B_Vref.

[0123] Therefore, the circuit of the display panel provided by the embodiment of the present application has simple structure, and can improve the low luminance trailing color cast problem and reduce the power consumption of the driving chip.

[0124] Continuously referring to Figure 3 In an embodiment of the present application, optionally, each first transistor and each second transistor is a P-type transistor, and the first control signal Vref_SW1 and the second control signal Vref_SW2 are signals with opposite levels. In this way, the channel type of the transistor is single, and the display panel product is suitable for full low temperature polysilicon (LTPS).

[0125] Figure 4 Another circuit schematic diagram in a display panel provided by an embodiment of the present application is provided. Referring to Figure 4 In another embodiment of the present application, optionally, each first transistor and each second transistor is an N-type transistor, and the first control signal Vref_SW1 and the second control signal Vref_SW2 are signals with opposite levels. In this way, the channel type of the transistor is single, and the display panel product is suitable for full oxide (IGZO).

[0126] Figure 5 Another circuit schematic diagram in a display panel provided by an embodiment of the present application is provided. Referring to Figure 5In another embodiment of the present application, each of the first transistor and the second transistor is a transistor of different channel type, and the first control signal Vref_SW1 is multiplexed as the second control signal Vref_SW2. In this way, one control signal can be shared, and the driving chip only needs to output one control signal to control the switch circuit to work normally, thereby reducing the number of output channels of the driving chip and facilitating the wiring of the display panel.

[0127] Figure 6 Another circuit schematic diagram in a display panel is provided in another embodiment of the present application. Referring to FIG. 1, the display panel includes a plurality of pixel driving units 100, a first driving module 130, a first anode initialization module 110, a second anode initialization module 120, a first scan line Scan1, a second scan line Scan2, a third scan line Scan3, a data line Data, and an emission control signal line EM. Figure 6 Taking the first pixel driving unit 100 as an example, a specific circuit structure is provided in an embodiment of the present application. In one embodiment of the present application, the first driving module 130 includes a driving transistor T1, and the first anode initialization module 110 includes an anode initialization transistor T7. The first pixel driving unit 100 further includes a data writing transistor T2, a compensation transistor T3, a gate initialization transistor T4, a first emission control transistor T5, a second emission control transistor T6, and a storage capacitor Cst. The pixel circuit further includes the first scan line providing the first scan signal Scan1, the second scan line providing the second scan signal Scan2, the third scan line providing the third scan signal Scan3, the emission control signal line providing the emission control signal EM, and the data line providing the data signal Data.

[0128] In the formula, the data writing transistor T2 is a data writing transistor, the compensation transistor T3 is a threshold compensation transistor, the gate initialization transistor T4 is a gate initialization transistor, and the first emission control transistor T5 and the second emission control transistor T6 are emission control transistors. Each of the transistors is exemplarily a P-type transistor.

[0129] The gate of the data writing transistor T2 is connected to the second scan signal Scan2, the first electrode of the data writing transistor T2 is connected to the source S of the driving transistor T1, and the second electrode of the data writing transistor T2 is connected to the data signal Data; the gate of the compensation transistor T3 is connected to the second scan signal Scan2, the first electrode of the compensation transistor T3 is connected to the drain D of the driving transistor T1, and the second electrode of the compensation transistor T3 is connected to the gate G of the driving transistor T1; the gate of the gate initialization transistor T4 is connected to the first scan signal Scan1, the first electrode of the gate initialization transistor T4 is connected to the gate G of the driving transistor T1, and the second electrode of the gate initialization transistor T4 is connected to the first anode initialization signal R_Vref; the gate of the first light emitting control transistor T5 is connected to the light emitting control signal EM, the first electrode of the first light emitting control transistor T5 is connected to the source S of the driving transistor T1, and the second electrode of the first light emitting control transistor T5 is connected to the voltage ELVDD; the gate of the second light emitting control transistor T6 is connected to the light emitting control signal EM, the first electrode of the second light emitting control transistor T6 is connected to the drain D of the driving transistor T1, and the second electrode of the second light emitting control transistor T6 is connected to the anode of the first light emitting element 120; the gate of the anode initialization transistor T7 is connected to the third scan signal Scan3, the first electrode of the anode initialization transistor T7 is connected to the anode of the first light emitting element 120, and the second electrode of the anode initialization transistor T7 is connected to the first anode initialization signal R_Vref.

[0130] Exemplarily, the driving process of the first pixel driving unit 100 includes a gate initialization stage, a data writing stage, an anode initialization stage and a light emitting stage.

[0131] In the initialization stage, the light emitting control signal EM, the second scan signal Scan2 and the third scan signal Scan3 are all high level, and the first scan signal Scan1 is low level. The light emitting control signal EM controls the first light emitting control transistor T5 and the second light emitting control transistor T6 to be turned off; the second scan signal Scan2 controls the data writing transistor T2 and the compensation transistor T3 to be turned off; and the third scan signal Scan3 controls the anode initialization transistor T7 to be turned off. The first scan signal Scan1 controls the gate initialization transistor T4 to be turned on, and the gate initialization signal Vrefn initializes the gate G of the driving transistor T1, so as to ensure that the driving transistor T1 is in the turned-on state in the data writing stage.

[0132] In the data writing stage, the light emitting control signal EM, the first scan signal Scan1 and the third scan signal Scan3 are high level, and the second scan signal Scan2 is low level. The light emitting control signal EM controls the first light emitting control transistor T5 and the second light emitting control transistor T6 to be off; the first scan signal Scan1 controls the gate initialization transistor T4 to be off; the third scan signal Scan3 controls the anode initialization transistor T7 to be on. The second scan signal Scan2 controls the data writing transistor T2 and the compensation transistor T3 to be on, so as to write the data signal Data into the gate G of the driving transistor T1 via the source S and the drain D of the driving transistor T1. In addition, the first adjustment signal R_BSM is written into the first threshold adjustment gate 111 of the driving transistor T1, so as to adjust the threshold voltage of the driving transistor T1.

[0133] In the anode initialization stage, the light emitting control signal EM, the first scan signal Scan1 and the second scan signal Scan2 are high level, and the third scan signal Scan3 is low level. The light emitting control signal EM controls the first light emitting control transistor T5 and the second light emitting control transistor T6 to be off; the first scan signal Scan1 controls the gate initialization transistor T4 to be off; the second scan signal Scan2 controls the data writing transistor T2 and the compensation transistor T3 to be off. The third scan signal Scan3 controls the anode initialization transistor T7 to be on, so as to initialize the anode of the first light emitting element 120 by the first anode initialization signal R_Vref.

[0134] In the light emitting stage, the first scan signal Scan1, the second scan signal Scan2 and the third scan signal Scan3 are high level. The light emitting control signal EM is low level or presents periodic change, which is not limited in the present application. The first scan signal Scan1 controls the gate initialization transistor T4 to be off; the second scan signal Scan2 controls the data writing transistor T2 and the compensation transistor T3 to be off; the third scan signal Scan3 controls the anode initialization transistor T7 to be off. When the light emitting control signal EM controls the first light emitting control transistor T5 and the second light emitting control transistor T6 to be on, the driving transistor T1 generates driving current and flows into the anode of the first light emitting element 120, so as to drive the first light emitting element 120 to emit light.

[0135] In another embodiment of the present application, optionally, the first anode initialization signal R_Vref is multiplexed as the anode initialization signal, so as to reduce the number of signal lines and facilitate the wiring of the display panel.

[0136] On the basis of the above-mentioned embodiments, optionally, the switch circuit 200 is located in the frame area of the display panel, for example, the lower frame area, so as to reduce the wiring difficulty of the display area.

[0137] On the basis of the above-mentioned embodiments, the film layer structure of the display panel is further limited in the embodiments of the present application.

[0138] Figure 7 A structure diagram of a display panel provided by the embodiments of the present application is shown in the following figure, Figure 8 For Figure 7 The first pixel driving unit is shown in the cross-sectional structure along A-B in the figure. It should be noted that the first pixel driving unit 100, the second pixel driving unit 200 and the third pixel driving unit 300 are arranged in the same way, Figure 8 The structure of the first pixel driving unit 100 is taken as an example for illustration. Referring to Figure 7 And Figure 8 Optionally, the display panel further comprises:

[0139] The light emitting functional layer, the first light emitting element 120, the second light emitting element 420 (not shown in the figure) and the third light emitting element 320 (not shown in the figure) are arranged in the light emitting functional layer; Figure 8 Figure 8 The isolation layer is used to separate the first light emitting element 120, the second light emitting element 420 and the third light emitting element 320, and the isolation layer at least comprises a first initial signal isolation column 311, a second initial signal isolation column (not shown in the figure) and a third initial signal isolation column (not shown in the figure);

[0140] The first initial signal isolation column 311 is coupled with the first anode in the first pixel driving unit 100 and is configured with the first anode initialization signal R_Vref, the second initial signal isolation column is coupled with the second anode in the second pixel driving unit 400 and is configured with the second anode initialization signal G_Vref, and the third initial signal isolation column is coupled with the third anode in the third pixel driving unit 300 and is configured with the third anode initialization signal B_Vref. Figure 8 Figure 8

[0141] The first initial signal isolation column 311 is coupled with the first anode in the first pixel driving unit 100 and is configured with the first anode initialization signal R_Vref, the second initial signal isolation column is coupled with the second anode in the second pixel driving unit 400 and is configured with the second anode initialization signal G_Vref, and the third initial signal isolation column is coupled with the third anode in the third pixel driving unit 300 and is configured with the third anode initialization signal B_Vref.

[0142] ​​​In this embodiment of the invention, the first initial signal isolation pillar 311 of the isolation pillar layer carries the first anode initialization signal R_Vref in the film structure, which helps to reduce the resistance of the first anode initialization signal R_Vref and improve the uniformity of the first anode initialization signal R_Vref received by the first pixel driving unit 100. Similarly, the second initial signal isolation pillar of the isolation pillar layer carries the second anode initialization signal G_Vref, which helps to reduce the resistance of the second anode initialization signal G_Vref and improve the uniformity of the second anode initialization signal G_Vref received by the second pixel driving unit 400. The third initial signal isolation pillar of the isolation pillar layer carries the third anode initialization signal B_Vref, which helps to reduce the resistance of the third anode initialization signal B_Vref and improve the uniformity of the third anode initialization signal B_Vref received by the third pixel driving unit 300. Therefore, this embodiment of the invention further improves the display uniformity of the display panel.

[0143] See also Figure 7 and Figure 8 Based on the above embodiments, optionally, the display panel further includes a cathode layer, which is disposed on one side of the light-emitting functional layer, and the isolation layer further includes a first cathode isolation pillar 321 and a second cathode isolation pillar ( Figure 8 (not shown in the image) and the third cathode isolation column ( Figure 8 (not shown in the image), where:

[0144] The first light-emitting element 120 has a first cathode, the second light-emitting element 420 has a second cathode, and the third light-emitting element 320 has a third cathode. The first, second, and third cathodes are electrically isolated and disposed in a cathode layer. A first cathode isolation post 321 is coupled to the first cathode and configured with a first cathode signal, a second cathode isolation post is coupled to the second cathode and configured with a second cathode signal, and a third cathode isolation post is coupled to the third cathode and configured with a third cathode signal. This arrangement facilitates setting different voltage values ​​for at least two of the first, second, and third cathode signals, compensating for voltage differences among the first, second, and third light-emitting elements, thereby balancing the efficiency of the first pixel driving unit 100, the second pixel driving unit 400, and the third pixel driving unit 300, and improving the uniformity of the display panel.

[0145] It should be understood that the above-mentioned first initial signal isolation column 311, the second initial signal isolation column and the third initial signal isolation column have the function of cutting off the first light emitting element, the second light emitting element and the third light emitting element on the one hand, and carrying the corresponding anode initialization signal on the other hand; correspondingly, the first cathode isolation column 321, the second cathode isolation column and the third cathode isolation column have the function of cutting off the first light emitting element, the second light emitting element and the third light emitting element on the one hand, and carrying the corresponding cathode signal on the other hand.

[0146] Continuing to refer to Figure 7 and Figure 8 On the basis of the above-mentioned embodiments, the display panel further includes other film layers, for example, an active layer, a first metal layer, a second metal layer, a third metal layer and an anode metal layer. Insulating layers (for example, a first insulating layer 41, a second insulating layer 42, a third insulating layer 43 and a fourth insulating layer 44) are arranged between the film layers.

[0147] Taking the first pixel driving unit as an example, the first metal layer is provided with a gate 13 of a first anode initialization transistor; the active layer is provided with a semiconductor 12 of the first anode initialization transistor; the third metal layer is provided with a plate 14 of a capacitor; the fourth metal layer is provided with a first end 15 and a second end 16 of the first anode initialization transistor, and the first end 15 and the second end 16 are respectively electrically connected with the semiconductor 12.

[0148] Among them, the first anode initialization transistor is a transistor in the first anode initialization module 110, and the first anode initialization module 110 exemplarily includes only the anode initialization transistor, and the first anode initialization transistor is denoted by reference numeral 110 below.

[0149] The anode metal layer is provided with an anode 21 of the first light emitting element 120, and the anode 21 is further provided with a light emitting layer 22 and a cathode 23 of the first light emitting element 120. The isolation column layer is provided with a first initial signal isolation column 31, the first initial signal isolation column 31 can conduct electricity, the first initial signal isolation column 31 and the first end 15 of the first anode initialization transistor 110 are transmembrane electrically connected; the second end 16 of the first anode initialization transistor 110 is electrically connected with the anode 21 of the first light emitting element 120.

[0150] The first anode initialization signal R_Vref of the first light emitting element 120 is transmitted by the first initial signal isolation column 31.

[0151] It should be noted that in the above embodiments, the first end of the first anode initialization transistor is electrically connected with the first isolation column, and the second end is electrically connected with the anode of the first light emitting element. This is not a limitation of the present application. In other embodiments, the first anode initialization module can further include other transistors, and the other transistors are configured to assist the first anode initialization transistor to initialize the anode of the light emitting element. For example, the other transistors are further arranged between the first anode initialization transistor and the anode of the light emitting element.

[0152] Continuing to refer to Figure 8 On the basis of the above embodiments, the first metal layer can further have a gate 18 of a first drive transistor; the active layer can have a semiconductor 17 of the first drive transistor; the fourth metal layer can have a first end 19 and a second end 20 of the first drive transistor, and the first end 19 and the second end 20 are respectively electrically connected with the semiconductor 12. The capacitor plate 14 and the gate 18 of the first drive transistor are arranged in an overlapping manner to form a storage capacitor. The first drive transistor is a transistor in the first drive module 130. The first drive module 130 can include only the first drive transistor. The first drive transistor is denoted by reference numeral 130. The anode 21 is electrically connected with the first end 19 of the first drive transistor. The drive current generated by the first drive transistor is transmitted to the anode 21. Under the action of the voltage of the anode 21 and the voltage of the cathode 23, the light emitting layer 22 emits light.

[0153] On the basis of the above embodiments, the first initial signal isolation column 311, the second initial signal isolation column, the third initial signal isolation column, the first cathode isolation column 321, the second cathode isolation column, and the third cathode isolation column can be of an integrated structure. For example, the cross-sectional shape of the isolation columns can be a trapezoid with the upper side larger than the lower side. The upper side larger than the lower side means that the side of the trapezoid far from the first metal layer is the lower base, and the side of the trapezoid close to the first metal layer is the upper base. In this way, the preparation of the isolation columns is facilitated. Preferably, the first initial signal isolation column 311, the second initial signal isolation column, the third initial signal isolation column, the first cathode isolation column 321, the second cathode isolation column, and the third cathode isolation column can be prepared by the same process. Alternatively, the first gate isolation column 311, the second gate isolation column, the third gate isolation column, the first cathode isolation column 32, the second cathode isolation column, and the third cathode isolation column can also be of a layered structure, which is not limited in the present application.

[0154] The first cathode isolation column 321 is used to realize full-area evaporation of the light emitting material and to carry the cathode voltage of the first light emitting element 120. For example, after the array film layer provided with the transistors is prepared, an anode metal layer is formed on the array film layer, and the anode 21 is patterned to be electrically connected with the second end 16 of the initial transistor 110 and the first end 19 of the driving transistor 130; the sixth insulating layer 52 (i.e. the pixel definition layer) and the isolation column layer are prepared on the anode layer, the isolation column layer is patterned to form the first initial signal isolation column 31 and the first cathode isolation column 321 which are large at the top and small at the bottom; the sixth insulating layer 52 (i.e. the pixel definition layer) is patterned to form a pixel opening on the anode 21, and the first light emitting material is evaporated in the pixel opening; and then the first cathode material is evaporated on the first light emitting material.

[0155] The first light emitting material and the first cathode material are evaporated by full-layer evaporation, and the first light emitting material and the first cathode material are evaporated in each pixel opening (including the pixel openings corresponding to the first pixel driving unit 100, the second pixel driving unit 400 and the third pixel driving unit 300). Since the first cathode isolation column 321 is large at the top and small at the bottom, the materials evaporated in the adjacent two pixel openings are disconnected by the first cathode isolation column 321, and the edge part of the cathode 23 is electrically connected with the first cathode isolation column 32. Finally, the first light emitting material and the first cathode material in the pixel openings corresponding to the second pixel driving unit 400 and the third pixel driving unit 300 are removed. Thus, the evaporation of the first light emitting material and the first cathode material is completed.

[0156] The process of evaporating the light emitting material and the cathode material in the pixel openings of the second pixel driving unit 400 and the third pixel driving unit 300 is similar, and will not be described herein.

[0157] As can be seen, the display panel provided by the embodiment of the present application can use the full-layer evaporation process when evaporating the light emitting element, and does not need to use the fine mask plate, which is beneficial to reduce the manufacturing cost of the display panel. In addition, in the related art, the support column needs to be provided to support the fine mask plate, and the embodiment of the present application does not need to use the fine mask plate, so the first initial signal isolation column 311 and the first cathode isolation column 321 do not need to support the fine mask plate, and therefore the size and position of the first initial signal isolation column 311 and the first cathode isolation column 321 can be adjusted arbitrarily as needed.

[0158] Continuing to refer to Figure 8 In the above embodiments, the insulating layer between the film layers can be provided in various ways, which will be described in detail below, but is not limited to the present application.

[0159] Continuing to refer to Figure 8In the above embodiments, the insulating layer between the film layers can be arranged in various ways, which will be described in detail below, but are not intended to limit the present application.

[0160] In an embodiment, a first insulating layer 41, which can also be referred to as a gate insulating layer, is arranged between the active layer and the first metal layer, forming an insulating layer part of the anode initialization transistor 110 and the driving transistor 130. The material of the first insulating layer 41 can be an inorganic material, such as SiN and / or SiO, etc.

[0161] In an embodiment, a second insulating layer 42, which can also be referred to as an intermediate insulating layer, is arranged between the first metal layer and the second metal layer, forming an intermediate dielectric layer of the capacitor. The material of the second insulating layer 42 can be an inorganic material, such as SiN and / or SiO, etc.

[0162] In an embodiment, a third insulating layer 43 is arranged between the second metal layer and the third metal layer. The material of the third insulating layer 43 can be an inorganic material, such as SiN and / or SiO, etc.

[0163] In an embodiment, a fourth insulating layer 44 is further arranged between the third insulating layer 43 and the third metal layer. The material of the fourth insulating layer 44 can be an organic material, which can not only isolate the second metal layer and the third metal layer, but also play a certain planarization role.

[0164] In an embodiment, a fifth insulating layer 51 is arranged between the third metal layer and the anode metal layer. The fifth insulating layer 51 can not only isolate the third metal layer and the anode metal layer, but also planarize the surface of the third metal layer, which is conducive to the planarization of the film layers during the subsequent preparation of the light-emitting element and optimizes the light-emitting effect of the light-emitting element.

[0165] In an embodiment, a sixth insulating layer 52, which can also be referred to as a pixel definition layer, is further arranged on the anode metal layer. The sixth insulating layer 52 can not only isolate the anode metal layer and the isolation column layer, but also define the size of the pixel opening.

[0166] In an embodiment, a seventh insulating layer 53 is further arranged on the isolation column layer. The seventh insulating layer 53 covers the cathode 23 and can isolate the light-emitting element 120. The seventh insulating layer 53 also fills between the first initial signal isolation column 311 and the first cathode isolation column 321, and can isolate the first initial signal isolation column 311 and the first cathode isolation column 321.

[0167] It should be noted that due to the shape features of the first initial signal isolation column 311 and the first cathode isolation column 321, the space between the first initial signal isolation column 311 and the first cathode isolation column 321 is small at the top and large at the bottom, and the seventh insulating layer 53 may not be able to fill the space when it is deposited. This situation is allowed. With process improvement, the seventh insulating layer 53 can also fill the space, and these situations are within the protection scope of the present application.

[0168] In an embodiment, the seventh insulating layer 53 is further provided with a sealing layer 61 and an encapsulation layer 62. The sealing layer 61 is formed by inkjet printing, and the encapsulation layer 62 is formed by chemical vapor deposition.

[0169] It should be noted that in the above embodiments, the first driving transistor 130 is directly connected to the first light emitting element 120, which is not a limitation of the present application. In other embodiments, for example, for a pixel driving circuit with compensation function, a light emitting control transistor is further provided between the first driving transistor 130 and the first light emitting element 120.

[0170] On the basis of the above embodiments, the pixel driving circuit comprises a plurality of first pixel driving units 100, a plurality of second pixel driving units 400 and a plurality of third pixel driving units 300. Continue to refer to Figure 7 , wherein:

[0171] The first cathode 111 in each first pixel driving unit 100 is coupled through the same first initial signal isolation column 311, the second cathode 211 in each second pixel driving unit 400 is coupled through the same second initial signal isolation column 312, and the third cathode 311 in each third pixel driving unit is coupled through the same third initial signal isolation column 313.

[0172] Through this arrangement, the same adjustment voltage can be provided to sub-pixels of the same color, thereby further achieving the beneficial effect of reducing the number of signal lines while ensuring the display effect of the display panel.

[0173] Continue to refer to Figure 7 On the basis of the above embodiments, the plurality of first pixel driving units 100 are arranged in multiple columns, the plurality of second pixel driving units 400 are arranged in multiple columns, and the plurality of third pixel driving units 300 are arranged in multiple columns, wherein the first cathode 111 in each first pixel driving unit 100 of the same column is coupled through the same first initial signal isolation column 311, the second cathode 211 in each second pixel driving unit 400 of the same column is coupled through the same second initial signal isolation column 312, and the third cathode 311 in each third pixel driving unit 300 of the same column is coupled through the same third initial signal isolation column 313.

[0174] With reference to Figure 7 On the basis of the above embodiments, optionally, the first cathodes in each first pixel driving unit 100 are coupled through the same first cathode isolation column 321, the second cathodes in each second pixel driving unit 400 are coupled through the same second cathode isolation column 322, and the third cathodes in each third pixel driving unit 300 are coupled through the same third cathode isolation column 323. Through this arrangement, the same cathode voltage can be provided to the sub-pixels of the same color, thereby further achieving the beneficial effect of reducing the number of signal lines while ensuring the display effect of the display panel.

[0175] With reference to Figure 7 On the basis of the above embodiments, optionally, the first pixel driving units 100 are arranged in multiple columns, the second pixel driving units 400 are arranged in multiple columns, and the third pixel driving units 300 are arranged in multiple columns, wherein the first cathodes in each first pixel driving unit 100 in the same column are coupled through the same first cathode isolation column 321, the second cathodes in each second pixel driving unit 400 in the same column are coupled through the same second cathode isolation column 322, and the third cathodes in each third pixel driving unit 300 in the same column are coupled through the same third cathode isolation column 323.

[0176] With reference to Figure 8 and Figure 7 On the basis of the above embodiments, optionally, the first cathode isolation column 321 surrounds the first pixel driving unit 100, and the first initial signal isolation column 311 is located at the periphery of the first cathode isolation column 321; the second cathode isolation column 322 surrounds the second pixel driving unit 400, and the second initial signal isolation column 312 is located at the periphery of the second cathode isolation column 322; and the third cathode isolation column 323 surrounds the third pixel driving unit 300, and the third initial signal isolation column 313 is located at the periphery of the third cathode isolation column 323.

[0177] In the above embodiments, the arrangement of the first initial signal isolation column 31 and the first cathode isolation column 321 can be adjusted according to the pixel arrangement. Specifically, as shown in Figure 7 in one arrangement (e.g., RGB arrangement), the light emitting elements are arranged in a row direction and a column direction, and the spacing between the light emitting elements is equal. The first initial signal isolation column 31 is located on the right side of the corresponding light emitting element, and does not need to be routed.

[0178] Figure 9 A partial structure schematic diagram of a display panel according to an embodiment of the present application is provided. With reference to Figure 9In another arrangement, the blue light emitting element B has a larger size; the red light emitting element R and the green light emitting element G have smaller sizes and are arranged alternately. The first initial signal isolation column 311 and the second initial signal isolation column 312 are both located at the red light emitting element R and the green light emitting element G for winding and wiring. Specifically, the first initial signal isolation column 311 winds at the right side of the red light emitting element R to form a serpentine wiring; the second initial signal isolation column 312 winds at the left side of the green light emitting element G to form a serpentine wiring. Although the first initial signal isolation column 311 and the second initial signal isolation column 312 are wound, the extension direction is still the column direction. The third initial signal isolation column 313 is at the right side of the blue light emitting element B and extends in a straight line.

[0179] Optionally, the first initial signal isolation column 311 is closer to the red light emitting element R, the second initial signal isolation column 312 is closer to the green light emitting element G, and the third initial signal isolation column 313 is closer to the blue light emitting element B, so as to simplify the wiring mode.

[0180] Continuing to refer to Figure 9 Optionally, the first initial signal isolation column 311 is located at the periphery of the first cathode isolation column 321. For example, the first initial signal isolation column 311 is located at the periphery of the first cathode isolation column 3211, the second initial signal isolation column 312 is located at the periphery of the second cathode isolation column 3212, and the third initial signal isolation column 313 is located at the periphery of the third cathode isolation column 3213.

[0181] It should be noted that in the array, the row and the column are relative concepts, and in general, the longitudinal direction is considered as the column and the transverse direction is considered as the row. However, the longitudinal direction and the transverse direction can be interchangeable in different angles, so the row can also be called the column, and the column can also be called the row.

[0182] Figure 10 Another structure schematic diagram of a display panel is provided for the embodiments of the present application. Referring to Figure 10 On the basis of the above-mentioned embodiments, the display panel has a display area 81 and a frame area (for example, including an upper frame area 82 and a lower frame area 83) arranged adjacently, the pixel driving circuit is located in the display area 81, and the display panel at least includes a first initial signal bus 711, a second initial signal bus 712, and a third initial signal bus 713. The first initial signal bus 711 is located in the frame area, each first initial signal isolation column 311 is coupled with the first initial signal bus 711; the second initial signal bus 712 is located in the frame area, each second initial signal isolation column 312 is coupled with the second initial signal bus 712; and the third initial signal bus 713 is located in the frame area, each third initial signal isolation column 313 is coupled with the third initial signal bus 713. In this way, the wiring of the display panel is further simplified.

[0183] Optionally, the plurality of first pixel driving units 100 are arranged in a plurality of columns, the plurality of second pixel driving units are arranged in a plurality of columns, and the plurality of third pixel driving units are arranged in a plurality of columns, the columns extending along a first direction, the first initial signal bus 711, the second initial signal bus 712 and the third initial signal bus 713 extending along a second direction, the first direction and the second direction having an included angle. Preferably, the first direction is perpendicular to the second direction.

[0184] Referring to Figure 10 On the basis of the above embodiments, optionally, the display panel further comprises a first cathode bus 721, a second cathode bus 722 and a third cathode bus 723. The first cathode bus 721 is located in the frame area, and each first cathode isolation column 321 is coupled to the first cathode bus 721; the second cathode bus 722 is located in the frame area, and each second cathode isolation column 322 is coupled to the second cathode bus 722; the third cathode bus 723 is located in the frame area, and each third cathode isolation column 323 is coupled to the third cathode bus 723. In this way, the wiring of the display panel is further simplified.

[0185] Optionally, the plurality of first pixel driving units 100 are arranged in a plurality of columns, the plurality of second pixel driving units are arranged in a plurality of columns, and the plurality of third pixel driving units are arranged in a plurality of columns, the columns extending along a first direction, the first cathode bus, the second cathode bus and the third cathode bus extending along a second direction, the first direction and the second direction having an included angle. Preferably, the first direction is perpendicular to the second direction.

[0186] Continuing to refer to Figure 10 In an embodiment of the present application, optionally, the display panel further comprises an upper frame area 82 and a lower frame area 83, the upper frame area 82 being located at the top of the display area 81, and the lower frame area 83 being located at the bottom of the display area 81. The upper frame area 82 and the lower frame area 83 are both provided with the first initial signal bus 711, which is equivalent to providing voltage from both ends of the first initial signal isolation column 311, which is conducive to improving the uniformity of the voltage signal received by each pixel driving unit. Similarly, the upper frame area 82 and the lower frame area 83 are both provided with the second initial signal bus 712 and the third initial signal bus 713.

[0187] In another embodiment of the present application, optionally, the first initial signal bus 711 is provided only in the upper frame area 82; or the first initial signal bus 711 is provided only in the lower frame area 83. The second initial signal bus 712 is provided only in the upper frame area 82; or the second initial signal bus 712 is provided only in the lower frame area 83. The third initial signal bus 713 is provided only in the upper frame area 82; or the third initial signal bus 713 is provided only in the lower frame area 83.

[0188] In an embodiment of the present application, optionally, the first initial signal bus 711, the second initial signal bus 712 and the third initial signal bus 713 are arranged in the isolation column layer.

[0189] Continuing to refer to Figure 10 In an embodiment of the present application, optionally, in the upper frame area 82, the first initial signal bus 711, the second initial signal bus 712 and the third initial signal bus 713 are arranged from top to bottom, each first initial signal isolation column 311 is connected to the first initial signal bus 711 through a cross-line, and each second initial signal isolation column 312 is connected to the second initial signal bus 712 through a cross-line. In this way, the first initial signal isolation column 311 is prevented from short-circuiting with the second initial signal bus 712 and the third initial signal bus 713, and the second initial signal isolation column 312 is prevented from short-circuiting with the second initial signal bus 713. Each third initial signal isolation column 313 is directly connected to the third initial signal bus 713. In this way, the wiring is simplified.

[0190] Continuing to refer to Figure 7 In an embodiment of the present application, optionally, the upper frame area 82 and the lower frame area 83 are each provided with the first cathode bus 721. In this way, the voltage is provided from both ends of the first cathode isolation column 321, which is conducive to improving the uniformity of the voltage signal received by each pixel driving unit. Similarly, the upper frame area 82 and the lower frame area 83 are each provided with the second cathode bus 722 and the third cathode bus 723.

[0191] In the above embodiments, there are various ways to arrange the first initial signal isolation column 31 and the first cathode isolation column 321 in a large-up-small shape. Hereinafter, several of them will be described, but not as a limitation of the present application. Since the first initial signal isolation column 31 and the first cathode isolation column 321 are arranged in the same way, hereinafter only the shape arrangement of the first initial signal isolation column 31 will be described, and the arrangement of the second initial signal isolation column, the third initial signal isolation column, the first cathode isolation column 321, the second cathode isolation column and the third cathode isolation column will not be described again.

[0192] Continuing to refer to Figure 8 In an embodiment of the present application, optionally, the first initial signal isolation column 31 is integrally arranged. Exemplarily, the first initial signal isolation column 31 in a large-up-small shape can be prepared by a lift-off process. Specifically, a negative photoresist is coated, then an opening is formed in the position of the first initial signal isolation column 31 through exposure and development, and then a metal is evaporated in the opening to form the first initial signal isolation column 31 in a large-up-small shape after the remaining photoresist is removed.

[0193] Figure 11 Another cross-sectional structure schematic diagram of a display panel provided by an embodiment of the present application is shown in FIG. 6. Figure 11 In another embodiment of the present application, the first initial signal isolation column 31 includes at least two sub-film layers, the width of the upper sub-film layer is greater than the width of the lower sub-film layer, and the materials of the sub-film layers are different. For example, the first initial signal isolation column 31 shown in FIG. 6 can be formed by a multiple-exposure + developing + etching process. Figure 11

[0194] The present application also provides a preparation method of a display panel, which is suitable for the display panel provided by any embodiment of the present application and has the corresponding beneficial effects. Hereinafter, one of them is exemplarily described.

[0195] Figure 12 and Figure 13 A preparation method of a display panel provided by an embodiment of the present application is shown in FIG. 6. Figure 12 and Figure 13 which specifically shows the preparation method of the first pixel driving unit 100. The preparation method of the display panel includes the following steps.

[0196] S110, sequentially forming an active layer, a first insulating layer 41 and a first metal layer.

[0197] The material of the first insulating layer 41 can be inorganic material, such as SiN and / or SiO, etc., which can be formed by deposition process, etc. The first metal layer is provided with the gate 13 of the first anode initialization transistor and the gate 18 of the first driving transistor; the active layer is provided with the semiconductor 12 of the first anode initialization transistor and the semiconductor 17 of the first driving transistor. The material of the first metal layer is metal, which can be formed by sputtering or evaporation process, etc., and then the gate 13 of the first anode initialization transistor and the gate 18 of the first driving transistor are formed by patterning.

[0198] S120, forming a second insulating layer 42 and a second metal layer.

[0199] The material of the second insulating layer 42 can be inorganic material, such as SiN and / or SiO, etc., which can be formed by deposition process, etc. The second metal layer is provided with the plate 14 of the capacitor, and the material of the second metal layer is metal, which can be formed by sputtering or evaporation process, etc., and then the plate 14 of the capacitor is formed by patterning.

[0200] S130, forming a third insulating layer 43 and a third metal layer.

[0201] ​The material of the third insulating layer 43 can be inorganic material, such as SiN and / or SiO, etc., which can be formed by deposition process. Optionally, after forming the third insulating layer 43, a fourth insulating layer 44 is further formed on the third insulating layer 43, and the material of the fourth insulating layer 44 can be organic material, which can play a certain planarization role while isolating the second metal layer and the third metal layer.

[0202] After forming the third insulating layer 43 and the fourth insulating layer 44, a via hole is formed by photoresist coating + exposure + development + etching process. The third metal layer is provided with the first end 15 and the second end 16 of the first anode initialization transistor, the first end 19 and the second end 1A of the first drive transistor, and the material of the third metal layer is metal, which can be formed by sputtering or evaporation process, and then the first end 15, the second end 16, the first end 19 and the second end 1A are formed by patterning, the first end 15 and the second end 16 are connected to the semiconductor 12 through the via hole respectively, and the first end 19 and the second end 1A are connected to the semiconductor 17 through the via hole respectively.

[0203] S140, forming a fifth insulating layer 51 and an anode metal layer.

[0204] The material of the fifth insulating layer 51 can be organic material, which can planarize the surface of the third metal layer while isolating the third metal layer and the anode metal layer, and is conducive to the flatness of the film layer during subsequent preparation of the first light emitting element, and optimizes the light emitting effect of the first light emitting element.

[0205] After forming the fifth insulating layer 51, an anode opening is formed by photoresist coating + exposure + development + etching process. The anode metal layer is provided with the anode 21 of the first light emitting element, and the material of the anode metal layer is metal, which can be formed by sputtering or evaporation process, and then the anode 21 is formed by patterning, and the anode 21 is connected to the end 15 through the anode opening.

[0206] S150, forming a sixth insulating layer 52, and forming an isolation column layer on the sixth insulating layer 52.

[0207] The isolation column layer includes a first initial signal isolation column 31, the shape of the first initial signal isolation column 31 is large at the top and small at the bottom, and the first initial signal isolation column 31 can conduct electricity; the first initial signal isolation column 31 and the first end 15 of the first anode initialization transistor are transmembrane layer electrically connected. Illustratively, before forming the isolation column layer, the sixth insulating layer 52 is patterned to form a via hole on the first end 15, and then the isolation column layer is formed to connect the first initial signal isolation column 31 and the first end 15.

[0208] Optionally, the isolation column layer further comprises a first cathode isolation column 321, the first cathode isolation column 321 is shaped as large at the top and small at the bottom, and the first cathode isolation column 321 is conductive. The first initial signal isolation column 31 is shaped as large at the top and small at the bottom, and the first initial signal isolation column 31 and the first cathode isolation column 321 are prepared by the same process.

[0209] Optionally, the first initial signal isolation column 31 is integrally arranged, and the first cathode isolation column 321 is integrally arranged. Illustratively, the first initial signal isolation column 31 and the first cathode isolation column 321 shaped as large at the top and small at the bottom can be prepared by a lift-off process. Specifically, a negative photoresist is coated, then an opening is formed at the position of the first initial signal isolation column 31 and the first cathode isolation column 321 by exposure and development, and then metal is evaporated in the opening, and after the remaining photoresist is removed, the first initial signal isolation column 31 and the first cathode isolation column 321 shaped as large at the top and small at the bottom are formed.

[0210] S160, forming an opening on the sixth insulating layer 52 to expose the anode 21.

[0211] Illustratively, the opening exposing the anode 21 is formed by a photoresist coating + exposure + development + etching process, and the opening defines the size of the pixel opening.

[0212] S170, forming a light-emitting layer 22 and a cathode 23 of the first light-emitting element on the anode 21.

[0213] The light-emitting layer 22 and the cathode 23 can be evaporated in a whole layer, the light-emitting layer 22 and the cathode 23 layers of adjacent light-emitting elements are disconnected by the first cathode isolation column 321, and the cathode 23 of the light-emitting element is connected with the first cathode isolation column 321.

[0214] Illustratively, the first light-emitting element is a red light-emitting element, the second light-emitting element is a green light-emitting element, and the third light-emitting element is a blue light-emitting element. The light-emitting layer and the cathode layer of the red light-emitting element are evaporated in a whole layer, and the red light-emitting layer and the cathode layer are evaporated in each pixel opening. Since the first cathode isolation column 321 is shaped as large at the top and small at the bottom, the material evaporated into the adjacent two pixel openings is disconnected by the first cathode isolation column 321, and at the same time, the edge part of the cathode 23 is electrically connected with the first cathode isolation column 321; the light-emitting layer and the cathode layer outside the red pixel opening are removed.

[0215] The light-emitting layer and the cathode layer of the green light-emitting element are evaporated in a whole layer, and the green light-emitting layer and the cathode layer are evaporated in each pixel opening. Since the red light-emitting layer and the cathode layer have been evaporated in the red pixel opening, the green light-emitting layer and the cathode layer are stacked on the red light-emitting layer and the cathode layer in the red pixel opening; the green light-emitting layer and the cathode layer outside the green pixel opening are removed.

[0216] The emitting layer and the cathode layer of the blue light emitting element are evaporated in an entire layer. The blue emitting layer and the cathode layer are evaporated in each pixel opening. Since the red emitting layer and the cathode layer have been evaporated in the red pixel opening, and the green emitting layer and the cathode layer have been evaporated in the green pixel opening, the blue emitting layer and the cathode layer are stacked on the red emitting layer and the cathode layer in the red pixel opening; the blue emitting layer and the cathode layer are stacked on the green emitting layer and the cathode layer in the green pixel opening; and the blue emitting layer and the cathode layer outside the blue pixel opening are removed.

[0217] Therefore, the red light emitting element, the green light emitting element and the blue light emitting element can be formed without using a fine mask plate.

[0218] S180, forming a seventh insulating layer 53, a sealing layer 61 and an encapsulation layer 62 on the cathode 23.

[0219] In the embodiments of the display panel, the preparation method and process are specifically described for different structures of the display panel. The preparation method and process can be considered as the preparation method of the display panel provided by the embodiments of the present application, and repeated contents will not be described here.

[0220] It should be understood that the steps can be reordered, added or deleted using the various forms of flowcharts shown above. For example, each step described in the present application can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions of the present application can be achieved, which is not limited herein.

[0221] The above specific embodiments do not constitute a limitation on the protection scope of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent replacement and improvement within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A pixel driving circuit, characterized by comprising: The pixel driving circuit at least comprises: a first pixel driving unit comprising a first light emitting element having a first anode; a second pixel driving unit comprising a second light emitting element having a second anode; a third pixel driving unit comprising a third light emitting element having a third anode; wherein the light emitting colors of the first, second and third light emitting elements are different from each other, the first anode is configured with a first anode initialization signal, the second anode is configured with a second anode initialization signal, the third anode is configured with a third anode initialization signal, and the voltage values of at least two of the first, second and third anode initialization signals are different; when the first, second and third light emitting elements display at a first brightness, the first anode is configured with the first anode initialization signal, the second anode is configured with the second anode initialization signal, and the third anode is configured with the third anode initialization signal; when the first, second and third light emitting elements display at a second brightness, the first, second and third anodes are configured with a common initialization signal, the first brightness is less than the second brightness, and the voltage values of the first, second and third anode initialization signals are all greater than the voltage value of the common initialization signal.

2. The pixel driving circuit according to claim 1, characterized in that, The voltage values of the first, second and third anode initialization signals are different from each other. 3.The pixel driving circuit of claim 1, wherein wherein: the first light emitting element has a first cathode, the second light emitting element has a second cathode, and the third light emitting element has a third cathode, and the first, second and third cathodes are configured with a cathode signal which is multiplexed as the common initialization signal.

4. The pixel driving circuit of claim 3, wherein, At least two of the first, second and third cathodes are configured with the cathode signal having different voltage values.

5. The pixel driving circuit of claim 3, wherein, The first, second and third cathodes are configured with the cathode signal having different voltage values.

6. A display panel, characterized by, The display panel further comprises: A switch circuit is coupled to the pixel driving circuit and connected to a common initialization signal, the first anode initialization signal, the second anode initialization signal and the third anode initialization signal. The switch circuit is configured to be controlled by at least a first control signal, and when the first light emitting element, the second light emitting element and the third light emitting element display at a first brightness, the first anode initialization signal, the second anode initialization signal and the third anode initialization signal are configured to the first anode, the second anode and the third anode respectively, and when the first light emitting element, the second light emitting element and the third light emitting element display at a second brightness, the common initialization signal is configured to the first anode, the second anode and the third anode respectively. The first brightness is less than the second brightness, and the voltage value of the first anode initialization signal, the voltage value of the second anode initialization signal and the voltage value of the third anode initialization signal are all greater than the voltage value of the common initialization signal.

7. The display panel of claim 6, wherein, The switch circuit is also controlled by a second control signal to configure the common initialization signal, the first anode initialization signal, the second anode initialization signal and the third anode initialization signal. The switch circuit includes a plurality of signal selection units respectively coupled to the first anode, the second anode and the third anode. Each signal selection unit includes: A first transistor, a gate of the first transistor is connected to the first control signal, a first end of the first transistor is connected to the common initialization voltage, and a second end of the first transistor is coupled to a corresponding one of the first anode, the second anode and the third anode; A second transistor, a gate of the second transistor is connected to the second control signal, a first end of the second transistor is connected to a corresponding one of the first anode initialization signal, the second anode initialization signal and the third anode initialization signal, and a second end of the second transistor is coupled to a corresponding one of the first anode, the second anode and the third anode.

8. The display panel of claim 7, wherein, The first transistor and the second transistor are transistors of the same channel type. When the first control signal is at a first level, the second control signal is at a second level, and the first level and the second level are different.

9. The display panel of claim 7, wherein, The first transistor and the second transistor are transistors of different channel types, and the first control signal is multiplexed as the second control signal.

10. The display panel of claim 6, wherein, The display panel further includes: A light emitting functional layer, a part of the first light emitting element, a part of the second light emitting element and a part of the third light emitting element are arranged in the light emitting functional layer; An isolation layer is used to separate the first light emitting element, the second light emitting element and the third light emitting element. The isolation layer at least includes a first initialization signal isolation column, a second initialization signal isolation column and a third initialization signal isolation column. The first initial signal isolation column is coupled with the first anode and configured with the first anode initialization signal, the second initial signal isolation column is coupled with the second anode and configured with the second anode initialization signal, and the third initial signal isolation column is coupled with the third anode and configured with the third anode initialization signal.

11. The display panel of claim 10, wherein, The display panel further comprises a cathode layer arranged on one side of the light-emitting functional layer, and the isolation layer further comprises a first cathode isolation column, a second cathode isolation column, and a third cathode isolation column. The first light-emitting element has a first cathode, the second light-emitting element has a second cathode, and the third light-emitting element has a third cathode, the first cathode, the second cathode, and the third cathode are electrically isolated and arranged in the cathode layer. The first cathode isolation column is coupled with the first cathode and configured with a first cathode signal, the second cathode isolation column is coupled with the second cathode and configured with a second cathode signal, and the third cathode isolation column is coupled with the third cathode and configured with the third cathode signal.

12. The display panel of claim 11, wherein, The voltage values of at least two of the first cathode signal, the second cathode signal, and the third cathode signal are different.

13. The display panel of claim 11, wherein, The voltage values of the first cathode signal, the second cathode signal, and the third cathode signal are different.

14. The display panel of claim 10, wherein, The pixel driving circuit comprises a plurality of first pixel driving units, a plurality of second pixel driving units, and a plurality of third pixel driving units. The first anodes in each of the first pixel driving units are coupled through the same first initial signal isolation column, the second anodes in each of the second pixel driving units are coupled through the same second initial signal isolation column, and the third anodes in each of the third pixel driving units are coupled through the same third initial signal isolation column.

15. The display panel of claim 14, wherein, The first pixel driving units, the second pixel driving units, and the third pixel driving units are arranged in multiple columns, and the first anodes in each of the first pixel driving units in the same column are coupled through the same first initial signal isolation column, the second anodes in each of the second pixel driving units in the same column are coupled through the same second initial signal isolation column, and the third anodes in each of the third pixel driving units in the same column are coupled through the same third initial signal isolation column.

16. The display panel of claim 11, wherein, The pixel driving circuit comprises a plurality of first pixel driving units, a plurality of second pixel driving units, and a plurality of third pixel driving units. The first cathodes in each of the first pixel driving units are coupled through the same first cathode isolation column, the second cathodes in each of the second pixel driving units are coupled through the same second cathode isolation column, and the third cathodes in each of the third pixel driving units are coupled through the same third cathode isolation column.

17. The display panel of claim 16, wherein, The first pixel driving units are arranged in multiple columns, the second pixel driving units are arranged in multiple columns, and the third pixel driving units are arranged in multiple columns.

18. The display panel of claim 6, wherein, The display panel has a display area and a frame area arranged adjacently, the pixel driving circuit is located in the display area, and the switch circuit is located in the frame area.

19. The display panel of claim 18, wherein, The display panel at least includes: The first initial signal bus is located in the frame area, and each first initial signal isolation column is coupled with the first initial signal bus. The second initial signal bus is located in the frame area, and each second initial signal isolation column is coupled with the second initial signal bus. The third initial signal bus is located in the frame area, and each third initial signal isolation column is coupled with the third initial signal bus.

20. The display panel of claim 19, wherein, The first pixel driving units are arranged in multiple columns, the second pixel driving units are arranged in multiple columns, and the third pixel driving units are arranged in multiple columns, the columns extend along a first direction, the first initial signal bus, the second initial signal bus, and the third initial signal bus extend along a second direction, and the first direction and the second direction have an included angle.

21. The display panel of claim 20, wherein, The first direction is perpendicular to the second direction.

22. The display panel of claim 18, wherein, The display panel further includes: The first cathode bus is located in the frame area, and each first cathode isolation column is coupled with the first cathode bus. The second cathode bus is located in the frame area, and each second cathode isolation column is coupled with the second cathode bus. The third cathode bus is located in the frame area, and each third cathode isolation column is coupled with the third cathode bus.

23. The display panel of claim 22, wherein, The first pixel driving units are arranged in multiple columns, the second pixel driving units are arranged in multiple columns, and the third pixel driving units are arranged in multiple columns, the columns extend along a first direction, the first cathode bus, the second cathode bus, and the third cathode bus extend along a second direction, and the first direction and the second direction have an included angle.

24. The display panel of claim 23, wherein, The first direction is perpendicular to the second direction.

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