Pixel driving circuit, display panel and display device

Abstract

The invention discloses a pixel driving circuit, a display panel and a display device. The pixel driving circuit comprises a first pixel driving unit, a second pixel driving unit and a third pixel driving unit, the first pixel driving unit comprises a first driving transistor and a first light-emitting element, and the first driving transistor is provided with a first threshold value adjusting grid electrode and receives a first adjusting signal; the second pixel driving unit comprises a second driving transistor and a second light-emitting element, and the second driving transistor is provided with a second threshold adjusting grid electrode and receives a second adjusting signal; wherein the first light-emitting element and the second light-emitting element are different in light-emitting color, and when the first light-emitting element and the second light-emitting element are displayed on a target gray scale, the first adjusting signal and the second adjusting signal are different in voltage value.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel driving circuit, a display panel and a display device. Background Art

[0002] With the continuous development of display technology, people have higher and higher requirements on display panels, but the performance of display panels currently needs to be improved. Summary of the invention

[0003] In order to solve the above problems or other problems, the present invention provides the following technical solutions.

[0004] In a first aspect, the present invention provides a pixel driving circuit, the pixel driving circuit at least comprising:

[0005] A first pixel driving unit, comprising a first driving transistor and a first light emitting element, wherein the first driving transistor has a first driving current control gate and a first threshold adjustment gate, wherein the first driving current control gate is configured to receive a first data signal, and the first threshold adjustment gate is configured to receive a first adjustment signal, and the first driving transistor is controlled by the first data signal and the first adjustment signal to drive the first light emitting element;

[0006] A second pixel driving unit comprises a second driving transistor and a second light-emitting element, wherein the second driving transistor has a second driving current control gate and a second threshold adjustment gate, the second driving current control gate is configured to receive a second data signal, the second threshold adjustment gate is configured to receive a second adjustment signal, and the second driving transistor drives the second light-emitting element under the control of the second data signal and the second adjustment signal; wherein the light-emitting colors of the first light-emitting element and the second light-emitting element are different from each other, and when the first light-emitting element and the second light-emitting element are displayed at a target gray scale, the voltage values ​​of the first adjustment signal and the second adjustment signal are different.

[0007] Optionally, the pixel driving circuit further includes:

[0008] a third pixel driving unit, comprising a third driving transistor and a third light emitting element, wherein the third driving transistor has a third driving current control gate and a third threshold adjustment gate, wherein the third driving current control gate is configured to receive a third data signal, and the third threshold adjustment gate is configured to receive a third adjustment signal, and the third driving transistor is controlled by the third data signal and the third adjustment signal to drive the third light emitting element;

[0009] The first light emitting element, the second light emitting element and the third light emitting element emit different colors, and when the first light emitting element, the second light emitting element and the third light emitting element are displayed at a target gray scale, at least two of the first adjustment signal, the second adjustment signal and the third adjustment signal have different voltage values;

[0010] Preferably, when the first light emitting element, the second light emitting element and the third light emitting element are displayed at the target gray scale, voltage values ​​of the first adjustment signal, the second adjustment signal and the third adjustment signal are different from each other.

[0011] Optionally, the target grayscale is the 0th grayscale, and the first light-emitting element, the second light-emitting element and the third light-emitting element do not emit light at the 0th grayscale.

[0012] Optionally, when the first light emitting element, the second light emitting element and the third light emitting element are displayed at the target gray scale, voltage values ​​of the first data signal, the second data signal and the third data signal are the same.

[0013] Optionally, the first light-emitting element has a first cathode, the first cathode is configured with a first cathode signal, and the second light-emitting element has a second cathode, the second cathode is configured with a second cathode signal, wherein:

[0014] The voltage values ​​of the first cathode signal and the second cathode signal are different;

[0015] Preferably, the pixel driving circuit further includes a third pixel driving unit, the third pixel driving unit includes a third light emitting element, the first light emitting element, the second light emitting element and the third light emitting element emit different colors, the third light emitting element has a third cathode, the third cathode is configured with a third cathode signal, wherein at least two of the first cathode signal, the second cathode signal and the third cathode signal have different voltage values;

[0016] Preferably, voltage values ​​of the first cathode signal, the second cathode signal and the third cathode signal are different from each other.

[0017] In a second aspect, the present invention provides a display panel, comprising the pixel driving circuit provided in the first aspect.

[0018] Optionally, the display panel further includes:

[0019] a first metal layer, wherein the first threshold adjustment gate and the second threshold adjustment gate are electrically isolated and disposed in the first metal layer;

[0020] A light-emitting functional layer is disposed on one side of the first metal layer, and a portion of the first light-emitting elements and a portion of the second light-emitting elements are disposed in the light-emitting functional layer;

[0021] An isolation layer, disposed on one side of the first metal layer and used to isolate the first light-emitting element from the second light-emitting element, the isolation layer at least comprising a first gate isolation column and a second gate isolation column;

[0022] The first gate isolation column is coupled to the first threshold adjustment gate and is configured with the first adjustment signal, and the second gate isolation column is coupled to the second threshold adjustment gate and is configured with the second adjustment signal;

[0023] Preferably, the pixel driving circuit further comprises a third pixel driving unit, the third pixel driving unit comprises a third driving transistor and a third light emitting element, the third driving transistor has a third driving current control gate and a third threshold adjustment gate, the third driving current control gate is configured to receive a third data signal, the third threshold adjustment gate is configured to receive a third adjustment signal, the third driving transistor is controlled by the third data signal and the third adjustment signal to drive the third light emitting element, wherein:

[0024] The third threshold adjustment gate is electrically isolated from the first threshold adjustment gate, and the third threshold adjustment gate is electrically isolated from the second threshold adjustment gate, and the third threshold adjustment gate is disposed in the first metal layer;

[0025] A portion of the third light-emitting element is disposed in the light-emitting functional layer;

[0026] The isolation layer is also used to isolate the third light-emitting element from the first light-emitting element, and the isolation layer is also used to isolate the third light-emitting element from the second light-emitting element. The isolation layer includes a third gate isolation column, and the third gate isolation column is coupled to the third threshold adjustment gate and is configured with the third adjustment signal.

[0027] Optionally, the display panel further includes a cathode layer, the cathode layer is disposed on one side of the light-emitting functional layer, and the isolation layer further includes a first cathode isolation column and a second cathode isolation column, wherein:

[0028] The first light emitting element has a first cathode, the second light emitting element has a second cathode, the first cathode and the second cathode are electrically isolated and disposed in the cathode layer;

[0029] The first cathode isolation column is coupled to the first cathode and is configured with a first cathode signal, and the second cathode isolation column is coupled to the second cathode and is configured with a second cathode signal;

[0030] Preferably, the voltage values ​​of the first cathode signal and the second cathode signal are different;

[0031] Preferably, the pixel driving circuit further includes a third pixel driving unit, and the third pixel driving unit includes a third light emitting element, wherein:

[0032] The isolation layer further includes a third cathode isolation column, the third light emitting element has a third cathode, the third cathode is disposed in the cathode layer, the third cathode is electrically isolated from the first cathode, and the third cathode is electrically isolated from the second cathode, the third cathode isolation column is coupled to the third cathode, and is configured with a third cathode signal;

[0033] Preferably, at least two of the first cathode signal, the second cathode signal and the third cathode signal have different voltage values;

[0034] Preferably, voltage values ​​of the first cathode signal, the second cathode signal and the third cathode signal are different from each other.

[0035] Optionally, the pixel driving circuit includes a plurality of the first pixel driving units and a plurality of the second pixel driving units, wherein:

[0036] The first threshold adjustment gates in each of the first pixel driving units are coupled via the same first gate isolation column, and the second threshold adjustment gates in each of the second pixel driving units are coupled via the same second gate isolation column;

[0037] Preferably, the pixel driving circuit further comprises a plurality of third pixel driving units, the third pixel driving units comprising a third driving transistor and a third light emitting element, the third driving transistor having a third driving current control gate and a third threshold adjustment gate, the third driving current control gate being configured to receive a third data signal, the third threshold adjustment gate being configured to receive a third adjustment signal, the third driving transistor being controlled by the third data signal and the third adjustment signal to drive the third light emitting element, wherein:

[0038] The isolation layer includes a third gate isolation column, the third gate isolation column is coupled to the third threshold adjustment gate and is configured with the third adjustment signal, and the third threshold adjustment gate in each of the third pixel driving units is coupled through the same third gate isolation column;

[0039] Preferably, a plurality of the first pixel driving units are arranged into a plurality of columns, a plurality of the second pixel driving units are arranged into a plurality of columns, and a plurality of the third pixel driving units are arranged into a plurality of columns, wherein the first threshold adjustment gates in the first pixel driving units in the same column are coupled via the first gate isolation column, the second threshold adjustment gates in the second pixel driving units in the same column are coupled via the second gate isolation column, and the third threshold adjustment gates in the third pixel driving units in the same column are coupled via the third gate isolation column.

[0040] Optionally, the pixel driving circuit includes a plurality of the first pixel driving units and a plurality of the second pixel driving units, wherein:

[0041] The first cathodes in each of the first pixel driving units are coupled via the same first cathode isolation column, and the second cathodes in each of the second pixel driving units are coupled via the same second cathode isolation column;

[0042] Preferably, the pixel driving circuit further includes a plurality of third pixel driving units, the third pixel driving units include a third light emitting element, the third light emitting element has a third cathode, the third cathode is arranged in the cathode layer, the third cathode is electrically isolated from the first cathode, and the third cathode is electrically isolated from the second cathode, the isolation layer further includes a third cathode isolation column, the third cathode isolation column is coupled to the third cathode, and is configured with a third cathode signal, wherein:

[0043] The third cathodes in each of the third pixel driving units are coupled via the same third cathode isolation column;

[0044] Preferably, a plurality of the first pixel driving units are arranged into multiple columns, a plurality of the second pixel driving units are arranged into multiple columns, and a plurality of the third pixel driving units are arranged into multiple columns, wherein the first cathodes in each of the first pixel driving units in the same column are coupled through the same first cathode isolation column, the second cathodes in each of the second pixel driving units in the same column are coupled through the same second cathode isolation column, and the third cathodes in each of the third pixel driving units in the same column are coupled through the same third cathode isolation column.

[0045] Optionally, the display panel has a display area and a frame area that are adjacently arranged, the pixel driving circuit is located in the display area, and the display panel at least includes:

[0046] A first threshold adjustment bus is located in the border area, and each of the first gate isolation columns is coupled to the first threshold adjustment bus;

[0047] A second threshold adjustment bus is located in the border area, and each of the second gate isolation columns is coupled to the second threshold adjustment bus;

[0048] Preferably, the pixel driving circuit further comprises a third pixel driving unit, the third pixel driving unit comprises a third driving transistor and a third light emitting element, the third driving transistor has a third driving current control gate and a third threshold adjustment gate, the third driving current control gate is configured to receive a third data signal, the third threshold adjustment gate is configured to receive a third adjustment signal, the third driving transistor is controlled by the third data signal and the third adjustment signal to drive the third light emitting element, wherein:

[0049] The display panel further includes a third threshold adjustment bus located in the frame area, and each of the third gate isolation columns is coupled to the third threshold adjustment bus;

[0050] Preferably, a plurality of the first pixel driving units are arranged into a plurality of columns, a plurality of the second pixel driving units are arranged into a plurality of columns, and a plurality of the third pixel driving units are arranged into a plurality of columns, the columns extend along a first direction, the first threshold adjustment bus, the second threshold adjustment bus, and the third threshold adjustment bus extend along a second direction, and the first direction and the second direction have an included angle;

[0051] Preferably, the first direction is perpendicular to the second direction;

[0052] Preferably, the isolation layer further includes a first cathode isolation column, a second cathode isolation column and a third cathode isolation column, and the display panel further includes:

[0053] a cathode layer, arranged on one side of the light-emitting functional layer, wherein the first light-emitting element has a first cathode, the second light-emitting element has a second cathode, the third light-emitting element has a third cathode, the first cathode, the second cathode and the third cathode are electrically isolated and arranged in the cathode layer, the first cathode isolation column is coupled to the first cathode, the second cathode isolation column is coupled to the second cathode, and the third cathode isolation column is coupled to the third cathode;

[0054] A first cathode bus line is located in the frame area, and each of the first cathode isolation columns is coupled to the first cathode bus line;

[0055] A second cathode bus line is located in the frame area, and each of the second cathode isolation columns is coupled to the second cathode bus line;

[0056] A third cathode bus line is located in the frame area, and each of the third cathode isolation columns is coupled to the third cathode bus line;

[0057] Preferably, a plurality of the first pixel driving units are arranged in a plurality of columns, a plurality of the second pixel driving units are arranged in a plurality of columns, and a plurality of the third pixel driving units are arranged in a plurality of columns, the columns extend along a first direction, the first cathode bus, the second cathode bus and the third cathode bus extend along a second direction, and the first direction and the second direction have an angle;

[0058] Preferably, the first direction is perpendicular to the second direction.

[0059] In a third aspect, the present invention provides a display panel, the display panel comprising:

[0060] a substrate having a first side;

[0061] A driving circuit layer, disposed on the first side, comprising at least a first driving transistor in a first pixel driving unit, wherein the first driving transistor has a first threshold adjustment gate;

[0062] The isolation layer is disposed on a side of the driving circuit layer away from the substrate, and includes at least a first gate isolation column, the first gate isolation column is coupled to the first threshold adjustment gate, and is configured with a first adjustment signal.

[0063] Optionally, the driving circuit layer further includes a second driving transistor in a second pixel driving unit, and the second driving transistor has a second threshold adjustment gate;

[0064] The isolation layer further includes a second gate isolation column, the second gate isolation column is coupled to the second threshold adjustment gate and is configured with a second adjustment signal;

[0065] Preferably, the display panel further includes a light-emitting device layer, which is arranged on a side of the driving circuit layer away from the substrate, and the light-emitting device layer includes a first light-emitting element in the first pixel driving unit and a second light-emitting element in the second pixel driving unit, the first light-emitting element is coupled to the first driving transistor, and the second light-emitting element is coupled to the second driving transistor, wherein:

[0066] The first light emitting element and the second light emitting element emit different colors, and when the first light emitting element and the second light emitting element are displayed at a target gray scale, the voltage values ​​of the first adjustment signal and the second adjustment signal are different;

[0067] Preferably, the driving circuit layer further includes a third driving transistor in a third pixel driving unit, and the third driving transistor has a third threshold adjustment gate;

[0068] The isolation layer further includes a third gate isolation column, the third gate isolation column is coupled to the third threshold adjustment gate and is configured with a third adjustment signal;

[0069] Preferably, the light emitting device layer further includes a third light emitting element in the third pixel driving unit, and the third light emitting element is coupled to the third driving transistor, wherein:

[0070] The first light emitting element, the second light emitting element and the third light emitting element emit different colors from each other, and when the first light emitting element, the second light emitting element and the third light emitting element are displayed at a target gray scale, at least two of the first adjustment signal, the second adjustment signal and the third adjustment signal have different voltage values;

[0071] Preferably, when the first light emitting element, the second light emitting element and the third light emitting element are displayed at the target gray scale, voltage values ​​of the first adjustment signal, the second adjustment signal and the third adjustment signal are different from each other.

[0072] Optionally, the isolation layer further includes a first cathode isolation column, and the display panel further includes:

[0073] a light-emitting device layer, arranged on a side of the driving circuit layer away from the substrate, the light-emitting device layer comprising a first light-emitting element in the first pixel driving unit, the first light-emitting element being coupled to the first driving transistor, wherein the first light-emitting element has a first cathode, the first cathode being coupled to the first cathode isolation column, and the first cathode isolation column being configured with a first cathode signal;

[0074] Preferably, the first cathode isolation column has a first opening, and a portion of the first light emitting element is located in the first opening;

[0075] Preferably, the first gate isolation column and the first cathode isolation column are arranged at intervals in a second direction parallel to the substrate, and in the second direction, the first gate isolation column has a first width, and the first cathode isolation column has a second width, and the first width is smaller than the second width;

[0076] Preferably, the first cathode isolation column comprises a first structure and a second structure connected to each other, wherein the first structure encloses and forms the first opening, the second structure extends in a first direction, the first direction and the second direction have an angle, and the second structure has the second width;

[0077] Preferably, the first direction is perpendicular to the second direction;

[0078] Preferably, the driving circuit layer further includes a second driving transistor in a second pixel driving unit, and the isolation layer further includes a second gate isolation column, wherein the second driving transistor has a second threshold adjustment gate, the second gate isolation column is coupled to the second threshold adjustment gate and is configured with a second adjustment signal, and in a second direction parallel to the substrate, the first gate isolation column is located between the first cathode isolation column and the second gate isolation column;

[0079] Preferably, the light-emitting device layer further includes a second light-emitting element in the second pixel driving unit, the second light-emitting element is coupled to the second driving transistor, the isolation layer further includes a second cathode isolation column, wherein the second light-emitting element has a second cathode, the second cathode is coupled to the second cathode isolation column, the second cathode isolation column is configured with a second cathode signal, and in a second direction parallel to the substrate, the second gate isolation column is located between the first gate isolation column and the second cathode isolation column;

[0080] Preferably, the second cathode isolation column has a second opening, and a portion of the second light emitting element is located in the second opening;

[0081] Preferably, the light-emitting device layer further includes a third light-emitting element in a third pixel driving unit, and the isolation layer further includes a third cathode isolation column, wherein the third light-emitting element has a third cathode, the third cathode is coupled to the third cathode isolation column, the third cathode isolation column is configured with a third cathode signal, and in a second direction parallel to the substrate, the second cathode isolation column is located between the second gate isolation column and the third cathode isolation column;

[0082] Preferably, the third cathode isolation column has a third opening, and a portion of the third light emitting element is located in the third opening;

[0083] Preferably, the driving circuit layer also includes a third driving transistor in the third pixel driving unit, and the third driving transistor is coupled to the third light-emitting element, and the isolation layer also includes a third gate isolation column, wherein the third driving transistor has a third threshold adjustment gate, and the third gate isolation column is coupled to the third threshold adjustment gate and is configured with a third adjustment signal, and in a second direction parallel to the substrate, the third cathode isolation column is located between the second cathode isolation column and the third gate isolation column.

[0084] In a fourth aspect, the present invention provides a display device, comprising:

[0085] The display panel provided in the second aspect; or,

[0086] A display panel as provided in the third aspect.

[0087] In the embodiment of the present invention, the driving transistor in each pixel driving unit includes a threshold adjustment gate, so that the voltage of the threshold adjustment gate of each driving transistor can be adjusted, thereby adjusting the threshold voltage of each driving transistor and improving the performance of the display panel.

[0088] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0089] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0090] Figure 1 A circuit diagram of a pixel driving circuit provided by an embodiment of the present invention;

[0091] Figure 2 A circuit diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0092] Figure 3 A circuit diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0093] Figure 4 A circuit diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0094] Figure 5 A circuit diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0095] Figure 6 A circuit diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0096] Figure 7 A schematic diagram of the structure of a display panel provided by an embodiment of the present invention;

[0097] Figure 8 for Figure 7 A schematic cross-sectional structure diagram of the first pixel driving unit along AA;

[0098] Fig. 9 A schematic diagram of a partial structure of a display panel provided by an embodiment of the present invention;

[0099] Fig.10A schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0100] Fig.11 A schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention;

[0101] Fig.12 and Fig.13 A schematic diagram of the structure formed in each step of a method for preparing a display panel provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0102] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0103] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0104] The display panel is composed of pixel driving units of different colors. Due to the material differences of the light-emitting elements in the pixel driving units, the efficiency of each pixel is different, which leads to differences in the black state voltage required for each pixel driving unit. The inventors have found that by adjusting the threshold voltage of the driving transistor in the pixel driving unit, it is helpful to improve this problem. Furthermore, in order to meet the display requirements, in some embodiments, the driver chip needs to set the highest data signal (VGMP) it outputs to meet the highest black state voltage in different color sub-images, and this voltage output range is redundant for other pixel driving units. A high black state voltage will increase the power consumption of the driver chip. Therefore, in some embodiments, the display panel has the problem of high power consumption and low voltage range utilization of the data signal.

[0105] Figure 1A circuit diagram of a pixel driving circuit provided by an embodiment of the present invention. Figure 1 , a pixel driving circuit, the pixel driving circuit at least comprising:

[0106] The first pixel driving unit 100 includes a first driving transistor 110 and a first light emitting element 120. The first driving transistor 110 has a first driving current control gate 113 and a first threshold adjustment gate 111. The first driving current control gate 113 is configured to receive a first data signal. The first threshold adjustment gate 111 is configured to receive a first adjustment signal R_BSM. The first driving transistor 110 drives the first light emitting element 120 under the control of the first data signal and the first adjustment signal R_BSM.

[0107] The second pixel driving unit 200 includes a second driving transistor 210 and a second light emitting element 220. The second driving transistor 210 has a second driving current control gate 213 and a second threshold adjustment gate 211. The second driving current control gate 213 is configured to receive a second data signal. The second threshold adjustment gate 211 is configured to receive a second adjustment signal G_BSM. The second driving transistor 210 drives the second light emitting element 220 under the control of the second data signal and the second adjustment signal G_BSM.

[0108] The first light emitting element 120 and the second light emitting element 220 emit different colors. When the first light emitting element 120 and the second light emitting element 220 display a target grayscale, the voltage values ​​of the first adjustment signal R_BSM and the second adjustment signal G_BSM are different.

[0109] Exemplarily, the driving principle of the pixel driving circuit is described by taking the first pixel driving unit 100 as an example. The source of the first driving transistor 110 is connected to the voltage ELVDD, and the drain of the first driving transistor 110 is electrically connected to the first light-emitting element 120. The first driving current control gate 113 of the first driving transistor 110 is written with a first data signal, and the magnitude of the first data signal determines the magnitude of the driving current generated by the first driving transistor 110. Taking the first driving transistor 110 as a P-type transistor as an example, the more negative the voltage of the first data signal is, the greater the driving current generated by the first driving transistor 110, and the greater the brightness of the first light-emitting element 120; the more positive the voltage of the first data signal is, the smaller the driving current generated by the first driving transistor 110 is, and the smaller the brightness of the first light-emitting element 120 is.

[0110] Among them, the range of the first data signal written by the first driving transistor 110 and the magnitude of the driving current generated are also related to the threshold voltage of the first driving transistor 110 itself. The first driving transistor 110 provided in the embodiment of the present invention also includes a first threshold adjustment gate 111, and the first threshold adjustment gate 111 can adjust the threshold voltage of the first driving transistor 110. In practical applications, providing a corresponding voltage value to the first threshold adjustment gate 111 of the first driving transistor 110 can make the threshold voltage of the first driving transistor 110 reach an ideal state. Exemplarily, if the threshold voltage of the first driving transistor 110 needs to be positively biased, a voltage value that makes the threshold voltage positively biased is provided to the first threshold adjustment gate 111; in other embodiments, if the threshold voltage of the first driving transistor 110 needs to be negatively biased, a voltage value that makes the threshold voltage negatively biased is provided to the first threshold adjustment gate 111.

[0111] In the embodiment of the present invention, the target grayscale refers to the grayscale corresponding to the light-emitting element in a static state (also referred to as a "standby state"). Accordingly, the voltage configured for the driving current control gate of the light-emitting element in a static state can be referred to as a "black state voltage". Optionally, the 0th grayscale can be configured as the target grayscale. Specifically, the first light-emitting element 120 and the second light-emitting element 220 do not emit light in the 0th grayscale. Optionally, other grayscales (such as the 1st grayscale or the 2nd grayscale, etc.) can also be configured as the target grayscale.

[0112] Exemplarily, the first light emitting element 120 is a red light emitting element R, and the second light emitting element 220 is a green light emitting element G. Both the first driving transistor 110 and the second driving transistor 210 are P-type transistors. The threshold voltage of a P-type transistor is a negative value. Taking the first pixel driving unit 100 as an example, the lower the voltage written into its first driving current control gate 113 (that is, the first data voltage corresponding to the first data signal), the greater the driving current generated; the higher the voltage written into its first driving current control gate 113, the smaller the driving current generated.

[0113] Since the performance of the luminescent materials of the light-emitting elements of different colors is different, the efficiency of the pixel driving units of the two different colors is different, which leads to the difference in the black state voltage required for the pixel driving units of the two different colors. According to the research of the inventor, the result of testing a product shows that, taking the target grayscale as the 0th grayscale as an example, for the first pixel driving unit 100, the black state voltage of the first driving current control gate 113 written into the first driving transistor 110 needs to be 6.6V; and for the second pixel driving unit 200, its black state voltage needs to be 6.8V. In order to realize the black state display of the display panel, the driving chip needs to meet the highest voltage requirement, so the highest data signal is set to refer to the black state voltage (6.8V) of the second pixel driving unit 200. Such a high voltage output range is redundant for the first light-emitting element 120, which will increase the power consumption of the driving chip.

[0114] The inventor has found that by adjusting the voltage of the threshold adjustment gate, the black state voltage of the pixel driving unit can be adjusted. For example, by adjusting the voltage of the second adjustment signal G_BSM, the threshold voltage of the second driving transistor 210 is forward biased, and the black state voltage of the second pixel driving unit 200 can be reduced. This is because, in the process of writing data to the driving transistor, the more negative its threshold voltage is, the slower the speed of data writing is; the more positive its threshold voltage is, the faster the speed of data writing is. The embodiment of the present invention adjusts the voltage of the second adjustment signal G_BSM to be different from the first adjustment signal R_BSM and the third adjustment signal B_BSM, so that the threshold voltage of the second driving transistor 210 is forward biased, thereby accelerating the writing speed of the second data signal, which is conducive to using a smaller black state voltage to realize the black state display of the second light-emitting element. Therefore, the embodiment of the present invention can make the black state voltages of the first pixel driving unit 100 and the second pixel driving unit 200 tend to be consistent, which is conducive to reducing the voltage range of the data signal output by the driving chip, improving the utilization rate of the voltage range of the data signal, and reducing the power consumption of the display panel.

[0115] It should be noted that in Figure 1 In the example, the first light emitting element 120 is a red light emitting element R and the second light emitting element 220 is a green light emitting element G, which is not intended to limit the present invention. In other embodiments, the first light emitting element 210 and the second light emitting element 220 may be a red light emitting element R and a blue light emitting element B, respectively; or the first light emitting element 210 and the second light emitting element 220 may be a green light emitting element G and a blue light emitting element B, respectively.

[0116] Figure 2 A circuit diagram of another pixel driving circuit provided by an embodiment of the present invention. Figure 2In another embodiment of the present invention, optionally, the first light emitting element 210 is a red light emitting element R and the second light emitting element 220 is a blue light emitting element B.

[0117] Exemplarily, the first driving transistor 110 and the second driving transistor 210 are both P-type transistors. According to the inventor's research, the result of testing a product shows that, taking the target grayscale configured as the 0th grayscale as an example, for the first pixel driving unit 100, the black state voltage of the first driving current control gate 113 written into the first driving transistor 110 needs to be 6.6V; for the second pixel driving unit 200, its black state voltage needs to be 6.4V. In order to achieve the black state display of the display panel, the driving chip needs to meet the highest voltage requirement, so the highest data signal is set to refer to the black state voltage (6.6V) of the first pixel driving unit 100. Such a high voltage output range is redundant for the second light-emitting element 220, which will increase the power consumption of the driving chip.

[0118] The inventors have found that the black state voltage of the pixel driving unit can be adjusted by adjusting the voltage of the threshold adjustment gate. For example, by adjusting the voltage of the first adjustment signal R_BSM so that the threshold voltage of the first driving transistor 110 is positively biased, the black state voltage of the first pixel driving unit 100 can be reduced, so that the black state voltages of the first pixel driving unit 100 and the second pixel driving unit 200 can be made consistent, which is beneficial to reducing the voltage range of the data signal output by the driving chip, improving the utilization rate of the voltage range of the data signal, and reducing the power consumption of the display panel.

[0119] Figure 3 A circuit diagram of another pixel driving circuit provided by an embodiment of the present invention. Figure 3 In another embodiment of the present invention, optionally, the first light-emitting element 210 is a green light-emitting element G and the second light-emitting element 220 is a blue light-emitting element B.

[0120] Exemplarily, the first driving transistor 110 and the second driving transistor 210 are both P-type transistors. According to the inventor's research, the result of testing a product shows that, taking the target grayscale configured as the 0th grayscale as an example, for the first pixel driving unit 100, the black state voltage of the first driving current control gate 113 written into the first driving transistor 110 needs to be 6.8V; for the second pixel driving unit 200, its black state voltage needs to be 6.4V. In order to achieve the black state display of the display panel, the driving chip needs to meet the highest voltage requirement, so the highest data signal is set to refer to the black state voltage (6.8V) of the first pixel driving unit 100. Such a high voltage output range is redundant for the second light-emitting element 220, which will increase the power consumption of the driving chip.

[0121] The inventors have found that the black state voltage of the pixel driving unit can be adjusted by adjusting the voltage of the threshold adjustment gate. For example, by adjusting the voltage of the first adjustment signal G_BSM so that the threshold voltage of the first driving transistor 110 is positively biased, the black state voltage of the first pixel driving unit 100 can be reduced, so that the black state voltages of the first pixel driving unit 100 and the second pixel driving unit 200 can be made consistent, which is beneficial to reducing the voltage range of the data signal output by the driving chip, improving the utilization rate of the voltage range of the data signal, and reducing the power consumption of the display panel.

[0122] It can be seen that, in the embodiment of the present invention, the first driving transistor 110 in the first pixel driving unit 100 includes a first threshold adjustment gate 111, and the second driving transistor 210 in the second pixel driving unit 200 includes a second threshold adjustment gate 211, so that the voltage of the first threshold adjustment gate 111 of the first driving transistor 110 and the second threshold adjustment gate 211 of the second driving transistor 210 can be adjusted, thereby adjusting the threshold voltage of the first driving transistor 110 and the second driving transistor 210, thereby improving the performance of the display panel.

[0123] Figure 4 A circuit diagram of another pixel driving circuit provided by an embodiment of the present invention. Figure 4 , based on the above embodiments, optionally, the pixel driving circuit further includes:

[0124] The third pixel driving unit 300 includes a third driving transistor 310 and a third light emitting element 320. The third driving transistor 310 has a third driving current control gate 313 and a third threshold adjustment gate 311. The third driving current control gate 313 is configured to receive a third data signal. The third threshold adjustment gate 311 is configured to receive a third adjustment signal B_BSM. The third driving transistor 310 drives the third light emitting element 320 under the control of the third data signal and the third adjustment signal B_BSM.

[0125] The light emitting colors of the first light emitting element 120, the second light emitting element 220 and the third light emitting element 320 are different from each other. When the first light emitting element 120, the second light emitting element 220 and the third light emitting element 320 are displayed at the target grayscale, the voltage values ​​of at least two of the first adjustment signal R_BSM, the second adjustment signal G_BSM and the third adjustment signal B_BSM are different. For example, the first adjustment signal R_BSM is different from the second adjustment signal G_BSM, and the third adjustment signal B_BSM is the same as the first adjustment signal R_BSM; for another example, the first adjustment signal R_BSM is different from the second adjustment signal G_BSM, and the third adjustment signal B_BSM is the same as the second adjustment signal G_BSM; for another example, the second adjustment signal G_BSM and the third adjustment signal B_BSM are different, and the first adjustment signal R_BSM and the second adjustment signal G_BSM are the same; for another example, the second adjustment signal G_BSM and the third adjustment signal B_BSM are different, and the first adjustment signal R_BSM and the second adjustment signal G_BSM are the same; for another example, the second adjustment signal G_BSM and the third adjustment signal For example, the first adjustment signal R_BSM and the third adjustment signal B_BSM are different, and the second adjustment signal G_BSM is the same as the first adjustment signal R_BSM; for example, the first adjustment signal R_BSM and the third adjustment signal B_BSM are different, and the second adjustment signal G_BSM is the same as the first adjustment signal R_BSM; for example, the first adjustment signal R_BSM and the third adjustment signal B_BSM are different, and the second adjustment signal G_BSM and the third adjustment signal B_BSM are the same; for example, the first adjustment signal R_BSM, the second adjustment signal G_BSM and the third adjustment signal B_BSM are different from each other.

[0126] Specifically, the first light emitting element 120 , the second light emitting element 220 , and the third light emitting element 320 do not emit light at the 0th gray scale.

[0127] Exemplarily, the first light emitting element 120 is a red light emitting element R, the second light emitting element 220 is a green light emitting element G, and the third light emitting element 320 is a blue light emitting element B. Due to the difference in the performance of the light emitting materials of light emitting elements of different colors, the efficiency of the pixel driving units of the three colors is different, which leads to the difference in the black state voltage required for the pixel driving units of the three colors. According to the research of the inventor, the result of testing a product shows that, taking the target grayscale as the 0th grayscale as an example, for the first pixel driving unit 100, the black state voltage of the first driving current control gate 113 written into the first driving transistor 110 needs to be 6.6V; for the second pixel driving unit 200, its black state voltage needs to be 6.8V; for the third pixel driving unit 300, its black state voltage needs to be 6.4V. In order to realize the black state display of the display panel, the driving chip needs to meet the highest voltage requirement, so the highest data signal is set to refer to the black state voltage (6.8V) of the second pixel driving unit 200. However, such a high voltage output range is redundant for the first light emitting element 120 and the third light emitting element 320 , which will increase the power consumption of the driving chip.

[0128] The inventor has found that by adjusting the voltage of the threshold adjustment gate, the black state voltage of the pixel driving unit can be adjusted. For example, by adjusting the voltage of the second adjustment signal G_BSM, the threshold voltage of the second driving transistor 210 is positively biased, and the black state voltage of the second pixel driving unit 200 can be reduced. This is because, in the process of writing data to the driving transistor 110, the more negative its threshold voltage is, the slower the data writing speed is; the more positive its threshold voltage is, the faster the data writing speed is. The embodiment of the present invention adjusts the voltage of the second adjustment signal G_BSM to be different from the first adjustment signal R_BSM and the third adjustment signal B_BSM, so that the threshold voltage of the second driving transistor 210 is positively biased, thereby accelerating the writing speed of the second data signal, which is conducive to using a smaller black state voltage to realize the black state display of the second light-emitting element. Therefore, the embodiment of the present invention can make the black state voltages of the first pixel driving unit 100, the second pixel driving unit 200 and the third pixel driving unit 300 tend to be consistent, which is conducive to reducing the voltage range of the data signal output by the driving chip, improving the utilization rate of the voltage range of the data signal, and reducing the power consumption of the display panel.

[0129] Figure 5 A circuit diagram of another pixel driving circuit provided by an embodiment of the present invention. Figure 5 Taking the first pixel driving unit 100 as an example, an embodiment of the present invention provides a specific circuit structure. In one embodiment of the present invention, optionally, the first pixel driving unit 100 includes a driving transistor 110, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7 and a storage capacitor Cst. The pixel circuit also includes a first scan line providing a first scan signal Scan1, a second scan line providing a second scan signal Scan2, a third scan line providing a third scan signal Scan3, a light emitting control signal line providing a light emitting control signal EM, a reference voltage signal line providing a reference voltage signal Vrefn, and a data line providing a data signal Data.

[0130] The second transistor T2 is a data writing transistor, the third transistor T3 is a threshold compensation transistor, the fourth transistor T4 is a gate initialization transistor, the fifth transistor T5 and the sixth transistor T6 are light emitting control transistors, and the seventh transistor T7 is an anode initialization transistor. Exemplarily, each transistor is a P-type transistor.

[0131] The gate of the second transistor T2 is connected to the second scanning signal Scan2, the first electrode of the second transistor T2 is connected to the source S of the driving transistor 110, and the second electrode of the second transistor T2 is connected to the data signal Data; the gate of the third transistor T3 is connected to the second scanning signal Scan2, the first electrode of the third transistor T3 is connected to the drain D of the driving transistor 110, and the second electrode of the third transistor T3 is connected to the first driving current control gate 113 of the driving transistor 110; the gate of the fourth transistor T4 is connected to the first scanning signal Scan1, the first electrode of the fourth transistor T4 is connected to the first driving current control gate 113 of the driving transistor 110, and the second electrode of the fourth transistor T4 is connected to The reference voltage signal Vrefn is input; the gate of the fifth transistor T5 is connected to the light emitting control signal EM, the first electrode of the fifth transistor T5 is connected to the source S of the driving transistor 110, and the second electrode of the fifth transistor T5 is connected to the voltage ELVDD; the gate of the sixth transistor T6 is connected to the light emitting control signal EM, the first electrode of the sixth transistor T6 is connected to the drain D of the driving transistor 110, and the second electrode of the sixth transistor T6 is connected to the anode of the first light emitting element 120; the gate of the seventh transistor T7 is connected to the third scanning signal Scan3, the first electrode of the seventh transistor T7 is connected to the anode of the first light emitting element 120, and the second electrode of the seventh transistor T7 is connected to the reference voltage signal Vrefn.

[0132] Exemplarily, the driving process of the first pixel driving unit 100 includes a gate initialization phase, a data writing phase, an anode initialization phase and a light emitting phase.

[0133] In the initialization stage, the light-emitting control signal EM, the second scanning signal Scan2 and the third scanning signal Scan3 are all at high levels, and the first scanning signal Scan1 is at a low level. The light-emitting control signal EM controls the fifth transistor T5 and the sixth transistor T6 to be turned off; the second scanning signal Scan2 controls the second transistor T2 and the third transistor T3 to be turned off; the third scanning signal Scan3 controls the seventh transistor T7 to be turned off. The first scanning signal Scan1 controls the fourth transistor T4 to be turned on, and the reference voltage signal Vrefn initializes the first driving current control gate 113 of the driving transistor 110 to ensure that the driving transistor 110 is in a conducting state during the data writing stage.

[0134] In the data writing stage, the light-emitting control signal EM, the first scanning signal Scan1 and the third scanning signal Scan3 are all at high levels, and the second scanning signal Scan2 is at a low level. The light-emitting control signal EM controls the fifth transistor T5 and the sixth transistor T6 to be turned off; the first scanning signal Scan1 controls the fourth transistor T4 to be turned off; and the third scanning signal Scan3 controls the seventh transistor T7 to be turned off. The second scanning signal Scan2 controls the second transistor T2 and the third transistor T3 to be turned on, so as to write the data signal Data into the first driving current control gate 113 of the driving transistor 110 via the source S and the drain D of the driving transistor 110. And, the first adjustment signal R_BSM is written into the first threshold adjustment gate 111 of the driving transistor 110 to adjust the threshold voltage of the driving transistor 110.

[0135] In the anode initialization stage, the light-emitting control signal EM, the first scan signal Scan1, and the second scan signal Scan2 are all at high levels, and the third scan signal Scan3 is at a low level. The light-emitting control signal EM controls the fifth transistor T5 and the sixth transistor T6 to be turned off; the first scan signal Scan1 controls the fourth transistor T4 to be turned off; the second scan signal Scan2 controls the second transistor T2 and the third transistor T3 to be turned off. The third scan signal Scan3 controls the seventh transistor T7 to be turned on, so that the reference voltage signal Vrefn initializes the anode of the first light-emitting element 120.

[0136] In the light-emitting stage, the first scanning signal Scan1, the second scanning signal Scan2 and the third scanning signal Scan3 are all at high levels. The light-emitting control signal EM is at a low level or presents periodic changes, which is not limited by the present invention. The first scanning signal Scan1 controls the fourth transistor T4 to be disconnected; the second scanning signal Scan2 controls the second transistor T2 and the third transistor T3 to be disconnected; the third scanning signal Scan3 controls the seventh transistor T7 to be disconnected. When the light-emitting control signal EM controls the fifth transistor T5 and the sixth transistor T6 to be turned on, the driving transistor 110 generates a driving current, which flows into the anode of the first light-emitting element 120, driving the first light-emitting element 120 to emit light.

[0137] It should be noted that the first adjustment signal R_BSM may be provided continuously throughout the entire driving process, or may be provided during the data writing phase and the light emitting phase, and the present invention does not limit this.

[0138] Figure 6 A circuit diagram of another pixel driving circuit provided by an embodiment of the present invention. Figure 6, different from the above-mentioned embodiments, at least two of the first driving transistor 110, the second driving transistor 210 and the third driving transistor 310 are N-type transistors. Preferably, the first driving transistor 110, the second driving transistor 210 and the third driving transistor 310 are all N-type transistors to simplify the manufacturing process. In contrast to the P-type transistor, the threshold voltage of the N-type transistor is positive, and the black state voltage of each pixel driving unit is negative. Exemplarily, the first light-emitting element 120 is a red light-emitting element R, the second light-emitting element 220 is a green light-emitting element G, and the third light-emitting element 320 is a blue light-emitting element B. When the first light-emitting element 120, the second light-emitting element 220 and the third light-emitting element 320 are displayed at the target gray scale, the voltage of the second adjustment signal G_BSM is different from the voltage of the first adjustment signal R_BSM and the third adjustment signal B_BSM, and the voltage difference between the voltage of the second adjustment signal G_BSM and the voltage of the first adjustment signal R_BSM and the third adjustment signal B_BSM is large. By adjusting the negative bias of the threshold voltage of the second pixel driving unit 200, the black state voltage of the second pixel driving unit 200 can be raised. In this way, the black state voltages of the first pixel driving unit 100, the second pixel driving unit 200 and the third pixel driving unit 300 tend to be consistent, which is beneficial to reduce the voltage range of the data signal output by the driving chip, so that the voltage range utilization rate of the data signal reaches the highest, and the power consumption of the display panel is reduced.

[0139] In another embodiment of the present invention, optionally, the voltage values ​​of the first adjustment signal R_BSM, the second adjustment signal G_BSM and the third adjustment signal B_BSM make the first pixel driving unit 100, the second pixel driving unit 200 and the third pixel driving unit 300 all forward biased. This is because, for the N-type driving transistor, due to the process reasons of the IGZO driving transistor, the fluctuation of its threshold voltage is large, and there is a situation where the threshold voltage is less than zero. In some embodiments, the pixel driving circuit can perform threshold voltage compensation on the N-type driving transistor, but the prerequisite for this compensation is that the threshold voltage of the driving transistor is a positive value. If the threshold voltage of the driving transistor is less than zero, it will result in the inability to perform threshold voltage compensation, thereby causing the display panel to have a display uneven problem. Therefore, the embodiment of the present invention sets the voltage values ​​of the first adjustment signal R_BSM, the second adjustment signal G_BSM and the third adjustment signal B_BSM so that the first pixel driving unit 100, the second pixel driving unit 200 and the third pixel driving unit 300 are all forward biased, thereby avoiding the situation where the threshold voltage of the N-type driving transistor is less than zero, and ensuring the threshold compensation effect.

[0140] It should be noted that, in the aforementioned embodiments, in order to achieve low power consumption of the display panel, the threshold voltage of the second pixel driving unit 200 needs to be negatively biased; and in order to ensure that the threshold voltage is greater than zero, the threshold voltage of each pixel driving unit needs to be positively biased. Among them, whether it is negative bias or positive bias, it is relative to before the threshold voltage is adjusted. In fact, when the voltage of the threshold adjustment gate of the driving transistor is a fixed value, the threshold voltage of the driving transistor is determined accordingly. As long as the voltage of the appropriate threshold adjustment gate is selected, it can ensure that the threshold voltage of each driving transistor is greater than zero, and the black state voltage of the pixel driving unit can be adjusted to be consistent.

[0141] In some embodiments, when the first light-emitting element 120, the second light-emitting element 220 and the third light-emitting element 320 are displayed at the target gray scale, in order to maximize the voltage range utilization of the data signal (that is, the voltage values ​​of the first data signal, the second data signal and the third data signal are the same at this time), it is necessary to set the voltage values ​​of at least two of the first adjustment signal R_BSM, the second adjustment signal G_BSM and the third adjustment signal B_BSM to be different, which means: the voltage of the first adjustment signal R_BSM can be set to be different from the voltages of the second adjustment signal G_BSM and the third adjustment signal B_BSM; or, the voltage of the second adjustment signal G_BSM can be set to be different from the voltages of the first adjustment signal R_BSM and the third adjustment signal B_BSM; or, the voltage of the third adjustment signal B_BSM can be set to be different from the voltages of the first adjustment signal R_BSM and the second adjustment signal G_BSM. In some other embodiments, when the first light-emitting element 120, the second light-emitting element 220 and the third light-emitting element 320 are displayed at the target gray scale, in order to maximize the voltage range utilization of the data signal (i.e., the voltage values ​​of the first data signal, the second data signal and the third data signal are the same at this time), the voltage values ​​of the first adjustment signal R_BSM, the second adjustment signal G_BSM and the third adjustment signal B_BSM need to be set to be different from each other.

[0142] It should be noted that in the above embodiments, the target grayscale is configured as the 0th grayscale for example. This is because the voltage corresponding to the 0th grayscale determines the highest voltage value of the data voltage, but this is not a limitation of the present invention. In practical applications, the target grayscale can be any grayscale value among all displayed grayscales.

[0143] Continue to see Figure 2 and Figure 6On the basis of the above embodiments, optionally, the first light-emitting element 120 has a first cathode, the first cathode is configured with a first cathode signal R_ELVSS, the second light-emitting element 220 has a second cathode, the second cathode is configured with a second cathode signal G_ELVSS, and the third light-emitting element 320 has a third cathode, the third cathode is configured with a third cathode signal B_ELVSS.

[0144] in:

[0145] At least two of the first cathode signal R_ELVSS, the second cathode signal G_ELVSS, and the third cathode signal B_ELVSS have different voltage values.

[0146] From the above analysis, it can be seen that the performance of the light-emitting materials of different colors of the light-emitting elements is different, and the light-on voltage, black state voltage, etc. of the light-emitting elements of different colors are different, so that the efficiency of the pixel driving unit is different, and the display panel has a uniformity problem. The embodiment of the present invention can compensate for the voltage difference between the first light-emitting element 120, the second light-emitting element 220 and the third light-emitting element 320 by setting the voltage values ​​of at least two of the first cathode signal R_ELVSS, the second cathode signal G_ELVSS and the third cathode signal B_ELVSS to be different, thereby balancing the efficiency of the first pixel driving unit 100, the second pixel driving unit 200 and the third pixel driving unit 300, and improving the uniformity of the display panel.

[0147] On the basis of the above embodiments, optionally, the voltage of the second cathode signal G_ELVSS is different from the voltages of the first cathode signal R_ELVSS and the third cathode signal B_ELVSS; or, the voltage of the first cathode signal R_ELVSS is different from the voltages of the second cathode signal G_ELVSS and the third cathode signal B_ELVSS; or, the voltage of the third cathode signal B_ELVSS is different from the voltages of the first cathode signal R_ELVSS and the second cathode signal G_ELVSS; or, the voltage values ​​of the first cathode signal R_ELVSS, the second cathode signal G_ELVSS and the third cathode signal B_ELVSS are different from each other.

[0148] It should be noted that, in practical applications, the voltages of the first adjustment signal R_BSM, the second adjustment signal G_BSM, and the third adjustment signal B_BSM can be set as needed, and the present invention does not limit them. For example, they can be determined by performing multiple tests, or by mathematical modeling or simulation, as long as the black state voltages of the first pixel driving unit 100, the second pixel driving unit 200, and the third pixel driving unit 300 tend to be consistent.

[0149] In summary, the embodiment of the present invention sets the light emitting colors of the first light emitting element 120, the second light emitting element 220 and the third light emitting element 320 to be different from each other. When the first light emitting element 120, the second light emitting element 220 and the third light emitting element 320 are displayed at the target gray scale, the voltage values ​​of at least two of the first adjustment signal R_BSM, the second adjustment signal G_BSM and the third adjustment signal B_BSM are different, so that the threshold voltages of the first driving transistor 110, the second driving transistor 210 and the third driving transistor 310 can be adjusted, so that the black state voltages of the first pixel driving unit 100, the second pixel driving unit 200 and the third pixel driving unit 300 tend to be consistent, which is beneficial to reducing the voltage range of the data signal output by the driving chip, improving the utilization rate of the voltage range of the data signal, and reducing the power consumption of the display panel.

[0150] The embodiment of the present invention further provides a display panel. The display panel includes a pixel driving circuit as provided in any embodiment of the present invention, and its technical principle and effects are similar and will not be described in detail.

[0151] Figure 7 A schematic diagram of the structure of a display panel provided by an embodiment of the present invention, Figure 8 for Figure 7 It should be noted that the first pixel driving unit 100 and the second pixel driving unit 200 are arranged in the same manner. Figure 8 The structure of the first pixel driving unit 100 is taken as an example for description. Figure 7 and Figure 8 , the display panel further includes:

[0152] a first metal layer, a first threshold adjustment gate 111 and a second threshold adjustment gate ( Figure 8 ) is electrically isolated and disposed in the first metal layer;

[0153] The light-emitting functional layer is disposed on one side of the first metal layer, a portion of the first light-emitting element 120 and a portion of the second light-emitting element ( Figure 8 (not shown) is arranged in the light-emitting functional layer;

[0154] The isolation layer is disposed on one side of the first metal layer and is used to isolate the first light emitting element 120 from the second light emitting element. The isolation layer includes at least a first gate isolation column 311 and a second gate isolation column ( Figure 8 not shown);

[0155] The first gate isolation column 311 is coupled to the first threshold adjustment gate 111 and is configured with a first adjustment signal, and the second gate isolation column is coupled to the second threshold adjustment gate and is configured with a second adjustment signal. Exemplarily, the first gate isolation column 311 is electrically connected to the threshold adjustment gate 11 through a cross-line connection line 16 across the membrane layer.

[0156] From the foregoing analysis, it can be seen that based on the structure of the display panel, the embodiment of the present invention can, when the first light-emitting element 120 and the second light-emitting element 220 are displayed at the target gray scale, the voltage values ​​of the first data signal and the second data signal are the same, and the voltage values ​​of the first adjustment signal and the second adjustment signal are different, so that the black state voltages of the first pixel driving unit 100 and the second pixel driving unit 200 tend to be consistent, which is beneficial to reducing the voltage range of the data signal output by the driving chip, improving the utilization rate of the voltage range of the data signal, and reducing the power consumption of the display panel.

[0157] In addition, the embodiment of the present invention also improves the performance of each driving transistor by improving the structure of the first driving transistor 110 and the second driving transistor 210. Specifically, the first gate isolation column 311 of the isolation column layer is used to carry the first adjustment signal, which is conducive to reducing the resistance of the first adjustment signal during the transmission process; similarly, a second threshold adjustment gate is added to the second driving transistor, and the second gate isolation column of the isolation column layer is used to carry the second adjustment signal, which is conducive to reducing the resistance of the second adjustment signal during the transmission process.

[0158] Continue to see Figure 7 , based on the above embodiments, optionally, the pixel driving circuit further includes a third pixel driving unit 300. Figure 8 The third pixel driving unit 300 is similar to the first pixel driving unit 100. Specifically, the third pixel driving unit 300 includes a third driving transistor and a third light-emitting element. The third driving transistor has a third driving current control gate and a third threshold adjustment gate. The third driving current control gate is configured to receive a third data signal. The third threshold adjustment gate is configured to receive a third adjustment signal. The third driving transistor drives the third light-emitting element under the control of the third data signal and the third adjustment signal, wherein: the third threshold adjustment gate is electrically isolated from the first threshold adjustment gate, and the third threshold adjustment gate is electrically isolated from the second threshold adjustment gate, and the third threshold adjustment gate is arranged in the first metal layer; a part of the third light-emitting element is arranged in the light-emitting function layer; the isolation layer is also used to isolate the third light-emitting element from the first light-emitting element, and the isolation layer is also used to isolate the third light-emitting element from the second light-emitting element, and the isolation layer includes a third gate isolation column, the third gate isolation column is coupled to the third threshold adjustment gate, and is configured with a third adjustment signal.

[0159] It can be seen that the embodiment of the present invention can make the voltage values ​​of the first data signal, the second data signal and the third data signal the same when the first light-emitting element 120, the second light-emitting element and the third light-emitting element are displayed at the target gray scale, and the voltage values ​​of at least two of the first adjustment signal, the second adjustment signal and the third adjustment signal are different, so that the black state voltages of the first pixel driving unit 100, the second pixel driving unit 200 and the third pixel driving unit 300 tend to be consistent, which is beneficial to reducing the voltage range of the data signal output by the driving chip, improving the utilization rate of the voltage range of the data signal, and reducing the power consumption of the display panel. In addition, the embodiment of the present invention also improves the performance of each driving transistor by improving the structure of the third driving transistor 310. Specifically, a third threshold adjustment gate is added to the third driving transistor, and the third gate isolation column of the isolation column layer is used to carry the third adjustment signal, which is beneficial to reduce the resistance of the third adjustment signal during transmission.

[0160] Such a configuration is beneficial to improving the uniformity of the voltage of the first adjustment signal received by each first pixel driving unit 100, improving the uniformity of the voltage of the second adjustment signal received by each second pixel driving unit 200, and improving the uniformity of the voltage of the third adjustment signal received by each third pixel driving unit 300, thereby helping to improve the display uniformity of the display panel.

[0161] Continue to see Figure 7 and Figure 8 On the basis of the above embodiments, optionally, the display panel further includes a cathode layer, the cathode layer is arranged on one side of the light-emitting functional layer, and the isolation layer further includes a first cathode isolation column 321, a second cathode isolation column ( Figure 8 ) and the third cathode isolation column ( Figure 8 ), where:

[0162] The first light emitting element 120 has a first cathode 23, the second light emitting element 220 has a second cathode, the third light emitting element 320 has a third cathode, the first cathode 23, the second cathode and the third cathode are electrically isolated and arranged in the cathode layer; the first cathode isolation column 321 is coupled to the first cathode 23 and is configured with a first cathode signal, the second cathode isolation column is coupled to the second cathode and is configured with a second cathode signal, and the third cathode isolation column is coupled to the third cathode and is configured with a third cathode signal. This arrangement is conducive to setting the voltage values ​​of at least two of the first cathode signal, the second cathode signal and the third cathode signal to be different, and can compensate for the voltage difference between the first light emitting element 120, the second light emitting element and the third light emitting element, thereby balancing the efficiency of the first pixel driving unit 100, the second pixel driving unit 200 and the third pixel driving unit 300, and improving the uniformity of the display panel.

[0163] It should be understood that the functions of the above-mentioned first gate isolation column 311, the second gate isolation column and the third gate isolation column are, on the one hand, to isolate the first light-emitting element, the second light-emitting element and the third light-emitting element, and on the other hand, to carry the corresponding adjustment signal; correspondingly, the functions of the first cathode isolation column 321, the second cathode isolation column and the third cathode isolation column are, on the one hand, to isolate the first light-emitting element, the second light-emitting element and the third light-emitting element, and on the other hand, to carry the corresponding cathode signal.

[0164] On the basis of the above embodiments, optionally, the first gate isolation column 311, the second gate isolation column, the third gate isolation column, the first cathode isolation column 321, the second cathode isolation column and the third cathode isolation column are an integrated structure, for example, the cross-sectional shape can be a trapezoid with a large top and a small bottom, wherein the large top and the small bottom means that the side of the trapezoid away from the first metal layer is the lower bottom, and the side close to the first metal layer is the upper bottom. Such a setting is conducive to the preparation of the isolation column. Preferably, the first gate isolation column 311, the second gate isolation column, the third gate isolation column, the first cathode isolation column 321, the second cathode isolation column and the third cathode isolation column can be prepared by the same process. Optionally, the first gate isolation column 311, the second gate isolation column, the third gate isolation column, the first cathode isolation column 321, the second cathode isolation column and the third cathode isolation column can also be a layered structure, and the present invention is not limited to this.

[0165] Continue to see Figure 7 and Figure 8 On the basis of the above embodiments, the display panel may optionally further include other film layers, such as an active layer, a second metal layer, a third metal layer, a fourth metal layer, and an anode metal layer. An insulating layer (such as a first insulating layer 41, a second insulating layer 42, a third insulating layer 43, and a fourth insulating layer 44) is disposed between each film layer.

[0166] Taking the first pixel driving unit as an example, the semiconductor 12 of the first driving transistor is arranged in the active layer, and the first driving current control gate 113 is arranged in the second metal layer. In this embodiment, the first threshold adjustment gate 111 is located at the bottom of the semiconductor 12, which can also be called the bottom gate; the first driving current control gate 113 is located at the top of the semiconductor 12, which can also be called the top gate. The third metal layer is provided with a plate 14 of a capacitor. Exemplarily, the capacitor plate 14 and the first driving current control gate 113 are overlapped to form a storage capacitor. The fourth metal layer is provided with a source and drain 15 of the first driving transistor, and the source and drain 15 are electrically connected to the semiconductor 12. The anode metal layer is provided with an anode 21 of the first light-emitting element 120, and the anode 21 is also provided with a light-emitting functional layer 22 and a cathode 23 of the first light-emitting element. Exemplarily, the anode 21 is electrically connected to the source and drain 15 of the first driving transistor, and the driving current generated by the first driving transistor is transmitted to the anode 21. Under the action of the voltage of the anode 21 and the voltage of the cathode 23, the light-emitting functional layer 22 emits light.

[0167] In the above embodiments, optionally, the first gate isolation column 311, the second gate isolation column and the third gate isolation column, the first cathode isolation column 321, the second cathode isolation column and the third cathode isolation column can be used to realize the whole-surface evaporation of the light-emitting material. By way of example, taking the first pixel driving unit as an example, after the array film layer provided with the first driving transistor 110 is prepared, an anode metal layer is formed on the array film layer, and the anode 21 is patterned, and the anode 21 is electrically connected to the source and drain 15 of the first driving transistor 110; a seventh insulating layer 52 (i.e., a pixel definition layer) and an isolation column layer are prepared on the anode layer, and the isolation column layer is patterned to form a first gate isolation column 311 and a first cathode isolation column 321 that are larger at the top and smaller at the bottom; the seventh insulating layer 52 (i.e., a pixel definition layer) is patterned, a pixel opening is formed on the anode 21, and the first light-emitting material is evaporated in the pixel opening; and then the first cathode material is evaporated on the first light-emitting material.

[0168] The method of evaporating the first light-emitting material and the first cathode material is full-layer evaporation, and the first light-emitting material and the first cathode material are evaporated in each pixel opening (including the pixel openings corresponding to the first pixel driving unit 100, the second pixel driving unit 200 and the third pixel driving unit 300). Since the shape of the first cathode isolation column 321 is large at the top and small at the bottom, the material evaporated into two adjacent pixel openings is disconnected by the first cathode isolation column 321, and at the same time, the edge portion of the cathode 23 is electrically connected to the first cathode isolation column 321. Finally, the first light-emitting material and the first cathode material in the pixel openings corresponding to the second pixel driving unit 200 and the third pixel driving unit 300 are removed. At this point, the evaporation of the first light-emitting material and the first cathode material is completed.

[0169] The processes of evaporating the light-emitting material and the cathode material in the pixel openings of the second pixel driving unit 200 and the third pixel driving unit 300 are similar and will not be described in detail.

[0170] It can be seen that, when the display panel provided by the embodiment of the present invention is used, when performing vapor deposition of the light-emitting element, a whole-layer vapor deposition process can be used, and a fine mask plate is not required, which is conducive to reducing the manufacturing cost of the display panel. In addition, in the prior art, a support column needs to be provided to support the fine mask plate, but the embodiment of the present invention does not need to use a fine mask plate, so there is no need to make the first gate isolation column 311 and the first cathode isolation column 321 play the role of supporting the fine mask plate. Therefore, the size and position of the first gate isolation column 311 and the first cathode isolation column 321 can be adjusted as needed.

[0171] Continue to see Figure 8 In the above embodiments, there are many ways to set the insulating layer between the film layers, which are described in detail below, but are not intended to limit the present invention.

[0172] In the above embodiments, the material of the semiconductor 12 may be amorphous silicon (a-Si), polycrystalline silicon (P-Si) or oxide, etc. For example, if the semiconductor 12 is low temperature polycrystalline silicon (LTPS), a P-type driving transistor may be formed; if the semiconductor 12 is indium gallium zinc oxide (IGZO), an N-type driving transistor may be formed. Whether it is a P-type driving transistor 110 or an N-type driving transistor, optimization can be achieved by adjusting the threshold voltage of the gate.

[0173] In one embodiment, optionally, a first insulating layer 41 is provided between the first metal layer and the active layer, and the first insulating layer 41 is a substrate for supporting the film layers thereon. The material of the substrate may be an organic material, such as polyimide PI, etc.; the material of the substrate may also be an inorganic material, such as glass, etc. Exemplarily, the film layer below the first metal layer is also a substrate, that is, the first metal layer is provided in the substrate film layer.

[0174] In one embodiment, optionally, a second insulating layer 42 is provided between the active layer and the second metal layer, and the second insulating layer 42 may also be called a gate insulating layer, forming an insulating layer portion of the driving transistor 110. The material of the second insulating layer 42 may be an inorganic material, such as SiN and / or SiO.

[0175] In one embodiment, optionally, a third insulating layer 43 is provided between the second metal layer and the third metal layer, and the third insulating layer 43 can also be called an intermediate insulating layer, forming an intermediate dielectric layer of the capacitor. The material of the third insulating layer 43 can be an inorganic material, such as SiN and / or SiO.

[0176] In one implementation, optionally, a fourth insulating layer 44 is disposed between the third metal layer and the fourth metal layer, and the material of the fourth insulating layer may be an inorganic material, such as SiN and / or SiO.

[0177] In one embodiment, optionally, a fifth insulating layer 45 is further provided between the fourth insulating layer 44 and the fourth metal layer. The material of the fifth insulating layer 45 may be an organic material, which can isolate the third metal layer and the fourth metal layer and also play a certain planarization role.

[0178] In one embodiment, optionally, a sixth insulating layer 51 is provided between the fourth metal layer and the anode metal layer. The sixth insulating layer 51 can flatten the surface of the fourth metal layer while isolating the fourth metal layer and the anode metal layer, which is beneficial to the flatness of the film layer during the subsequent preparation of the light-emitting element and optimizes the light emission effect of the light-emitting element.

[0179] In one embodiment, optionally, a seventh insulating layer 52 is further disposed on the anode metal layer. The seventh insulating layer 52 may also be referred to as a pixel definition layer, which can define the size of the pixel opening while isolating the anode metal layer and the isolation column layer.

[0180] In one embodiment, optionally, an eighth insulating layer 53 is further provided on the isolation column layer, and the eighth insulating layer 53 covers the cathode 23 and can isolate each light-emitting element; the eighth insulating layer 53 is also filled between the first gate isolation column 311 and the first cathode isolation column 321 and can isolate the first gate isolation column 311 and the first cathode isolation column 321.

[0181] It should be noted that, due to the shape characteristics of the first gate isolation column 311 and the first cathode isolation column 321, the space between the first gate isolation column 311 and the first cathode isolation column 321 is small at the top and large at the bottom, and the eighth insulating layer 53 may not be able to fill the space when deposited, which is allowed. With the improvement of the process, the eighth insulating layer 53 can also fill the space, and these situations are within the protection scope of the present invention.

[0182] Continue to see Figure 8 In one embodiment of the present invention, optionally, the first gate isolation column 311 and the first cathode isolation column 321 are respectively provided in one piece. Exemplarily, taking the first gate isolation column 311 as an example, the first gate isolation column 311 with a larger top and a smaller bottom can be prepared by a lift-off process. Specifically, a negative photoresist is applied, and then an opening is formed at the position of the first gate isolation column 311 through exposure and development, and then a metal is evaporated in the opening, and the remaining photoresist is removed to form the first gate isolation column 311 with a larger top and a smaller bottom.

[0183] In one embodiment, optionally, a sealing layer 61 and an encapsulation layer 62 are further disposed on the eighth insulating layer 53. Exemplarily, the sealing layer 61 is formed by inkjet printing, and the encapsulation layer 62 is formed by chemical vapor deposition.

[0184] On the basis of the above embodiments, optionally, the pixel driving circuit includes a plurality of first pixel driving units 100 , a plurality of second pixel driving units 200 and a plurality of third pixel driving units 300 . Fig. 9 A partial structural diagram of a display panel provided by an embodiment of the present invention. Fig. 9 ,in:

[0185] The first threshold adjustment gate 111 in each first pixel driving unit 100 is coupled through the same first gate isolation column 311, the second threshold adjustment gate 211 in each second pixel driving unit 200 is coupled through the same second gate isolation column 312, and the third threshold adjustment gate 311 in each third pixel driving unit is coupled through the same third gate isolation column 313.

[0186] Through this arrangement, the same adjustment voltage can be provided to sub-pixels of the same color, thereby further achieving the beneficial effect of reducing the number of signal lines while ensuring the display effect of the display panel.

[0187] Continue to see Fig. 9 On the basis of the above embodiments, optionally, multiple first pixel driving units 100 are arranged into multiple columns, multiple second pixel driving units 200 are arranged into multiple columns, and multiple third pixel driving units 300 are arranged into multiple columns, wherein the first threshold adjustment gates 111 in each of the first pixel driving units 100 in the same column are coupled through the same first gate isolation column 311, the second threshold adjustment gates 211 in each of the second pixel driving units 200 in the same column are coupled through the same second gate isolation column 312, and the third threshold adjustment gates 311 in each of the third pixel driving units 300 in the same column are coupled through the same third gate isolation column 313.

[0188] Continue to see Fig. 9 On the basis of the above embodiments, optionally, the first cathodes in the first pixel driving units 100 are coupled via the same first cathode isolation column 321, the second cathodes in the second pixel driving units 200 are coupled via the same second cathode isolation column 322, and the third cathodes in the third pixel driving units 300 are coupled via the same third cathode isolation column 323. Through this arrangement, the same cathode voltage can be provided to the sub-pixels of the same color, thereby further achieving the beneficial effect of reducing the number of signal lines while ensuring the display effect of the display panel.

[0189] Continue to see Fig. 9On the basis of the above embodiments, optionally, multiple first pixel driving units 100 are arranged into multiple columns, multiple second pixel driving units 200 are arranged into multiple columns, and multiple third pixel driving units 300 are arranged into multiple columns, wherein the first cathodes in the first pixel driving units 100 in the same column are coupled through the same first cathode isolation column 321, the second cathodes in the second pixel driving units 200 in the same column are coupled through the same second cathode isolation column 322, and the third cathodes in the third pixel driving units 300 in the same column are coupled through the same third cathode isolation column 323.

[0190] Continue to see Figure 8 and Fig. 9 On the basis of the above embodiments, optionally, the first cathode isolation column 321 surrounds the first pixel driving unit 100, and the first gate isolation column 311 is located at the periphery of the first cathode isolation column 321; the second cathode isolation column 322 surrounds the second pixel driving unit 200, and the second gate isolation column 312 is located at the periphery of the second cathode isolation column 322; the third cathode isolation column 323 surrounds the third pixel driving unit 300, and the third gate isolation column 313 is located at the periphery of the third cathode isolation column 323.

[0191] Optionally, the first gate isolation column 311 is closer to the first pixel driving unit 100 , the second gate isolation column 312 is closer to the second pixel driving unit 300 , and the third gate isolation column 313 is closer to the third pixel driving unit 300 , so as to simplify the wiring method.

[0192] It should be noted that in an array, rows and columns are relative concepts. Generally, the vertical direction is considered to be a column and the horizontal direction is considered to be a row. However, at different angles, the vertical and horizontal directions are interchangeable, so rows can also be called columns and columns can also be called rows.

[0193] Fig.10 A schematic diagram of the structure of another display panel provided by an embodiment of the present invention. Fig.10 On the basis of the above embodiments, optionally, the display panel has a display area 81 and a frame area (exemplarily, including an upper frame area 82 and a lower frame area 83) arranged adjacent to each other, the pixel driving circuit is located in the display area 81, and the display panel at least includes: a first threshold adjustment bus 711, a second threshold adjustment bus 712, and a third threshold adjustment bus 713. The first threshold adjustment bus 711 is located in the frame area, and each first gate isolation column 311 is coupled to the first threshold adjustment bus 711; the second threshold adjustment bus 712 is located in the frame area, and each second gate isolation column 312 is coupled to the second threshold adjustment bus 712; the third threshold adjustment bus 713 is located in the frame area, and each third gate isolation column 313 is coupled to the third threshold adjustment bus 713. This arrangement further simplifies the wiring of the display panel.

[0194] Optionally, a plurality of first pixel driving units 100 are arranged in a plurality of columns, a plurality of second pixel driving units are arranged in a plurality of columns, and a plurality of third pixel driving units are arranged in a plurality of columns, the columns extend along a first direction X, the first threshold adjustment bus 711, the second threshold adjustment bus 712, and the third threshold adjustment bus 713 extend along a second direction Y, and the first direction X and the second direction Y have an angle. Preferably, the first direction X is perpendicular to the second direction Y.

[0195] See also Fig.10 On the basis of the above embodiments, the display panel may further include: a first cathode bus 721, a second cathode bus 722 and a third cathode bus 723. The first cathode bus 721 is located in the frame area, and each first cathode isolation column 321 is coupled to the first cathode bus 721; the second cathode bus 722 is located in the frame area, and each second cathode isolation column 322 is coupled to the second cathode bus 722; the third cathode bus 723 is located in the frame area, and each third cathode isolation column 323 is coupled to the third cathode bus 723. This arrangement further simplifies the wiring of the display panel.

[0196] Optionally, a plurality of first pixel driving units 100 are arranged in a plurality of columns, a plurality of second pixel driving units are arranged in a plurality of columns, and a plurality of third pixel driving units are arranged in a plurality of columns, the columns extend along a first direction X, the first cathode bus, the second cathode bus, and the third cathode bus extend along a second direction Y, and the first direction X and the second direction Y have an angle. Preferably, the first direction X is perpendicular to the second direction Y.

[0197] Continue to see Fig.10 In one embodiment of the present invention, optionally, the display panel further includes an upper frame area 82 and a lower frame area 83, the upper frame area 82 is located at the top of the display area 81, and the lower frame area 83 is located at the bottom of the display area 81. The upper frame area 82 and the lower frame area 83 are both provided with a first threshold adjustment bus 711, which is equivalent to providing voltage from both ends of the first gate isolation column 311, which is conducive to improving the uniformity of the voltage signal received by each pixel driving unit. Similarly, the upper frame area 82 and the lower frame area 83 are both provided with a second threshold adjustment bus 712 and a third threshold adjustment bus 713.

[0198] In another embodiment of the present invention, optionally, the first threshold adjustment bus 711 is only provided in the upper frame area 82; or, the first threshold adjustment bus 711 is only provided in the lower frame area 83. The second threshold adjustment bus 712 is only provided in the upper frame area 82; or, the second threshold adjustment bus 712 is only provided in the lower frame area 83. The third threshold adjustment bus 713 is only provided in the upper frame area 82; or, the third threshold adjustment bus 713 is only provided in the lower frame area 83.

[0199] In an embodiment of the present invention, optionally, the first threshold adjustment bus 711 , the second threshold adjustment bus 712 , and the third threshold adjustment bus 713 are all disposed in the isolation column layer.

[0200] In another embodiment of the present invention, the display panel may further include a first gate connection line, a second gate connection line, and a third gate connection line. The first gate connection line is located in the first metal layer of the display area 81, each first threshold adjustment gate 111 is coupled to the first gate connection line, and the first gate connection line is arranged in parallel with the first gate isolation column 311; the second gate connection line is located in the first metal layer of the display area 81, each second threshold adjustment gate 112 is coupled to the second gate connection line, and the second gate connection line is arranged in parallel with the second gate isolation column 312; the third gate connection line is located in the first metal layer of the display area 81, each third threshold adjustment gate 113 is coupled to the third gate connection line, and the third gate connection line is arranged in parallel with the third gate isolation column 313. Among them, since the metal of the first metal layer is thinner and the thickness of the isolation column of the isolation column layer is thicker, the impedance of the first gate isolation column 311, the second gate isolation column 312 and the third gate isolation column 313 is relatively small, and the first threshold adjustment gate 111, the second threshold adjustment gate 112 and the third threshold adjustment gate 113 are electrically connected through the first gate isolation column 311, the second gate isolation column 312 and the third gate isolation column 313 respectively, and the uniformity is better. In practical applications, the gate connection line set in the first metal layer is a supplementary solution, which can further improve the uniformity of the display panel.

[0201] Continue to see Fig.10 In one embodiment of the present invention, optionally, in the upper frame area 82, from top to bottom, there are the first threshold adjustment bus 711, the second threshold adjustment bus 712 and the third threshold adjustment bus 713, each first gate isolation column 311 is connected to the first threshold adjustment bus 711 through a crossover line, and each second gate isolation column 312 is connected to the second threshold adjustment bus 712 through a crossover line. This arrangement can avoid the first gate isolation column 311 from being short-circuited with the second threshold adjustment bus 712 and the third threshold adjustment bus 713; and avoid the second gate isolation column 312 from being short-circuited with the second threshold adjustment bus 713. Each third gate isolation column 313 is directly connected to the third threshold adjustment bus 713. This arrangement is conducive to simplifying wiring. In the lower frame area 83, the setting method of each threshold adjustment bus and the gate isolation column is similar, and will not be repeated.

[0202] Continue to see Fig.10In one embodiment of the present invention, optionally, the upper frame area 82 and the lower frame area 83 are both provided with a first cathode bus 721. This arrangement is equivalent to providing voltage from both ends of the first cathode isolation column 321, which is conducive to improving the uniformity of the voltage signal received by each pixel driving unit. Similarly, the upper frame area 82 and the lower frame area 83 are both provided with a second cathode bus 722 and a third cathode bus 723.

[0203] It should be noted that in the above embodiments, the driving transistor and the light-emitting element are directly electrically connected as an example, which is not a limitation of the present invention. In other embodiments, for example, for a pixel driving circuit with a compensation function, a light-emitting control transistor is also provided between the driving transistor and the light-emitting element. Regardless of the form of the pixel driving circuit, as long as it is provided with a threshold adjustment gate, and the threshold adjustment gate is connected to the gate isolation column, it is within the protection scope of the present invention.

[0204] Fig.11 A schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention. Fig.11 In another embodiment of the present invention, the first gate isolation column 311 may include at least two sub-layers, the width of the upper sub-layer is greater than the width of the lower sub-layer, and the materials of the sub-layers are different. Fig.12 The first gate isolation column 311 shown in the figure, the first cathode isolation column, the second gate isolation column, the third gate isolation column, the second cathode isolation column and the third cathode isolation column are arranged in the same manner and prepared in the same manner as the first gate isolation column 311, and are not described in detail.

[0205] Continue to see Fig.11In one embodiment of the present invention, optionally, the fourth metal layer is further provided with a cross-line connection line 16, the cross-line connection line 16 is connected to the first threshold adjustment gate 111 through a via hole, and the first gate isolation column 311 is connected to the cross-line connection line 16 through a via hole. Such a setting is conducive to simplifying the etching process of the display panel. Specifically, when preparing the fourth metal layer, the preparation of the source and drain electrodes 15 requires drilling via holes to the semiconductor 12 located in the active layer through an etching process; at the same time, the via holes corresponding to the cross-line connection line 16 can be etched to the first threshold adjustment gate 11 located in the first metal layer. And, the cross-line connection line 16 can also be prepared in the same process as the source and drain electrodes 15. Before preparing the first gate isolation column 311, a via hole can be formed at the position corresponding to the cross-line connection line 16 on the seventh insulating layer 52 (i.e., the pixel definition layer) and the sixth insulating layer 51 (i.e., the planarization layer) through a photolithography process, and then the first gate isolation column 311 is formed, forming a structure in which the first gate isolation column 311 is connected to the cross-line connection line 16 through a via hole. The second gate isolation column and the third gate isolation column are arranged in the same manner and prepared in the same manner as the first gate isolation column 311 , and are not described in detail herein.

[0206] In another embodiment of the present invention, optionally, the first gate isolation column 311 is directly connected to the first threshold adjustment gate 111 through a via hole. Exemplarily, before preparing the first gate isolation column 311, a deeper via hole is formed at a position corresponding to the first threshold adjustment gate 111 through a deep hole etching process, and then the first gate isolation column 311 is formed, and the formed first gate isolation column 311 is directly connected to the first threshold adjustment gate 111 through the via hole. The second gate isolation column and the third gate isolation column are arranged in the same manner and prepared in the same manner as the first gate isolation column 311, and will not be described in detail.

[0207] It can be seen from this that Fig.11 As shown, the method of connecting the first threshold adjustment gate 111 through the cross-line connection line 16 does not require drilling a deep hole, which is easier to implement in terms of process method.

[0208] The embodiment of the present invention also provides a display panel. Figure 8 , the display panel comprises:

[0209] A substrate 01 having a first side;

[0210] The driving circuit layer 02 is disposed on the first side and at least includes a first driving transistor 110 in a first pixel driving unit, wherein the first driving transistor 110 has a first threshold adjustment gate 111;

[0211] The isolation layer 03 is disposed on the side of the driving circuit layer 02 away from the substrate 01 , and at least includes a first gate isolation column 311 . The first gate isolation column 311 is coupled to the first threshold adjustment gate 111 and is configured with a first adjustment signal.

[0212] In an embodiment of the present invention, the first driving transistor 110 in the first pixel driving unit is arranged to include a first threshold adjustment gate 111, and is coupled to the first threshold adjustment gate 111, and is configured with a first adjustment signal, so that the voltage of the first threshold adjustment gate 111 of the first driving transistor 110 can be adjusted, thereby adjusting the threshold voltage of the first driving transistor 110, thereby improving the performance of the display panel.

[0213] On the basis of the above embodiments, optionally, the driving circuit layer 02 further includes a second driving transistor in the second pixel driving unit, and the second driving transistor has a second threshold adjustment gate; the isolation layer 03 further includes a second gate isolation column, and the second gate isolation column is coupled to the second threshold adjustment gate and is configured with a second adjustment signal. The setting method of the second driving transistor can refer to the setting method of the first driving transistor, and the setting method of the second gate isolation column can refer to the setting method of the first gate isolation column, which will not be repeated.

[0214] Continue to see Figure 8 On the basis of the above embodiments, optionally, the display panel further includes a light-emitting device layer 04, which is arranged on the side of the driving circuit layer 02 away from the substrate 01, and the light-emitting device layer 04 includes a first light-emitting element 120 in the first pixel driving unit and a second light-emitting element in the second pixel driving unit, the first light-emitting element 120 is coupled to the first driving transistor 110, and the second light-emitting element is coupled to the second driving transistor, wherein: the light-emitting colors of the first light-emitting element 120 and the second light-emitting element are different from each other, and when the first light-emitting element and the second light-emitting element are displayed at the target gray scale, the voltage values ​​of the first adjustment signal and the second adjustment signal are different. As mentioned above, such a setting can reduce the power consumption of the display panel and further improve the performance of the display panel.

[0215] On the basis of the above embodiments, optionally, the driving circuit layer 02 further includes a third driving transistor in the third pixel driving unit, and the third driving transistor has a third threshold adjustment gate; the isolation layer 03 further includes a third gate isolation column, and the third gate isolation column is coupled to the third threshold adjustment gate and is configured with a third adjustment signal. In this way, the threshold voltage of the first pixel driving unit, the second pixel driving unit and the third pixel driving unit can be adjusted respectively, and the voltage difference between the first light-emitting element 120, the second light-emitting element and the third light-emitting element can be compensated, so as to balance the efficiency of the first pixel driving unit 100, the second pixel driving unit and the third pixel driving unit, improve the uniformity of the display panel, and improve the performance of the display panel.

[0216] On the basis of the above embodiments, optionally, the light emitting device layer 04 further includes a third light emitting element in a third pixel driving unit, and the third light emitting element is coupled to a third driving transistor, wherein: the light emitting colors of the first light emitting element 120, the second light emitting element and the third light emitting element are different from each other, and when the first light emitting element, the second light emitting element and the third light emitting element are displayed at the target gray scale, the voltage values ​​of at least two of the first adjustment signal, the second adjustment signal and the third adjustment signal are different. This arrangement makes the voltage adjustment of each pixel driving unit more flexible, further improving the performance of the display panel.

[0217] Preferably, when the first light-emitting element, the second light-emitting element and the third light-emitting element are displayed at the target grayscale, the voltage values ​​of the first adjustment signal, the second adjustment signal and the third adjustment signal are different from each other. This arrangement enables the first adjustment signal, the second adjustment signal and the third adjustment signal to adapt to their corresponding pixel driving units respectively.

[0218] Continue to see Figure 8 On the basis of the above embodiments, optionally, the isolation layer 03 further includes a first cathode isolation column 321, and the display panel further includes:

[0219] The light-emitting device layer 04 is arranged on the side of the driving circuit layer 02 away from the substrate 01. The light-emitting device layer 04 includes a first light-emitting element 120 in the first pixel driving unit. The first light-emitting element 120 is coupled to the first driving transistor 110, wherein the first light-emitting element 120 has a first cathode 23, and the first cathode 23 is coupled to the first cathode isolation column 321, and the first cathode isolation column 321 is configured with a first cathode signal. Among them, the setting of the first cathode isolation column 321 can, on the one hand, isolate the first cathode 23 of the light-emitting element 120 from other cathodes, so that the first cathode 23 of the first light-emitting element 120 can provide a first cathode signal alone. In this way, the voltage difference between the first light-emitting element 120 and other light-emitting elements can be compensated, thereby balancing the efficiency of the first pixel driving unit 100 and other pixel driving units, and improving the uniformity of the display panel.

[0220] Continue to see Figure 8 and Fig. 9 On the basis of the above embodiments, optionally, the first cathode isolation column 321 has a first opening 321A, and a portion of the first light emitting element 120 is located in the first opening 321A. In this way, the first light emitting element 120 can be surrounded by the first cathode isolation column 321 to achieve cathode isolation.

[0221] Continue to see Fig. 9On the basis of the above embodiments, optionally, the first gate isolation column 311 and the first cathode isolation column 321 are arranged at intervals in the second direction Y parallel to the substrate. In the second direction Y, the first gate isolation column 311 has a first width d1, and the first cathode isolation column 321 has a second width d2, and the first width d1 is smaller than the second width d2. Among them, the first gate isolation column 311 transmits the first adjustment signal required by the first driving transistor 110; the first cathode isolation column 321 transmits the first cathode signal. Therefore, the first cathode isolation column 321 needs to withstand a large current. In comparison, the current borne by the first gate isolation column 321 is very small. Therefore, the first gate isolation column 311 can be set to a smaller width, which is beneficial to the wiring of the display panel, increasing the pixel density without squeezing the pixel aperture ratio.

[0222] Continue to see Fig. 9 On the basis of the above embodiments, optionally, the first cathode isolation column 321 includes a first structure 3211 and a second structure 3212 connected to each other, wherein the first structure 3211 encloses a first opening, the second structure 3212 extends in a first direction X, the first direction X and the second direction Y have an angle, and the second structure 3212 has a second width d2. This arrangement is conducive to the first cathode isolation column 321 connecting the first pixel driving units in the first direction X, and makes the size of the first cathode isolation column 321 larger, which is conducive to transmitting a large current.

[0223] Optionally, the first direction X is perpendicular to the second direction Y, which is beneficial to the layout design of the display panel. The plane where the first direction X and the second direction Y are located is parallel to the plane where the substrate is located.

[0224] Continue to see Fig. 9 On the basis of the above embodiments, optionally, the driving circuit layer further includes a second driving transistor in the second pixel driving unit, and the isolation layer further includes a second gate isolation column 312, wherein the second driving transistor has a second threshold adjustment gate, the second gate isolation column 312 is coupled to the second threshold adjustment gate, and is configured with a second adjustment signal B_BSM, and in a second direction Y parallel to the substrate, the first gate isolation column 311 is located between the first cathode isolation column 321 and the second gate isolation column 312. In this way, the first gate isolation column 311 is arranged close to the first driving transistor, which is conducive to shortening the routing distance and optimizing the wiring design.

[0225] Continue to see Fig. 9On the basis of the above embodiments, optionally, the light emitting device layer further includes a second light emitting element 220 in the second pixel driving unit, the second light emitting element 220 is coupled to the second driving transistor, the isolation layer further includes a second cathode isolation column 322, wherein the second light emitting element 220 has a second cathode, the second cathode is coupled to the second cathode isolation column 322, the second cathode isolation column 322 is configured with a second cathode signal G_ELVSS, and in a second direction Y parallel to the substrate, the second gate isolation column 312 is located between the first gate isolation column 311 and the second cathode isolation column 322. This arrangement enables the second gate isolation column 312 to be arranged close to the second driving transistor, which is conducive to shortening the routing distance and optimizing the wiring design.

[0226] Furthermore, the first gate isolation column 311 and the second gate isolation column 312 are located as a whole between the first cathode isolation column 321 and the second cathode isolation column 322, and their wiring shape is adapted to the pixel arrangement. Exemplarily, the wiring shape is serpentine, which can minimize the crowding of pixel openings.

[0227] Based on the above embodiments, optionally, the second cathode isolation column has a second opening, and a portion of the second light emitting element is located in the second opening. This arrangement enables the second light emitting element to be surrounded by the second cathode isolation column to achieve cathode isolation.

[0228] Continue to see Fig. 9 On the basis of the above embodiments, optionally, the light-emitting device layer also includes a third light-emitting element in a third pixel driving unit, and the isolation layer also includes a third cathode isolation column 323, wherein the third light-emitting element 320 has a third cathode, and the third cathode is coupled to the third cathode isolation column 323, and the third cathode isolation column 323 is configured with a third cathode signal B_ELVSS, and in a second direction Y parallel to the substrate, the second cathode isolation column 322 is located between the second gate isolation column 321 and the third cathode isolation column 323.

[0229] Based on the above embodiments, optionally, the third cathode isolation column has a third opening, and a portion of the third light emitting element is located in the third opening. This arrangement enables the third light emitting element to be surrounded by the third cathode isolation column to achieve cathode isolation.

[0230] Continue to see Fig. 9On the basis of the above embodiments, optionally, the driving circuit layer further includes a third driving transistor in the third pixel driving unit, the third driving transistor is coupled to the third light emitting element, the isolation layer further includes a third gate isolation column 313, wherein the third driving transistor has a third threshold adjustment gate, the third gate isolation column 313 is coupled to the third threshold adjustment gate, and is configured with a third adjustment signal B_BSM, and in the second direction Y parallel to the substrate, the third cathode isolation column 323 is located between the second cathode isolation column 322 and the third gate isolation column 313. In this way, the third gate isolation column 313 is arranged close to the third driving transistor, which is conducive to shortening the routing distance and optimizing the wiring design.

[0231] Further, see Fig. 9 , along the second direction Y, arranged in sequence are the first cathode isolation column 321, the first gate isolation column 311, the second gate isolation column 312, the second cathode isolation column 322, the third cathode isolation column 323 and the third gate isolation column 313, and this arrangement sequence is cyclical.

[0232] It should be noted that, for example, see Fig. 9 In some embodiments, the third cathode isolation column 323 includes a first structure (not labeled) and a second structure (not labeled) connected to each other, wherein the first structure of the third cathode isolation column 323 encloses a third opening, and the second structure of the third cathode isolation column 323 extends in the first direction X. Further, the second structure of the third cathode isolation column 323 has a third width d3, and the maximum width of the first structure of the third cathode isolation column 323 is equal to the third width d3.

[0233] An embodiment of the present invention further provides a method for preparing a display panel. The method is applicable to the display panel provided by any embodiment of the present invention and has corresponding beneficial effects. Fig.12 and Fig.12 Fig.13 A schematic diagram of the structure formed in each step of a method for manufacturing a display panel provided by an embodiment of the present invention. Fig.12 and Fig.12 Fig.13 The method for preparing the display panel comprises the following steps:

[0234] S110 , sequentially forming a first metal layer, a first insulating layer 41 , an active layer, a second insulating layer 42 and a second metal layer.

[0235] The materials of the first insulating layer 41 and the second insulating layer 42 may be inorganic materials, such as SiN and / or SiO, and may be formed by deposition or other processes. The first driving current control gate 113 and the first threshold adjustment gate 11111 of the driving transistor are respectively provided in the first metal layer and the second metal layer; the semiconductor 12 of the driving transistor is provided in the active layer. The materials of the first metal layer and the second metal layer are metals, and may be formed by sputtering or evaporation processes, and then the first driving current control gate 113 or the first threshold adjustment gate 111 is formed by patterning.

[0236] S120 , forming a third insulating layer 43 and a third metal layer.

[0237] The material of the third insulating layer 43 may be an inorganic material, such as SiN and / or SiO, etc., and may be formed by deposition or other processes. The third metal layer is provided with a capacitor plate 14, and the material of the third metal layer is metal, which may be formed by sputtering or evaporation processes, and then patterned to form the capacitor plate 14.

[0238] S130 , forming a fourth insulating layer 44 and a fourth metal layer.

[0239] The material of the fourth insulating layer 44 may be an inorganic material, such as SiN and / or SiO, etc., and may be formed by a deposition process. Optionally, after forming the fourth insulating layer 44, a fifth insulating layer 45 is formed on the fourth insulating layer 44. The material of the fifth insulating layer 45 may be an organic material, which can isolate the third metal layer and the fourth metal layer and also play a certain flattening role.

[0240] After forming the fourth insulating layer 44 and the fifth insulating layer 45, vias are formed by processes such as photoresist coating + exposure + development + etching. The fourth metal layer is provided with source and drain electrodes 15 of the driving transistor. The material of the fourth metal layer is metal, which can be formed by processes such as sputtering or evaporation, and then the source and drain electrodes 15 are formed by patterning. The source and drain electrodes 15 are connected to the semiconductor 12 through vias.

[0241] Optionally, while forming the via holes corresponding to the source and drain electrodes 15 , via holes corresponding to the cross-line connection lines 16 are also formed; while patterning the source and drain electrodes 15 , the cross-line connection lines 16 are also formed.

[0242] S140 , forming a sixth insulating layer 51 and an anode metal layer.

[0243] Among them, the material of the sixth insulating layer 51 can be an organic material. While isolating the fourth metal layer and the anode metal layer, the sixth insulating layer 51 can flatten the surface of the fourth metal layer, which is beneficial to the flatness of the film layer during the subsequent preparation of the light-emitting element and optimizes the light-emitting effect of the light-emitting element.

[0244] After forming the sixth insulating layer 51, an anode opening is formed by processes such as photoresist coating + exposure + development + etching. The anode metal layer is provided with an anode 21 of the light-emitting element. The material of the anode metal layer is metal, which can be formed by processes such as sputtering or evaporation, and then the anode 21 is formed by patterning. The source anode 21 is connected to the source and drain 15 through the anode opening.

[0245] S150 , forming a seventh insulating layer 52 , and forming an isolation column layer on the seventh insulating layer 52 .

[0246] The isolation column layer includes a first gate isolation column 311 , which is larger at the top and smaller at the bottom, and is conductive; the first gate isolation column 311 and the first threshold adjustment gate 111 are electrically connected across the membrane layer.

[0247] Optionally, the isolation column layer further includes a first cathode isolation column 321, which is larger at the top and smaller at the bottom, and is conductive. The first gate isolation column 311 is larger at the top and smaller at the bottom, and the first gate isolation column 311 and the first cathode isolation column 321 are manufactured using the same process.

[0248] Optionally, the first gate isolation column 311 is integrally provided, and the first cathode isolation column 321 is integrally provided. Exemplarily, the first gate isolation column 311 and the first cathode isolation column 321, which are larger at the top and smaller at the bottom, can be prepared by a lift-off process. Specifically, negative photoresist is applied, and then openings are formed at the positions of the first gate isolation column 311 and the first cathode isolation column 321 through exposure and development, and then metal is evaporated in the openings, and the first gate isolation column 311 and the first cathode isolation column 321, which are larger at the top and smaller at the bottom, are formed after removing the remaining photoresist.

[0249] S160 , forming an opening on the seventh insulating layer 52 to expose the anode 21 .

[0250] Exemplarily, an opening exposing the anode 21 is formed by processes such as photoresist coating+exposure+development+etching, and the opening defines the size of the pixel opening.

[0251] S170 , forming a light-emitting functional layer 22 and a cathode 23 of a light-emitting element on the anode 21 .

[0252] The light-emitting functional layer 22 and the cathode 23 can be evaporated in one layer, and the light-emitting functional layer 22 and the cathode 23 of the adjacent light-emitting elements 120 are disconnected by the first cathode isolation column 321 , and the cathode 23 of the light-emitting element 120 is connected to the first cathode isolation column 321 .

[0253] Exemplarily, the light-emitting functional layer and cathode layer of the red pixel driving unit are evaporated in the whole layer, and the red light-emitting functional layer and cathode layer are evaporated in each pixel opening. Since the shape of the first cathode isolation column 321 is larger at the top and smaller at the bottom, the material evaporated in two adjacent pixel openings is disconnected by the first cathode isolation column 321, and at the same time, the edge of the cathode 23 is electrically connected to the first cathode isolation column 321; the light-emitting functional layer and cathode layer outside the red pixel opening are removed;

[0254] The green pixel driving unit's light-emitting function layer and cathode layer are evaporated throughout the layer. The green light-emitting function layer and cathode layer are evaporated in each pixel opening. Since the red light-emitting function layer and cathode layer have been evaporated in the red pixel opening, the green light-emitting function layer and cathode layer are stacked on the red light-emitting function layer and cathode layer in the red pixel opening; the green light-emitting function layer and cathode layer outside the green pixel opening are removed;

[0255] The light-emitting functional layer and cathode layer of the blue pixel driving unit are evaporated throughout the layer, and the blue light-emitting functional layer and cathode layer are evaporated in each pixel opening. Since the red light-emitting functional layer and cathode layer have been evaporated in the red pixel opening, and the green light-emitting functional layer and cathode layer have been evaporated in the green pixel opening, in the red pixel opening, the blue light-emitting functional layer and cathode layer are stacked on the red light-emitting functional layer and cathode layer; in the green pixel opening, the blue light-emitting functional layer and cathode layer are stacked on the green light-emitting functional layer and cathode layer; the blue light-emitting functional layer and cathode layer outside the blue pixel opening are removed.

[0256] Thus, the red pixel driving unit, the green pixel driving unit and the blue pixel driving unit can be formed without using a fine mask.

[0257] S180 , forming an eighth insulating layer 53 , a sealing layer 61 and an encapsulation layer 62 on the cathode 23 .

[0258] In each embodiment of the display panel, specific descriptions of the preparation methods and processes are given for different display panel structures. These preparation methods and processes can all be considered as the preparation methods of the display panels provided in the embodiments of the present invention, and repeated contents will not be repeated here.

[0259] An embodiment of the present invention further provides a display device, which may be a mobile phone, a computer, a tablet computer, a television, a wearable device, etc. The display device includes the display panel provided by any embodiment of the present invention. The technical principles and effects produced are similar and will not be repeated here.

[0260] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0261] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A pixel driving circuit, characterized in that: The pixel driving circuit at least comprises: A first pixel driving unit, comprising a first driving transistor and a first light emitting element, wherein the first driving transistor has a first driving current control gate and a first threshold adjustment gate, wherein the first driving current control gate is configured to receive a first data signal, and the first threshold adjustment gate is configured to receive a first adjustment signal, and the first driving transistor is controlled by the first data signal and the first adjustment signal to drive the first light emitting element; A second pixel driving unit comprises a second driving transistor and a second light emitting element, wherein the second driving transistor has a second driving current control gate and a second threshold adjustment gate, wherein the second driving current control gate is configured to receive a second data signal, and the second threshold adjustment gate is configured to receive a second adjustment signal, and the second driving transistor is controlled by the second data signal and the second adjustment signal to drive the second light emitting element; The first light emitting element and the second light emitting element emit different colors. When the first light emitting element and the second light emitting element are displayed at a target gray scale, the voltage values ​​of the first adjustment signal and the second adjustment signal are different.

2. The pixel driving circuit according to claim 1, characterized in that: The pixel driving circuit further includes: a third pixel driving unit, comprising a third driving transistor and a third light emitting element, wherein the third driving transistor has a third driving current control gate and a third threshold adjustment gate, wherein the third driving current control gate is configured to receive a third data signal, and the third threshold adjustment gate is configured to receive a third adjustment signal, and the third driving transistor is controlled by the third data signal and the third adjustment signal to drive the third light emitting element; The first light emitting element, the second light emitting element and the third light emitting element emit different colors, and when the first light emitting element, the second light emitting element and the third light emitting element are displayed at a target gray scale, at least two of the first adjustment signal, the second adjustment signal and the third adjustment signal have different voltage values; Preferably, when the first light emitting element, the second light emitting element and the third light emitting element are displayed at the target gray scale, voltage values ​​of the first adjustment signal, the second adjustment signal and the third adjustment signal are different from each other.

3. The pixel driving circuit according to claim 2, characterized in that: The target grayscale is the 0th grayscale, and the first light-emitting element, the second light-emitting element, and the third light-emitting element do not emit light at the 0th grayscale.

4. The pixel driving circuit according to claim 2, characterized in that: When the first light emitting element, the second light emitting element, and the third light emitting element are displayed at the target gray scale, the voltage values ​​of the first data signal, the second data signal, and the third data signal are the same.

5. The pixel driving circuit according to claim 1, characterized in that: The first light emitting element has a first cathode, the first cathode is configured with a first cathode signal, the second light emitting element has a second cathode, the second cathode is configured with a second cathode signal, wherein: The voltage values ​​of the first cathode signal and the second cathode signal are different; Preferably, the pixel driving circuit further includes a third pixel driving unit, the third pixel driving unit includes a third light emitting element, the first light emitting element, the second light emitting element and the third light emitting element emit different colors, the third light emitting element has a third cathode, the third cathode is configured with a third cathode signal, wherein at least two of the first cathode signal, the second cathode signal and the third cathode signal have different voltage values; Preferably, voltage values ​​of the first cathode signal, the second cathode signal and the third cathode signal are different from each other.

6. A display panel, characterized in that: The method comprises the pixel driving circuit as claimed in any one of claims 1 to 5.

7. The display panel according to claim 6, characterized in that: The display panel further includes: a first metal layer, wherein the first threshold adjustment gate and the second threshold adjustment gate are electrically isolated and disposed in the first metal layer; A light-emitting functional layer is disposed on one side of the first metal layer, and a portion of the first light-emitting elements and a portion of the second light-emitting elements are disposed in the light-emitting functional layer; An isolation layer, disposed on one side of the first metal layer and used to isolate the first light-emitting element from the second light-emitting element, the isolation layer at least comprising a first gate isolation column and a second gate isolation column; The first gate isolation column is coupled to the first threshold adjustment gate and is configured with the first adjustment signal, and the second gate isolation column is coupled to the second threshold adjustment gate and is configured with the second adjustment signal; Preferably, the pixel driving circuit further comprises a third pixel driving unit, the third pixel driving unit comprises a third driving transistor and a third light emitting element, the third driving transistor has a third driving current control gate and a third threshold adjustment gate, the third driving current control gate is configured to receive a third data signal, the third threshold adjustment gate is configured to receive a third adjustment signal, the third driving transistor is controlled by the third data signal and the third adjustment signal to drive the third light emitting element, wherein: The third threshold adjustment gate is electrically isolated from the first threshold adjustment gate, and the third threshold adjustment gate is electrically isolated from the second threshold adjustment gate, and the third threshold adjustment gate is disposed in the first metal layer; A portion of the third light-emitting element is disposed in the light-emitting functional layer; The isolation layer is also used to isolate the third light-emitting element from the first light-emitting element, and the isolation layer is also used to isolate the third light-emitting element from the second light-emitting element. The isolation layer includes a third gate isolation column, and the third gate isolation column is coupled to the third threshold adjustment gate and is configured with the third adjustment signal.

8. The display panel according to claim 7, characterized in that: The display panel further includes a cathode layer, which is disposed on one side of the light-emitting functional layer, and the isolation layer further includes a first cathode isolation column and a second cathode isolation column, wherein: The first light emitting element has a first cathode, the second light emitting element has a second cathode, the first cathode and the second cathode are electrically isolated and disposed in the cathode layer; The first cathode isolation column is coupled to the first cathode and is configured with a first cathode signal, and the second cathode isolation column is coupled to the second cathode and is configured with a second cathode signal; Preferably, the voltage values ​​of the first cathode signal and the second cathode signal are different; Preferably, the pixel driving circuit further includes a third pixel driving unit, and the third pixel driving unit includes a third light emitting element, wherein: The isolation layer further includes a third cathode isolation column, the third light emitting element has a third cathode, the third cathode is disposed in the cathode layer, the third cathode is electrically isolated from the first cathode, and the third cathode is electrically isolated from the second cathode, the third cathode isolation column is coupled to the third cathode, and is configured with a third cathode signal; Preferably, at least two of the first cathode signal, the second cathode signal and the third cathode signal have different voltage values; Preferably, voltage values ​​of the first cathode signal, the second cathode signal and the third cathode signal are different from each other.

9. The display panel according to claim 7, characterized in that: The pixel driving circuit comprises a plurality of the first pixel driving units and a plurality of the second pixel driving units, wherein: The first threshold adjustment gates in each of the first pixel driving units are coupled via the same first gate isolation column, and the second threshold adjustment gates in each of the second pixel driving units are coupled via the same second gate isolation column; Preferably, the pixel driving circuit further comprises a plurality of third pixel driving units, the third pixel driving units comprising a third driving transistor and a third light emitting element, the third driving transistor having a third driving current control gate and a third threshold adjustment gate, the third driving current control gate being configured to receive a third data signal, the third threshold adjustment gate being configured to receive a third adjustment signal, the third driving transistor being controlled by the third data signal and the third adjustment signal to drive the third light emitting element, wherein: The isolation layer includes a third gate isolation column, the third gate isolation column is coupled to the third threshold adjustment gate and is configured with the third adjustment signal, and the third threshold adjustment gate in each of the third pixel driving units is coupled through the same third gate isolation column; Preferably, a plurality of the first pixel driving units are arranged into a plurality of columns, a plurality of the second pixel driving units are arranged into a plurality of columns, and a plurality of the third pixel driving units are arranged into a plurality of columns, wherein the first threshold adjustment gates in the first pixel driving units in the same column are coupled via the first gate isolation column, the second threshold adjustment gates in the second pixel driving units in the same column are coupled via the second gate isolation column, and the third threshold adjustment gates in the third pixel driving units in the same column are coupled via the third gate isolation column.

10. The display panel according to claim 8, characterized in that: The pixel driving circuit comprises a plurality of the first pixel driving units and a plurality of the second pixel driving units, wherein: The first cathodes in each of the first pixel driving units are coupled via the same first cathode isolation column, and the second cathodes in each of the second pixel driving units are coupled via the same second cathode isolation column; Preferably, the pixel driving circuit further includes a plurality of third pixel driving units, the third pixel driving units include a third light emitting element, the third light emitting element has a third cathode, the third cathode is arranged in the cathode layer, the third cathode is electrically isolated from the first cathode, and the third cathode is electrically isolated from the second cathode, the isolation layer further includes a third cathode isolation column, the third cathode isolation column is coupled to the third cathode, and is configured with a third cathode signal, wherein: The third cathodes in each of the third pixel driving units are coupled via the same third cathode isolation column; Preferably, a plurality of the first pixel driving units are arranged into multiple columns, a plurality of the second pixel driving units are arranged into multiple columns, and a plurality of the third pixel driving units are arranged into multiple columns, wherein the first cathodes in each of the first pixel driving units in the same column are coupled through the same first cathode isolation column, the second cathodes in each of the second pixel driving units in the same column are coupled through the same second cathode isolation column, and the third cathodes in each of the third pixel driving units in the same column are coupled through the same third cathode isolation column.

11. The display panel according to claim 7, characterized in that: The display panel has a display area and a frame area that are adjacent to each other, the pixel driving circuit is located in the display area, and the display panel at least includes: A first threshold adjustment bus is located in the border area, and each of the first gate isolation columns is coupled to the first threshold adjustment bus; A second threshold adjustment bus is located in the border area, and each of the second gate isolation columns is coupled to the second threshold adjustment bus; Preferably, the pixel driving circuit further comprises a third pixel driving unit, the third pixel driving unit comprises a third driving transistor and a third light emitting element, the third driving transistor has a third driving current control gate and a third threshold adjustment gate, the third driving current control gate is configured to receive a third data signal, the third threshold adjustment gate is configured to receive a third adjustment signal, the third driving transistor is controlled by the third data signal and the third adjustment signal to drive the third light emitting element, wherein: The display panel further includes a third threshold adjustment bus located in the frame area, and each of the third gate isolation columns is coupled to the third threshold adjustment bus; Preferably, a plurality of the first pixel driving units are arranged into a plurality of columns, a plurality of the second pixel driving units are arranged into a plurality of columns, and a plurality of the third pixel driving units are arranged into a plurality of columns, the columns extend along a first direction, the first threshold adjustment bus, the second threshold adjustment bus, and the third threshold adjustment bus extend along a second direction, and the first direction and the second direction have an included angle; Preferably, the first direction is perpendicular to the second direction; Preferably, the isolation layer further includes a first cathode isolation column, a second cathode isolation column and a third cathode isolation column, and the display panel further includes: a cathode layer, arranged on one side of the light-emitting functional layer, wherein the first light-emitting element has a first cathode, the second light-emitting element has a second cathode, the third light-emitting element has a third cathode, the first cathode, the second cathode and the third cathode are electrically isolated and arranged in the cathode layer, the first cathode isolation column is coupled to the first cathode, the second cathode isolation column is coupled to the second cathode, and the third cathode isolation column is coupled to the third cathode; A first cathode bus line is located in the frame area, and each of the first cathode isolation columns is coupled to the first cathode bus line; A second cathode bus line is located in the frame area, and each of the second cathode isolation columns is coupled to the second cathode bus line; A third cathode bus line is located in the frame area, and each of the third cathode isolation columns is coupled to the third cathode bus line; Preferably, a plurality of the first pixel driving units are arranged in a plurality of columns, a plurality of the second pixel driving units are arranged in a plurality of columns, and a plurality of the third pixel driving units are arranged in a plurality of columns, the columns extend along a first direction, the first cathode bus, the second cathode bus and the third cathode bus extend along a second direction, and the first direction and the second direction have an angle; Preferably, the first direction is perpendicular to the second direction.

12. A display panel, characterized in that: The display panel comprises: a substrate having a first side; A driving circuit layer, disposed on the first side, comprising at least a first driving transistor in a first pixel driving unit, wherein the first driving transistor has a first threshold adjustment gate; The isolation layer is disposed on a side of the driving circuit layer away from the substrate, and includes at least a first gate isolation column, the first gate isolation column is coupled to the first threshold adjustment gate, and is configured with a first adjustment signal.

13. The display panel according to claim 12, characterized in that: The driving circuit layer further includes a second driving transistor in a second pixel driving unit, wherein the second driving transistor has a second threshold adjustment gate; The isolation layer further includes a second gate isolation column, the second gate isolation column is coupled to the second threshold adjustment gate and is configured with a second adjustment signal; Preferably, the display panel further includes a light-emitting device layer, which is arranged on a side of the driving circuit layer away from the substrate, and the light-emitting device layer includes a first light-emitting element in the first pixel driving unit and a second light-emitting element in the second pixel driving unit, the first light-emitting element is coupled to the first driving transistor, and the second light-emitting element is coupled to the second driving transistor, wherein: The first light emitting element and the second light emitting element emit different colors, and when the first light emitting element and the second light emitting element are displayed at a target gray scale, the voltage values ​​of the first adjustment signal and the second adjustment signal are different; Preferably, the driving circuit layer further includes a third driving transistor in a third pixel driving unit, and the third driving transistor has a third threshold adjustment gate; The isolation layer further includes a third gate isolation column, the third gate isolation column is coupled to the third threshold adjustment gate and is configured with a third adjustment signal; Preferably, the light emitting device layer further includes a third light emitting element in the third pixel driving unit, and the third light emitting element is coupled to the third driving transistor, wherein: The first light emitting element, the second light emitting element and the third light emitting element emit different colors from each other, and when the first light emitting element, the second light emitting element and the third light emitting element are displayed at a target gray scale, at least two of the first adjustment signal, the second adjustment signal and the third adjustment signal have different voltage values; Preferably, when the first light emitting element, the second light emitting element and the third light emitting element are displayed at the target gray scale, voltage values ​​of the first adjustment signal, the second adjustment signal and the third adjustment signal are different from each other.

14. The display panel according to claim 12, characterized in that: The isolation layer further includes a first cathode isolation column, and the display panel further includes: a light-emitting device layer, arranged on a side of the driving circuit layer away from the substrate, the light-emitting device layer comprising a first light-emitting element in the first pixel driving unit, the first light-emitting element being coupled to the first driving transistor, wherein the first light-emitting element has a first cathode, the first cathode being coupled to the first cathode isolation column, and the first cathode isolation column being configured with a first cathode signal; Preferably, the first cathode isolation column has a first opening, and a portion of the first light emitting element is located in the first opening; Preferably, the first gate isolation column and the first cathode isolation column are arranged at intervals in a second direction parallel to the substrate, and in the second direction, the first gate isolation column has a first width, and the first cathode isolation column has a second width, and the first width is smaller than the second width; Preferably, the first cathode isolation column comprises a first structure and a second structure connected to each other, wherein the first structure encloses and forms the first opening, the second structure extends in a first direction, the first direction and the second direction have an angle, and the second structure has the second width; Preferably, the first direction is perpendicular to the second direction; Preferably, the driving circuit layer further includes a second driving transistor in a second pixel driving unit, and the isolation layer further includes a second gate isolation column, wherein the second driving transistor has a second threshold adjustment gate, the second gate isolation column is coupled to the second threshold adjustment gate and is configured with a second adjustment signal, and in a second direction parallel to the substrate, the first gate isolation column is located between the first cathode isolation column and the second gate isolation column; Preferably, the light-emitting device layer further includes a second light-emitting element in the second pixel driving unit, the second light-emitting element is coupled to the second driving transistor, the isolation layer further includes a second cathode isolation column, wherein the second light-emitting element has a second cathode, the second cathode is coupled to the second cathode isolation column, the second cathode isolation column is configured with a second cathode signal, and in a second direction parallel to the substrate, the second gate isolation column is located between the first gate isolation column and the second cathode isolation column; Preferably, the second cathode isolation column has a second opening, and a portion of the second light emitting element is located in the second opening; Preferably, the light-emitting device layer further includes a third light-emitting element in a third pixel driving unit, and the isolation layer further includes a third cathode isolation column, wherein the third light-emitting element has a third cathode, the third cathode is coupled to the third cathode isolation column, the third cathode isolation column is configured with a third cathode signal, and in a second direction parallel to the substrate, the second cathode isolation column is located between the second gate isolation column and the third cathode isolation column; Preferably, the third cathode isolation column has a third opening, and a portion of the third light emitting element is located in the third opening; Preferably, the driving circuit layer also includes a third driving transistor in the third pixel driving unit, and the third driving transistor is coupled to the third light-emitting element, and the isolation layer also includes a third gate isolation column, wherein the third driving transistor has a third threshold adjustment gate, and the third gate isolation column is coupled to the third threshold adjustment gate and is configured with a third adjustment signal, and in a second direction parallel to the substrate, the third cathode isolation column is located between the second cathode isolation column and the third gate isolation column.

15. A display device, characterized in that: The display device comprises: The display panel according to any one of claims 6 to 11; or A display panel as claimed in any one of claims 12 to 14.

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