Light-emitting diode epitaxial wafer and preparation method thereof, and light-emitting diode

Abstract

The present invention discloses a light-emitting diode epitaxial wafer and a preparation method thereof, and a light-emitting diode, and relates to the field of semiconductor optoelectronic devices. The light-emitting diode epitaxial wafer includes a substrate, a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer in sequence; the P-type semiconductor layer includes a Si3N4 layer, a first superlattice layer, and a second superlattice layer stacked in sequence on the electron blocking layer, and the first superlattice layer includes Mg-doped Al-doped Si ... x Ga 1‑x N layer and Mg-doped GaN layer, the second superlattice layer includes alternately stacked non-doped GaN layers and Mg-doped In layers. y Ga 1‑y N layer. The implementation of the present invention can improve the light-emitting efficiency of the light-emitting diode.

Description

Technical Field

[0001] The invention relates to the field of semiconductor optoelectronic devices, and in particular to a light emitting diode epitaxial wafer and a preparation method thereof, and a light emitting diode. Background Art

[0002] At present, GaN-based light-emitting diodes generally use Mg-doped GaN as the P-type layer. However, due to the high activation energy of the acceptor impurity Mg atoms, the hole activation rate is low. 20 cm -3 ~5×10 20 cm -3 The hole concentration can only reach 10 17 cm -3 ~10 18 cm -3 Further increasing the Mg doping concentration will significantly reduce the crystal quality of the P-type layer, resulting in increased light absorption by the P-type layer and decreased luminous efficiency.

[0003] On the other hand, for some LEDs containing V-shaped pits, a thicker P-type layer is generally required to fill them, resulting in more light absorption. The V-shaped pits also make the P-type layer crystal quality poorer, and Mg is more difficult to activate. Therefore, a higher Mg doping concentration is often used, which also reduces the luminous efficiency. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a light emitting diode epitaxial wafer and a preparation method thereof, which can improve the light emitting efficiency of the light emitting diode.

[0005] Another technical problem to be solved by the present invention is to provide a light emitting diode with high light emitting efficiency.

[0006] In order to solve the above problems, the present invention discloses a light emitting diode epitaxial wafer, comprising a substrate, a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a multi-quantum well layer, an electron blocking layer and a P-type semiconductor layer stacked on the substrate in sequence; the P-type semiconductor layer comprises a Si3N4 layer, a first superlattice layer and a second superlattice layer stacked in sequence on the electron blocking layer, the first superlattice layer comprises Mg-doped Al-doped Si ... x Ga 1-x N layer and Mg-doped GaN layer, the second superlattice layer includes alternately stacked non-doped GaN layers and Mg-doped In layers. y Ga 1-y N layers.

[0007] As an improvement of the above technical solution, the Mg doped Al x Ga 1-xThe doping concentration of the N layer is less than the doping concentration of the Mg-doped GaN layer, and the doping concentration of the Mg-doped GaN layer is less than the doping concentration of the Mg-doped In layer. y Ga 1-y Doping concentration of the N layer.

[0008] As an improvement of the above technical solution, the Mg doped Al x Ga 1-x The ratio of the thickness of the N layer to the thickness of the Mg-doped GaN layer is 1:2-1:5.

[0009] As an improvement of the above technical solution, the thickness of the non-doped GaN layer is y Ga 1-y The thickness ratio of the N layer is 1:2~1:10.

[0010] As an improvement of the above technical solution, the thickness of the Si3N4 layer is 1nm~10nm; and / or

[0011] The period number of the first superlattice layer is 2 to 15; and / or

[0012] The Mg doped Al x Ga 1-x The thickness of the N layer is 0.5nm~5nm, and the doping concentration is 1×10 17 cm -3 ~1×10 18 cm -3 , x is 0.01 to 0.2; and / or

[0013] The thickness of the Mg-doped GaN layer is 1 nm to 20 nm, and the doping concentration is 1×10 18 cm -3 ~1×10 19 cm -3 ; and / or

[0014] The period number of the second superlattice layer is 3 to 10; and / or

[0015] The thickness of the non-doped GaN layer is 0.5 nm to 3 nm; and / or

[0016] The Mg doped with In y Ga 1-y The thickness of the N layer is 1nm~10nm, and the doping concentration is 1×10 19 cm -3 ~1×10 21 cm -3 , y is 0.01~0.1.

[0017] As an improvement of the above technical solution, the buffer layer is an AlN layer with a thickness of 20nm to 50nm; and / or

[0018] The intrinsic semiconductor layer is an intrinsic GaN layer, and the thickness thereof is 1 μm to 5 μm; and / or

[0019] The N-type semiconductor layer is an N-type GaN layer, the thickness of which is 1 μm to 5 μm, and the Si doping concentration is 5×10 18 cm -3 ~5×10 19 cm -3 ; and / or

[0020] The multi-quantum well layer comprises alternately stacked InGaN quantum well layers and GaN quantum barrier layers, the thickness of the InGaN quantum well layer is 3nm-5nm, the In component ratio is 0.15-0.45, and the thickness of the GaN quantum barrier layer is 8nm-20nm; and / or

[0021] The electron blocking layer is an AlInGaN layer, in which the Al component accounts for 0.01-0.1, the In component accounts for 0.01-0.2, and the thickness is 10nm-50nm.

[0022] As an improvement of the above technical solution, the multi-quantum well layer includes alternately stacked InGaN quantum well layers and GaN quantum barrier layers, the thickness of the InGaN quantum well layer is 3nm~5nm, the In component ratio is 0.3~0.45, and the thickness of the GaN quantum barrier layer is 8nm~20nm;

[0023] The light-emitting diode epitaxial wafer also includes a stress release layer, which is arranged between the N-type semiconductor layer and the multi-quantum well layer, and the stress release layer includes an InGaN layer and a Si-doped GaN layer stacked alternately; the In component ratio of the InGaN layer is 0.05-0.2, the thickness is 2nm-5nm, the thickness of the Si-doped GaN layer is 5nm-10nm, and the doping concentration is 1×10 17 cm -3 ~1×10 18 cm -3 .

[0024] Correspondingly, the present invention also discloses a method for preparing a light-emitting diode epitaxial wafer, which is used to prepare the above-mentioned light-emitting diode epitaxial wafer, and comprises:

[0025] Providing a substrate, and sequentially growing a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer on the substrate;

[0026] The P-type semiconductor layer includes a Si3N4 layer, a first superlattice layer, and a second superlattice layer sequentially stacked on the electron blocking layer, wherein the first superlattice layer includes alternately stacked Mg-doped Al x Ga 1-x N layer and Mg-doped GaN layer, the second superlattice layer includes alternately stacked non-doped GaN layers and Mg-doped In layers. y Ga 1-y N layers.

[0027] As an improvement of the above technical solution, the growth temperature of the Si3N4 layer is 850°C~1000°C, and the growth pressure is 50torr~500torr; and / or

[0028] The Mg doped Al x Ga 1-x The growth temperature of the N layer is 950°C to 1050°C, and the growth pressure is 300 torr to 500 torr; and / or

[0029] The growth temperature of the Mg-doped GaN layer is 900° C. to 1000° C., and the growth pressure is 50 torr to 300 torr; and / or

[0030] The growth temperature of the non-doped GaN layer is 950° C. to 1100° C., and the growth pressure is 50 torr to 500 torr; and / or

[0031] The Mg doped with In y Ga 1-y The growth temperature of the N layer is 800°C~900°C, and the growth pressure is 50torr~300torr.

[0032] Correspondingly, the present invention also discloses a light emitting diode, which includes the light emitting diode epitaxial wafer mentioned above.

[0033] The implementation of the present invention has the following beneficial effects:

[0034] 1. In an embodiment of the present invention, in a light emitting diode epitaxial wafer, a P-type semiconductor layer includes a Si3N4 layer stacked on an electron blocking layer, a first superlattice layer, and a second superlattice layer. The Si3N4 layer can reduce dislocations extending to subsequent layer structures. The first superlattice layer includes alternately stacked Mg-doped Al x Ga 1-x N layer and Mg-doped GaN layer, this structure can fill the V-shaped pit, make the surface flat, and reduce the leakage channel; secondly, by Mg doping Al x Ga 1-xThe alternating growth of N layers and Mg-doped GaN layers can form a micro-rough structure, improve light extraction efficiency, and thus improve luminous efficiency. Among them, the second superlattice layer includes alternately stacked non-doped GaN layers and Mg-doped In layers. y Ga 1-y N layer. First, the second superlattice layer utilizes the memory effect of Mg and adopts a doped / non-doped structure, which can ensure a higher hole concentration at a lower doping concentration, thereby reducing the light absorption of Mg and improving the luminous efficiency. Second, the introduction of In reduces the activation energy of Mg, increases the hole concentration, increases the electron-hole radiation recombination efficiency, and improves the luminous efficiency. In summary, the light-emitting diode epitaxial wafer in this embodiment can increase the hole concentration and light extraction efficiency, thereby improving the luminous efficiency of the light-emitting diode.

[0035] 2. In the light emitting diode epitaxial wafer of one embodiment of the present invention, the first superlattice layer is Mg doped with Al x Ga 1-x The doping concentration of the N layer is lower than that of the Mg-doped GaN layer. Based on this low-doping / high-doping structure, it can help to evenly distribute the current in the P-type semiconductor layer, weaken the current congestion effect, improve the injection efficiency of holes into the multi-quantum well layer, and improve the luminescence efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 is a schematic structural diagram of a light emitting diode epitaxial wafer in one embodiment of the present invention;

[0037] Figure 2 is a schematic structural diagram of a light emitting diode epitaxial wafer in another embodiment of the present invention;

[0038] Figure 3 It is a flow chart of a method for preparing a light emitting diode epitaxial wafer in one embodiment of the present invention.

[0039] In the figure, 100 is a substrate, 200 is a buffer layer, 300 is an intrinsic semiconductor layer, 400 is an N-type semiconductor layer, 500 is a stress release layer, 600 is a multi-quantum well layer, 610 is an InGaN quantum well layer, 620 is a GaN quantum barrier layer, 700 is an electron blocking layer, 800 is a P-type semiconductor layer, 810 is a Si3N4 layer, 820 is a first superlattice layer, and 821 is a Mg-doped Al x Ga 1-x N layer, 822 is a Mg-doped GaN layer, 830 is a second superlattice layer, 831 is an undoped GaN layer, and 832 is a Mg-doped In layer. y Ga 1-y N layers. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is described in further detail below.

[0041] See also Figure 1 The present invention discloses a light emitting diode epitaxial wafer, which includes a substrate 100, a buffer layer 200, an intrinsic semiconductor layer 300, an N-type semiconductor layer 400, a multi-quantum well layer 600, an electron blocking layer 700 and a P-type semiconductor layer 800 sequentially stacked on the substrate 100.

[0042] The P-type semiconductor layer 800 includes a Si3N4 layer 810, a first superlattice layer 820, and a second superlattice layer 830 sequentially stacked on the electron blocking layer 700. The first superlattice layer 820 includes Mg-doped Al-doped Si3N4 layers alternately stacked. x Ga 1-x N layer 821 and Mg-doped GaN layer 822, the second superlattice layer 830 includes alternately stacked non-doped GaN layer 831 and Mg-doped In layer y Ga 1-y N layer 832. Based on the above-mentioned P-type semiconductor layer 800, not only a high hole concentration is guaranteed at a relatively low Mg doping concentration, the hole injection efficiency into the multi-quantum well layer 600 is improved, and the electron-hole radiation recombination probability is improved; but also a micro-rough structure can be formed to improve the light extraction efficiency. The combination of the two effectively improves the luminous efficiency of the light-emitting diode.

[0043] Among them, the Si3N4 layer 810 can reduce the dislocations extending to the subsequent layers. It should be noted that the V-shaped pits are caused by dislocations. The presence of a large number of V-shaped pits means that there are also a large number of dislocations. The blocking of the Si3N4 layer 810 can reduce the density of dislocations extending upward, improve the crystal quality of the subsequent layers, optimize the activation of Mg, and increase the hole concentration. Specifically, the thickness of the Si3N4 layer 810 is 1nm~15nm, exemplarily 2nm, 5nm, 8nm, 11nm or 14nm, but not limited to this. Preferably, it is 1nm~10nm.

[0044] The first superlattice layer 820 is mainly used to fill the V-shaped pits. x Ga 1-x The heterojunction structure formed by the N layer 821 and the Mg-doped GaN layer 822 generates two-dimensional hole gas, which increases the concentration of holes. x Ga 1-x The Al introduced into the N layer 821 will also make its surface relatively rough, thereby improving the light extraction efficiency.

[0045] Specifically, the number of periods of the first superlattice layer 820 is 2-20, exemplarily 3, 5, 8, 12, 14 or 18, but not limited thereto, preferably 2-15.

[0046] Specifically, Mg doped with Al x Ga 1-x The Mg doping concentration in the N layer 821 is 1×10 17 cm -3 ~5×10 18 cm -3 , exemplarily 2×10 17 cm -3 , 5×10 17 cm -3 , 8×10 17 cm -3 , 1×10 18 cm -3 or 4×10 18 cm -3 , but not limited thereto. Preferably 1×10 17 cm -3 ~1×10 18 cm -3 .

[0047] Mg doped with Al x Ga 1-x The ratio of Al component in the N layer 821 (ie, x) is 0.01-0.25, exemplarily 0.04, 0.09, 0.13, 0.18, 0.22 or 0.24, but not limited thereto, and preferably 0.01-0.2.

[0048] Mg doped with Al x Ga 1-x The thickness of the N layer 821 is 0.1 nm to 8 nm, and is exemplarily 0.3 nm, 1 nm, 3 nm, 5 nm, 6.5 nm or 7.8 nm, but is not limited thereto, and is preferably 0.5 nm to 5 nm.

[0049] Specifically, the Mg doping concentration in the Mg-doped GaN layer 822 is 1×10 18 cm -3 ~5×10 19 cm -3 , exemplarily 2×10 18 cm -3 , 5×10 18 cm -3 , 8×10 18 cm -3 , 1×10 19 cm -3 or 4×10 19 cm -3 , but not limited thereto. Preferably 1×10 18 cm -3 ~1×1019 cm -3 .

[0050] Specifically, the thickness of the Mg-doped GaN layer 822 is 1 nm to 50 nm, exemplarily 8 nm, 23 nm, 34 nm or 45 nm, but not limited thereto, preferably 1 nm to 20 nm.

[0051] Preferably, in one embodiment, Mg doped with Al x Ga 1-x The doping concentration of the N layer 821 is lower than the doping concentration of the Mg-doped GaN layer 822. Based on this low-doping / high-doping structure, it can help to evenly distribute the current in the P-type semiconductor layer 800, weaken the current congestion effect, improve the injection efficiency of holes into the multi-quantum well layer 600, and further improve the luminescence efficiency.

[0052] Preferably, in one embodiment, Mg doped with Al x Ga 1-x The ratio of the thickness of the N layer 821 to the thickness of the Mg-doped GaN layer 822 is 1:2 to 1:5. Based on this thickness control, the concentration of the two-dimensional hole gas can be effectively adjusted, the hole concentration can be increased, and the luminous efficiency can be further improved.

[0053] The number of periods of the second superlattice layer 830 is 2-15, exemplarily 3, 5, 7, 9, 11 or 13, but not limited thereto, and preferably 3-10.

[0054] Specifically, the thickness of the non-doped GaN layer 831 is 0.5 nm to 5 nm, and is exemplarily 0.8 nm, 1.2 nm, 2 nm, 3 nm or 4.5 nm, but is not limited thereto, and is preferably 0.5 nm to 3 nm.

[0055] Specifically, Mg doped with In y Ga 1-y The Mg doping concentration in the N layer 832 is 1×10 19 cm -3 ~5×10 21 cm -3 , exemplarily 5×10 19 cm -3 ,9×10 19 cm -3 , 3×10 20 cm -3 ,9×10 20 cm -3 or 4×10 21 cm -3 , but not limited thereto. Preferably 1×10 19 cm -3 ~1×10 21cm -3 .

[0056] Mg doped with In y Ga 1-y The ratio of the In component in the N layer 832 (ie, y) is 0.01-0.15, and is 0.03, 0.07, 0.11 or 0.14, but not limited thereto. Preferably, it is 0.01-0.1.

[0057] Mg doped with In y Ga 1-y The thickness of the N layer 832 is 1 nm to 15 nm, exemplarily 3 nm, 5 nm, 10 nm, 12 nm or 14 nm, but not limited thereto, preferably 1 nm to 10 nm.

[0058] Preferably, in one embodiment, the thickness of the non-doped GaN layer 831 is about the thickness of the Mg-doped In layer 831. y Ga 1-y The thickness ratio of the N layer 832 is 1:2 to 1:10. Based on this ratio, the luminous efficiency can be further improved.

[0059] Preferably, in one embodiment, Mg doped with Al x Ga 1-x The doping concentration of the N layer 821 is less than that of the Mg-doped GaN layer 822, and the doping concentration of the Mg-doped GaN layer 822 is less than that of the Mg-doped In layer 821. y Ga 1-y N layer 832. By controlling the doping concentration in this way, the injection efficiency of holes into the multi-quantum well layer 600 can be improved, thereby improving the luminescence efficiency.

[0060] The substrate 100 may be a sapphire substrate, a silicon substrate, a silicon carbide substrate or a gallium oxide substrate, but is not limited thereto. A sapphire substrate is preferred.

[0061] The buffer layer 200 may be an AlN layer, a GaN layer or an AlGaN layer, but is not limited thereto. Preferably, it is an AlN layer. The thickness of the buffer layer 200 is 10 nm to 50 nm, preferably 20 nm to 50 nm.

[0062] The intrinsic semiconductor layer 300 is an intrinsic GaN layer, and the thickness thereof is 1 μm-5 μm.

[0063] The N-type semiconductor layer 400 is an N-type GaN layer with a thickness of 1 μm to 5 μm and a Si doping concentration of 5×10 18 cm -3 ~5×10 19 cm -3 .

[0064] The multi-quantum well layer 600 includes alternately stacked InGaN quantum well layers 610 and GaN quantum barrier layers 620 , the thickness of the InGaN quantum well layer 610 is 3nm-5nm, the In component ratio is 0.15-0.45, and the thickness of the GaN quantum barrier layer 620 is 8nm-20nm.

[0065] The electron blocking layer 700 is an AlInGaN layer or an AlGaN layer, but is not limited thereto. Preferably, the AlInGaN layer has an Al component ratio of 0.01-0.1, an In component ratio of 0.01-0.2, and a thickness of 10nm-50nm.

[0066] Preferably, see Figure 2 In one embodiment, the In component ratio in the InGaN quantum well layer 610 is 0.3-0.45, and the In component ratio is relatively high, and the internal compressive strain of the multi-quantum well layer 600 is relatively large. Therefore, the stress release layer 500 is introduced. Specifically, the stress release layer 500 includes alternately stacked InGaN layers and Si-doped GaN layers; the In component ratio in the InGaN layer is 0.05-0.2, and the thickness is 2nm-5nm; the thickness of the Si-doped GaN layer is 5nm-10nm, and the doping concentration is 1×10 17 cm -3 ~1×10 18 cm -3 The introduction of the stress release layer 500 can effectively weaken the compressive strain in the multi-quantum well layer 600, weaken the quantum Stokes effect, and improve the luminous efficiency, but it will also increase the size and distribution density of the V-shaped pits, which is more unfavorable to the growth of the P-type semiconductor layer 800. The P-type semiconductor layer 800 in an embodiment of the present invention can still increase the hole concentration and improve the luminous efficiency when using a multi-quantum well layer 600 with a high In component ratio and setting a stress release layer 500.

[0067] Accordingly, see Figure 3 The present invention also provides a method for preparing a light emitting diode epitaxial wafer, which is used to prepare the above-mentioned light emitting diode epitaxial wafer, and specifically comprises the following steps:

[0068] S1: providing a substrate;

[0069] S2: sequentially growing a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a multi-quantum well layer, an electron blocking layer and a P-type semiconductor layer on the substrate;

[0070] Specifically, step S2 includes:

[0071] S21: growing a buffer layer on the substrate;

[0072] Specifically, in one embodiment, an AlN layer is grown by PVD as a buffer layer.

[0073] S22: growing an intrinsic semiconductor layer on the buffer layer;

[0074] Specifically, in one embodiment, an intrinsic GaN layer is grown by MOCVD as the intrinsic semiconductor layer, with a growth temperature of 900° C. to 1100° C. and a growth pressure of 50 torr to 500 torr.

[0075] S23: growing an N-type semiconductor layer on the intrinsic semiconductor layer;

[0076] Specifically, in one embodiment, an N-type GaN layer is grown by MOCVD as the N-type semiconductor layer, with a growth temperature of 1000° C. to 1150° C. and a growth pressure of 100 torr to 500 torr.

[0077] S24: growing a stress release layer on the N-type semiconductor layer;

[0078] Specifically, in one embodiment of the present invention, an InGaN layer and a Si-doped GaN layer are periodically grown by MOCVD until a stress release layer is obtained. The growth temperature of the InGaN layer is 750°C to 850°C, and the growth pressure is 100 torr to 200 torr. The growth temperature of the Si-doped GaN layer is 850°C to 900°C, and the growth pressure is 100 torr to 200 torr.

[0079] S25: Growing a multi-quantum well layer on the stress release layer

[0080] Specifically, in one embodiment of the present invention, an InGaN quantum well layer and a GaN quantum barrier layer are periodically grown by MOCVD until a multi-quantum well layer is obtained, wherein the growth temperature of the InGaN quantum well layer is 730°C to 820°C, the growth pressure is 100 torr to 300 torr, and the growth temperature of the GaN quantum barrier layer is 850°C to 950°C, and the growth pressure is 100 torr to 300 torr.

[0081] S26: growing an electron blocking layer on the multi-quantum well layer;

[0082] Specifically, in one embodiment of the present invention, an AlInGaN layer is grown by MOCVD as an electron blocking layer, and the growth temperature is 900° C. to 1000° C. and the growth pressure is 100 torr to 300 torr.

[0083] S27: growing a P-type semiconductor layer on the electron blocking layer;

[0084] Specifically, step S27 includes:

[0085] S271: growing a Si3N4 layer on the electron blocking layer;

[0086] Specifically, in one embodiment, the Si3N4 layer is grown by MOCVD, and the growth temperature is 850°C~1000°C and the growth pressure is 50torr~500torr.

[0087] S272: growing a first superlattice layer on the Si3N4 layer;

[0088] Specifically, in one embodiment, Mg-doped Al is grown periodically by MOCVD. x Ga 1-x N layer and Mg-doped GaN layer until the first superlattice layer is obtained. x Ga 1-x The growth temperature of the N layer is 950°C~1050°C, and the growth pressure is 300torr~500torr; the growth temperature of the Mg-doped GaN layer is 900°C~1000°C, and the growth pressure is 50torr~300torr.

[0089] S273: growing a second superlattice layer on the first superlattice layer to obtain a P-type semiconductor layer;

[0090] Specifically, in one embodiment, the undoped GaN layer and the Mg-doped In layer are periodically grown by MOCVD. y Ga 1-y N layer until the second superlattice layer is obtained. Specifically, the growth temperature of the non-doped GaN layer is 950℃~1100℃, and the growth pressure is 50torr~500torr; Mg doped In y Ga 1-y The growth temperature of the N layer is 800°C~900°C, and the growth pressure is 50torr~300torr.

[0091] The present invention will be further described below with specific embodiments:

[0092] Example 1

[0093] This embodiment provides a light-emitting diode epitaxial wafer, which includes a substrate, a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer stacked on the substrate in sequence. The substrate is a sapphire substrate, the buffer layer is an AlN layer with a thickness of 30 nm. The intrinsic semiconductor layer is an intrinsic GaN layer with a thickness of 1.5 μm. The N-type semiconductor layer is an N-type GaN layer with a thickness of 3 μm and a Si doping concentration of 8×10 18 cm -3The multi-quantum well layer includes alternately stacked InGaN quantum well layers and GaN quantum barrier layers, with a period number of 10, a thickness of 4nm for the InGaN quantum well layer, a proportion of 0.18 for In, and a thickness of 12nm for the GaN quantum barrier layer. The electron blocking layer is an AlInGaN layer, with a proportion of 0.08 for Al, 0.05 for In, and a thickness of 40nm.

[0094] The P-type semiconductor layer includes a Si3N4 layer, a first superlattice layer, and a second superlattice layer stacked on the electron blocking layer in sequence. The thickness of the Si3N4 layer is 8.5 nm. The first superlattice layer includes Mg-doped Al x Ga 1-x N layer and Mg doped GaN layer, the period number is 10. Mg doped Al x Ga 1-x The Mg doping concentration in the N layer (x = 0.1) is 2.5×10 18 cm -3 , and its thickness is 4nm. The Mg doping concentration in the Mg-doped GaN layer is 2.5×10 18 cm -3 , with a thickness of 5 nm. The second superlattice layer includes alternately stacked non-doped GaN layers and Mg-doped In layers. y Ga 1-y N layer, the number of periods is 10. The thickness of the undoped GaN layer is 3nm. y Ga 1-y The Mg doping concentration in the N layer (y=0.08) is 1.5×10 19 cm -3 , and its thickness is 3nm.

[0095] The method for preparing the light emitting diode epitaxial wafer in this embodiment comprises the following steps:

[0096] (1) Providing a substrate;

[0097] (2) growing a buffer layer on the substrate;

[0098] Specifically, an AlN layer is grown by PVD to serve as a buffer layer.

[0099] (3) growing an intrinsic semiconductor layer on the buffer layer;

[0100] Specifically, an intrinsic GaN layer is grown by MOCVD as the intrinsic semiconductor layer at a growth temperature of 980° C. and a growth pressure of 400 torr.

[0101] (4) growing an N-type semiconductor layer on the intrinsic semiconductor layer;

[0102] Specifically, an N-type GaN layer is grown by MOCVD as the N-type semiconductor layer at a growth temperature of 1050° C. and a growth pressure of 200 torr.

[0103] (5) Growing a multi-quantum well layer on the N-type semiconductor layer

[0104] Specifically, InGaN quantum well layers and GaN quantum barrier layers are periodically grown by MOCVD until a multi-quantum well layer is obtained, wherein the growth temperature of the InGaN quantum well layer is 780°C and the growth pressure is 200 torr, and the growth temperature of the GaN quantum barrier layer is 890°C and the growth pressure is 200 torr.

[0105] (6) growing an electron blocking layer on the multi-quantum well layer;

[0106] Specifically, an AlInGaN layer is grown by MOCVD as an electron blocking layer, and the growth temperature is 980° C. and the growth pressure is 200 torr.

[0107] (7) growing a Si3N4 layer on the electron blocking layer;

[0108] Specifically, the Si3N4 layer is grown by MOCVD, with a growth temperature of 860°C and a growth pressure of 400 torr.

[0109] (8) growing a first superlattice layer on the Si3N4 layer;

[0110] Specifically, Mg-doped Al is grown periodically by MOCVD. x Ga 1-x N layer and Mg-doped GaN layer until the first superlattice layer is obtained. x Ga 1-x The growth temperature of the N layer is 980°C and the growth pressure is 500 torr; the growth temperature of the Mg-doped GaN layer is 920°C and the growth pressure is 100 torr.

[0111] (9) growing a second superlattice layer on the first superlattice layer to obtain a P-type semiconductor layer;

[0112] Specifically, undoped GaN layers and Mg-doped In layers are periodically grown by MOCVD. y Ga 1-y N layer until the second superlattice layer is obtained. Specifically, the growth temperature of the non-doped GaN layer is 1020°C and the growth pressure is 300 torr; the Mg doped In y Ga 1-y The growth temperature of the N layer is 840°C and the growth pressure is 200 torr.

[0113] Example 2

[0114] This embodiment provides a light emitting diode epitaxial wafer, which is different from the embodiment 1 in that: Mg doped with Al x Ga 1-x The doping concentration of the N layer is 5.5×10 17 cm -3 , Mg doped with In y Ga 1-y The Mg doping concentration in the N layer is 3×10 20 cm -3 .

[0115] The rest are the same as in Example 1.

[0116] Example 3

[0117] This embodiment provides a light emitting diode epitaxial wafer, which is different from the embodiment 2 in that:

[0118] Mg doped with Al x Ga 1-x The thickness of the N layer is 2 nm, and the thickness of the Mg-doped GaN layer is 10 nm.

[0119] The rest is the same as Example 2.

[0120] Example 4

[0121] This embodiment provides a light emitting diode epitaxial wafer, which is different from the embodiment 3 in that:

[0122] The thickness of the undoped GaN layer is 2nm; the Mg doped In y Ga 1-y The thickness of the N layer is 7 nm.

[0123] The rest is the same as Example 3.

[0124] Example 5

[0125] This embodiment provides a light-emitting diode epitaxial wafer, which includes a substrate, a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer stacked on the substrate in sequence. The substrate is a sapphire substrate, the buffer layer is an AlN layer with a thickness of 30 nm. The intrinsic semiconductor layer is an intrinsic GaN layer with a thickness of 1.5 μm. The N-type semiconductor layer is an N-type GaN layer with a thickness of 3 μm and a Si doping concentration of 8×10 18 cm -3 The stress release layer includes alternately stacked InGaN layers and Si-doped GaN layers, with a period of 10. The InGaN layer has an In component ratio of 0.11 and a thickness of 3 nm. The Si-doped GaN layer has a thickness of 10 nm and a doping concentration of 3.5×10 17 cm-3 The multi-quantum well layer includes alternately stacked InGaN quantum well layers and GaN quantum barrier layers, with a period number of 10, a thickness of 3nm for the InGaN quantum well layer, a proportion of 0.4 for the In component, and a thickness of 10nm for the GaN quantum barrier layer. The electron blocking layer is an AlInGaN layer, with an Al component proportion of 0.08, an In component proportion of 0.12, and a thickness of 40nm.

[0126] The P-type semiconductor layer includes a Si3N4 layer, a first superlattice layer, and a second superlattice layer stacked on the electron blocking layer in sequence. The thickness of the Si3N4 layer is 8.5 nm. The first superlattice layer includes Mg-doped Al x Ga 1-x N layer and Mg doped GaN layer, the period number is 15. Mg doped Al x Ga 1-x The Mg doping concentration in the N layer (x = 0.1) is 6×10 17 cm -3 , and its thickness is 2.5nm. The Mg doping concentration in the Mg-doped GaN layer is 5.5×10 18 cm -3 , with a thickness of 11 nm. The second superlattice layer includes alternately stacked undoped GaN layers and Mg-doped In layers. y Ga 1-y N layer, the number of its periods is 10. The thickness of the undoped GaN layer is 1nm. y Ga 1-y The Mg doping concentration in the N layer (y=0.08) is 6.5×10 20 cm -3 , and its thickness is 8nm.

[0127] The method for preparing the light emitting diode epitaxial wafer in this embodiment comprises the following steps:

[0128] (1) Providing a substrate;

[0129] (2) growing a buffer layer on the substrate;

[0130] Specifically, an AlN layer is grown by PVD to serve as a buffer layer.

[0131] (3) growing an intrinsic semiconductor layer on the buffer layer;

[0132] Specifically, an intrinsic GaN layer is grown by MOCVD as the intrinsic semiconductor layer at a growth temperature of 980° C. and a growth pressure of 400 torr.

[0133] (4) growing an N-type semiconductor layer on the intrinsic semiconductor layer;

[0134] Specifically, an N-type GaN layer is grown by MOCVD as the N-type semiconductor layer at a growth temperature of 1050° C. and a growth pressure of 200 torr.

[0135] (5) growing a stress release layer on the N-type semiconductor layer;

[0136] Specifically, an InGaN layer and a Si-doped GaN layer are periodically grown by MOCVD until a stress release layer is obtained, wherein the growth temperature of the InGaN layer is 820° C. and the growth pressure is 200 torr. The growth temperature of the Si-doped GaN layer is 880° C. and the growth pressure is 200 torr.

[0137] (6) Growing a multi-quantum well layer on the stress release layer

[0138] Specifically, InGaN quantum well layers and GaN quantum barrier layers are periodically grown by MOCVD until a multi-quantum well layer is obtained, wherein the growth temperature of the InGaN quantum well layer is 760°C and the growth pressure is 200 torr, and the growth temperature of the GaN quantum barrier layer is 890°C and the growth pressure is 200 torr.

[0139] (7) growing an electron blocking layer on the multi-quantum well layer;

[0140] Specifically, an AlInGaN layer is grown by MOCVD as an electron blocking layer, and the growth temperature is 950° C. and the growth pressure is 200 torr.

[0141] (8) growing a Si3N4 layer on the electron blocking layer;

[0142] Specifically, the Si3N4 layer is grown by MOCVD, with a growth temperature of 860°C and a growth pressure of 400 torr.

[0143] (9) growing a first superlattice layer on the Si3N4 layer;

[0144] Specifically, Mg-doped Al is grown periodically by MOCVD. x Ga 1-x N layer and Mg-doped GaN layer until the first superlattice layer is obtained. x Ga 1-x The growth temperature of the N layer is 980°C and the growth pressure is 500 torr; the growth temperature of the Mg-doped GaN layer is 920°C and the growth pressure is 100 torr.

[0145] (10) growing a second superlattice layer on the first superlattice layer to obtain a P-type semiconductor layer;

[0146] Specifically, undoped GaN layers and Mg-doped In layers are periodically grown by MOCVD.y Ga 1-y N layer until the second superlattice layer is obtained. Specifically, the growth temperature of the non-doped GaN layer is 1020°C and the growth pressure is 300 torr; the Mg doped In y Ga 1-y The growth temperature of the N layer is 840°C and the growth pressure is 200 torr.

[0147] Comparative Example 1

[0148] This comparative example provides a light emitting diode epitaxial wafer, which differs from Example 1 in that:

[0149] The P-type semiconductor layer is a P-type GaN layer with a thickness of 150 nm and a Mg doping concentration of 2×10 20 cm -3 , the growth temperature is 950°C, and the growth pressure is 300 torr. The rest is the same as in Example 1.

[0150] Comparative Example 2

[0151] This comparative example provides a light emitting diode epitaxial wafer, which differs from Example 1 in that:

[0152] The P-type semiconductor layer does not include the Si3N4 layer, and the rest is the same as in Example 1.

[0153] Comparative Example 3

[0154] This comparative example provides a light emitting diode epitaxial wafer, which differs from Example 1 in that:

[0155] The P-type semiconductor layer does not include the first superlattice layer, and the rest is the same as that of the first embodiment.

[0156] Comparative Example 4

[0157] This comparative example provides a light emitting diode epitaxial wafer, which differs from Example 1 in that:

[0158] The P-type semiconductor layer does not include the second superlattice layer, and the rest is the same as that of the first embodiment.

[0159] Comparative Example 5

[0160] This comparative example provides a light emitting diode epitaxial wafer, which differs from Example 5 in that:

[0161] The P-type semiconductor layer is a P-type GaN layer with a thickness of 150 nm and a Mg doping concentration of 2×10 20 cm -3 , the growth temperature is 950°C, and the growth pressure is 300 torr. The rest is the same as in Example 5.

[0162] The light-emitting diode epitaxial wafers obtained in Examples 1 to 5 and Comparative Examples 1 to 5 were prepared into 10mil×24mil vertical structure chips, and the luminous brightness was measured at 20mA, and the brightness improvement rate was calculated. Among them, the brightness improvement rate of Examples 1 to 4 and Comparative Examples 1 to 4 was calculated based on the data of Comparative Example 1, and the brightness improvement rate of Example 5 was calculated based on the data of Comparative Example 5. The specific data are shown in the following table:

[0163]

[0164] It can be seen from the table that the light emitting diode epitaxial wafer in the embodiment of the present invention effectively improves the brightness of the light emitting diode.

[0165] The above is a preferred embodiment of the invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the invention. These improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A light-emitting diode epitaxial wafer, comprising a substrate, a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a multi-quantum well layer, an electron blocking layer and a P-type semiconductor layer sequentially stacked on the substrate; characterized in that: The P-type semiconductor layer includes a Si3N4 layer, a first superlattice layer, and a second superlattice layer sequentially stacked on the electron blocking layer, wherein the first superlattice layer includes Mg-doped Al-doped Si3N4 layers alternately stacked on the electron blocking layer. x Ga 1-x N layer and Mg-doped GaN layer, the second superlattice layer includes alternately stacked non-doped GaN layers and Mg-doped In layers. y Ga 1-y N layers; The thickness of the Si3N4 layer is 1nm~10nm, and the Mg doped Al x Ga 1-x The thickness of the N layer is 0.5nm~5nm, the thickness of the Mg-doped GaN layer is 1nm~20nm, the thickness of the undoped GaN layer is 0.5nm~3nm, and the thickness of the Mg-doped In layer is 1nm~20nm. y Ga 1-y The thickness of the N layer is 1nm~10nm.

2. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The Mg doped Al x Ga 1-x The doping concentration of the N layer is less than the doping concentration of the Mg-doped GaN layer, and the doping concentration of the Mg-doped GaN layer is less than the doping concentration of the Mg-doped In layer. y Ga 1-y Doping concentration of the N layer.

3. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The Mg doped Al x Ga 1-x The ratio of the thickness of the N layer to the thickness of the Mg-doped GaN layer is 1:2-1:

5.

4. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The thickness of the non-doped GaN layer is y Ga 1-y The thickness ratio of the N layer is 1:2~1:

10.

5. The light emitting diode epitaxial wafer according to any one of claims 1 to 4, characterized in that: The period number of the first superlattice layer is 2 to 15; and / or The Mg doped Al x Ga 1-x The doping concentration of the N layer is 1×10 17 cm -3 ~1×10 18 cm -3 , x is 0.01 to 0.2; and / or The doping concentration of the Mg-doped GaN layer is 1×10 18 cm -3 ~1×10 19 cm -3 ; and / or The period number of the second superlattice layer is 3 to 10; and / or The Mg doped with In y Ga 1-y The doping concentration of the N layer is 1×10 19 cm -3 ~1×10 21 cm -3 , y is 0.01~0.

1.

6. The light emitting diode epitaxial wafer according to claim 5, characterized in that: The buffer layer is an AlN layer, and its thickness is 20nm-50nm; and / or The intrinsic semiconductor layer is an intrinsic GaN layer, and the thickness thereof is 1 μm to 5 μm; and / or The N-type semiconductor layer is an N-type GaN layer, the thickness of which is 1 μm to 5 μm, and the Si doping concentration is 5×10 18 cm -3 ~5×10 19 cm -3 ; and / or The multi-quantum well layer comprises alternately stacked InGaN quantum well layers and GaN quantum barrier layers, the thickness of the InGaN quantum well layer is 3nm-5nm, the In component ratio is 0.15-0.45, and the thickness of the GaN quantum barrier layer is 8nm-20nm; and / or The electron blocking layer is an AlInGaN layer, in which the Al component accounts for 0.01-0.1, the In component accounts for 0.01-0.2, and the thickness is 10nm-50nm.

7. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The multi-quantum well layer includes alternately stacked InGaN quantum well layers and GaN quantum barrier layers, the thickness of the InGaN quantum well layer is 3nm-5nm, the In component ratio is 0.3-0.45, and the thickness of the GaN quantum barrier layer is 8nm-20nm; The light-emitting diode epitaxial wafer also includes a stress release layer, which is arranged between the N-type semiconductor layer and the multi-quantum well layer, and the stress release layer includes an InGaN layer and a Si-doped GaN layer stacked alternately; the In component ratio of the InGaN layer is 0.05-0.2, the thickness is 2nm-5nm, the thickness of the Si-doped GaN layer is 5nm-10nm, and the doping concentration is 1×10 17 cm -3 ~1×10 18 cm -3 .

8. A method for preparing a light emitting diode epitaxial wafer, for preparing the light emitting diode epitaxial wafer according to any one of claims 1 to 7, characterized in that: include: Providing a substrate, and sequentially growing a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer on the substrate; The P-type semiconductor layer includes a Si3N4 layer, a first superlattice layer, and a second superlattice layer sequentially stacked on the electron blocking layer, wherein the first superlattice layer includes Mg-doped Al-doped Si3N4 layers alternately stacked on the electron blocking layer. x Ga 1-x N layer and Mg-doped GaN layer, the second superlattice layer includes alternately stacked non-doped GaN layers and Mg-doped In layers. y Ga 1-y N layers.

9. The method for preparing a light emitting diode epitaxial wafer according to claim 8, characterized in that: The growth temperature of the Si3N4 layer is 850°C to 1000°C, and the growth pressure is 50 torr to 500 torr; and / or The Mg doped Al x Ga 1-x The growth temperature of the N layer is 950°C to 1050°C, and the growth pressure is 300 torr to 500 torr; and / or The growth temperature of the Mg-doped GaN layer is 900° C. to 1000° C., and the growth pressure is 50 torr to 300 torr; and / or The growth temperature of the non-doped GaN layer is 950° C. to 1100° C., and the growth pressure is 50 torr to 500 torr; and / or The Mg doped with In y Ga 1-y The growth temperature of the N layer is 800°C~900°C, and the growth pressure is 50torr~300torr.

10. A light emitting diode, characterized in that: It comprises the light emitting diode epitaxial wafer as described in claims 1 to 7.

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