Discharging device for pumping voltage of direct current bus capacitor and power system

Abstract

The invention provides a DC bus capacitor pumping voltage discharge device and a power system, a DC bus is electrically connected with an inverter corresponding to a motor with a potential load, the device comprises: a discharge circuit comprising a first switch and a load which are connected in series, one end of the discharge circuit is electrically connected with a positive electrode of the DC bus, and the other end of the discharge circuit is electrically connected with a negative electrode of the DC bus; the other end of the bleeder circuit is electrically connected with the negative electrode of the direct-current bus and forms a bleeder loop with the direct-current bus capacitor; the input end of the first direct-current bus detection unit is electrically connected with the positive electrode of the direct-current bus, the output end of the first direct-current bus detection unit is electrically connected with the control end of the first switch, and under the condition that the voltage of the direct-current bus capacitor is larger than the upper limit voltage of the hysteresis control loop width, the first switch is switched on; and the output end of the first direct current bus detection unit outputs a high level to control the first switch to be switched on. The problem that in the prior art, the release risk exists due to the fact that software is used for controlling release of pumping voltage is solved.

Description

Technical Field

[0001] The present invention relates to the field of circuit safety technology, and in particular to a discharge device and a power system for a pumped-up voltage of a DC bus capacitor. Background Art

[0002] Pump-up voltage is a voltage phenomenon generated under specific electrical system working conditions. When the motor carries a potential load, its braking operation will generate a large amount of energy, part of which is converted into electrical energy and flows to the DC bus. Due to the unidirectional transmission characteristics of the diode rectifier bridge, the energy cannot continue to flow to the grid, and thus accumulates on the DC bus energy storage capacitor to generate pump-up voltage. If the excessively high pump-up voltage is not released in time, it may cause permanent damage to the DC bus energy storage capacitor or power devices.

[0003] At present, in electrical systems, most of them use control strategies around the main chip to achieve controlled discharge of pump-up voltage. However, electrical systems often have high requirements for real-time and reliability. Relying on software systems may introduce problems such as data processing and system resource scheduling, which will affect the stability of the electrical system. For systems with remote network monitoring requirements, there may also be the risk of network attacks tampering with data. Summary of the invention

[0004] The main purpose of the present application is to provide a discharge device and a power system for the pumped-up voltage of a DC bus capacitor, so as to at least solve the problem in the prior art that there is a risk of delayed discharge when controlling the discharge of the pumped-up voltage through software.

[0005] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a discharge device for a pumped voltage of a DC bus capacitor is provided, wherein one end of the DC bus capacitor is electrically connected to the positive electrode of the DC bus, the other end of the DC bus capacitor is electrically connected to the negative electrode of the DC bus, and the DC bus is electrically connected to an inverter corresponding to a motor with a potential load, and the device comprises: a discharge circuit, comprising a first switch and a load connected in series, one end of the discharge circuit is electrically connected to the positive electrode of the DC bus, the other end of the discharge circuit is electrically connected to the negative electrode of the DC bus, and a discharge loop is formed with the DC bus capacitor; a first DC bus detection unit, wherein the input end of the first DC bus detection unit is electrically connected to the positive electrode of the DC bus, the output end of the first DC bus detection unit is electrically connected to the control end of the first switch, and when the voltage of the DC bus capacitor is greater than the upper limit voltage of the hysteresis control loop width, the output end of the first DC bus detection unit outputs a high level to control the first switch to be turned on.

[0006] Optionally, the first DC bus detection unit includes: a first operational amplifier chip, the in-phase terminal of the first operational amplifier chip is electrically connected to the positive pole of the DC bus, the inverting terminal of the first operational amplifier chip is electrically connected to the first reference voltage input terminal, the output terminal of the first operational amplifier chip is the output terminal of the first DC bus detection unit, and the first reference voltage input terminal is used to input the upper limit voltage of the hysteresis control loop width.

[0007] Optionally, the first DC bus detection unit also includes a first variable resistor and a first voltage-dividing resistor, the first variable resistor and the first voltage-dividing resistor are connected in series at both ends of the DC power supply, and a common end of the first variable resistor and the first voltage-dividing resistor is the first reference voltage input end.

[0008] Optionally, the first DC bus detection unit further includes a first sliding rheostat, two lower terminals of the first sliding rheostat are electrically connected to two ends of a DC power supply respectively, and an upper terminal of the first sliding rheostat is the first reference voltage input terminal.

[0009] Optionally, the device also includes: a second DC bus detection unit, the input end of the second DC bus detection unit is electrically connected to the positive electrode of the DC bus, and when the voltage of the DC bus capacitor is less than the lower limit voltage of the hysteresis control loop width, the output end of the second DC bus detection unit outputs a high level; an inverter, including an inverter resistor and a second switch, the control end of the second switch is electrically connected to the output end of the second DC bus detection unit, the inverter resistor and the second switch are connected in series at both ends of a DC power supply, and the common end of the inverter resistor and the second switch is electrically connected to the control end of the first switch.

[0010] Optionally, the second DC bus detection unit includes: a second operational amplifier chip, the inverting terminal of the second operational amplifier chip is electrically connected to the positive pole of the DC bus, the non-inverting terminal of the second operational amplifier chip is electrically connected to the second reference voltage input terminal, the output terminal of the second operational amplifier chip is the output terminal of the second DC bus detection unit, and the second reference voltage input terminal is used to input the lower limit voltage of the hysteresis control loop width.

[0011] Optionally, the second DC bus detection unit also includes a second variable resistor and a second voltage-dividing resistor, the second variable resistor and the second voltage-dividing resistor are connected in series at both ends of the DC power supply, and a common end of the second variable resistor and the second voltage-dividing resistor is the second reference voltage input end.

[0012] Optionally, the second DC bus detection unit further includes a second sliding rheostat, two lower terminals of the second sliding rheostat are electrically connected to two ends of the DC power supply respectively, and an upper terminal of the second sliding rheostat is the second reference voltage input terminal.

[0013] Optionally, the device further includes: a first logic operation unit, located on a line between the output end of the first DC bus detection unit and the control end of the first switch, the first logic operation unit including a first diode, a second diode and a first current limiting resistor, the anode of the first diode being electrically connected to the output end of the first DC bus detection unit, the cathode of the first diode being electrically connected to the control end of the first switch, one end of the first current limiting resistor being electrically connected to the cathode of the second diode and the control end of the first switch, respectively, and the other end of the first current limiting resistor being electrically connected to the negative electrode of the DC power supply; a second logic operation unit, located on a line between the output end of the second DC bus detection unit and the control end of the first switch, the second logic operation unit including a third diode, a fourth diode and a second current limiting resistor, one end of the second current limiting resistor being electrically connected to the positive electrode of the DC power supply, the other ends of the second current limiting resistor being electrically connected to the anode of the second diode, the anode of the third diode and the anode of the fourth diode, respectively, the cathode of the third diode being electrically connected to the common end of the inverter resistor and the second switch, and the cathode of the fourth diode being electrically connected to the control end of the first switch.

[0014] According to another aspect of the present application, a power system is provided, comprising: a DC bus, a DC bus capacitor, a motor with a potential load, an inverter, and any one of the pump-up voltage discharge devices, wherein one end of the DC bus capacitor is electrically connected to the positive pole of the DC bus, the other end of the DC bus capacitor is electrically connected to the negative pole of the DC bus, and the DC bus is electrically connected to the inverter corresponding to the motor with a potential load.

[0015] By applying the technical solution of the present application, in the discharge device of the pump-up voltage of the above-mentioned DC bus capacitor, the discharge circuit and the DC bus capacitor form a discharge loop, and the discharge of the pump-up voltage can be realized as long as the first switch is turned on. The first DC bus detection unit compares the voltage of the DC bus capacitor with the upper limit voltage of the hysteresis control loop width, and when the voltage of the DC bus capacitor is greater than the upper limit voltage of the hysteresis control loop width, that is, the pump-up voltage exceeds the limit, a high level is output to control the conduction of the first switch, thereby realizing real-time discharge of the pump-up voltage, so that the pump-up voltage is controlled below the upper limit voltage of the hysteresis control loop width. Compared with software control, the discharge of the pump-up voltage controlled by hardware is more timely and reliable, which solves the problem of delayed discharge risk in the discharge of the pump-up voltage controlled by software in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A hardware structure diagram of a discharge device for performing a pumped voltage of a DC bus capacitor provided in an embodiment of the present application is shown;

[0017] Figure 2 A hardware structure diagram of another discharge device for performing a pumped voltage of a DC bus capacitor provided according to an embodiment of the present application is shown;

[0018] Figure 3 A control flow chart of a pumped voltage discharge device provided according to an embodiment of the present application is shown.

[0019] The above drawings include the following reference numerals:

[0020] 102, processor; 104, memory; 106, transmission device; 108, input and output devices. DETAILED DESCRIPTION

[0021] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0022] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0023] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0024] For the convenience of description, some nouns or terms involved in the embodiments of the present application are explained below:

[0025] Hysteresis control loop width: The range of the physical quantity controlled by the hysteresis loop is limited. For example, the output current is controlled by hysteresis loop so that the range of output current variation is limited within the hysteresis control loop width.

[0026] As introduced in the background technology, there is a risk of delayed discharge in the prior art of controlling the discharge of pumped-up voltage through software. To solve this technical problem, an embodiment of the present application provides a discharge device and a power system for the pumped-up voltage of a DC bus capacitor.

[0027] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0028] In this embodiment, a device for discharging the pumped voltage of a DC bus capacitor is provided, such as Figure 1 As shown, one end of the DC bus capacitor is electrically connected to the positive electrode DCP of the DC bus, the other end of the DC bus capacitor is electrically connected to the negative electrode PGND of the DC bus, the DC bus is electrically connected to the inverter corresponding to the motor with potential load, and the discharge device of the pumped voltage of the DC bus capacitor includes:

[0029] A discharge circuit comprises a first switch and a load connected in series, one end of the discharge circuit is electrically connected to the positive electrode of the DC bus, the other end of the discharge circuit is electrically connected to the negative electrode of the DC bus, and forms a discharge loop with the DC bus capacitor;

[0030] A first DC bus detection unit, wherein the input end of the first DC bus detection unit is electrically connected to the positive electrode of the DC bus, the output end of the first DC bus detection unit is electrically connected to the control end EN of the first switch, and when the voltage of the DC bus capacitor is greater than the upper limit voltage of the hysteresis control loop width, the output end of the first DC bus detection unit outputs a high level to control the first switch to be turned on.

[0031] In the discharge device of the pumped-up voltage of the above-mentioned DC bus capacitor, the discharge circuit and the DC bus capacitor form a discharge loop, and the discharge of the pumped-up voltage can be realized as long as the first switch is turned on. The first DC bus detection unit compares the voltage of the DC bus capacitor and the upper limit voltage of the hysteresis control loop width, and when the voltage of the DC bus capacitor is greater than the upper limit voltage of the hysteresis control loop width, that is, the pumped-up voltage exceeds the limit, it outputs a high level to control the conduction of the first switch, thereby realizing real-time discharge of the pumped-up voltage, so that the pumped-up voltage is controlled below the upper limit voltage of the hysteresis control loop width. Compared with software control, the discharge of the pumped-up voltage controlled by hardware is more timely and reliable, which solves the problem of delayed discharge risk in the discharge of the pumped-up voltage controlled by software in the prior art.

[0032] In order to realize the function of the first DC bus detection unit, in an optional implementation manner, as Figure 2 As shown, the first DC bus detection unit includes:

[0033] The first operational amplifier chip U1, the in-phase terminal of the first operational amplifier chip U1 is electrically connected to the positive electrode DCP of the DC bus, the inverting terminal of the first operational amplifier chip U1 is electrically connected to the first reference voltage input terminal, the output terminal of the first operational amplifier chip U1 is the output terminal of the first DC bus detection unit, and the first reference voltage input terminal is used to input the upper limit voltage V of the hysteresis control loop width c1 .

[0034] In the above embodiment, the in-phase terminal of the first operational amplifier chip U1 is electrically connected to the DC bus positive electrode DCP, that is, the voltage V DCO The inverting terminal of the first operational amplifier chip U1 is electrically connected to the first reference voltage input terminal, that is, the upper limit voltage V of the input hysteresis control loop width c1 , when V DCO >V C1 When the first op amp chip U1 outputs a high level, the first switch Q B For a transistor, the high level input first switch Q B The control terminal EN is used to control the first switch Q1 to conduct, so that the DC bus capacitor C E Discharge of the pump-up voltage.

[0035] In addition, the positive electrode DCP of the DC bus is connected to the in-phase terminal of the first operational amplifier chip U1 through the voltage-dividing resistors R1 and R2 to prevent excessive discharge current caused by a short circuit.

[0036] In order to adjust the upper limit voltage of the hysteresis control loop width, in an optional implementation, the first DC bus detection unit also includes a first variable resistor and a first voltage divider resistor, the first variable resistor and the first voltage divider resistor are connected in series at both ends of the DC power supply, and the common end of the first variable resistor and the first voltage divider resistor is the first reference voltage input end.

[0037] In the above implementation mode, if Figure 2 As shown, the first variable resistor R c1 The first voltage-dividing resistor (R3 and R4) is connected in series at both ends of the DC power supply, and the first variable resistor R c1 The resistance value of the first variable resistor R c1 and the voltage of the first voltage-dividing resistor (R3 and R4), so as to adjust the voltage of the common terminal of the first variable resistor and the first voltage-dividing resistor, the common terminal of the first variable resistor and the first voltage-dividing resistor being the first reference voltage input terminal, thereby adjusting the upper limit voltage V of the hysteresis control loop width inputted at the first reference voltage input terminal c1 , users can flexibly set the upper limit voltage V of the hysteresis control loop width c1 .

[0038] In order to adjust the upper limit voltage of the hysteresis control loop width, in an optional implementation, the first DC bus detection unit also includes a first sliding rheostat, the two lower terminals of the first sliding rheostat are respectively electrically connected to the two ends of the DC power supply, and the upper terminal of the first sliding rheostat is the first reference voltage input terminal.

[0039] In the above implementation mode, if Figure 2 As shown, the first variable resistor R c1 When it is a sliding rheostat, the two lower terminals of the above-mentioned first sliding rheostat are electrically connected to the two ends of the DC power supply respectively. Of course, two resistors (R3 and R4) can also be connected in series. The upper terminal of the above-mentioned first sliding rheostat is the above-mentioned first reference voltage input terminal, which can realize that the voltage output by the upper terminal of the first sliding rheostat is adjustable. As the first reference voltage input terminal, the upper limit voltage V of the hysteresis control loop width input by the first reference voltage input terminal can be adjusted. c1 , users can flexibly set the upper limit voltage V of the hysteresis control loop width c1 .

[0040] In order to stop the discharge of the pumped voltage, in an optional implementation, as Figure 1 and Figure 2 As shown, the above device also includes:

[0041] A second DC bus detection unit, wherein the input end of the second DC bus detection unit is electrically connected to the positive electrode DCP of the DC bus, and the voltage V DCO Less than the lower limit voltage V of the hysteresis control loop width C2 In the case of , the output terminal of the second DC bus detection unit outputs a high level;

[0042] The inverter includes an inverter resistor R8 and a second switch Q1, wherein the control end of the second switch Q1 is electrically connected to the output end of the second DC bus detection unit, the inverter resistor R8 and the second switch Q1 are connected in series at both ends of a DC power supply, and the common end of the inverter resistor R8 and the second switch Q1 is electrically connected to the control end of the first switch.

[0043] In the above embodiment, the positive electrode of the DC power supply is V CC , the voltage V of the DC bus capacitor above DCO Less than the lower limit voltage V of the hysteresis control loop width C2 In the case of , the output terminal of the second DC bus detection unit outputs a high level, the high level is input to the control terminal of the second switch, the second switch Q1 is controlled to be turned on, the common terminal of the inverter resistor R8 and the second switch Q1 is at a low level, and the first switch Q B For transistors, low level input transistor Q BThe control terminal EN controls the first switch Q B Turn off, that is, V DCO <V C2 When the DC bus capacitor C E The pump-up voltage stops discharging.

[0044] In addition, the second DC bus detection unit and the inverter are connected via a resistor R7 to prevent excessive short-circuit current.

[0045] In order to realize the function of the second DC bus detection unit, in an optional implementation manner, as Figure 2 As shown, the second DC bus detection unit includes:

[0046] The second operational amplifier chip U2, the inverting terminal of the second operational amplifier chip is electrically connected to the positive electrode DCP of the DC bus, the non-inverting terminal of the second operational amplifier chip U2 is electrically connected to the second reference voltage input terminal, the output terminal of the second operational amplifier chip U2 is the output terminal of the second DC bus detection unit, and the second reference voltage input terminal is used to input the lower limit voltage V of the hysteresis control loop width c2 .

[0047] In the above embodiment, the inverting terminal of the second operational amplifier chip U2 is electrically connected to the DC bus positive electrode DCP, that is, the voltage V DCO The in-phase terminal of the second operational amplifier chip U2 is electrically connected to the second reference voltage input terminal, that is, the lower limit voltage V of the input hysteresis control loop width c2 , when V DCO <V C2 When , the second operational amplifier chip U2 will output a high level.

[0048] In addition, the positive electrode DCP of the DC bus is connected to the inverting terminal of the second operational amplifier chip U2 through the voltage-dividing resistors R1 and R2 to prevent excessive discharge current caused by a short circuit.

[0049] In order to adjust the upper limit voltage of the hysteresis control loop width, in an optional implementation, the second DC bus detection unit also includes a second variable resistor and a second voltage divider resistor, the second variable resistor and the second voltage divider resistor are connected in series at both ends of the DC power supply, and the common end of the second variable resistor and the second voltage divider resistor is the second reference voltage input end.

[0050] In the above implementation mode, if Figure 2 As shown, the second variable resistor R c2 The above-mentioned second voltage-dividing resistor (R5 and R6) is connected in series at both ends of the DC power supply, and the second variable resistor R c2 The resistance value of the second variable resistor R c2and the voltage of the second voltage-dividing resistor (R5 and R6) to adjust the voltage of the common end of the second variable resistor and the second voltage-dividing resistor, the common end of the second variable resistor and the second voltage-dividing resistor is the second reference voltage input end, thereby adjusting the lower limit voltage V of the hysteresis control loop width input at the second reference voltage input end c2 , users can flexibly set the lower limit voltage V of the hysteresis control loop width c2 .

[0051] In order to adjust the upper limit voltage of the hysteresis control loop width, in an optional implementation, the second DC bus detection unit also includes a second sliding rheostat, the two lower terminals of the second sliding rheostat are respectively electrically connected to the two ends of the DC power supply, and the upper terminal of the second sliding rheostat is the second reference voltage input terminal.

[0052] In the above implementation mode, if Figure 2 As shown, the second variable resistor R c2 When it is a sliding rheostat, the two lower terminals of the second sliding rheostat are electrically connected to the two ends of the DC power supply respectively. Of course, two resistors (R5 and R6) can also be connected in series. The upper terminal of the second sliding rheostat is the second reference voltage input terminal, so that the voltage output by the upper terminal of the second sliding rheostat can be adjusted. As the second reference voltage input terminal, the lower limit voltage V of the hysteresis control loop width input by the second reference voltage input terminal can be adjusted. c2 , users can flexibly set the lower limit voltage V of the hysteresis control loop width c2 .

[0053] In order to realize the hysteresis control of the pumping voltage, in an optional implementation manner, as Figure 1 and Figure 2 As shown, the above device also includes:

[0054] The first logic operation unit is located between the output end of the first DC bus detection unit and the first switch Q B The first logic operation unit includes a first diode D1, a second diode D2 and a first current limiting resistor R9, an anode of the first diode D1 is electrically connected to the output end of the first DC bus detection unit, and a cathode of the first diode D1 is electrically connected to the first switch Q B The control terminal EN is electrically connected to the first current limiting resistor R9, one end of the first current limiting resistor R9 is connected to the cathode of the second diode D2 and the first switch Q B The other end of the first current limiting resistor R9 is electrically connected to the negative electrode of the DC power supply;

[0055] The second logic operation unit is located between the output end of the second DC bus detection unit and the first switch QB The second logic operation unit includes a third diode D3, a fourth diode D4 and a second current limiting resistor R 10 , the second current limiting resistor R 10 One end of the DC power supply is connected to the positive electrode V cc The second current limiting resistor R 10 The other end of the diode D2 is electrically connected to the anode of the second diode D2, the anode of the third diode D3 and the anode of the fourth diode D4 respectively, the cathode of the third diode D3 is electrically connected to the common end of the inverter resistor R8 and the second switch Q1, and the cathode of the fourth diode D4 is electrically connected to the common end of the first switch Q B The control terminal EN is electrically connected.

[0056] In the above implementation mode, if Figure 3 As shown in the figure, when the motor is braking, part of its kinetic energy will be converted into electrical energy and fed back to the DC bus, which is then fed back to the DC bus capacitor C. E Absorption, at this time the DC bus capacitor C E The two ends generate a pump-up voltage. The circuit can be discussed in the following cases according to the pump-up voltage: DCO >V C1 When the DC bus DCP reaches the upper limit of the loop width, the first bus detection unit will output a high level with a voltage of V CC , the first diode D1 is turned on; and the second diode D2, whether it is turned on or off, the voltage at the EN terminal is V CC -V f , where V f is the tube voltage drop of the first diode D1; at this time, the first switch Q B Turn on and start to supply power to the load (power resistor) R E Discharge pump voltage. For the second bus detection unit, it will output a low level, the second switch Q1 is turned off, and the cathode of the third diode D3 is a high level, and the voltage is V CC , the third diode D3 is cut off; the cathode of the fourth diode D4 is connected to the EN terminal, so the cathode of the fourth diode D4 is high level, and the voltage is V CC -V f , the fourth diode D4 is turned off; since the third diode D3 and the fourth diode D4 are turned off at the same time, the anode of the second diode D2 is pulled up to V CC , the second diode D2 is turned on. When V C2 <V DCO <V C1There are two cases for discussion: ① When EN is high, that is, the pump-up voltage is in the discharge state, and the fourth diode D4 is cut off; for the first bus detection unit, it will output a low level, and the first diode D1 is cut off; for the second bus detection unit, it will output a low level, the second switch Q1 is turned off, and the third diode D3 is cut off; since the third diode D3 and the fourth diode D4 are cut off at the same time, the anode of the second diode D2 is pulled up to V CC , the second diode D2 is turned on. The EN terminal remains high, and the first switch Q B Continuously conduct, continue to load (power resistor) R E ② When EN is at a low level, that is, the pump-up voltage is not in a discharge state, the cathode of the fourth diode D4 is at a low level, and the fourth diode D4 is turned on, so the anode of the second diode D2 is at a low level, so the third diode D3 is turned on or off, and the second diode D2 is turned off; for the first bus detection unit, it will output a low level, and the first diode D1 is turned off; since the first diode D1 and the second diode D2 are turned off at the same time, the EN terminal voltage is pulled down to a low level, and the first switch Q B Keep off, no voltage discharge is required; for the second bus detection unit, it will output a low level, the second switch Q1 is turned off, and the third diode D3 is turned off; when V DCO <V C2 When the DC bus reaches the lower limit of the loop width, the first bus detection unit will output a low level, and the first diode D1 will be cut off; the second bus detection unit will output a high level, the second switch Q1 will be turned on, the cathode of the third diode D3 will be low level, the third diode D3 will be turned on, and the anode of the second diode D2 will be low level; therefore, no matter whether the fourth diode D4 is turned on or off, the second diode D2 is in the off state, the EN terminal always maintains a low level, and the first switch Q B By shutting down and not discharging the voltage, the pump-up voltage can be controlled within the upper and lower limits of the hysteresis control loop width.

[0057] In the present embodiment, a power system is provided, comprising: a DC bus, a DC bus capacitor, a motor with a potential load, an inverter, and any one of the above-mentioned pump-up voltage discharge devices, wherein one end of the above-mentioned DC bus capacitor is electrically connected to the positive electrode of the above-mentioned DC bus, the other end of the above-mentioned DC bus capacitor is electrically connected to the negative electrode of the above-mentioned DC bus, and the above-mentioned DC bus is electrically connected to the above-mentioned inverter corresponding to the above-mentioned motor with a potential load.

[0058] In the above power system, the DC bus, the DC bus capacitor, the motor with potential load, and the inverter, when the motor is in braking operation, part of its kinetic energy will be converted into electrical energy and fed back to the DC bus, and absorbed by the DC bus capacitor. At this time, a pump-up voltage is generated at both ends of the DC bus capacitor, and the discharge device of the above pump-up voltage is required to perform hysteresis control of the pump-up voltage. The above power system can be a power mechanism such as a vehicle, such as Figure 2 As shown, the DC bus can also be connected to a rectifier, and the rectifier provides DC power.

[0059] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0060] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0061] In the discharge device of the pump-up voltage of the DC bus capacitor of the present application, the discharge circuit and the DC bus capacitor form a discharge loop, and the discharge of the pump-up voltage can be achieved as long as the first switch is turned on. The first DC bus detection unit compares the voltage of the DC bus capacitor and the upper limit voltage of the hysteresis control loop width, and when the voltage of the DC bus capacitor is greater than the upper limit voltage of the hysteresis control loop width, that is, the pump-up voltage exceeds the limit, it outputs a high level to control the first switch to be turned on, thereby achieving real-time discharge of the pump-up voltage, so that the pump-up voltage is controlled below the upper limit voltage of the hysteresis control loop width. Compared with software control, the discharge of the pump-up voltage controlled by hardware is more timely and reliable, which solves the problem of delayed discharge risk in the discharge of the pump-up voltage controlled by software in the prior art.

[0062] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A discharge device for a pumped voltage of a DC bus capacitor, characterized in that: One end of the DC bus capacitor is electrically connected to the positive electrode of the DC bus, the other end of the DC bus capacitor is electrically connected to the negative electrode of the DC bus, the DC bus is electrically connected to the inverter corresponding to the motor with potential load, and the device includes: A discharge circuit, comprising a first switch and a load connected in series, wherein one end of the discharge circuit is electrically connected to the positive electrode of the DC bus, and the other end of the discharge circuit is electrically connected to the negative electrode of the DC bus, forming a discharge loop with the DC bus capacitor; A first DC bus detection unit, wherein the input end of the first DC bus detection unit is electrically connected to the positive electrode of the DC bus, the output end of the first DC bus detection unit is electrically connected to the control end of the first switch, and when the voltage of the DC bus capacitor is greater than the upper limit voltage of the hysteresis control loop width, the output end of the first DC bus detection unit outputs a high level to control the first switch to be turned on.

2. The device according to claim 1, characterized in that The first DC bus detection unit comprises: A first operational amplifier chip, wherein the in-phase terminal of the first operational amplifier chip is electrically connected to the positive pole of the DC bus, the inverting terminal of the first operational amplifier chip is electrically connected to the first reference voltage input terminal, the output terminal of the first operational amplifier chip is the output terminal of the first DC bus detection unit, and the first reference voltage input terminal is used to input the upper limit voltage of the hysteresis control loop width.

3. The device according to claim 2, characterized in that The first DC bus detection unit also includes a first variable resistor and a first voltage-dividing resistor, the first variable resistor and the first voltage-dividing resistor are connected in series at both ends of the DC power supply, and a common end of the first variable resistor and the first voltage-dividing resistor is the first reference voltage input end.

4. The device according to claim 2, characterized in that The first DC bus detection unit further includes a first sliding rheostat, two lower terminals of the first sliding rheostat are electrically connected to two ends of a DC power supply respectively, and an upper terminal of the first sliding rheostat is the first reference voltage input terminal.

5. The device according to claim 1, characterized in that The device also includes: a second DC bus detection unit, wherein an input end of the second DC bus detection unit is electrically connected to the DC bus positive electrode, and when the voltage of the DC bus capacitor is less than the lower limit voltage of the hysteresis control loop width, an output end of the second DC bus detection unit outputs a high level; The inverter comprises an inverter resistor and a second switch, wherein a control end of the second switch is electrically connected to an output end of the second DC bus detection unit, the inverter resistor and the second switch are connected in series at two ends of a DC power supply, and a common end of the inverter resistor and the second switch is electrically connected to a control end of the first switch.

6. The device according to claim 5, characterized in that The second DC bus detection unit includes: A second operational amplifier chip, wherein the inverting terminal of the second operational amplifier chip is electrically connected to the positive pole of the DC bus, the non-inverting terminal of the second operational amplifier chip is electrically connected to the second reference voltage input terminal, the output terminal of the second operational amplifier chip is the output terminal of the second DC bus detection unit, and the second reference voltage input terminal is used to input the lower limit voltage of the hysteresis control loop width.

7. The device according to claim 6, characterized in that The second DC bus detection unit also includes a second variable resistor and a second voltage-dividing resistor, the second variable resistor and the second voltage-dividing resistor are connected in series at both ends of the DC power supply, and the common end of the second variable resistor and the second voltage-dividing resistor is the second reference voltage input end.

8. The device according to claim 6, characterized in that The second DC bus detection unit also includes a second sliding rheostat, two lower terminals of the second sliding rheostat are electrically connected to two ends of the DC power supply respectively, and the upper terminal of the second sliding rheostat is the second reference voltage input terminal.

9. The device according to claim 5, characterized in that The device also includes: a first logic operation unit, located on a line between an output end of the first DC bus detection unit and a control end of the first switch, the first logic operation unit comprising a first diode, a second diode and a first current limiting resistor, an anode of the first diode being electrically connected to the output end of the first DC bus detection unit, a cathode of the first diode being electrically connected to the control end of the first switch, one end of the first current limiting resistor being electrically connected to the cathode of the second diode and the control end of the first switch respectively, and the other end of the first current limiting resistor being electrically connected to a negative electrode of the DC power supply; A second logic operation unit is located on a line between an output end of the second DC bus detection unit and a control end of the first switch. The second logic operation unit includes a third diode, a fourth diode and a second current limiting resistor. One end of the second current limiting resistor is electrically connected to the positive electrode of the DC power supply, and the other end of the second current limiting resistor is electrically connected to the anode of the second diode, the anode of the third diode and the anode of the fourth diode respectively. The cathode of the third diode is electrically connected to the common end of the inverter resistor and the second switch, and the cathode of the fourth diode is electrically connected to the control end of the first switch.

10. A power system, characterized in that: include: A DC bus, a DC bus capacitor, a motor with a potential load, an inverter, and a discharge device for a pumped voltage of a DC bus capacitor as described in any one of claims 1 to 9, wherein one end of the DC bus capacitor is electrically connected to the positive electrode of the DC bus, the other end of the DC bus capacitor is electrically connected to the negative electrode of the DC bus, and the DC bus is electrically connected to the inverter corresponding to the motor with a potential load.

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