A power amplifier circuit and a radio frequency chip

Abstract

The present invention is applicable to the field of wireless communication technology, and in particular, relates to a power amplifier circuit and a radio frequency chip, including a power amplifier circuit, an input matching network, a power amplifier, a linear bias circuit and a power detection circuit; the power detection circuit is used to obtain the output power envelope signal of the power amplifier, and output the output power envelope signal to the linear bias circuit, and the linear bias circuit is used to provide a bias voltage for the power amplifier according to the output power envelope signal. Compared with the prior art, the present invention can adjust the bias state of the power amplifier according to the size of the radio frequency power, and can make the power amplifier enter a low bias state in the low power area to improve the back-off efficiency, and appropriately raise the bias in the high power area to ensure that the power amplifier has sufficient power output to meet the linear requirements, thereby maximizing the performance of the power amplifier, and improving the back-off efficiency of the power amplifier while meeting the linearity index.

Description

Technical Field

[0001] The present invention is applicable to the field of wireless communication technology, and in particular relates to a power amplifier circuit and a radio frequency chip. Background Art

[0002] In recent years, the emergence of 5G has raised the communication capacity and data transmission rate of wireless communication networks to an unprecedented level. The new communication technology and application scenarios have brought people a new communication experience, but for the RF transceiver at the core of the communication system, it faces more severe performance challenges. As the module with the largest energy consumption in the transmitter, the performance of the power amplifier plays a vital role in the entire RF transmitter system. In order to provide higher data transmission rates, 5G uses more complex modulation technology, which leads to a further increase in the peak average power ratio (PAPR) of 5G signals compared to 3G and 4G signals. Such high peak average power ratio signals require the power amplifier to have better linearity, and better linearity usually requires the power amplifier to work in a deeper back-off area at the expense of efficiency. Therefore, high linearity power amplifiers with high back-off efficiency have naturally become one of the hot spots in the context of 5G.

[0003] One of the most widely used methods to improve the efficiency of the power amplifier back-off zone is envelope tracking technology (ET), which adjusts the bias voltage of the power amplifier according to the input RF power so that the power amplifier always works in a saturated state, thereby effectively improving the average efficiency of the power amplifier over the entire power range. However, since the RF signals currently used often have a higher envelope bandwidth, envelope tracking requires a very fast high-bandwidth power supply.

[0004] In order to improve the linearity of the power amplifier in the high-power area, the existing power amplifier circuit often sets an active linear bias circuit to effectively avoid the distortion problem caused by the clamping effect of the diode. However, the bypass capacitor in the active linear bias circuit needs to be set appropriately, and the bypass capacitor is injected into the path of the linear bias circuit as an RF signal, and its capacitance value will directly affect the size of the input. If the bypass capacitor is too large, the impedance of the bias circuit will be reduced, and too much RF signal will be coupled into the bias circuit, thereby causing additional insertion loss for the entire power amplifier; if the bypass capacitor is set too small, it may cause this bias circuit to be difficult to play the due linearization effect.

[0005] Therefore, there is an urgent need for a new power amplifier circuit and radio frequency chip to solve the above technical problems. Summary of the invention

[0006] The present invention provides a power amplifier circuit and a radio frequency chip, aiming to improve the linearity and performance of the power amplifier.

[0007] In a first aspect, the present invention provides a power amplifier circuit, comprising an input matching network, a power amplifier, a linear bias circuit and a power detection circuit, wherein the input end of the input matching network is used to receive a radio frequency signal, the output end of the input matching network is connected to the input end of the power amplifier, the output end of the power amplifier is used to output a signal, the input end of the power detection circuit is connected to the output end of the power amplifier, the output end of the power detection circuit is connected to the input end of the linear bias circuit, and the output end of the linear bias circuit is connected to the input end of the power amplifier; the power detection circuit is used to obtain an output power envelope signal of the power amplifier, and output the output power envelope signal to the linear bias circuit, and the linear bias circuit is used to provide a bias voltage for the power amplifier according to the output power envelope signal;

[0008] The power detection circuit comprises a matching circuit, a current mirror circuit and a filter circuit, wherein the input end of the matching circuit serves as the input end of the power detection circuit, the output end of the matching circuit is connected to the input end of the current mirror circuit, the output end of the current mirror circuit is connected to the input end of the filter circuit, and the output end of the filter circuit serves as the output end of the power detection circuit; the current mirror circuit is used to amplify the radio frequency signal, and the filter circuit is used to extract the output power envelope signal from the radio frequency signal amplified by the current mirror circuit and output it to the linear bias circuit;

[0009] The linear bias circuit includes a coupling capacitor, and the coupling capacitor is used to dynamically adjust the capacitance value thereof according to the output power envelope signal, so as to dynamically adjust the bias voltage output by the linear bias circuit.

[0010] Preferably, the matching circuit includes a first resistor and a first capacitor, the first end of the first capacitor serves as the input end of the matching circuit, the second end of the first capacitor serves as the output end of the matching circuit, the first end of the first resistor is connected to the second end of the first capacitor, and the second end of the first resistor is grounded.

[0011] Preferably, the current mirror circuit includes a first transistor, a second transistor and a third transistor, the emitter of the first transistor serves as the input end of the current mirror circuit, the base of the first transistor is connected to a first external power supply voltage, the collector of the first transistor is connected to the emitter of the second transistor, the collector of the second transistor is connected to a second external power supply voltage, the base of the second transistor is respectively connected to the base of the third transistor and the collector of the third transistor, the collector of the third transistor is connected to the second external power supply voltage, and the emitter of the third transistor serves as the output end of the current mirror circuit.

[0012] Preferably, the filtering circuit includes a first inductor, a second inductor and a second capacitor, the first end of the first inductor serves as the input end of the filtering circuit, the second end of the first inductor is respectively connected to the first end of the second inductor and the first end of the second capacitor, the second capacitor is grounded, and the second end of the second inductor serves as the output end of the filtering circuit.

[0013] Preferably, the filtering circuit further includes a second resistor, a first end of the second resistor is connected to the first end of the first inductor, and a second end of the second resistor is grounded.

[0014] Preferably, the linear bias circuit further includes a fourth transistor, a fifth transistor, a sixth transistor, a third resistor and a fourth resistor, the first end of the third resistor serves as the input end of the linear bias circuit, the second end of the third resistor is respectively connected to the base of the fourth transistor, the collector of the fifth transistor, the base of the fifth transistor and the first end of the coupling capacitor, the collector of the fourth transistor is connected to the first end of the third resistor, the emitter of the fourth transistor is connected to the first end of the fourth resistor, the second end of the coupling capacitor serves as the first output end of the linear bias circuit, the second end of the fourth resistor serves as the second output end of the linear bias circuit, the emitter of the fifth transistor is respectively connected to the base of the sixth transistor and the collector of the sixth transistor, and the emitter of the sixth transistor is grounded.

[0015] Preferably, the input matching network comprises a third capacitor, a first end of the third capacitor serves as an input end of the input matching network, and a second end of the third capacitor serves as an output end of the input matching network.

[0016] Preferably, the power amplifier comprises a seventh transistor, the base of the seventh transistor serves as the input end of the power amplifier, the emitter of the seventh transistor is grounded, and the collector of the seventh transistor serves as the output end of the power amplifier.

[0017] In a second aspect, the present invention further provides a radio frequency chip, wherein the radio frequency chip comprises a power amplifier circuit as described in any one of the above embodiments.

[0018] Compared with the prior art, the present invention uses a power amplifier circuit, including an input matching network, a power amplifier, a linear bias circuit and a power detection circuit, wherein the input end of the input matching network is used to receive a radio frequency signal, the output end of the input matching network is connected to the input end of the power amplifier, the output end of the power amplifier is used to output a signal, the input end of the power detection circuit is connected to the output end of the power amplifier, the output end of the power detection circuit is connected to the input end of the linear bias circuit, and the output end of the linear bias circuit is connected to the input end of the power amplifier; the power detection circuit is used to obtain the output power envelope signal of the power amplifier, and output the output power envelope signal to the linear bias circuit, and the linear bias circuit is used to provide a bias voltage for the power amplifier according to the output power envelope signal. The present invention can adjust the bias state of the power amplifier according to the size of the radio frequency power, and can make the power amplifier enter a low bias state in a low power region to improve the back-off efficiency, and appropriately raise the bias in a high power region to ensure that the power amplifier has sufficient power output to meet the linear requirements, thereby maximizing the performance of the power amplifier, and improving the back-off efficiency of the power amplifier while meeting the linearity index. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings:

[0020] Figure 1 is a schematic diagram of the overall circuit structure of a power amplifier circuit provided by an embodiment of the present invention;

[0021] Figure 2 It is a circuit structure diagram of an input matching network, a power amplifier and a linear bias circuit of a power amplifier circuit provided in an embodiment of the present invention;

[0022] Figure 3 It is a schematic diagram of the structure of a power detection circuit of a power amplifier circuit provided in an embodiment of the present invention.

[0023] In the figure, 100, power amplifier circuit, 1, input matching network, 2, power amplifier, 3, power detection circuit, 31, input matching circuit, 32, current mirror circuit, 33, filter circuit, 4, linear bias circuit. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0025] Embodiment 1

[0026] Please refer to Figure 1-Figure 3 The present invention provides a power amplifier circuit 100, comprising an input matching network 1, a power amplifier 2, a linear bias circuit 4 and a power detection circuit 3, wherein the input end of the input matching network 1 is used to receive a radio frequency signal (RFin), the output end of the input matching network 1 is connected to the input end of the power amplifier 2, the output end of the power amplifier 2 is used to output a signal (RFout), the input end of the power detection circuit 3 is connected to the output end of the power amplifier 2, the output end of the power detection circuit 3 is connected to the input end of the linear bias circuit 4, and the output end of the linear bias circuit 4 is connected to the input end of the power amplifier 2; the power detection circuit 3 is used to obtain the output power envelope signal of the power amplifier 2, and output the output power envelope signal (Vb1) to the linear bias circuit 4, and the linear bias circuit 4 is used to provide a bias voltage for the power amplifier 2 according to the output power envelope signal. Among them, the output power envelope signal refers to the output voltage envelope signal that can reflect the output power of the power amplifier.

[0027] The power detection circuit 3 includes a matching circuit 31, a current mirror circuit 32 and a filter circuit 33, wherein the input end of the matching circuit 31 serves as the input end of the power detection circuit 3, the output end of the matching circuit 31 is connected to the input end of the current mirror circuit 32, the output end of the current mirror circuit 32 is connected to the input end of the filter circuit 33, and the output end of the filter circuit 33 serves as the output end of the power detection circuit 3; the current mirror circuit 32 is used to amplify the radio frequency signal, and the filter circuit 33 is used to extract the output power envelope signal from the radio frequency signal amplified by the current mirror circuit 32 and output it to the linear bias circuit 4;

[0028] The linear bias circuit 4 includes a coupling capacitor C4 , and the coupling capacitor C4 is used to dynamically adjust its capacitance value according to the output power envelope signal, so as to dynamically adjust the bias voltage output by the linear bias circuit 4 .

[0029] In the embodiment of the present invention, the matching circuit 31 includes a first resistor R1 and a first capacitor C1, the first end of the first capacitor C1 serves as the input end of the matching circuit 31, the second end of the first capacitor C1 serves as the output end of the matching circuit 31, the first end of the first resistor R1 is connected to the second end of the first capacitor C1, and the second end of the first resistor R1 is grounded.

[0030] In the embodiment of the present invention, the current mirror circuit 32 includes a first transistor HBT1, a second transistor HBT2 and a third transistor HBT3, the emitter of the first transistor HBT1 serves as the input end of the current mirror circuit 32, the base of the first transistor HBT1 is connected to the first external power supply voltage Vb2, the collector of the first transistor HBT1 is connected to the emitter of the second transistor HBT2, the collector of the second transistor HBT2 is connected to the second external power supply voltage Vb3, the base of the second transistor HBT2 is respectively connected to the base of the third transistor HBT3 and the collector of the third transistor HBT3, the collector of the third transistor HBT3 is connected to the second external power supply voltage Vb3, and the emitter of the third transistor HBT3 serves as the output end of the current mirror circuit 32.

[0031] In the embodiment of the present invention, the filtering circuit 33 includes a first inductor, a second inductor and a second capacitor C2, the first end of the first inductor serves as the input end of the filtering circuit 33, the second end of the first inductor is respectively connected to the first end of the second inductor and the first end of the second capacitor C2, the second capacitor C2 is grounded, and the second end of the second inductor serves as the output end of the filtering circuit 33.

[0032] In the embodiment of the present invention, the filtering circuit 33 further includes a second resistor R2, a first end of the second resistor R2 is connected to the first end of the first inductor, and a second end of the second resistor R2 is grounded.

[0033] In the embodiment of the present invention, the linear bias circuit 4 further includes a fourth transistor HBT4, a fifth transistor HBT5, a sixth transistor HBT6, a third resistor R3 and a fourth resistor R4, the first end of the third resistor R3 serves as the input end of the linear bias circuit 4, the second end of the third resistor R3 is respectively connected to the base of the fourth transistor HBT4, the collector of the fifth transistor HBT5, the base of the fifth transistor HBT5 and the first end of the coupling capacitor C4, the collector of the fourth transistor HBT4 is connected to the first end of the third resistor R3, the emitter of the fourth transistor HBT4 is connected to the first end of the fourth resistor R4, the second end of the coupling capacitor C4 serves as the first output end of the linear bias circuit 4, the second end of the fourth resistor R4 serves as the second output end of the linear bias circuit 4, the emitter of the fifth transistor HBT5 is respectively connected to the base of the sixth transistor HBT6 and the collector of the sixth transistor HBT6, and the emitter of the sixth transistor HBT6 is grounded.

[0034] In the embodiment of the present invention, the input matching network 1 includes a third capacitor C3 , a first end of the third capacitor C3 serves as an input end of the input matching network 1 , and a second end of the third capacitor C3 serves as an output end of the input matching network 1 .

[0035] In an embodiment of the present invention, the power amplifier 2 includes a seventh transistor HBT7, the base of the seventh transistor HBT7 serves as the input end of the power amplifier 2, the emitter of the seventh transistor HBT7 is grounded, and the collector of the seventh transistor HBT7 serves as the output end of the power amplifier 2.

[0036] Specifically, the power detection circuit 3 is used to collect the output power envelope signal of the power amplifier 2, and load the output power envelope signal on the DC feed end of the linear bias circuit 4 (i.e., the input end of the linear bias circuit 4), so that this voltage is controlled by the size of the RF power: in the low power region, the power amplifier 2 enters a low bias state to improve the back-off efficiency, and in the high power region, the bias is appropriately raised to ensure sufficient power output to meet the linear requirements. By setting the coupling capacitor C4 in the linear bias circuit 4, dynamic adjustment can be performed, which effectively overcomes the disadvantage that the linear bias capacitor cannot be adjusted once selected in the prior art solution, thereby reducing the performance of the power amplifier 2.

[0037] When the first transistor HBT1 is turned on, the RF signal enters the first transistor HBT1 and is amplified by the current mirror composed of the second transistor HBT2 and the third transistor HBT3, and passes through the filter circuit 33 (low-pass network) composed of the first inductor, the second inductor and the second capacitor C2, and outputs a signal that can reflect the output power envelope of the power amplifier 2. The bias state of the linear bias circuit 4 is controlled by this voltage, thereby adjusting the working state of the power amplifier 2 according to the output power, ensuring high linearity while improving the efficiency of the power amplifier 2 in the back-off power area.

[0038] In the specific implementation process, firstly, it is necessary to dynamically adjust the capacitance value of the coupling capacitor C4. In the linear bias circuit 4, the fifth transistor HBT5 and the sixth transistor HBT6 can be connected in series to form a series varactor diode. By changing the voltage applied to both ends of the varactor outside the chip, the capacitance value in the coupling path is changed to obtain the best capacitance value, so that the power amplifier 2 can play the best performance. In addition, it is necessary to set the power supply voltage Vb2 connected to the base of the first transistor HBT1 at a suitable value so that the base-emitter junction voltage of the first transistor HBT1 is close to the turn-on voltage of the series varactor diode. When the RF current injected into this circuit from the output end of the power amplifier 2 is positive, the first transistor HBT1 is turned off, and the RF signal is short-circuited to the ground through the first resistor R1; when the RF current injected into this circuit from the output end of the power amplifier 2 is negative, the first transistor HBT1 is turned on, and the RF signal enters the first transistor HBT1 and is amplified through the current mirror composed of the second transistor HBT2 and the third transistor HBT3. Figure 3 A voltage Vout is generated at the A node in the circuit, and this voltage passes through a filter circuit 33 (low-pass network) composed of a first inductor, a second inductor and a second capacitor C2, and outputs a voltage envelope signal that can reflect the output power of the power amplifier 2. This voltage is loaded on the Vb1 node of the linear bias circuit 4. At this time, the bias state of the power amplifier 2 is controlled by the output power: in the low power region, the power amplifier 2 enters a low bias state to improve the back-off efficiency, and in the high power region, the bias is appropriately raised to ensure sufficient power output to meet the linear requirements.

[0039] Compared with the prior art, the present invention uses a power amplifier circuit, including an input matching network, a power amplifier, a linear bias circuit and a power detection circuit, wherein the input end of the input matching network is used to receive a radio frequency signal, the output end of the input matching network is connected to the input end of the power amplifier, the output end of the power amplifier is used to output a signal, the input end of the power detection circuit is connected to the output end of the power amplifier, the output end of the power detection circuit is connected to the input end of the linear bias circuit, and the output end of the linear bias circuit is connected to the input end of the power amplifier; the power detection circuit is used to obtain the output power envelope signal of the power amplifier, and output the output power envelope signal to the linear bias circuit, and the linear bias circuit is used to provide a bias voltage for the power amplifier according to the output power envelope signal. The present invention can adjust the bias state of the power amplifier according to the size of the radio frequency power, and can make the power amplifier enter a low bias state in a low power region to improve the back-off efficiency, and appropriately raise the bias in a high power region to ensure that the power amplifier has sufficient power output to meet the linear requirements, thereby maximizing the performance of the power amplifier, and improving the back-off efficiency of the power amplifier while meeting the linearity index.

[0040] Embodiment 2

[0041] An embodiment of the present invention further provides a radio frequency chip, which includes the power amplifier circuit 100 as described in the above embodiment and can achieve the same technical effect. Please refer to the description in the above embodiment and will not be repeated here.

[0042] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0043] The embodiments of the present invention are described above in conjunction with the accompanying drawings. What is disclosed is only the preferred embodiment of the present invention. However, the present invention is not limited to the above-mentioned specific implementation manner. The above-mentioned specific implementation manner is only illustrative rather than restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms and equivalent changes without departing from the scope of protection of the purpose of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A power amplifier circuit, characterized in that: The invention comprises an input matching network, a power amplifier, a linear bias circuit and a power detection circuit, wherein the input end of the input matching network is used to receive a radio frequency signal, the output end of the input matching network is connected to the input end of the power amplifier, the output end of the power amplifier is used to output a signal, the input end of the power detection circuit is connected to the output end of the power amplifier, the output end of the power detection circuit is connected to the input end of the linear bias circuit, and the output end of the linear bias circuit is connected to the input end of the power amplifier; the power detection circuit is used to obtain an output power envelope signal of the power amplifier, and output the output power envelope signal to the linear bias circuit, and the linear bias circuit is used to provide a bias voltage for the power amplifier according to the output power envelope signal; The power detection circuit includes a matching circuit, a current mirror circuit and a filter circuit; the input end of the matching circuit serves as the input end of the power detection circuit, the output end of the matching circuit is connected to the input end of the current mirror circuit, the output end of the current mirror circuit is connected to the input end of the filter circuit, and the output end of the filter circuit serves as the output end of the power detection circuit; the current mirror circuit is used to amplify the radio frequency signal, and the filter circuit is used to extract the output power envelope signal from the radio frequency signal amplified by the current mirror circuit and output it to the linear bias circuit; The linear bias circuit includes a coupling capacitor, and the coupling capacitor is used to dynamically adjust its capacitance value according to the output power envelope signal to dynamically adjust the bias voltage output by the linear bias circuit; The linear bias circuit also includes a fourth transistor, a fifth transistor, a sixth transistor, a third resistor and a fourth resistor. The first end of the third resistor serves as an input end of the linear bias circuit. The second end of the third resistor is respectively connected to the base of the fourth transistor, the collector of the fifth transistor, the base of the fifth transistor and the first end of a coupling capacitor. The collector of the fourth transistor is connected to the first end of the third resistor. The emitter of the fourth transistor is connected to the first end of the fourth resistor. The second end of the coupling capacitor serves as a first output end of the linear bias circuit. The second end of the fourth resistor serves as a second output end of the linear bias circuit. The emitter of the fifth transistor is respectively connected to the base of the sixth transistor and the collector of the sixth transistor. The emitter of the sixth transistor is grounded.

2. The power amplifier circuit according to claim 1, characterized in that: The matching circuit includes a first resistor and a first capacitor, the first end of the first capacitor serves as an input end of the matching circuit, the second end of the first capacitor serves as an output end of the matching circuit, the first end of the first resistor is connected to the second end of the first capacitor, and the second end of the first resistor is grounded.

3. The power amplifier circuit according to claim 1, characterized in that: The current mirror circuit includes a first transistor, a second transistor and a third transistor, the emitter of the first transistor serves as the input end of the current mirror circuit, the base of the first transistor is used to connect to a first external power supply voltage, the collector of the first transistor is connected to the emitter of the second transistor, the collector of the second transistor is connected to a second external power supply voltage, the base of the second transistor is respectively connected to the base of the third transistor and the collector of the third transistor, the collector of the third transistor is connected to the second external power supply voltage, and the emitter of the third transistor serves as the output end of the current mirror circuit.

4. The power amplifier circuit according to claim 1, characterized in that: The filter circuit includes a first inductor, a second inductor and a second capacitor; the first end of the first inductor serves as the input end of the filter circuit, the second end of the first inductor is respectively connected to the first end of the second inductor and the first end of the second capacitor, the second capacitor is grounded, and the second end of the second inductor serves as the output end of the filter circuit.

5. The power amplifier circuit according to claim 4, characterized in that: The filter circuit further includes a second resistor, a first end of the second resistor is connected to the first end of the first inductor, and a second end of the second resistor is grounded.

6. The power amplifier circuit according to claim 1, characterized in that: The input matching network includes a third capacitor, a first end of the third capacitor serves as an input end of the input matching network, and a second end of the third capacitor serves as an output end of the input matching network.

7. The power amplifier circuit according to claim 1, characterized in that: The power amplifier comprises a seventh transistor, the base of the seventh transistor serves as the input end of the power amplifier, the emitter of the seventh transistor is grounded, and the collector of the seventh transistor serves as the output end of the power amplifier.

8. A radio frequency chip, characterized in that: The radio frequency chip includes the power amplifier circuit as described in any one of claims 1-7.

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