DCT coefficient processing circuit and method for image compression
By only obtaining the AC coefficient and run value of the previous pixel in the DCT coefficient processing circuit of image compression, the target run value is calculated, and the problem of low run encoding efficiency in the prior art is solved, and a more efficient image compression process is achieved.
Patent Information
- Application Number
- CN202411260875.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-10
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2044-09-10
AI Technical Summary
The run coding efficiency in existing image encoding is low, especially in applications that process large amounts of data or require rapid response, which requires a large amount of computing resources and poor real-time performance.
A DCT coefficient processing circuit for image compression is designed. By obtaining only the AC coefficient and run value of the previous pixel in the run statistics module, the target run value is calculated, which avoids scanning operations of multiple coefficients and optimizes the run encoding process. .
The calculation efficiency of run coding is significantly improved and the overall encoding efficiency of DCT coefficients during image compression is improved.
Smart Images

Figure CN119232953A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of image compression, and in particular to a DCT coefficient processing circuit and method for image compression. Background Art
[0002] Image compression generally includes operations such as DCT transform, quantization, zigzag scanning, run-length encoding, and post-coding processing; among them, DCT transform is the first step in image compression, which is to perform DCT transform on each small block of the image to convert the image in the spatial domain to the frequency domain. The DCT coefficients are then quantized, which reduces the accuracy of the coefficients and achieves compression. Many of the quantized coefficients become zero. The quantized DCT coefficients are rearranged by zigzag scanning, which brings all zero and non-zero coefficients together. After the zigzag scan, run-length encoding is used to further compress the data. Run-length encoding identifies consecutive zero or non-zero values and replaces these consecutive values with a count value and a single value. The encoded DCT coefficients are further entropy encoded (usually Huffman encoding) to further compress the data.
[0003] The current run-length coding in image coding is to record the number of zero values by scanning the DCT coefficients of the image row by row or column by column. However, this method is inefficient and time-consuming. Especially in applications that process large amounts of data or require fast response, it requires large computing resources and has poor real-time performance. Summary of the invention
[0004] The present application provides a DCT coefficient processing circuit and method for image compression, which only needs to obtain the AC coefficient and run-length value of the previous pixel when performing run-length coding on the current pixel, greatly improving the efficiency of run-length coding.
[0005] In a first aspect, an embodiment of the present application provides a DCT coefficient processing circuit for image compression, comprising:
[0006] An input module, used for receiving a DC coefficient of a pixel block and an AC coefficient of each pixel in the pixel block;
[0007] A coefficient code calculation module, used for calculating a DC coefficient code of a pixel block based on a DC coefficient;
[0008] The run-length statistics module includes a reference pixel register and a run-length calculation unit; the run-length calculation unit is used to:
[0009] Obtain the reference AC coefficient and the reference run value in the reference pixel register;
[0010] Determine a target run value of a current pixel according to a reference AC coefficient and a reference run value;
[0011] Replace the reference AC coefficient in the reference pixel register with the AC coefficient of the current pixel;
[0012] Replace the reference run value in the reference pixel register with the target run value of the current pixel;
[0013] A code length calculation module, used to calculate the target binary code and code length of the DC coefficient and each AC coefficient;
[0014] The output module is used to output the DC coefficient code, each target run value, each target binary code and each code length in combination.
[0015] Furthermore, the coefficient code calculation module includes a coefficient register and a coefficient code unit; the coefficient code unit is used to obtain the reference DC coefficient in the coefficient register; calculate the difference between the DC coefficient and the reference DC coefficient and use it as the DC coefficient code; replace the reference DC coefficient in the coefficient register with the DC coefficient.
[0016] Furthermore, the stroke calculation unit is specifically used to add 1 to the reference stroke value to obtain a target stroke value when the reference AC coefficient is 0 and the reference stroke value is not equal to a preset threshold; when the reference AC coefficient is 0 and the reference stroke value is equal to the preset threshold, the target stroke value is set to 0; when the reference AC coefficient is not equal to 0, the target stroke value is set to 0.
[0017] Furthermore, the code length calculation module includes:
[0018] An absolute value unit, used for taking the absolute value of the original binary code and then processing it in reverse order to obtain a first sequence; wherein the original binary code is a binary representation of a DC coefficient or an AC coefficient;
[0019] A negation unit, used to subtract 1 from the first sequence and then negate it to obtain a second sequence;
[0020] A third sequence unit, used to obtain a third sequence according to the first sequence and the second sequence;
[0021] A code length unit, used for determining an initial binary code and a code length according to a third sequence;
[0022] The binary unit is used to perform an AND operation on the original binary code and the initial binary code to obtain a target binary code.
[0023] Furthermore, the absolute value unit is used to use the reverse order of the original binary code as the first sequence when the original binary code is a positive number; when the original binary code is a negative number, invert the original binary code and add 1 to obtain the first sequence.
[0024] Furthermore, the third sequence unit is used to perform an AND operation on the first sequence and the second sequence, and then reverse the operation result and subtract 1 to obtain a third sequence.
[0025] Furthermore, the code length unit is used to use the third sequence as the initial binary code when the original binary code is a positive number; when the original binary code is a negative number, perform signal modulation on the third sequence to obtain the initial binary code; calculate the number of 1s in the third sequence, and add 1 to the number of 1s to obtain the code length.
[0026] Furthermore, the circuit also includes:
[0027] The zero value judgment module is used to obtain the AC coefficient of each pixel in the input module and judge whether there is a zero value in each AC coefficient; if yes, each AC coefficient is sent to the run statistics module;
[0028] The zero value judgment module and the coefficient code calculation module run in the same clock cycle.
[0029] In a second aspect, the embodiment of the present application further provides a DCT coefficient processing method for image compression, comprising:
[0030] receiving a DC coefficient of a pixel block and an AC coefficient of each pixel in the pixel block;
[0031] Calculate a DC coefficient code of the pixel block based on the DC coefficient;
[0032] Get the reference AC coefficient and reference run value of the previous pixel of the current pixel;
[0033] Determine a target run value of a current pixel according to a reference AC coefficient and a reference run value;
[0034] Calculate the target binary code and code length of the DC coefficient and each AC coefficient;
[0035] The DC coefficient code, each target run value, each target binary code and each code length are combined and output.
[0036] Furthermore, the above-mentioned determining the target run value of the current pixel according to the reference AC coefficient and the reference run value includes:
[0037] If the reference AC coefficient is 0 and the reference run value is not equal to the preset threshold, the reference run value is added by 1 to obtain the target run value; if the reference AC coefficient is 0 and the reference run value is equal to the preset threshold, the target run value is 0; if the reference AC coefficient is not equal to 0, the target run value is 0.
[0038] In summary, compared with the prior art, the technical solution provided in the embodiment of the present application has at least the following beneficial effects:
[0039] The embodiment of the present application provides a DCT coefficient processing circuit for image compression, wherein the run calculation unit in the run statistics module only needs to obtain the AC coefficient and run value of the previous pixel in the reference pixel register when calculating the target run value of the current pixel, without performing a scanning operation of multiple coefficients, thereby greatly speeding up the calculation efficiency of run-length coding. The above circuit improves the efficiency of run-length coding by optimizing the run-length coding process in the run statistics module, thereby improving the overall coding efficiency of DCT coefficients in the image compression process. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] Figure 1 A structural diagram of a DCT coefficient processing circuit for image compression provided by an exemplary embodiment of the present application.
[0041] Figure 2 A data flow diagram within a run statistics module provided for an exemplary embodiment of the present application.
[0042] Figure 3 A structural diagram of a DCT coefficient processing circuit for image compression provided by another exemplary embodiment of the present application.
[0043] Figure 4 A flowchart of a DCT coefficient processing method for image compression is provided as an exemplary embodiment of the present application. DETAILED DESCRIPTION
[0044] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.
[0045] Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative work shall fall within the scope of protection of this application.
[0046] Run-length encoding is used in image compression standards mainly when processing specific parts of an image, especially lossless parts of an image, such as for compressing DCT (discrete cosine transform) coefficients.
[0047] The first step in image compression is to perform a DCT transform on each small block of the image (usually 8x8 pixels) to convert the image from the spatial domain to the frequency domain. The DCT coefficients are then quantized, which reduces the precision of the coefficients and thus achieves compression. Many of the coefficients after quantization become zero. The quantized DCT coefficients are rearranged using a zigzag (or zigzag) scan, which brings all the zero and non-zero coefficients together. After the zigzag scan, run-length encoding is used to further compress the data. Run-length encoding identifies consecutive zero or non-zero values and replaces these consecutive values with a count value and a single value. The encoded coefficients are further entropy encoded (usually Huffman encoding) to further compress the data.
[0048] The DCT coefficients are quantized to obtain DC coefficients and AC coefficients, where the DC coefficient refers to the value of the first pixel in each small block (usually 8x8 pixels, but not limited to 8x8 in this application), and the AC coefficient refers to the values of the remaining 63 pixels in each small block.
[0049] Current image compression coding generally uses software algorithms to implement run-length coding. Although using software to implement run-length coding has the advantages of flexibility and portability, it also has some potential disadvantages, such as: software implementation requires more computing resources, especially in applications that process large amounts of data or require fast responses. Software implementation may consume more memory and storage resources, especially when processing large data sets, resulting in reduced overall system efficiency.
[0050] To solve the above problems, see Figure 1 , the embodiment of the present application provides a DCT coefficient processing circuit for image compression, which may specifically include the following structure:
[0051] The input module is used to receive the DC coefficient of the pixel block and the AC coefficient of each pixel in the pixel block.
[0052] The coefficient code calculation module is used to calculate the DC coefficient code of the pixel block based on the DC coefficient.
[0053] Among them, the DC coefficient code refers to the difference between the first pixel value (DC coefficient) of each pixel block and the DC coefficient of the previous pixel block; specifically, the coefficient code calculation module includes a coefficient register and a coefficient code unit; the coefficient code unit is used to obtain the reference DC coefficient in the coefficient register; calculate the difference between the DC coefficient and the reference DC coefficient, and use it as the DC coefficient code; replace the reference DC coefficient in the coefficient register with the DC coefficient.
[0054] For example, the first BLOCK (pixel block) includes data: 15, ...; the second BLOCK includes data: 17, ...; the third BLOCK includes data: 17, ...; the fourth BLOCK includes data: 16, ...; ..., then their DC coefficients are 15, 17, 17, 16, ..., and the corresponding DC coefficient codes are 15, +2, 0, -1, ... respectively.
[0055] A run statistics module includes a reference pixel register and a run calculation unit; the run calculation unit is used to obtain a reference AC coefficient and a reference run value in the reference pixel register; determine a target run value of a current pixel according to the reference AC coefficient and the reference run value; replace the reference AC coefficient in the reference pixel register with the AC coefficient of the current pixel; and replace the reference run value in the reference pixel register with the target run value of the current pixel.
[0056] Specifically, see Figure 2 The run statistics module of the present application may include multiple cascaded run calculation units, and the pixel blocks are grouped according to the number of run calculation units, and each run calculation unit receives a pixel data in the pixel group. The first run calculation unit is connected to the reference pixel register, and then receives the AC coefficient of the current pixel as the reference AC coefficient, and sends the target run value calculated based on the reference pixel register as the reference run value to the next level of run calculation unit, and so on until the last run calculation unit, the last run calculation unit uses the received AC coefficient as the reference AC coefficient, and puts the calculated target run value as the reference run value into the reference pixel register.
[0057] Before the run statistics module receives pixel data, the reference AC coefficient and the reference run value in the reference pixel register are both 0. Next, take the case where there are 8 run calculation units in the run statistics module as an example. If there are 8x8 pixels in a pixel block, they are divided into 8 groups and processed in batches, and each group has 8 pixels.
[0058] When the first set of pixel data is input into the run statistics module, 8 pixels therein are respectively input into the 8 run calculation units of the run statistics module. At this time, the reference run value and reference AC coefficient in the reference pixel register cnt[0] obtained by the first run calculation unit cnt[1] are both 0. The target run value of the first pixel of the first set of pixel data is calculated based on the two 0 values. Then the target run value of the first pixel is used as the reference run value, and the AC coefficient of the first pixel is sent to the second run calculation unit cnt[2] as the reference AC coefficient. And so on. After all 8 run calculation units have completed the calculation, the AC coefficient and target run value output by the last run calculation unit cnt buf are put into the reference pixel register cnt[0] as the reference AC coefficient and reference run value. When the next set of pixel data comes in, the first run calculation unit cnt[1] obtains the AC coefficient and target run value of the last pixel of the previous set when calculating the target run value of the first pixel of the next set of pixel data. The last stroke calculation unit cnt buf can also be used to obtain the target stroke values calculated by the previous 7 stroke calculation units and its own calculated target stroke values for storage. After the stroke values of each group of pixel data of the pixel block are all calculated, the stored target stroke values are sent to the output module.
[0059] It can be understood that the number of run calculation units in the run statistics module can be one or more; when the number of run calculation units is one, the pixels in the pixel block are input one by one into the run calculation unit of the run statistics module for calculation, and the number of calculations to be performed by a run calculation unit is equal to the number of pixels in the pixel block; when the number of run calculation units is n, the pixel block is divided into batches of n pairs of pixels to obtain m groups of pixel data, each group of pixel data has n pixels, and the pixel data is input into the run statistics module one by one for run statistics, and the number of calculations that each run calculation unit in the run statistics module needs to perform is equal to the number of batches of pixel data, that is, m.
[0060] The code length calculation module is used to calculate the target binary code and code length of the DC coefficient and each AC coefficient.
[0061] The output module is used to combine and output the DC coefficient code, each target run value, each target binary code and each code length. Finally, the data output by the output module will enter the next step of image compression, entropy coding.
[0062] Each module in the above-mentioned DCT coefficient processing circuit can be obtained by appropriately combining an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices or discrete gates or transistor logic devices.
[0063] In the DCT coefficient processing circuit for image compression provided by the above embodiment, the run calculation unit in the run statistics module only needs to obtain the AC coefficient and run value of the previous pixel in the reference pixel register when calculating the target run value of the current pixel, without performing a scanning operation of multiple coefficients, thereby greatly speeding up the calculation efficiency of run-length coding. The above circuit improves the efficiency of run-length coding by optimizing the run-length coding process in the run statistics module, thereby improving the overall coding efficiency of DCT coefficients in the image compression process.
[0064] In some embodiments, the stroke calculation unit is specifically used to add 1 to the reference stroke value to obtain a target stroke value when the reference AC coefficient is 0 and the reference stroke value is not equal to a preset threshold; when the reference AC coefficient is 0 and the reference stroke value is equal to the preset threshold, the target stroke value is set to 0; when the reference AC coefficient is not equal to 0, the target stroke value is set to 0.
[0065] Among them, the preset threshold is determined by the number of run-length encoding bits used in the image format; taking JPEG as an example, because JPEG encoding uses 4 bits to represent the number of consecutive 0s, its maximum value is 15, that is, the maximum run-length value is 15, so when the pixel block is in JPEG format, the pixel block includes 64 pixels; the preset threshold is 15.
[0066] Specifically, when the AC coefficient of the previous pixel is 0 and the run value is equal to 15, it means that the previous data is the 16th 0 value (the maximum value of JPEG run-length encoding has been reached), then the run value of the current pixel is cut to 0 and the counting starts again.
[0067] The above embodiment uses a preset threshold to limit the run-length encoding because the run-length encoding bit numbers provided by images of different formats are different, that is, the present application can achieve image encoding of different formats by setting a preset threshold.
[0068] In some embodiments, the code length calculation module includes:
[0069] The absolute value unit is used to take the absolute value of the original binary code and then process it in reverse order to obtain a first sequence.
[0070] The original binary code is a binary representation of a DC coefficient or an AC coefficient.
[0071] Specifically, the absolute value unit is used to take the reverse order of the original binary code as the first sequence when the original binary code is a positive number; when the original binary code is a negative number, invert the original binary code and add 1 to obtain the first sequence.
[0072] The negation unit is used to subtract 1 from the first sequence and then negate it to obtain a second sequence.
[0073] The third sequence unit is used to obtain a third sequence according to the first sequence and the second sequence. Specifically, the third sequence unit is used to perform an AND operation on the first sequence and the second sequence, and then reverse the operation result and subtract 1 to obtain the third sequence.
[0074] The code length unit is used to determine the initial binary code and the code length according to the third sequence. Specifically, the code length unit is used to use the third sequence as the initial binary code when the original binary code is a positive number; when the original binary code is a negative number, perform signal modulation on the third sequence to obtain the initial binary code; calculate the number of 1s in the third sequence, and add 1 to the number of 1s to obtain the code length.
[0075] The binary unit is used to perform an AND operation on the original binary code and the initial binary code to obtain a target binary code.
[0076] The code length calculation module in the above embodiment takes into account the situation that both coefficients after DCT transformation may have negative values. Therefore, when performing code length calculation, the absolute values of the original binary codes of the two coefficients are taken and then processed, thereby realizing binary encoding and code length calculation of positive and negative coefficients.
[0077] The calculation process of the above code length calculation module is demonstrated by a specific example:
[0078] The DC coefficient and AC coefficient are usually 8-bit binary data. Assume that the original binary code of the DC coefficient or AC coefficient of the code length to be calculated is 11111010, which is converted to decimal -6, a negative number. The absolute value becomes 00000110, and the corresponding decimal is 6. The process of taking the absolute value of a negative number can be AND / OR with a certain number, or it can be the inverse of the negative number and then adding 1.
[0079] Reverse the sequence of 00000110 to get 01100000 as the first sequence.
[0080] Subtract 1 from the first sequence and then invert it to get 10100000, which is the second sequence. Perform an AND operation on the second sequence and the original first sequence, that is, 01100000&10100000=00100000, and then subtract 1 from 00100000 to get 00000011, which is the third sequence.
[0081] Because the original binary code is a negative number, the third sequence is subjected to mask signal processing to become 00000111, i.e., the initial binary code; the initial binary code and the original binary code are ANDed, 11111010&00000111=00000110.
[0082] The mask signal processing is to take the lower 7 bits of the original sequence and then add a 1 to the last bit to obtain a new 8-bit binary number. In the above embodiment, the lower 7 bits of the third sequence are 0000011, and 1 is added to the last bit to obtain 00000111.
[0083] After the above calculation, it can be obtained that the target binary code of the original binary code is 00000110, and the target code length is the number of 1s in the third sequence plus 1. There are 2 1s in the third sequence, so the target code length is 2+1=3.
[0084] Through the above process, the target binary code and code length of the DC coefficient and AC coefficient can be obtained within one clock cycle.
[0085] See also Figure 3 In some embodiments, the circuit may further include a zero value judgment module, which is respectively connected to the input module and the run statistics module; the zero value judgment module is used to obtain the AC coefficient of each pixel in the input module and determine whether there is a zero value in each AC coefficient; if so, each AC coefficient is sent to the run statistics module.
[0086] Specifically, the quantization step in the image compression process uses a quantization table to quantize the DCT coefficients, and the quantized AC coefficients are usually integers. In this process, if the quantized AC coefficient value becomes zero, then these AC coefficients will be considered as zero values by the zero value judgment module; that is, the zero value judgment module is to identify the AC coefficients that are 0 after quantization. Therefore, if there are no AC coefficients of 0 in the input data, the calculation of the run statistics module 103 can be omitted, and the DC coefficient code and the target binary code and code length of the two coefficients can be directly output, saving a lot of time.
[0087] When a zero value judgment module is provided, the zero value judgment module and the coefficient code calculation module run in the same clock cycle, and the run statistics and the coefficient code length calculation are performed in the same clock cycle; at this time, the entire pipeline only needs two clock cycles to complete the DCT coefficient processing of the input data, which significantly improves the coding efficiency of the DCT coefficient.
[0088] See also Figure 4 , the present application also provides a DCT coefficient processing method for image compression, comprising:
[0089] Step S1, receiving a DC coefficient of a pixel block and an AC coefficient of each pixel in the pixel block.
[0090] Step S2, calculating the DC coefficient code of the pixel block based on the DC coefficient.
[0091] Step S3, obtaining the reference AC coefficient and reference run value of the previous pixel of the current pixel.
[0092] Step S4, determining the target run value of the current pixel according to the reference AC coefficient and the reference run value.
[0093] Step S5, calculating the target binary code and code length of the DC coefficient and each AC coefficient.
[0094] Step S6, the DC coefficient code, each target run value, each target binary code and each code length are combined and output.
[0095] In some embodiments, the DC coefficient code of the pixel block is calculated based on the DC coefficient, including: obtaining a reference DC coefficient of a previous pixel block; and calculating a difference between the DC coefficient and the reference DC coefficient as the DC coefficient code.
[0096] In some embodiments, the above-mentioned determining the target run value of the current pixel according to the reference AC coefficient and the reference run value includes:
[0097] If the reference AC coefficient is 0 and the reference run value is not equal to the preset threshold, the reference run value is added by 1 to obtain the target run value; if the reference AC coefficient is 0 and the reference run value is equal to the preset threshold, the target run value is 0; if the reference AC coefficient is not equal to 0, the target run value is 0.
[0098] In some embodiments, the above calculation of the target binary code and code length of the DC coefficient and each AC coefficient includes:
[0099] Step S51, taking the absolute value of the original binary code and then processing it in reverse order to obtain a first sequence; wherein the original binary code is a binary representation of a DC coefficient or an AC coefficient.
[0100] Specifically, when the original binary code is a positive number, the reverse order of the original binary code is used as the first sequence; when the original binary code is a negative number, the original binary code is inverted and then added with 1 to obtain the first sequence.
[0101] Step S52, subtract 1 from the first sequence and then invert it to obtain a second sequence.
[0102] Step S53, obtaining a third sequence according to the first sequence and the second sequence.
[0103] Specifically, the first sequence and the second sequence are subjected to an AND operation, the operation result is reversed and then subtracted by 1 to obtain a third sequence.
[0104] Step S54, determining the initial binary code and the code length according to the third sequence. Specifically, when the original binary code is a positive number, the third sequence is used as the initial binary code; when the original binary code is a negative number, the third sequence is signal modulated to obtain the initial binary code; the number of 1s in the third sequence is calculated, and the number of 1s is added by 1 to obtain the code length.
[0105] Step S55, performing an AND operation on the original binary code and the initial binary code to obtain a target binary code.
[0106] In some embodiments, the method further includes: after obtaining each AC coefficient, determining whether there is a zero value in each AC coefficient; if yes, performing run statistics on each AC coefficient.
[0107] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0108] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.
Claims
1. A DCT coefficient processing circuit for image compression, characterized in that: include: An input module, configured to receive a DC coefficient of a pixel block and an AC coefficient of each pixel in the pixel block; A coefficient code calculation module, used for calculating a DC coefficient code of the pixel block based on the DC coefficient; A run-length statistics module includes a reference pixel register and a run-length calculation unit; the run-length calculation unit is used to: Obtaining a reference AC coefficient and a reference run value in the reference pixel register; Determine a target run value of a current pixel according to the reference AC coefficient and the reference run value; Replacing the reference AC coefficient in the reference pixel register with the AC coefficient of the current pixel; Replacing the reference run value in the reference pixel register with the target run value of the current pixel; A code length calculation module, used for calculating the target binary code and code length of the DC coefficient and each of the AC coefficients; The output module is used to output the DC coefficient code, each target run value, each target binary code and each code length in combination.
2. The DCT coefficient processing circuit for image compression according to claim 1, characterized in that: The coefficient code calculation module includes a coefficient register and a coefficient code unit; The coefficient code unit is used to obtain the reference DC coefficient in the coefficient register; calculate the difference between the DC coefficient and the reference DC coefficient and use it as the DC coefficient code; The reference DC coefficient in the coefficient register is replaced with the DC coefficient.
3. The DCT coefficient processing circuit for image compression according to claim 1, characterized in that: The run calculation unit is specifically used for adding 1 to the reference run value to obtain the target run value when the reference AC coefficient is 0 and the reference run value is not equal to the preset threshold value; when the reference AC coefficient is 0 and the reference run value is equal to the preset threshold value, the target run value is set to 0; When the reference AC coefficient is not equal to 0, the target run value is set to 0.
4. The DCT coefficient processing circuit for image compression according to claim 1, characterized in that: The code length calculation module comprises: An absolute value unit, used for taking an absolute value of an original binary code and then performing reverse processing to obtain a first sequence; wherein the original binary code is a binary representation of the DC coefficient or the AC coefficient; a negation unit, used for subtracting 1 from the first sequence and then negating it to obtain a second sequence; A third sequence unit, configured to obtain a third sequence according to the first sequence and the second sequence; A code length unit, used to determine an initial binary code and a code length according to the third sequence; The binary unit is used to perform an AND operation on the original binary code and the initial binary code to obtain a target binary code.
5. The DCT coefficient processing circuit for image compression according to claim 4, characterized in that: The absolute value unit is used to use the reverse order of the original binary code as the first sequence when the original binary code is a positive number; and to invert the original binary code and add 1 to obtain the first sequence when the original binary code is a negative number.
6. The DCT coefficient processing circuit for image compression according to claim 4, characterized in that: The third sequence unit is used to perform an AND operation on the first sequence and the second sequence, and then reduce the operation result by 1 in reverse order to obtain the third sequence.
7. The DCT coefficient processing circuit for image compression according to claim 4, characterized in that: The code length unit is used to use the third sequence as the initial binary code when the original binary code is a positive number; When the original binary code is a negative number, performing signal modulation on the third sequence to obtain the initial binary code; The number of 1s in the third sequence is calculated, and the number of 1s is added by 1 to obtain the code length.
8. The DCT coefficient processing circuit for image compression according to claim 1, characterized in that: Also includes: A zero value judgment module, used for obtaining the AC coefficient of each pixel in the input module, and judging whether there is a zero value in each AC coefficient; If yes, then sending each of the AC coefficients to the run statistics module; The zero value judgment module and the coefficient code calculation module run in the same clock cycle.
9. A DCT coefficient processing method for image compression, characterized in that: include: receiving a DC coefficient of a pixel block and an AC coefficient of each pixel in the pixel block; Calculate a DC coefficient code of the pixel block based on the DC coefficient; Get the reference AC coefficient and reference run value of the previous pixel of the current pixel; Determine a target run value of the current pixel according to the reference AC coefficient and the reference run value; Calculating a target binary code and a code length of the DC coefficient and each of the AC coefficients; The DC coefficient code, each of the target run values, each of the target binary codes and each of the code lengths are combined and output.
10. The DCT coefficient processing method for image compression according to claim 9, characterized in that: The step of determining the target run value of the current pixel according to the reference AC coefficient and the reference run value comprises: If the reference AC coefficient is 0 and the reference run value is not equal to the preset threshold, then the reference run value is added by 1 to obtain the target run value; If the reference AC coefficient is 0 and the reference run value is equal to the preset threshold, the target run value is 0; If the reference AC coefficient is not equal to 0, the target run value is 0.
Citation Information
Patent Citations
Video compression using adaptive variable length codes
CN101491098A
Image compression method and device, image decompression method and device, electronic equipment and storage medium
CN118573877A
Device and method for image processing
JP1999085963A
Image processing apparatus, image processing method, and image processing program
JP2004112345A
Image coding device and its control method
JP2009076992A
